JP2002111218A - セラミック積層デバイス - Google Patents

セラミック積層デバイス

Info

Publication number
JP2002111218A
JP2002111218A JP2001168059A JP2001168059A JP2002111218A JP 2002111218 A JP2002111218 A JP 2002111218A JP 2001168059 A JP2001168059 A JP 2001168059A JP 2001168059 A JP2001168059 A JP 2001168059A JP 2002111218 A JP2002111218 A JP 2002111218A
Authority
JP
Japan
Prior art keywords
ceramic
ceramic body
multilayer
dielectric constant
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001168059A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002111218A5 (enExample
Inventor
Toru Yamada
徹 山田
Kazuhide Uryu
一英 瓜生
Tsutomu Matsumura
勉 松村
Toshio Ishizaki
俊雄 石崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001168059A priority Critical patent/JP2002111218A/ja
Publication of JP2002111218A publication Critical patent/JP2002111218A/ja
Publication of JP2002111218A5 publication Critical patent/JP2002111218A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Waveguides (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
JP2001168059A 2000-06-27 2001-06-04 セラミック積層デバイス Withdrawn JP2002111218A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001168059A JP2002111218A (ja) 2000-06-27 2001-06-04 セラミック積層デバイス

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000192265 2000-06-27
JP2000-192265 2000-06-27
JP2001168059A JP2002111218A (ja) 2000-06-27 2001-06-04 セラミック積層デバイス

Publications (2)

Publication Number Publication Date
JP2002111218A true JP2002111218A (ja) 2002-04-12
JP2002111218A5 JP2002111218A5 (enExample) 2008-03-13

Family

ID=26594733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001168059A Withdrawn JP2002111218A (ja) 2000-06-27 2001-06-04 セラミック積層デバイス

Country Status (1)

Country Link
JP (1) JP2002111218A (enExample)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040100395A (ko) * 2003-05-22 2004-12-02 주식회사 에이엔티 Ltcc 적층 커플링을 이용한 fbar 밴드패스 필터 및 듀플렉스
JP2005158770A (ja) * 2003-11-20 2005-06-16 Matsushita Electric Ind Co Ltd 積層基板とその製造方法及び前記積層基板を用いたモジュールの製造方法とその製造装置
JP2005531138A (ja) * 2002-06-25 2005-10-13 エプコス　アクチエンゲゼルシャフト 多層基板を備えた電子部品および電子部品の製造方法
US6985712B2 (en) 2001-08-27 2006-01-10 Matsushita Electric Industrial Co., Ltd. RF device and communication apparatus using the same
JP2008130618A (ja) * 2006-11-16 2008-06-05 Murata Mfg Co Ltd 多層配線基板
KR100850879B1 (ko) * 2002-05-15 2008-08-07 엘지이노텍 주식회사 저온 소성 세라믹을 이용한 안테나 스위치
JP2008186962A (ja) * 2007-01-29 2008-08-14 Murata Mfg Co Ltd 多層配線基板
US7413975B2 (en) 2002-07-23 2008-08-19 Seiko Epson Corporation Interconnect substrate, semiconductor device, methods of manufacturing the same, circuit board, and electronic equipment
JP2010258586A (ja) * 2009-04-22 2010-11-11 Taiyo Yuden Co Ltd 通信モジュール
JP2011151553A (ja) * 2010-01-20 2011-08-04 Murata Mfg Co Ltd 弾性波デュプレクサ
JP2011151552A (ja) * 2010-01-20 2011-08-04 Murata Mfg Co Ltd 弾性波デュプレクサ
JP2011216635A (ja) * 2010-03-31 2011-10-27 Murata Mfg Co Ltd 電子部品内蔵基板、電子回路モジュール、および電子部品内蔵基板の製造方法
JP2012520652A (ja) * 2010-05-12 2012-09-06 メディアテック インコーポレーテッド 信号ライン遷移素子を備えた回路装置

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6985712B2 (en) 2001-08-27 2006-01-10 Matsushita Electric Industrial Co., Ltd. RF device and communication apparatus using the same
KR100850879B1 (ko) * 2002-05-15 2008-08-07 엘지이노텍 주식회사 저온 소성 세라믹을 이용한 안테나 스위치
US7795728B2 (en) 2002-06-25 2010-09-14 Epcos Ag Electronic component
JP2005531138A (ja) * 2002-06-25 2005-10-13 エプコス　アクチエンゲゼルシャフト 多層基板を備えた電子部品および電子部品の製造方法
JP4778228B2 (ja) * 2002-06-25 2011-09-21 エプコス アクチエンゲゼルシャフト 多層基板を備えた電子部品
KR100954030B1 (ko) * 2002-06-25 2010-04-20 에프코스 아게 다층 기판을 갖는 전자 소자 및 그 제조 방법
US7413975B2 (en) 2002-07-23 2008-08-19 Seiko Epson Corporation Interconnect substrate, semiconductor device, methods of manufacturing the same, circuit board, and electronic equipment
CN100431120C (zh) * 2002-07-23 2008-11-05 精工爱普生株式会社 布线基板、半导体器件及其制造方法、电路板和电子仪器
US7541278B2 (en) 2002-07-23 2009-06-02 Seiko Epson Corporation Interconnect substrate, semiconductor device, methods of manufacturing the same, circuit board, and electronic equipment
KR20040100395A (ko) * 2003-05-22 2004-12-02 주식회사 에이엔티 Ltcc 적층 커플링을 이용한 fbar 밴드패스 필터 및 듀플렉스
JP2005158770A (ja) * 2003-11-20 2005-06-16 Matsushita Electric Ind Co Ltd 積層基板とその製造方法及び前記積層基板を用いたモジュールの製造方法とその製造装置
JP2008130618A (ja) * 2006-11-16 2008-06-05 Murata Mfg Co Ltd 多層配線基板
JP2008186962A (ja) * 2007-01-29 2008-08-14 Murata Mfg Co Ltd 多層配線基板
JP2010258586A (ja) * 2009-04-22 2010-11-11 Taiyo Yuden Co Ltd 通信モジュール
JP2011151553A (ja) * 2010-01-20 2011-08-04 Murata Mfg Co Ltd 弾性波デュプレクサ
JP2011151552A (ja) * 2010-01-20 2011-08-04 Murata Mfg Co Ltd 弾性波デュプレクサ
US8525615B2 (en) 2010-01-20 2013-09-03 Murata Manufacturing Co., Ltd. Elastic wave duplexer having a sealing member that includes a recess
JP2011216635A (ja) * 2010-03-31 2011-10-27 Murata Mfg Co Ltd 電子部品内蔵基板、電子回路モジュール、および電子部品内蔵基板の製造方法
JP2012520652A (ja) * 2010-05-12 2012-09-06 メディアテック インコーポレーテッド 信号ライン遷移素子を備えた回路装置

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