JP2002110882A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

Info

Publication number
JP2002110882A
JP2002110882A JP2000301987A JP2000301987A JP2002110882A JP 2002110882 A JP2002110882 A JP 2002110882A JP 2000301987 A JP2000301987 A JP 2000301987A JP 2000301987 A JP2000301987 A JP 2000301987A JP 2002110882 A JP2002110882 A JP 2002110882A
Authority
JP
Japan
Prior art keywords
header
pellet
semiconductor
heat
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000301987A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002110882A5 (enrdf_load_stackoverflow
Inventor
Yukihiro Sato
幸弘 佐藤
Kazuo Shimizu
一男 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2000301987A priority Critical patent/JP2002110882A/ja
Publication of JP2002110882A publication Critical patent/JP2002110882A/ja
Publication of JP2002110882A5 publication Critical patent/JP2002110882A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2000301987A 2000-10-02 2000-10-02 半導体装置およびその製造方法 Pending JP2002110882A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000301987A JP2002110882A (ja) 2000-10-02 2000-10-02 半導体装置およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000301987A JP2002110882A (ja) 2000-10-02 2000-10-02 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2002110882A true JP2002110882A (ja) 2002-04-12
JP2002110882A5 JP2002110882A5 (enrdf_load_stackoverflow) 2005-06-30

Family

ID=18783430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000301987A Pending JP2002110882A (ja) 2000-10-02 2000-10-02 半導体装置およびその製造方法

Country Status (1)

Country Link
JP (1) JP2002110882A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7692285B2 (en) 2005-06-30 2010-04-06 Renesas Technology Corp. Semiconductor device
JP2010212727A (ja) * 2010-05-20 2010-09-24 Mitsubishi Electric Corp 半導体装置
WO2016006650A1 (ja) * 2014-07-10 2016-01-14 大日本印刷株式会社 リードフレームの多面付け体、樹脂付きリードフレームの多面付け体、半導体装置の多面付け体、樹脂付きリードフレームの多面付け体の製造方法、それに使用される射出成形用金型、成形装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7692285B2 (en) 2005-06-30 2010-04-06 Renesas Technology Corp. Semiconductor device
US7969000B2 (en) 2005-06-30 2011-06-28 Renesas Electronics Corporation Semiconductor device
JP2010212727A (ja) * 2010-05-20 2010-09-24 Mitsubishi Electric Corp 半導体装置
WO2016006650A1 (ja) * 2014-07-10 2016-01-14 大日本印刷株式会社 リードフレームの多面付け体、樹脂付きリードフレームの多面付け体、半導体装置の多面付け体、樹脂付きリードフレームの多面付け体の製造方法、それに使用される射出成形用金型、成形装置

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