JP2002110458A - Solid electrolytic chip capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a small-sized chip capacitor having large capacitance at a low cost. SOLUTION: The chip capacitor has a lead 1, a capacitor element 2 formed of a dielectric oxide film, a solid electrolytic layer, and a cathode lead-out layer; an electrode substrate 7 to be a capacitor electrode; and a packaging resin 2. The electrode substrate 7 is provided with an insulating layer 4 having at least two through-holes, a conductive plate 3 disposed to cover one of the through-holes, and an electrode layer 10 formed by burying the through-holes.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip solid electrolytic capacitor.

[0002]

2. Description of the Related Art Conventional chip-shaped solid electrolytic capacitors are:
A capacitor element 2 having an anode lead 1 and a solid electrolyte layer and a cathode extraction layer as shown in FIG.
Then, the lead frame 11 is led out from the side surface of the exterior resin 9 and bent along the exterior resin 9 to form an electrode on the substrate ground plane. Also, Japanese Patent Application Laid-Open No. 8-148386.
Japanese Patent Laid-Open Publication No. H11-15064 proposes a manufacturing method in which a capacitor element and a lead are connected to an insulating through-hole electrode substrate having a step for supporting the capacitor element with a conductive adhesive.

[0003]

Further, as components are mounted at a high density, there is a demand for miniaturization of chip-shaped solid electrolytic capacitors. However, in the conventional chip-shaped solid electrolytic capacitor in which the lead frame is bent to form external electrodes as shown in FIG. 5, the smaller the product volume, the larger the proportion of the lead frame in the volume, and the volume of the capacitor element to be housed is sufficient. There was no problem. Furthermore, when mounting on a board, if the distance between components is shortened, adjacent components may be slightly displaced by reflow soldering, so a conventional chip-shaped solid electrolytic capacitor that forms a lead frame on the side of electronic components In such a case, there is a danger of short-circuiting between components, and there is a problem that further high-density mounting cannot be advanced. On the other hand, a chip component having a structure in which a capacitor element is connected to a stepped through-hole electrode substrate with a conductive adhesive and an electrode is formed only on the lower surface of the chip component, that is, only on the substrate ground plane, has been proposed. In addition to the increased manufacturing cost, the lead-out lead of the capacitor element is usually made of a valve metal such as tantalum, and the electrical connection using a conductive adhesive increases the resistance at the connection interface due to surface oxidation, deteriorating the capacitor characteristics. Further, there is a problem that the bonding strength is weakened and peeling is caused. Further, in the conventional capacitor, since the thickness of the electrode terminal itself is at least 80 μm or more, the distance between the lower surface of the product and the lower surface of the capacitor element is 140 μm or more. Had become.

[0004]

SUMMARY OF THE INVENTION The present invention relates to a capacitor element having an electrode substrate having an insulating layer having a through hole, a conductive plate covering the through hole, an electrode layer filling the through hole, and a lead. By having an electrically connected structure,
The thickness of the electrode substrate can be reduced, and a chip capacitor excellent in element storage capacity can be realized, and high-density mounting is possible by eliminating the lead on the side surface of the capacitor. That is, it has the lead 1 and
In a capacitor element 2 having a dielectric oxide film, a solid electrolyte layer, and a cathode extraction layer, an electrode substrate 7 serving as an electrode of the capacitor, and a chip-shaped capacitor having an exterior resin 9, the electrode substrate 7 is provided in at least two places. An insulating layer 4 having a through hole, conductive plates 3 and 3 arranged to cover one of the through holes, and electrode layers 10 and 10 formed in the through hole.
And a chip-shaped solid electrolytic capacitor characterized by having:

The electrode substrate 7 has plating layers 6a to 6d in contact with the conductive plates 3 and 3, and the plating layers 6b and 6d in the through holes are provided.
6d is a chip-shaped solid electrolytic capacitor in which the electrode layers 10 and 10 are in contact with each other.

When the electrode substrate 7 has at least two
A resin film having a through hole at a location and an adhesive layer are used as an insulating layer 4, one of the through holes is covered with a conductive plate 3, 3, and then a plating made of tin plating or solder plating in contact with the conductive plate 3, 3 This is a chip-shaped solid electrolytic capacitor comprising: layers 6a to 6d; and electrode layers 10, 10 formed so as to be in contact with the plating layers 6b, 6d in the through holes.

Further, in the chip-shaped capacitor, the resin film is a polyimide film, and the adhesive layer is made of an epoxy-based adhesive.

On the electrode substrate 7, at least two conductive plates 3 and 3 are arranged, an insulating resin is applied and cured to form an insulating layer 4, and then the insulating resin on the conductive plates 3 and 3 is formed. Are removed to form through holes in the insulating layer 4, and the plating layers 6a to 6 made of tin plating or solder plating in contact with the conductive plates 3 and 3 are formed.
This is a chip-shaped solid electrolytic capacitor obtained by forming an electrode layer 10 after forming d.

[0009] A chip-shaped solid electrolytic capacitor characterized in that the insulating resin is a polyimide resin.

The thickness of the electrode substrate 7 is 25 to 90 μm.
It is a chip-shaped solid electrolytic capacitor characterized by the following.

A chip-shaped solid electrolytic capacitor characterized in that the lead-out lead (1) and one conductive plate (3) are electrically connected by a metal strip (5).

Further, the chip-shaped solid electrolytic capacitor is characterized in that the metal strip 5 is made of nickel or a nickel alloy as a base material and is plated with tin or solder.

The chip-shaped solid electrolytic capacitor is characterized in that the shape of the metal strip 5 is a prism.

[0014] A chip-shaped solid electrolytic capacitor characterized in that the shape of the metal strip 5 is a triangular to hexagonal prism.

The lead-out lead 1 and the metal strip 5 are connected by resistance welding, and the side surface of the metal strip 5 and the electrode substrate 7 are connected by a conductive adhesive 8. It is a capacitor.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION A lead lead is electrically connected to an electrode substrate via a metal strip and a conductive adhesive, and a capacitor element is electrically connected to the electrode substrate via a conductive adhesive. By forming an electrode layer on the back surface of the electrode substrate, it is possible to realize a chip-shaped capacitor having a higher element storage capacity than a capacitor having a lead frame connected to the capacitor element as an external electrode, and further having a lead on the side of the capacitor. Since there is no frame, it is possible to prevent an electrical short circuit between components even if the components are displaced during reflow soldering.

Further, by providing the conductive plates 3 and 3, the electrode layers 10 and 1 can be formed without increasing the thickness of the electrode substrate 7.
The width and position of 0 can be arbitrarily designed, and a structure in which no electrode is formed at least on the side surface of the component can be adopted. Therefore, a high-density mounting board designed with a distance between components of about 0.1 to 0.15 mm and having a structure in which there is no conductive portion on the side surface of the component even if the component is misaligned during reflow soldering. No electrical short circuit occurs between them. The upper prism-shaped metal strip is used for connection between the lead-out lead and the anode external terminal, and the electrode substrate 7 can be a substantially planar substrate. Therefore, a low-cost, extremely productive capacitor can be obtained. it can. Furthermore, since a lead frame having a thickness restriction is not used for an electrode, it is possible to provide a chip-shaped solid electrolytic capacitor having an extremely excellent volume effective utilization rate.

[0018]

[Embodiment 1] An embodiment of the present invention will be specifically described below with reference to the drawings. FIG. 1 is a cross-sectional view of a chip-shaped solid electrolytic capacitor showing an embodiment of the present invention.

A dielectric oxide film, a solid electrolyte layer, and a cathode extraction layer were formed on a tantalum sintered body provided with the lead 1 by a known method to obtain a capacitor element 2. An epoxy adhesive is applied to the upper surface of a 50 μm-thick polyimide film having two through holes, and the conductive plates 3 and 3 have a thickness of 1 μm.
Using a rolled copper plate of 8 μm, it is placed on the application surface so as to cover the through-holes and then cured, and the plating layers 6a to 6d in contact with the conductive plate are formed by matte tin plating, and the solder paste is printed in the remaining through-holes The electrodes 10, 10 were used to form an electrode substrate 7 having a thickness of 80 μm. Next, a metal strip 5 whose surface is matte tin-plated with an iron-nickel alloy as a base material and a lead lead are resistance-welded to form a metal strip and a plating layer 6a, a capacitor element 2 and a plating layer 6c. Were electrically connected with a conductive adhesive 8, respectively, and then the capacitor element was covered with an exterior resin to produce a chip-shaped solid electrolytic capacitor of 1.6 × 0.8 × 0.8 mm (1608 size).

[Embodiment 2] FIG. 2 is a sectional view of a chip-shaped solid electrolytic capacitor according to another embodiment of the present invention. Two 18 μm-thick rolled copper plates are arranged as conductive plates, and a polyimide resin is applied and cured to form an insulating layer 4. Then, a part of the polyimide resin on the conductive plate is removed to form a through hole in the insulating layer 4. After the plating layers 6a to 6d were formed by matte solder plating, solder paste was printed on the remaining through holes to form electrodes 10 and 10, thereby forming an electrode substrate 7 having a thickness of 80 μm. Otherwise, a 1608 size chip-shaped solid electrolytic capacitor was manufactured in the same manner as in the example.

As a conventional example, a lead frame 16 is used.
As a comparative example, a capacitor of 08 size was disclosed in
A 1608-size capacitor using a stepped through-hole electrode substrate described in Japanese Patent No. 48386 was manufactured.
In Example 2, the conventional example, and the comparative example, when the conventional example was set to 1.00, the element accommodation volume ratio that could be maximally accommodated in the product and the vertical direction with respect to the design value of the electrode layer or the lead frame as the external electrode. Table 1 shows electrode position variations.

[0022]

[Table 1]

Table 1 shows that Examples 1 and 2 according to the present invention have a higher element accommodation volume ratio than the conventional example and the comparative example, and are excellent.
It can be seen that the electrode position variation is smaller than that of the conventional example and is superior.

Another embodiment is shown in FIGS. The shape of the metal strip 5 is desirably a prism, preferably a tri-hexagonal prism. By making the shape of the metal strip 5 a prism, and connecting the side surface of the prism and the anode-side internal electrode 6a with the conductive adhesive 8,
Electrically and physically stable connection for a long period of time is possible, and the prism is hard to roll, so that workability can be improved. Note that the lead lead welding portion of the metal strip 5 may be cut out.

In the first and second embodiments, the printing of the solder paste is used for forming the electrode layer 10. However, the electrode layer 10 may be formed by silver paste, silver paste and solder paste, dipping in a solder bath, and solder ball connection.

After the conductive plate is attached to the insulating film, or after the conductive plate is coated and cured with an insulating resin, unnecessary portions of the conductive plate may be removed by etching.

The metal strip material is basically insulated from the outside by the exterior resin 9, but in consideration of the possibility of being exposed to the outside due to the design dimensions and processing accuracy of the manufacturing equipment, the A material that does not easily wet with solder is desirable, and nickel or a nickel alloy is preferred. For the surface plating of the metal strip, a material such as matte solder plating can be used as in the case of the above-described electrode substrate 7, and the surface of the metal strip 5 is plated to be connected to the conductive adhesive 8. Can be electrically and physically stabilized.

It should be noted that the electrode substrates of Examples 1 and 2 have a thickness of 80.
It is needless to say that the use of a thinner material improves the volume effective utilization effect.
A thickness of 80 μm to 150 μm centering on μm can be made thinner with a so-called flexible substrate. However, when the thickness of the substrate is less than 25 μm, the rigidity of the substrate is weak, and the handleability in the capacitor assembling process is significantly deteriorated, and the productivity is extremely deteriorated. On the other hand, 90μ
If the substrate thickness exceeds m, the volume ratio occupying the solid electrolytic capacitor becomes large, and the volume efficiency deteriorates. Therefore, from the viewpoint of effective volume utilization, availability of materials, and productivity of the solid electrolytic capacitor chip, the thickness of the electrode substrate is 25 to 90 μm.
The range of m is preferred.

Further, a plurality of continuous electrode substrates are manufactured by using a conductive plate obtained by etching or punching, a plurality of capacitor elements are connected to each electrode substrate, and collectively covered with an exterior resin. It may be later separated into individual capacitors.

[0030]

As described above, the chip-shaped capacitor according to the present invention uses an electrode substrate having an insulating layer having at least two through holes, a conductive plate covering the through holes, and an electrode layer filling the through holes. Since electrodes can be formed on the lower surface without providing a conductive part on the side of the product, it can be used for high-density mounting, and the positions of the internal and external electrodes can be arbitrarily designed. And
In addition, since the electrode layer on the lower surface of the electrode substrate is formed by conductive paste printing, dipping into a solder bath, etc., it is possible to obtain a low-cost chip-shaped solid electrolytic capacitor capable of stably mounting the substrate with little variation in flatness. Can be.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a chip-shaped solid electrolytic capacitor according to an embodiment of the present invention.

FIG. 2 is a sectional view of a chip-shaped solid electrolytic capacitor according to another embodiment of the present invention.

FIG. 3 is a cross-sectional view of a chip-shaped solid electrolytic capacitor according to an embodiment in which a metal strip is a hexagonal column.

FIG. 4 is a cross-sectional view of a chip-shaped solid electrolytic capacitor according to an embodiment in which a metal strip is used as a triangular prism.

FIG. 5 is a sectional view of a conventional chip capacitor.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 lead-out 2 capacitor element 3 conductive plate 4 insulating layer 5 metal strip 6 a plating layer (anode internal electrode) 6 b plating layer (anode external electrode) 6 c plating layer (cathode internal electrode) 6 d plating layer (cathode external) Electrode) 7 electrode substrate 8 conductive adhesive 9 exterior resin 10 electrode layer 11 lead frame

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Nobuo Sunset 4th floor of Uehara Bldg., 3rd floor, 191-st. Nichicon Co., Ltd., 3rd floor, Uehara Building, 191 Nakabori-cho, Oike-dori Karasuma-Higashi-iri, Nakagyo-ku, Kyoto-shi

Claims (12)

[Claims] 1. A lead oxide lead, comprising: a dielectric oxide film;
A solid electrolyte layer, a capacitor element formed with a cathode extraction layer, an electrode substrate serving as an electrode of the capacitor, and a chip-shaped solid electrolytic capacitor having an exterior resin, wherein the electrode substrate has an insulating layer having at least two through holes. A chip-shaped solid electrolytic capacitor, comprising: a conductive plate arranged to cover one of the through holes; and an electrode layer formed in the through hole. 2. The solid electrolytic capacitor according to claim 1, wherein the electrode substrate according to claim 1 has a plating layer in contact with the conductive plate, and the plating layer in the through hole and the electrode layer are in contact with each other. 3. The electrode substrate, wherein a resin film having at least two through holes and an adhesive layer are used as insulating layers, one of the through holes is covered with a conductive plate, and then tin plating or Form a plating layer consisting of solder plating,
2. The solid electrolytic capacitor according to claim 1, further comprising an electrode layer formed in contact with the plating layer in the through hole. 4. The solid electrolytic capacitor according to claim 3, wherein said resin film is a polyimide film, and said adhesive layer is made of an epoxy-based adhesive. 5. The electrode substrate according to claim 1, wherein at least two conductive plates are arranged, an insulating resin is applied and cured to form an insulating layer, and then the insulating resin on the conductive plate is removed to penetrate the insulating layer. 3. The chip-shaped chip according to claim 2, further comprising: forming a hole, forming a plating layer made of tin plating or solder plating in contact with the conductive plate, and then forming an electrode layer in contact with the plating layer in the through hole. Solid electrolytic capacitor. 6. The solid electrolytic capacitor according to claim 5, wherein said insulating resin is a polyimide resin. 7. The thickness of the electrode substrate is 25 to 90 μm.
The chip-shaped solid electrolytic capacitor according to claim 1, wherein: 8. The lead wire and one of the conductive plates are electrically connected by a metal strip.
The chip-shaped solid electrolytic capacitor as described in the above. 9. A chip-shaped solid electrolytic capacitor according to claim 9, wherein said metal strip is made of nickel or a nickel alloy as a base material and is plated with tin or solder. 10. The chip-shaped solid electrolytic capacitor according to claim 9, wherein the shape of the metal strip is a prism. 11. The chip-shaped solid electrolytic capacitor according to claim 9, wherein the shape of the metal strip is a triangular prism to a hexagonal prism. 12. The method according to claim 9, wherein the lead and the metal strip are connected by resistance welding, and the side surface of the metal strip and the electrode substrate are connected by a conductive adhesive. Chip-shaped solid electrolytic capacitor.