JP2002100693A - Package for housing semiconductor element - Google Patents

Package for housing semiconductor element

Info

Publication number
JP2002100693A
JP2002100693A JP2000287455A JP2000287455A JP2002100693A JP 2002100693 A JP2002100693 A JP 2002100693A JP 2000287455 A JP2000287455 A JP 2000287455A JP 2000287455 A JP2000287455 A JP 2000287455A JP 2002100693 A JP2002100693 A JP 2002100693A
Authority
JP
Japan
Prior art keywords
frame
flat plate
input
brazing material
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000287455A
Other languages
Japanese (ja)
Other versions
JP3615697B2 (en
Inventor
Nobuyuki Tanaka
信幸 田中
Minoru Kobayashi
小林  実
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000287455A priority Critical patent/JP3615697B2/en
Publication of JP2002100693A publication Critical patent/JP2002100693A/en
Application granted granted Critical
Publication of JP3615697B2 publication Critical patent/JP3615697B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To effectively prevent cracks from causing in an input and output terminal mounted to a semiconductor package. SOLUTION: The package for housing a semiconductor element comprises an input and output terminal 4 having a flat part 4a and a standing wall 4b formed of dielectric material. A notch 4c, which has a surface P flush with the side of the standing wall 4b inside a flame body 2, is formed on a portion of a side H of the flat part 4a inside the frame body 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、光通信やマイクロ
波通信、ミリ波通信等の分野に用いられる各種半導体素
子を収納する半導体素子収納用パッケージに関し、特に
この半導体素子収納用パッケージに設けられる入出力端
子の改良に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing various semiconductor devices used in the fields of optical communication, microwave communication, millimeter wave communication, etc., and more particularly, to a semiconductor device housing package provided in this semiconductor device housing package. It relates to improvement of input / output terminals.

【0002】[0002]

【従来の技術】従来、マイクロ波帯域やミリ波帯域の高
周波信号や、光信号により作動する各種半導体素子を収
納する半導体素子収納用パッケージ(以下、半導体パッ
ケージという)には、半導体素子と外部電気回路との高
周波信号の入出力を行うための入出力端子が設けられて
いる。この半導体パッケージのうち、光通信分野に用い
られている光半導体パッケージについて、図4,図5に
斜視図を示す。
2. Description of the Related Art Conventionally, a semiconductor element housing package (hereinafter referred to as a semiconductor package) for housing various semiconductor elements operated by a high frequency signal in a microwave band or a millimeter wave band or an optical signal includes a semiconductor element and an external electric device. An input / output terminal for inputting / outputting a high-frequency signal to / from the circuit is provided. 4 and 5 are perspective views of an optical semiconductor package used in the optical communication field among the semiconductor packages.

【0003】これらの図に示すように、入出力端子10
4は、略長方形の平板部104aの上面に略直方体の立
壁部104bが積層されて成り、半導体素子109と外
部電気回路(図示せず)との高周波信号の入出力を行う
機能を有するとともに、光半導体パッケージの内外を遮
断する機能を有する。
As shown in these figures, an input / output terminal 10
4 is formed by stacking a substantially rectangular parallelepiped standing wall portion 104b on the upper surface of a substantially rectangular flat plate portion 104a, and has a function of inputting and outputting a high-frequency signal between the semiconductor element 109 and an external electric circuit (not shown). It has a function of blocking the inside and outside of the optical semiconductor package.

【0004】この平板部104aは、アルミナ(Al2
3)セラミックス,窒化アルミニウム(AlN)セラ
ミックス,ムライト(3Al23・2SiO2)セラミ
ックス等の誘電体から成り、その上面に、一長辺から対
向する他の長辺にかけて、タングステン(W),モリブ
デン(Mo)−マンガン(Mn)等のメタライズ層から
成る線路導体104a−Aが形成されるとともに、下面
には、その全面に線路導体104a−Aと同様のメタラ
イズ層から成る下部接地導体104a−Cが、また側面
には、線路導体104a−Aと平行である側面の全面に
線路導体104a−Aと同様のメタライズ層から成る側
部接地導体104a−Bが形成される。
The flat plate portion 104a is made of alumina (Al 2
O 3 ) ceramics, aluminum nitride (AlN) ceramics, mullite (3Al 2 O 3 .2SiO 2 ) ceramics, etc., and a tungsten (W) , Molybdenum (Mo) -manganese (Mn) and the like, and a lower conductor 104a-A made of a metallized layer similar to the line conductor 104a-A on the entire lower surface. On the side surface parallel to the line conductor 104a-A, a side ground conductor 104a-B made of the same metallization layer as the line conductor 104a-A is formed.

【0005】メタライズ層から成る、これら線路導体1
04a−A,側部接地導体104a−B,下部接地導体
104a−Cは、タングステン(W)、モリブデン(M
o)、マンガン(Mn)等で形成されている。例えばタ
ングステン等の粉末に有機溶剤、溶媒を添加混合して得
た金属ペーストを、平板部104a用のセラミックグリ
ーンシートに、予め従来周知のスクリーン印刷法により
所定パターンに印刷塗布しておき、焼成することにより
形成される。
These line conductors 1 made of a metallized layer
04a-A, side ground conductors 104a-B, and lower ground conductors 104a-C are made of tungsten (W), molybdenum (M
o), manganese (Mn) or the like. For example, a metal paste obtained by adding and mixing an organic solvent and a solvent to a powder of tungsten or the like is preliminarily printed and applied in a predetermined pattern on a ceramic green sheet for the flat plate portion 104a by a conventionally known screen printing method, followed by baking. It is formed by this.

【0006】一方、立壁部104bは、平板部104a
と同様の誘電体から成り、その上面の全面に線路導体1
04a−Aと同様のメタライズ層から成る上部接地導体
104b−Aが、また側面には、平板部104aの側部
接地導体104a−Bに接する面の全面に線路導体10
4a−Aと同様のメタライズ層から成る側面接地導体1
04b−Bが形成される。
On the other hand, the vertical wall portion 104b is
And a line conductor 1 on the entire upper surface thereof.
An upper ground conductor 104b-A made of the same metallization layer as that of the flat conductor 104a-A is provided on the entire surface of the flat plate portion 104a in contact with the side ground conductor 104a-B.
Side grounding conductor 1 made of the same metallized layer as 4a-A
04b-B is formed.

【0007】メタライズ層から成る、これら上部接地導
体104b−A,側面接地導体104b−Bは、平板部
104aに形成される線路導体104a−A,側部接地
導体104a−B,下部接地導体104a−Cと同様の
方法により所定パターンに印刷塗布しておき焼成するこ
とにより形成される。
The upper grounding conductor 104b-A and the side grounding conductor 104b-B, which are made of a metallized layer, are a line conductor 104a-A, a side grounding conductor 104a-B, and a lower grounding conductor 104a- formed on the flat plate portion 104a. It is formed by printing and applying a predetermined pattern in the same manner as in C and baking it.

【0008】このように、入出力端子104は、これら
上部接地導体104b−A、側面接地導体104b−
B、側部接地導体104a−B、下部接地導体104a
−Cとで、線路導体104a−Aを擬似同軸構造とし、
高周波信号の入出力を良好なものとするとともに、枠体
102に設けられた切欠部または貫通孔から成る取付部
102aに銀ロウ等のロウ材を介して接合されることに
より、光半導体パッケージ内外を遮断する機能を有す
る。
As described above, the input / output terminal 104 is connected to the upper ground conductor 104b-A and the side ground conductor 104b-A.
B, side ground conductors 104a-B, lower ground conductor 104a
-C, the line conductor 104a-A has a pseudo-coaxial structure,
By making the input and output of high-frequency signals good, it is joined to a mounting portion 102a formed of a cutout or a through hole provided in the frame body 102 via a brazing material such as silver brazing, so that the inside and outside of the optical semiconductor package can be improved. It has the function of shutting off.

【0009】この光半導体パッケージは、基体101
と、その上面に接合された枠体102と、この枠体10
2の側部に嵌着された入出力端子104、枠体102の
側部に接合された光ファイバ固定用の筒状の固定部材1
03と、枠体102上面に接合されたシールリング10
6とを具備している。
This optical semiconductor package comprises a substrate 101
And a frame 102 joined to the upper surface thereof, and the frame 10
2, an input / output terminal 104 fitted to the side of the frame 2, and a cylindrical fixing member 1 for fixing an optical fiber joined to the side of the frame 102.
03 and the seal ring 10 joined to the upper surface of the frame 102.
6 is provided.

【0010】基体101は、半導体素子109を載置す
る載置部101aを有し、半導体素子109の作動時に
発する熱を外部に効率良く放散する機能を有する、銅
(Cu)−タングステン(W)合金や鉄(Fe)−ニッ
ケル(Ni)−コバルト(Co)合金等の金属材料から
成る。
The base 101 has a mounting portion 101a on which the semiconductor element 109 is mounted, and has a function of efficiently dissipating heat generated during operation of the semiconductor element 109 to the outside. Copper (Cu) -tungsten (W) It is made of a metal material such as an alloy or an iron (Fe) -nickel (Ni) -cobalt (Co) alloy.

【0011】枠体102は、基体101上面に載置部1
01aを囲繞するように銀ロウ等のロウ材で接合され、
側部に入出力端子104を嵌着する取付部102aと、
他の側部に光伝送路として機能する貫通孔102bとが
形成されたものであり、銅(Cu)−タングステン
(W)合金や鉄(Fe)−ニッケル(Ni)−コバルト
(Co)合金等の金属材料から成る。
The frame 102 has a mounting portion 1
01a is joined with a brazing material such as silver brazing to surround the
A mounting portion 102a for fitting the input / output terminal 104 to a side portion,
A through hole 102b functioning as an optical transmission path is formed on the other side, and a copper (Cu) -tungsten (W) alloy, an iron (Fe) -nickel (Ni) -cobalt (Co) alloy, etc. Made of metallic material.

【0012】入出力端子104は、取付部102aに銀
ロウ等のロウ材で嵌着される。
The input / output terminal 104 is fitted to the mounting portion 102a with a brazing material such as silver brazing.

【0013】固定部材103は、その一面が貫通孔10
2bの開口を囲むように銀ロウ等のロウ材で接合され、
もう片面には光ファイバ108を樹脂等の接着剤で取着
した金属ホルダ107が金(Au)−錫(Sn)等の低
融点ロウ材で接合される。
The fixing member 103 has one surface formed through the through hole 10.
2b is joined with a brazing material such as silver brazing so as to surround the opening,
On the other side, a metal holder 107 to which an optical fiber 108 is attached with an adhesive such as a resin is joined with a low melting point brazing material such as gold (Au) -tin (Sn).

【0014】リード端子105は、入出力端子104の
線路導体104a−Aに銀ロウ等のロウ材を介して接合
され、外部電気回路と入出力端子104との高周波信号
の入出力を行うものであり、鉄(Fe)−ニッケル(N
i)−コバルト(Co)合金等の金属材料から成る。
The lead terminal 105 is connected to the line conductor 104a-A of the input / output terminal 104 via a brazing material such as silver brazing, and inputs and outputs a high-frequency signal between the external electric circuit and the input / output terminal 104. Yes, iron (Fe) -nickel (N
i)-A metal material such as a cobalt (Co) alloy.

【0015】シールリング106は、枠体102上面に
銀ロウ等のロウ材で接合され入出力端子104を挟持す
るとともに、上面に蓋体(図示せず)をシーム溶接等に
より接合するための媒体として機能する。
A seal ring 106 is bonded to the upper surface of the frame 102 with a brazing material such as silver brazing to sandwich the input / output terminals 104 and to bond a lid (not shown) to the upper surface by seam welding or the like. Function as

【0016】このような光半導体パッケージに、光半導
体素子としての半導体素子109を載置部101aにS
n−Pb半田等の低融点ロウ材で載置固定するととも
に、線路導体104a−Aと半導体素子109とをボン
ディングワイヤ(図示せず)で電気的に接続し、さらに
固定部材103に、光ファイバ108を樹脂等の接着剤
で取着した金属ホルダ107を、金(Au)−錫(S
n)等の低融点ロウ材で接合した後、シールリング10
6上面に蓋体(図示せず)をシーム溶接等により接合す
ることにより、製品としての光半導体装置となる。
In such an optical semiconductor package, a semiconductor element 109 as an optical semiconductor element is mounted on the mounting portion 101a.
The line conductor 104a-A and the semiconductor element 109 are electrically connected by a bonding wire (not shown) while being mounted and fixed with a low melting point brazing material such as n-Pb solder. A metal holder 107 having an adhesive 108 attached thereto with a resin or the like is attached to a gold (Au) -tin (S
n) and the like, and after joining with a low melting point brazing material, the seal ring 10
6. An optical semiconductor device as a product is obtained by joining a lid (not shown) to the upper surface by seam welding or the like.

【0017】このような光半導体装置は、例えば外部電
気回路から供給される駆動信号によって光半導体素子1
09を光励起させ、励起したレーザ光等の光を光ファイ
バ108に授受させるとともに、光ファイバ108内を
伝送させることにより、大容量の情報を高速に伝送でき
る光電変換装置として機能するとともに、光通信分野等
に多く用いられる。
In such an optical semiconductor device, for example, the optical semiconductor element 1 is driven by a drive signal supplied from an external electric circuit.
09 is optically excited, and the excited laser light and the like are transmitted to and received from the optical fiber 108, and transmitted through the optical fiber 108, thereby functioning as a photoelectric conversion device capable of transmitting a large amount of information at high speed, and Often used in fields.

【0018】[0018]

【発明が解決しようとする課題】しかしながら、上記従
来の入出力端子104において、これを取付部102a
に銀ロウ等のロウ材で嵌着させた際に、このロウ材が、
側部接地導体104a−Bと金属材料から成る枠体10
2内壁面とのわずかな隙間を埋めるように流れて、その
隙間にロウ材溜まりを発生させる場合があった。その場
合、ロウ材と平板部104aの半導体パッケージ内に位
置する部位との間、およびロウ材と枠体102内壁面と
の間のそれぞれの間の熱膨張差により、最も弾性の低い
平板部104aに熱歪みが発生し、クラックが発生する
という問題点を有していた。
However, in the above-mentioned conventional input / output terminal 104, the input / output terminal 104 is attached to the mounting portion 102a.
When fitted with a brazing material such as silver brazing,
Frame body 10 composed of side ground conductors 104a-B and metal material
In some cases, it flows so as to fill a small gap with the inner wall surface, and a brazing material pool is generated in the gap. In this case, due to the difference in thermal expansion between the brazing material and the portion of the flat portion 104a located in the semiconductor package, and between the brazing material and the inner wall surface of the frame 102, the flat portion 104a having the lowest elasticity is formed. However, there is a problem that heat distortion occurs and cracks occur.

【0019】なお、この問題点を解決する方法として、
側部接地導体104a−Bと枠体102内壁面との隙間
を十分に大きくすることが考えられ、この場合、枠体1
02を大きくするか、または入出力端子104を小さく
するかのいずれかとなる。枠体102を大きくした場
合、半導体パッケージを大型化することになり、近時の
半導体パッケージの小型軽量化の動向から外れることと
なる。一方、入出力端子104を小さくした場合、これ
に形成される線路導体104a−Aの幅も狭くしなけれ
ばならず、リード端子105のロウ材による接合が脆弱
なものとなり、外部電気回路と入出力端子104との高
周波信号の損失が増大したり、リード端子105が外れ
て高周波信号の入出力ができなくなる場合がある。
As a method for solving this problem,
It is conceivable to make the gap between the side ground conductors 104a-B and the inner wall surface of the frame 102 sufficiently large.
02 is made larger, or the input / output terminal 104 is made smaller. When the size of the frame 102 is increased, the size of the semiconductor package is increased, which deviates from the recent trend of reducing the size and weight of the semiconductor package. On the other hand, when the input / output terminal 104 is reduced, the width of the line conductor 104a-A formed on the input / output terminal 104 must also be reduced. The loss of the high-frequency signal with the output terminal 104 may increase, or the lead terminal 105 may come off and input and output of the high-frequency signal may not be possible.

【0020】また、平板部104aの、線路導体104
a−Aと平行である側面のロウ材溜まりが発生する部位
のみに、側部接地導体104a−Bを形成しないことに
より、ロウ材がこの部位に流れてこないようにすること
も考えられるが、メタライズ層の形成のために印刷工程
が必要になり作業効率が非常に低下する。
The line conductor 104 of the flat plate portion 104a
Although it is conceivable to prevent the brazing material from flowing into this portion by not forming the side ground conductors 104a-B only at the portion where the brazing material accumulation occurs on the side surface parallel to aA, A printing process is required for forming the metallized layer, and the working efficiency is greatly reduced.

【0021】従って、本発明は上記問題点に鑑み完成さ
れたもので、その目的は、半導体パッケージに嵌着され
る入出力端子に発生するクラックを有効に防止するとと
もに、半導体パッケージが大型化することや、高周波信
号の入出力が損なわれることを防止することにある。
Accordingly, the present invention has been completed in view of the above problems, and an object of the present invention is to effectively prevent cracks occurring at input / output terminals fitted to a semiconductor package and increase the size of the semiconductor package. Another object of the present invention is to prevent input / output of a high-frequency signal from being impaired.

【0022】[0022]

【課題を解決するための手段】本発明の半導体パッケー
ジは、上面に半導体素子が載置される載置部を有する基
体と、該基体上面に前記載置部を囲繞するように取着さ
れた金属製の枠体と、該枠体を貫通してまたは切り欠い
て形成された入出力端子の取付部と、上面に一辺から対
向する他辺にかけて形成された線路導体を有する誘電体
から成る平板部および該平板部の上面に前記線路導体を
間に挟んで接合された誘電体から成る立壁部を有すると
ともに前記取付部に嵌着接合された入出力端子とを具備
する半導体素子収納用パッケージにおいて、前記平板部
の側面の前記枠体内側の部位に、前記立壁部の前記枠体
内側の側面と略面一に切り欠かれた面を有する切欠部が
形成されていることを特徴とする。
A semiconductor package according to the present invention is mounted on a base having a mounting portion on which a semiconductor element is mounted on an upper surface and surrounding the mounting portion on the upper surface of the base. A flat plate made of a metal frame, a mounting portion for input / output terminals formed through or cut out of the frame, and a dielectric having a line conductor formed on one side from the other side to the opposite side on the upper surface. A semiconductor element housing package comprising: an upper portion of a flat portion and an upright wall portion made of a dielectric bonded to the upper surface of the flat plate portion with the line conductor interposed therebetween; and an input / output terminal fitted and bonded to the mounting portion. A cutout portion having a surface cut out substantially flush with a side surface inside the frame body of the upright wall portion is formed at a portion inside the frame body on a side surface of the flat plate portion.

【0023】本発明は、上記の構成により、入出力端子
を取付部に銀ロウ等のロウ材で嵌着させた際に、このロ
ウ材が、平板部の側部接地導体と金属材料から成る枠体
の内壁面とのわずかな隙間を埋めるように流れることは
ない。即ち、その隙間にロウ材溜まりを発生させること
はない。そのため、ロウ材と平板部の枠体に接合される
側面の枠体内側に位置する部位との間、およびロウ材と
枠体の内壁面との間のそれぞれの間の熱膨張差により、
最も弾性の低い平板部に熱歪みによるクラックを発生さ
せることがなくなる。従って、半導体パッケージが大型
化することや、高周波信号の入出力が損なわれることを
防止でき、半導体素子を長期間にわたり正常かつ安定に
作動させ得る。
According to the present invention, when the input / output terminal is fitted to the mounting portion with a brazing material such as silver brazing, the brazing material is composed of the side ground conductor of the flat plate portion and a metal material. It does not flow so as to fill a small gap with the inner wall surface of the frame. That is, there is no occurrence of brazing material accumulation in the gap. Therefore, due to the difference in thermal expansion between the brazing material and the portion located on the inner side of the frame on the side surface joined to the frame of the flat plate portion, and between the brazing material and the inner wall surface of the frame, respectively.
Cracks due to thermal strain are not generated in the flat plate portion having the lowest elasticity. Therefore, it is possible to prevent an increase in the size of the semiconductor package and damage to input and output of high-frequency signals, and to operate the semiconductor element normally and stably for a long period of time.

【0024】また従来、平板部の上面においてロウ材は
平板部と立壁部の境界部にメニスカスを形成し易いため
その境界部に沿って濡れ易く、その結果ロウ材が平板部
の枠体に接合される側面から平板部の上面に侵入してい
たが、立壁部の枠体内側の側面と略面一に切り欠かれた
面を有する切欠部が形成されていることにより、ロウ材
が上記境界部にメニスカスを形成せず、平板部の上面に
侵入することがなくなる。従って、平板部の上面に侵入
したロウ材により、境界部付近にクラックが発生するの
を防ぐことができる。
Conventionally, on the upper surface of the flat plate portion, the brazing material easily forms a meniscus at the boundary portion between the flat plate portion and the standing wall portion, so that it is easy to get wet along the boundary portion. As a result, the brazing material is joined to the frame of the flat plate portion. Was cut into the upper surface of the flat plate portion from the side surface to be cut, but the cutout having a surface cut out substantially flush with the side surface inside the frame body of the upright wall portion formed the brazing material at the boundary A meniscus is not formed in the portion, and it does not enter the upper surface of the flat plate portion. Therefore, it is possible to prevent cracks from being generated near the boundary due to the brazing material that has entered the upper surface of the flat plate portion.

【0025】本発明において、好ましくは、前記切り欠
かれた面の長さが0.1mm以上であることを特徴とす
る。
In the present invention, preferably, the length of the cutout surface is 0.1 mm or more.

【0026】上記の構成により、ロウ材溜まりが発生す
るのを有効に防止し、またロウ材が平板部と立壁部の境
界部に沿って濡れることを有効に防止することができ
る。
With the above configuration, it is possible to effectively prevent the accumulation of the brazing material and to effectively prevent the brazing material from getting wet along the boundary between the flat plate portion and the standing wall portion.

【0027】[0027]

【発明の実施の形態】本発明の光半導体パッケージにつ
いて以下に説明する。図1は本発明の光半導体パッケー
ジの斜視図、図2はこの半導体パッケージに設けられる
入出力端子の拡大斜視図を示し、これらの図において、
1は基体、2は枠体、3は光ファイバが取着された金属
ホルダ7を固定する筒状の固定部材、4は入出力端子、
6はシールリングである。これら基体1と枠体2と固定
部材3と入出力端子4とシールリング6とで、内部にL
D,PD等の光半導体素子としての半導体素子9を収納
し、シールリング6上面に蓋体を取着することにより容
器が構成される。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An optical semiconductor package according to the present invention will be described below. FIG. 1 is a perspective view of an optical semiconductor package of the present invention, and FIG. 2 is an enlarged perspective view of an input / output terminal provided in the semiconductor package.
1 is a base, 2 is a frame, 3 is a cylindrical fixing member for fixing a metal holder 7 to which an optical fiber is attached, 4 is an input / output terminal,
6 is a seal ring. The base 1, frame 2, fixing member 3, input / output terminal 4, and seal ring 6
A container is formed by housing a semiconductor element 9 as an optical semiconductor element such as D and PD, and attaching a lid to the upper surface of the seal ring 6.

【0028】基体1は、その上面に半導体素子9を載置
する載置部1aを有し、半導体素子9を支持する支持部
材として機能するとともに、半導体素子9の作動時に発
する熱を外部に効率良く放散する機能を有する。
The base 1 has a mounting portion 1a for mounting the semiconductor element 9 on its upper surface, functions as a support member for supporting the semiconductor element 9, and efficiently transfers heat generated when the semiconductor element 9 is operated to the outside. It has a function to dissipate well.

【0029】この基体1は、その形状は略直方体であ
り、銅(Cu)−タングステン(W)合金やFe−Ni
−Co合金等の金属材料から成る。また、その製作は合
金のインゴットに圧延加工やプレス加工等の金属加工を
施すことにより所定の形状に成形される。
The substrate 1 has a substantially rectangular parallelepiped shape, such as a copper (Cu) -tungsten (W) alloy or a Fe-Ni
-It is made of a metal material such as a Co alloy. In addition, the ingot is formed into a predetermined shape by subjecting the ingot of the alloy to metal working such as rolling or pressing.

【0030】なお、この基体1は、その表面に耐蝕性に
優れかつロウ材との濡れ性に優れる金属、具体的には厚
さ0.5〜9μmのNi層と、厚さ0.5〜5μmのA
u層とを順次メッキ法により被着させておくと、基体1
が酸化腐食するのを有効に防止できるとともに、基体1
上面に半導体素子9を強固に接着固定できる。従って、
基体1表面には0.5〜9μmのNi層や厚さ0.5〜
5μmのAu層等の金属層をメッキ法により被着させて
おくことが好ましい。
The substrate 1 has a metal having excellent corrosion resistance and excellent wettability with a brazing material on its surface, specifically, a Ni layer having a thickness of 0.5 to 9 μm, a Ni layer having a thickness of 0.5 to 9 μm, 5 μm A
u layer is sequentially applied by a plating method.
Can be effectively prevented from being oxidized and corroded.
The semiconductor element 9 can be firmly adhered and fixed on the upper surface. Therefore,
The surface of the substrate 1 has a Ni layer of 0.5 to 9 μm or a thickness of 0.5 to 9 μm.
It is preferable that a metal layer such as a 5 μm Au layer is applied by a plating method.

【0031】また、この基体1の上面には、載置部1a
を囲繞するように、側部に入出力端子4を嵌着するため
の貫通孔または切欠部から成る取付部2aと、他の側部
に光伝送路として機能する貫通孔2bとが形成された枠
体2が、銀ロウ等のロウ材で接合されており、この枠体
2の内側に半導体素子9を収納するための空所が形成さ
れる。
On the upper surface of the base 1, a mounting portion 1a
A mounting portion 2a formed of a through hole or a cut-out portion for fitting the input / output terminal 4 to the side portion and a through hole 2b functioning as an optical transmission path are formed on the other side portion so as to surround. The frame 2 is joined with a brazing material such as silver brazing, and a space for accommodating the semiconductor element 9 is formed inside the frame 2.

【0032】この枠体2は、基体1と同様の金属材料か
ら成り、その製作は基体1と同様の加工法により、側部
に取付部2aを、他の側部に貫通孔2bを有するような
形状に加工される。
The frame 2 is made of the same metal material as the base 1, and is manufactured by a processing method similar to that of the base 1, so that the frame 2 has a mounting portion 2a on the side and a through hole 2b on the other side. It is processed into various shapes.

【0033】なお、枠体2の基体1への接合は、基体1
上面と枠体2下面とを、基体1上面に敷設した適度なボ
リュームを有するプリフォームとされた銀ロウ等のロウ
材を介して接合される。さらに、枠体2表面には、基体
1と同様に0.5〜9μmのNi層や厚さ0.5〜5μ
mのAu層等の金属層をメッキ法により被着させておく
と良い。
The joining of the frame 2 to the base 1 is performed by
The upper surface and the lower surface of the frame body 2 are joined via a brazing material such as silver brazing which is a preform having an appropriate volume laid on the upper surface of the base 1. Further, on the surface of the frame 2, similarly to the base 1, a Ni layer of 0.5 to 9 μm or a thickness of 0.5 to 5 μm
It is preferable that a metal layer such as an Au layer is applied by a plating method.

【0034】また、この枠体2の取付部2aには、半導
体素子9と外部電気回路(図示せず)との高周波信号の
入出力を行う機能を有するとともに、光半導体パッケー
ジの内外部を遮断する機能を有する入出力端子4が、こ
れに設けられているメタライズ層を介して銀ロウ等のロ
ウ材で接合される。
The mounting portion 2a of the frame 2 has a function of inputting / outputting a high-frequency signal between the semiconductor element 9 and an external electric circuit (not shown), and blocks the inside and outside of the optical semiconductor package. The input / output terminal 4 having the function of performing the above operation is joined with a brazing material such as silver brazing via a metallized layer provided on the input / output terminal 4.

【0035】この入出力端子4は、略直方体で板状の平
板部4aの上面に、略直方体で横倒しにされた四角柱状
の立壁部4bが積層されて成る。
The input / output terminal 4 has a substantially rectangular parallelepiped plate-shaped flat plate portion 4a, and a quadrangular prism-shaped standing wall portion 4b which is turned sideways in a substantially rectangular parallelepiped shape.

【0036】この平板部4aは、アルミナ(Al23
セラミックス,窒化アルミニウム(AlN)セラミック
ス,ムライト(3Al23・2SiO2)セラミックス
等の誘電体から成る。そして、平板部4aの上面には、
長辺の1辺から対向する他辺にかけて、W,Mo−Mn
等のメタライズ層から成る線路導体4a−Aが形成され
る。平板部4aの下面には、全面に線路導体4a−Aと
同様のメタライズ層から成る下部接地導体4a−Cが形
成され、また側面には、線路導体4a−Aと平行となる
側面H(図2)の一部、即ち側面Hの平板部4aの枠体
2内側に位置する部位を切り欠いて設けられた切欠部4
c以外の部分に、線路導体4a−Aと同様のメタライズ
層から成る側部接地導体4a−Bが形成される。
The flat plate portion 4a is made of alumina (Al 2 O 3 )
Ceramics, aluminum nitride (AlN) ceramics, mullite (3Al 2 O 3 · 2SiO 2 ) made of a dielectric material such as ceramics. Then, on the upper surface of the flat plate portion 4a,
W, Mo-Mn from one long side to the other side
A line conductor 4a-A made of a metallized layer such as that described above is formed. A lower ground conductor 4a-C made of the same metallized layer as the line conductor 4a-A is formed on the entire lower surface of the flat plate portion 4a, and a side surface H (FIG. 10) parallel to the line conductor 4a-A is formed on the side surface. 2), that is, a cutout portion 4 provided by cutting out a portion of the flat plate portion 4a of the side surface H located inside the frame body 2.
The side ground conductors 4a-B made of the same metallized layer as the line conductors 4a-A are formed in portions other than c.

【0037】この切欠部4cは、入出力端子4を取付部
2aに銀ロウ等のロウ材で嵌着させた際に、このロウ材
が、側部接地導体4a−Bと金属材料から成る枠体2内
壁面とのわずかな隙間を埋めるように流れ込むのを有効
に防止できる。なお、この隙間は、側面Hが2つあるた
め入出力端子4と枠体2との間に2箇所有る。即ち、切
欠部4cを設けることにより、側部接地導体4a−Bと
枠体2内壁面とのわずかな隙間にロウ材溜まりを発生さ
せることはない。そのため、ロウ材と平板部4aの枠体
2内側に位置する部位との間、およびロウ材と枠体2内
壁面との間のそれぞれの間の熱膨張差により、最も弾性
の低い平板部4aに熱歪みや、クラックを発生させるこ
とはない。
When the input / output terminal 4 is fitted to the mounting portion 2a with a brazing material such as silver brazing, the notch 4c forms a frame formed of the side ground conductors 4a-B and a metal material. It can be effectively prevented from flowing so as to fill a small gap with the inner wall surface of the body 2. Since there are two side surfaces H, there are two gaps between the input / output terminal 4 and the frame 2. That is, by providing the cutout portion 4c, the brazing material does not accumulate in a slight gap between the side ground conductors 4a-B and the inner wall surface of the frame 2. Therefore, due to the difference in thermal expansion between the brazing material and the portion of the flat plate portion 4a located inside the frame 2, and between the brazing material and the inner wall surface of the frame 2, the flat plate portion 4a having the lowest elasticity. No thermal distortion or cracking occurs.

【0038】なお、この切欠部4cは、平板部4aの枠
体2に接合される側面の枠体2内側に、立壁部4bの枠
体2内側の側面と略面一に切り欠かれた面P(図2)有
する切欠部4cであり、好ましくは面Pの長さが0.1
mm以上であることがよい。この切欠部4cは、平板部
4aに少なくとも1箇所設けられていれば良く、2箇所
とも0.1mm未満で形成した場合、側部接地導体4a
−Bと枠体2内壁面とのわずかな隙間に、2箇所ともロ
ウ材溜まりが発生しやすくなる傾向にある。そのため、
ロウ材と平板部4aの枠体2内側に位置する部位との
間、およびロウ材と枠体2内壁面との間のそれぞれの間
の熱膨張差により発生する熱歪みが大きなものとなり、
その結果平板部4aに大きな圧縮熱応力が印加され、ク
ラックを発生させ易くなる。
The cutout portion 4c is formed on the inner surface of the frame 2 on the side surface of the flat plate portion 4a joined to the frame 2, and is formed with a cutout substantially flush with the side surface on the inner side of the frame 2 of the upright wall 4b. P (FIG. 2), preferably a notch 4c, preferably with a length of plane P of 0.1
mm or more. The notch 4c may be provided in at least one place in the flat plate part 4a, and if the two places are formed to be less than 0.1 mm, the side ground conductor 4a
In a slight gap between -B and the inner wall surface of the frame 2, there is a tendency for brazing material to easily accumulate at both locations. for that reason,
Thermal strain generated by the difference in thermal expansion between the brazing material and the portion of the flat plate portion 4a located inside the frame 2 and between the brazing material and the inner wall surface of the frame 2 becomes large,
As a result, a large compressive thermal stress is applied to the flat plate portion 4a, and cracks are easily generated.

【0039】一方、1箇所に0.1mm以上の切欠部4
cを、もう1個所には切欠部4cを設けていない場合、
切欠部4cを設けていない部位にロウ材溜まりが発生し
ても、もう片方の部位にはロウ材溜まりは発生しない。
この場合、平板部4aには全くクラックが発生せず、こ
の場合に平板部4aに印加される圧縮熱応力の大きさ程
度では、平板部4aにクラックは発生しないことが分か
った。
On the other hand, a notch 4 of 0.1 mm or more
c, if there is no notch 4c in another place,
Even if brazing material accumulates in a portion where the notch 4c is not provided, no brazing material accumulates in the other portion.
In this case, no crack was generated in the flat plate portion 4a, and it was found that no crack was generated in the flat plate portion 4a with the magnitude of the compressive thermal stress applied to the flat plate portion 4a in this case.

【0040】従って、切欠部4cは、平板部4aの側面
Hの枠体2内側に位置する部位において、立壁部4bの
枠体2内側の側面と略面一に切り欠かれた面Pを有して
おり、その面Pの長さを0.1mm以上とし、そのよう
な切欠部4cを少なくとも1箇所設ることが良い。
Accordingly, the notch 4c has a surface P cut out substantially flush with the side surface inside the frame 2 of the upright wall 4b at a portion located inside the frame 2 on the side surface H of the flat plate portion 4a. It is preferable that the length of the plane P is 0.1 mm or more and at least one such cutout 4c is provided.

【0041】なお、切欠部4cの内周面、即ち平板部4
aの側面Hを切り欠くことにより形成される面は、R面
やC面等種々の形状とし得る。また切欠部4cは、図2
のように、必ずしも側面Hの平板部4aの枠体2内側の
全面を切り欠くようにして形成しなくてもよく、面Pを
含み平面視形状が半円状、長円状、凹状等の形状の切欠
部4cとしてもよい。その場合、切欠部4cの線路導体
4a−A方向の長さは、側面Hの平板部4aの枠体2内
側の全面の長さの1/3以上あればよく、これによりロ
ウ材溜まりの形成を有効に防ぐことができる。
The inner peripheral surface of the notch 4c, that is, the flat plate 4
The surface formed by cutting the side surface H of a can have various shapes such as an R surface and a C surface. The notch 4c is formed as shown in FIG.
It is not always necessary to cut out the entire inner surface of the flat plate portion 4a of the side surface H inside the frame body 2, and the shape in plan view including the surface P is semicircular, elliptical, concave, or the like. The cutout 4c may have a shape. In this case, the length of the cutout portion 4c in the direction of the line conductor 4a-A may be at least 3 of the entire length of the flat plate portion 4a on the side surface H inside the frame body 2, thereby forming a brazing material pool. Can be effectively prevented.

【0042】また、この切欠部4cは、半導体パッケー
ジが光半導体パッケージの場合、入出力端子4の、光フ
ァイバ8等を固定する固定部材3が接合される枠体2側
部に近い側の側部に、設けられることが好ましい。即
ち、切欠部4cが固定部材3が接合される側部に近い側
部に設けられていない場合、半導体素子9と光ファイバ
8との光軸を調整した後、半導体素子9を作動させた
際、半導体素子9の発した熱が枠体2に伝わることによ
り、ロウ材と枠体2内壁面との間の残留熱応力と合わさ
って、枠体2に大きな熱歪みが発生することになる。そ
のため、光ファイバ8と半導体素子9との光軸がずれる
こととなり、半導体素子9の作動性を損なわせる。従っ
て、切欠部4cは、半導体パッケージが光半導体パッケ
ージの場合、入出力端子4の固定部材3が接合される枠
体2側部に近い側の側部に設けられることが好ましい。
When the semiconductor package is an optical semiconductor package, the cutout portion 4c is formed on the side of the input / output terminal 4 closer to the side of the frame 2 to which the fixing member 3 for fixing the optical fiber 8 and the like is joined. It is preferably provided in the part. That is, when the notch 4c is not provided on the side near the side where the fixing member 3 is joined, the semiconductor element 9 is operated after the optical axis of the semiconductor element 9 and the optical fiber 8 are adjusted. When the heat generated by the semiconductor element 9 is transmitted to the frame 2, the residual heat stress between the brazing material and the inner wall surface of the frame 2 causes a large thermal strain in the frame 2. Therefore, the optical axes of the optical fiber 8 and the semiconductor element 9 are shifted, and the operability of the semiconductor element 9 is impaired. Therefore, when the semiconductor package is an optical semiconductor package, the notch 4c is preferably provided on a side near the side of the frame 2 to which the fixing member 3 of the input / output terminal 4 is joined.

【0043】なお、平板部4aと立壁部4bとの積層界
面の周辺部、即ち平板部4aの枠体2に接合される側面
の枠体2内側または枠体2外側に余分なメタライズ層が
形成された場合、線路導体4a−Aと余分なメタライズ
層との間の容量値が高くなり、高周波信号のインピーダ
ンス不整合による反射等の伝送特性の低下を発生させる
場合がある。従って、余分なメタライズ層が全く形成さ
れないように、平板部4aの枠体2に接合される側面の
枠体2内側の2箇所および枠体2外側の2箇所の4箇所
に、切欠部4aを設けることが良い。
An extra metallized layer is formed on the peripheral portion of the lamination interface between the flat plate portion 4a and the vertical wall portion 4b, that is, on the inside or outside of the frame 2 on the side surface of the flat plate portion 4a joined to the frame 2. In this case, the capacitance value between the line conductor 4a-A and the extra metallization layer increases, which may cause deterioration of transmission characteristics such as reflection due to impedance mismatch of a high-frequency signal. Therefore, notches 4a are formed at four places, two inside the frame 2 and two outside the frame 2, on the side surfaces of the flat plate 4a joined to the frame 2 so that no extra metallized layer is formed. It is good to provide.

【0044】さらに、平板部4aの枠体2に接合される
側面の枠体2内側または枠体2外側に余分なメタライズ
層が形成された場合、平板部4aの上面における平板部
4aと立壁部4bとの境界部にロウ材がメニスカスを形
成して濡れ易くなり、境界部に侵入する場合がある。そ
の場合、境界部に侵入したロウ材が、線路導体4a−A
との間で浮遊容量を発生させ、高周波信号の伝送特性を
劣化させることとなる。従って、このような伝送特性の
劣化を防ぐために、平板部4aの枠体2に接合される側
面の枠体2内側の2箇所および枠体2外側の2箇所の4
箇所に、切欠部4aを設けることが良い。
Further, when an extra metallized layer is formed on the inside of the frame 2 or on the outside of the frame 2 on the side surface joined to the frame 2 of the flat plate 4a, the flat plate 4a and the upright wall on the upper surface of the flat plate 4a are formed. In some cases, the brazing material forms a meniscus at the boundary with the metal layer 4b and is easily wetted, and may enter the boundary. In that case, the brazing material that has invaded the boundary is the line conductor 4a-A
And a floating capacitance is generated between them, thereby deteriorating the transmission characteristics of the high-frequency signal. Therefore, in order to prevent such deterioration of the transmission characteristics, the four portions of the side surface of the flat plate portion 4a, which are joined to the frame 2, have two portions inside the frame 2 and two portions outside the frame 2.
A notch 4a is preferably provided at a location.

【0045】このような切欠部4cが設けられた平板部
4aの線路導体4a−A、側部接地導体4a−Bおよび
下部接地導体4a−Cは、W,Mo,Mn等のメタライ
ズ層で形成されており、例えばW等の粉末に有機溶剤、
溶媒を添加混合して得た金属ペーストを、平板部4a用
のセラミックグリーンシートに、予め従来周知のスクリ
ーン印刷法により所定パターンに印刷塗布しておき、焼
成することにより形成される。
The line conductors 4a-A, the side ground conductors 4a-B and the lower ground conductors 4a-C of the flat plate portion 4a provided with such cutouts 4c are formed of a metallized layer of W, Mo, Mn or the like. It is, for example, an organic solvent,
A metal paste obtained by adding and mixing a solvent is formed by printing and applying a predetermined pattern on a ceramic green sheet for the flat plate portion 4a in advance by a conventionally known screen printing method, followed by baking.

【0046】また、平板部4aの上面には立壁部4bが
積層される。この立壁部4bは、平板部4aと同様の誘
電体から成り、その上面の全面に線路導体4a−Aと同
様のメタライズ層から成る上部接地導体4b−Aが、ま
た平板部4aの側面Hの側部接地導体4a−Bに略面一
で連続する側面の全面に、線路導体104a−Aと同様
のメタライズ層から成る側面接地導体4b−Bが形成さ
れている。
An upright wall 4b is laminated on the upper surface of the flat plate 4a. The standing wall portion 4b is made of the same dielectric material as the flat plate portion 4a, and an upper grounding conductor 4b-A made of the same metallized layer as the line conductor 4a-A is formed on the entire upper surface thereof. A side surface ground conductor 4b-B made of the same metallization layer as the line conductors 104a-A is formed on the entire surface of the side surface substantially continuous with the side ground conductors 4a-B.

【0047】立壁部4bの上部接地導体4b−A、側面
接地導体4b−Bは、平板部4aに形成される線路導体
4a−A、側部接地導体4a−Bおよび下部接地導体4
a−Cと同様の方法により所定パターンに印刷塗布して
おき、焼成することにより形成される。
The upper ground conductor 4b-A and the side ground conductor 4b-B of the upright wall 4b are composed of a line conductor 4a-A, a side ground conductor 4a-B and a lower ground conductor 4 formed on the flat plate 4a.
It is formed by printing and applying a predetermined pattern in the same manner as a-C and baking it.

【0048】このように、入出力端子4は、これら上部
接地導体4b−A、側面接地導体4b−B、側部接地導
体4a−Bおよび下部接地導体4a−Cとで、線路導体
4a−Aを擬似同軸構造とし、高周波信号の入出力を良
好なものとするとともに、枠体2に設けられた切欠部ま
たは貫通孔から成る取付部2aに銀ロウ等のロウ材を介
して接合されることにより、光半導体パッケージ内外を
遮断する機能を有する。さらには、切欠部4cにより、
ロウ材と平板部4aの枠体2内側に位置する部位との
間、およびロウ材と枠体2内壁面との間のそれぞれの間
の熱膨張差により、最も弾性の低い平板部4aに熱歪み
や、クラックを発生させることはない。また、この切欠
部4cは、半導体パッケージが光半導体パッケージの場
合、入出力端子4の、光ファイバ8等を固定する固定部
材3が接合される枠体2側部に近い側の側部に設けられ
ることが、上述したように好ましい。
As described above, the input / output terminal 4 is composed of the upper ground conductor 4b-A, the side ground conductor 4b-B, the side ground conductor 4a-B and the lower ground conductor 4a-C. Has a pseudo-coaxial structure to improve the input and output of high-frequency signals, and is joined to a mounting portion 2a formed of a cutout or a through hole provided in the frame 2 via a brazing material such as silver brazing. Thus, the optical semiconductor package has a function of shutting off the inside and the outside. Furthermore, by the notch 4c,
Due to the difference in thermal expansion between the brazing material and the portion of the flat plate portion 4a located inside the frame 2, and between the brazing material and the inner wall surface of the frame 2, heat is applied to the flat plate portion 4a having the lowest elasticity. No distortion or cracking occurs. When the semiconductor package is an optical semiconductor package, the notch 4c is provided on the side of the input / output terminal 4 closer to the side of the frame 2 to which the fixing member 3 for fixing the optical fiber 8 and the like is joined. Is preferred as described above.

【0049】この入出力端子4の線路導体4a−Aの枠
体2外部に導出される部位には、外部電気回路と入出力
端子104との高周波信号の入出力を行い、Fe−Ni
−Co合金等の金属材料から成るリード端子5が銀ロウ
等のロウ材で接合される。
A portion of the line conductor 4a-A of the input / output terminal 4 led out of the frame 2 is used for inputting / outputting a high-frequency signal between an external electric circuit and the input / output terminal 104, and using
A lead terminal 5 made of a metal material such as a -Co alloy is joined with a brazing material such as silver brazing.

【0050】また、この入出力端子4が側部に嵌着され
る枠体2の他の側部には貫通孔2bが形成されており、
一端面が貫通孔2bの開口を囲むように銀ロウ等のロウ
材で接合され、他方の端面には光ファイバ8を樹脂等の
接着剤で取着した金属ホルダ7がAu−Sn等の低融点
ロウ材で接合される固定部材3が設けられる。この固定
部材3は、基体1や枠体2と同様の材料を同様の加工法
で所望の形状に加工作製されるとともに、その表面に
0.5〜9μmのNi層や0.5〜5μmのAu層等の
金属層をメッキ法により被着させておくと良い。
A through hole 2b is formed on the other side of the frame 2 to which the input / output terminal 4 is fitted.
One end face is joined with a brazing material such as silver brazing so as to surround the opening of the through hole 2b, and the other end face is provided with a metal holder 7 having an optical fiber 8 attached with an adhesive such as resin or the like. A fixing member 3 joined by the melting point brazing material is provided. The fixing member 3 is formed by processing the same material as the base 1 and the frame 2 into a desired shape by a similar processing method, and has a Ni layer of 0.5 to 9 μm or a 0.5 to 5 μm A metal layer such as an Au layer is preferably applied by plating.

【0051】このように入出力端子4および固定部材3
が取着される枠体2上面にはシールリング6が銀ロウ等
のロウ材で接合される。このシールリング6は、枠体2
上面に銀ロウ等のロウ材で接合されて入出力端子4を挟
持するとともに、その上面に、半導体素子9を封止する
ための蓋体をシーム溶接等により接合するための媒体と
して機能する。
As described above, the input / output terminal 4 and the fixing member 3
A seal ring 6 is joined to the upper surface of the frame body 2 to which is attached with a brazing material such as silver brazing. The seal ring 6 is attached to the frame 2
The upper surface is joined with a brazing material such as silver brazing to sandwich the input / output terminal 4, and functions as a medium for joining a lid for sealing the semiconductor element 9 to the upper surface by seam welding or the like.

【0052】本発明の半導体パッケージとしての光半導
体パッケージは、金属材料から成る基体1と、その上面
に半導体素子9の載置部1aを囲繞するように接合さ
れ、取付部2a、貫通孔2bを有する金属材料から成る
枠体2と、この取付部2aに銀ロウ等のロウ材で接合さ
れ、ロウ材と平板部4aの枠体2内側に位置する部位と
の間、およびロウ材と枠体2内壁面との間のそれぞれの
間の熱膨張差により、平板部4aに熱歪みや、クラック
が発生するのを有効に防止できる入出力端子4とを具備
している。この入出力端子4は、平板部4aの枠体2内
側に位置する部位の側面を切り欠いて設けられた切欠部
4cが少なくとも1箇所形成されている。
An optical semiconductor package as a semiconductor package of the present invention is joined to a base 1 made of a metal material so as to surround a mounting portion 1a of a semiconductor element 9 on an upper surface thereof, and has a mounting portion 2a and a through hole 2b. Frame 2 made of a metal material having the same, and a brazing material such as silver brazing joined to the mounting portion 2a, between the brazing material and the portion of the flat plate portion 4a located inside the frame 2, and between the brazing material and the frame. The flat plate portion 4a is provided with an input / output terminal 4 that can effectively prevent the occurrence of thermal distortion and cracks due to a difference in thermal expansion between the inner wall surface and the inner wall surface. The input / output terminal 4 has at least one cutout portion 4c formed by cutting out a side surface of a portion of the flat plate portion 4a located inside the frame 2.

【0053】このような光半導体パッケージに、光半導
体素子としての半導体素子9を載置部1aにSn−Pb
半田等の低融点ロウ材で載置固定するとともに、線路導
体4a−Aと半導体素子9とをボンディングワイヤで電
気的に接続し、さらに固定部材3に、光ファイバ8を樹
脂等の接着剤で取着した金属ホルダ7を、Au−Sn等
の低融点ロウ材で接合した後、シールリング6上面に蓋
体をシーム溶接等により接合することにより、製品とし
ての光半導体装置となる。
In such an optical semiconductor package, a semiconductor element 9 as an optical semiconductor element is mounted on the mounting portion 1a by Sn-Pb.
The line conductor 4a-A and the semiconductor element 9 are electrically connected by a bonding wire, and the optical fiber 8 is further fixed to the fixing member 3 with an adhesive such as a resin. After the attached metal holder 7 is joined with a low melting point brazing material such as Au-Sn, the lid is joined to the upper surface of the seal ring 6 by seam welding or the like, whereby an optical semiconductor device as a product is obtained.

【0054】この光半導体装置は、例えば外部電気回路
から供給される駆動信号によって光半導体素子9を光励
起させ、励起したレーザ光等の光を光ファイバ8に授受
させるとともに、光ファイバ8内を伝送させることによ
り、大容量の情報を高速に伝送できる光電変換装置とし
て機能するものであり、光通信分野等に多く用いられ
る。
In this optical semiconductor device, the optical semiconductor element 9 is optically excited by, for example, a drive signal supplied from an external electric circuit to transmit and receive the excited laser light and the like to and from the optical fiber 8. By doing so, it functions as a photoelectric conversion device that can transmit a large amount of information at high speed, and is often used in the field of optical communication and the like.

【0055】かくして、本発明は、半導体パッケージに
嵌着される入出力端子に発生するクラックを有効に防止
する構造であるため、半導体パッケージを大型化しなけ
ればならなかったり、高周波信号の入出力が損なわれる
等の問題を解消できる。その結果、半導体素子を長期間
にわたり、正常かつ安定に作動させ得る。
Thus, the present invention has a structure for effectively preventing cracks from occurring at the input / output terminals fitted to the semiconductor package. Problems such as damage can be solved. As a result, the semiconductor element can be normally and stably operated for a long time.

【0056】なお、本発明は、上記実施の形態に限定さ
れず、本発明の要旨を逸脱しない範囲内において種々の
変更を行うことは何等支障ない。例えば、図3に示すよ
うに、切欠部4cは平板部4aの側面の枠体2内側に位
置する部位のみならず、平板部4aの側面の枠体2外側
に位置する部位も切り欠いても良く、この場合、平板部
4aの側面の枠体2外側に位置する部位と枠体2外側面
とが交差する部位にもロウ材溜まりが発生することはな
い。その結果、入出力端子4を枠体2の取付部2aに嵌
着させた際に発生する熱歪みを非常に小さいものとで
き、それらの接合をより強固なものとできる。
It should be noted that the present invention is not limited to the above embodiment, and that various changes may be made without departing from the scope of the present invention. For example, as shown in FIG. 3, the notch 4 c may be cut out not only at the portion located inside the frame 2 on the side surface of the flat plate portion 4 a but also at the portion located outside the frame body 2 on the side surface of the flat plate portion 4 a. In this case, the accumulation of the brazing material does not occur at a portion where the side surface of the flat plate portion 4a is located outside the frame body 2 and where the outside surface of the frame body 2 intersects. As a result, the thermal distortion generated when the input / output terminal 4 is fitted to the mounting portion 2a of the frame 2 can be made very small, and the joining thereof can be made stronger.

【0057】[0057]

【発明の効果】本発明は、誘電体から成る平板部と誘電
体から成る立壁部とから構成された入出力端子を具備す
る半導体パッケージにおいて、平板部の側面の枠体内側
の部位に、立壁部の枠体内側の側面と略面一に切り欠か
れた面を有する切欠部が形成されていることにより、こ
の入出力端子を半導体パッケージにロウ材を介して設け
た際、ロウ材と平板部の側面の枠体内側に位置する部位
との間、およびロウ材と枠体内壁面との間のそれぞれの
間の熱膨張差により、最も弾性の低い平板部に熱歪み
や、クラックを発生させることはない。その結果、半導
体パッケージが大型化することや、高周波信号の入出力
が損なわれることを防止でき、半導体素子を長期間にわ
たり正常かつ安定に作動させ得る。
According to the present invention, there is provided a semiconductor package having an input / output terminal composed of a flat plate made of a dielectric and an upright wall made of a dielectric. When the input / output terminals are provided in the semiconductor package via a brazing material, the brazing material and the flat plate are formed by forming a cutout having a surface cut out substantially flush with the side surface inside the frame body of the portion. Due to the difference in thermal expansion between the portion of the side surface of the portion located inside the frame and between the brazing material and the inner wall of the frame, thermal distortion and cracks are generated in the flat plate portion having the lowest elasticity. Never. As a result, it is possible to prevent an increase in the size of the semiconductor package and a loss of input and output of a high-frequency signal, and to operate the semiconductor element normally and stably for a long period of time.

【0058】また従来、ロウ材は平板部上面において平
板部と立壁部の境界部にメニスカスを形成し易いためそ
の境界部に沿って濡れ易く、その結果ロウ材が平板部の
側面から平板部の上面に侵入していたが、立壁部の枠体
内側の側面と略面一に切り欠かれた面を有する切欠部が
形成されていることにより、ロウ材が上記境界部にメニ
スカスを形成せず、平板部の上面に侵入することがなく
なる。従って、平板部の上面に侵入したロウ材により、
境界部付近にクラックが発生するのを防ぐことができ
る。
Conventionally, the brazing material easily forms a meniscus at the boundary between the flat plate portion and the standing wall portion on the upper surface of the flat plate portion, so that the brazing material is easily wet along the boundary portion. Although it had penetrated the upper surface, the brazing material did not form a meniscus at the boundary because the cutout portion having a surface cut out substantially flush with the side surface inside the frame of the upright wall portion was formed. Therefore, it does not enter the upper surface of the flat plate portion. Therefore, due to the brazing material that has invaded the upper surface of the flat plate portion,
Cracks can be prevented from occurring near the boundary.

【0059】また本発明は、好ましくは、立壁部の枠体
内側の側面と略面一に切り欠かれた面の長さが0.1m
m以上であることにより、ロウ材溜まりの形成を有効に
防止し、またロウ材が平板部と立壁部の境界部に沿って
濡れることを有効に防止することができる。
In the present invention, preferably, the length of the cutout surface which is substantially flush with the side surface inside the frame of the upright wall portion is 0.1 m.
When it is at least m, the formation of the brazing material pool can be effectively prevented, and the wetting of the brazing material along the boundary between the flat plate portion and the standing wall portion can be effectively prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体パッケージの一実施形態を示す
斜視図である。
FIG. 1 is a perspective view showing one embodiment of a semiconductor package of the present invention.

【図2】図1の半導体パッケージ用の入出力端子の拡大
斜視図である。
FIG. 2 is an enlarged perspective view of an input / output terminal for the semiconductor package of FIG. 1;

【図3】本発明の入出力端子の他の実施形態を示す拡大
斜視図である。
FIG. 3 is an enlarged perspective view showing another embodiment of the input / output terminal of the present invention.

【図4】従来の半導体パッケージの斜視図である。FIG. 4 is a perspective view of a conventional semiconductor package.

【図5】図4の半導体パッケージ用の入出力端子であ
る。
FIG. 5 shows input / output terminals for the semiconductor package of FIG. 4;

【符号の説明】[Explanation of symbols]

1:基体 1a:載置部 2:枠体 2a:取付部 4:入出力端子 4a:平板部 4b:立壁部 4c:切欠部 9:半導体素子 1: base 1a: mounting portion 2: frame 2a: mounting portion 4: input / output terminal 4a: flat plate portion 4b: standing wall portion 4c: notch portion 9: semiconductor element

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】上面に半導体素子が載置される載置部を有
する基体と、該基体上面に前記載置部を囲繞するように
取着された金属製の枠体と、該枠体を貫通してまたは切
り欠いて形成された入出力端子の取付部と、上面に一辺
から対向する他辺にかけて形成された線路導体を有する
誘電体から成る平板部および該平板部の上面に前記線路
導体を間に挟んで接合された誘電体から成る立壁部を有
するとともに前記取付部に嵌着接合された入出力端子と
を具備する半導体素子収納用パッケージにおいて、前記
平板部の側面の前記枠体内側の部位に、前記立壁部の前
記枠体内側の側面と略面一に切り欠かれた面を有する切
欠部が形成されていることを特徴とする半導体素子収納
用パッケージ。
A base having a mounting portion on which a semiconductor element is mounted on an upper surface, a metal frame attached to the upper surface of the base so as to surround the mounting portion, and A flat plate portion made of a dielectric having an input / output terminal mounting portion formed therethrough or cut out, and a line conductor formed from one side to the other side facing the upper surface, and the line conductor formed on the upper surface of the flat plate portion A semiconductor device housing package having an upright wall portion made of a dielectric joined to the mounting portion and having an input / output terminal fitted and joined to the mounting portion. A cut-out portion having a surface cut out substantially flush with a side surface of the upright wall portion inside the frame body.
【請求項2】前記切り欠かれた面の長さが0.1mm以
上であることを特徴とする請求項1記載の半導体素子収
納用パッケージ。
2. The package for accommodating a semiconductor element according to claim 1, wherein the length of said cutout surface is 0.1 mm or more.
JP2000287455A 2000-09-21 2000-09-21 Package for storing semiconductor elements Expired - Fee Related JP3615697B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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Publications (2)

Publication Number Publication Date
JP2002100693A true JP2002100693A (en) 2002-04-05
JP3615697B2 JP3615697B2 (en) 2005-02-02

Family

ID=18771197

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012114362A (en) * 2010-11-26 2012-06-14 Kyocera Corp Package for storing semiconductor and semiconductor device including the same
JP2019036584A (en) * 2017-08-10 2019-03-07 住友電気工業株式会社 Optical module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012114362A (en) * 2010-11-26 2012-06-14 Kyocera Corp Package for storing semiconductor and semiconductor device including the same
JP2019036584A (en) * 2017-08-10 2019-03-07 住友電気工業株式会社 Optical module

Also Published As

Publication number Publication date
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