JP2002076362A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-performance semiconductor element having stable characteristics with little variations to obtain a high-performance semiconductor device having a high integration degree by a convenient and high-yield manufacturing process. SOLUTION: Catalytic element Ni 105 for accelerating crystallization is selectively introduced in an active (channel) regions of the semiconductor device, i.e., regions 100 of an amorphous silicon film 103 not covered with a mask 104. Using silicon film regions 103a crystal-grown by heating as seeds, second crystallized regions 103c are grown in a melt-solidifying process to result in a very high quality crystalline silicon film. The second crystallized regions 103c effectively take over a microscopically good crystal component (columnar crystal component) of the crystallized regions 103a by the catalytic element and are crystal-grown from an amorphous state. Hence, defects are very little in the regions, the same as in the crystallization by the usual melt-solidification.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a semiconductor device having a crystalline silicon film obtained by crystallizing an amorphous silicon film as an active region, and a method for manufacturing the same. In particular, the present invention
Thin film transistor provided on a substrate having an insulating surface
Effective for semiconductor devices using (TFT), active matrix type liquid crystal display device, contact type image sensor,
It can be used for three-dimensional ICs.

[0002]

2. Description of the Related Art In recent years, large and high-resolution liquid crystal display devices,
High-speed, high-resolution contact image sensor, 3D IC
In order to realize such a technique, attempts have been made to form a high-performance semiconductor element on an insulating substrate such as glass or an insulating film. In general, a thin film silicon semiconductor is used for a semiconductor element used in these devices. Thin-film silicon semiconductors are broadly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor.

An amorphous silicon semiconductor has a low production temperature,
It is most commonly used because it can be manufactured relatively easily by a gas phase method and has high mass productivity, but its physical properties such as conductivity are inferior to those of crystalline silicon semiconductors. Therefore, in order to obtain higher-speed characteristics in the future, there is a strong demand for establishing a method for manufacturing a semiconductor device made of a crystalline silicon semiconductor. Note that polycrystalline silicon, microcrystalline silicon, and the like are known as crystalline silicon semiconductors.

As a method for obtaining a silicon semiconductor in the form of a thin film having crystallinity, (1) a film having crystallinity is directly formed at the time of film formation.

(2) An amorphous semiconductor film is formed in advance,
Crystallinity is imparted by the energy of laser light.

(3) An amorphous semiconductor film is formed in advance,
Crystallinity is imparted by applying heat energy. Such a method is known.

However, in the above method (1), crystallization proceeds simultaneously with the film-forming step. Therefore, it is essential to increase the thickness of the silicon film in order to obtain crystalline silicon having a large grain size. It is technically difficult to uniformly form a film having physical properties over the entire surface of the substrate.

In the method (2), since the crystallization phenomenon in the melt-solidification process is used, the grain boundaries are satisfactorily treated with a small grain size, and a relatively high-quality crystalline silicon film can be obtained. Taking an excimer laser, which is currently most commonly used, as an example, a laser having sufficient stability has not yet been obtained, and the performance of a semiconductor device is not sufficient.

[0009] The method (3) includes the steps (1) and (2).
Compared to the method described above, the method is advantageous in terms of uniformity and stability in the substrate, but requires a heat treatment at 600 ° C. for a long time of about 30 hours, resulting in a long processing time and low throughput. is there. Further, in this method, since the crystal structure is a twin structure, one crystal grain is relatively large as several μm, but includes a large number of twin defects in the crystal grain, and is smaller than the method of the above (2). Poor crystallinity. As a means for improving the crystallinity, a method of performing a heat treatment in an oxygen atmosphere at about 1000 ° C. is also used.
In this case, it is not a process in which an inexpensive glass substrate can be used. Nevertheless, as a device characteristic, a TFT having only a low field-effect mobility of about 100 cm ² / Vs is obtained.

In contrast to these methods, a method of improving the above method (3) to obtain a high quality crystalline silicon film is disclosed in
-5931. In these methods, by using a catalyst element that promotes crystallization of the amorphous silicon film, a lower heating temperature and a shorter processing time can be achieved,
And the crystallinity is improved. Specifically, a minute amount of a metal element such as nickel or palladium is introduced into the surface of the amorphous silicon film, and then heating is performed.

The mechanism of this low-temperature crystallization is that crystal nuclei are generated at an early stage with a metal element as a nucleus, and then the metal element acts as a catalyst to promote crystal growth, and crystallization proceeds rapidly. Understood. In this sense, these metal elements are hereinafter referred to as catalyst elements. One crystalline silicon film crystallized by the ordinary solid phase growth method (the method of (3) above) has a twin structure in one grain and has many crystal defects. The crystalline silicon film grown by the crystallization promoted by the catalytic element is composed of a number of columnar crystal networks in the grains, and the inside of each columnar crystal becomes almost an ideal single crystal state. I have.

Further, by selectively introducing a catalytic element into a part of the amorphous silicon film and heating the same, the catalytic element is selectively introduced while leaving the other part in the amorphous silicon film state. By crystallizing only the introduced region and further extending the heating time, the crystal is grown laterally (in a direction parallel to the substrate) from the introduced region. Inside the lateral crystal growth region, columnar crystals whose growth directions are substantially aligned in one direction are clinging together, and the catalyst element is directly introduced,
The region has better crystallinity than the region where the crystal nuclei occur randomly. Therefore, by using the crystalline silicon film in the lateral crystal growth region for the active region of the semiconductor device, the performance of the semiconductor device can be improved.

According to the method described in Japanese Patent Application Laid-Open No. 9-45331, in order to further enhance the crystallinity of a crystalline silicon film constituting an active region of a TFT requiring high-speed operation,
After crystallization by the above-mentioned catalyst element, a step of further irradiating strong light such as laser light is added. That is,
By this step, the crystallinity of the crystalline silicon film crystallized by the heat treatment using the catalytic element is further enhanced, and as a result,
In particular, TFTs that require high-speed operation are being improved in performance.

As another example, as described in the above publication, Japanese Patent Application Laid-Open No. Hei 7-221017 is an example of combining a step of irradiating a strong light such as a laser in addition to crystallization by a catalytic element. In the method described in this publication, after introducing a catalytic element into an amorphous silicon film, heat treatment is performed for a short time to form only crystal nuclei, and then crystallization is performed by irradiating a laser beam. ing. That is, in the method described in the above publication, the main crystallization is performed by laser irradiation.

[0015]

The silicon film crystallized using the above-mentioned catalytic element has good crystallinity, but has many defects in each crystal grain. Therefore, as a silicon film used for an active layer of a high-performance semiconductor device aimed at by the present invention, a high-quality crystalline silicon film with further reduced crystal defects is desired. In order to further improve the crystallinity, after crystallization using a catalyst element, the temperature is further increased (from 800 to 1).
(100 ° C.) in an oxidizing atmosphere and a method of irradiating a laser beam. In the former, a so-called high-temperature process is performed, and an inexpensive glass substrate cannot be used.

Therefore, assuming that an inexpensive glass substrate is used, the latter method is used. In the crystalline silicon film crystallized by introducing the catalyst element and heating, each crystal grain is formed by a network state of columnar crystals having a width of 800 to 1000 °. Although the inside of each columnar crystal is in a single crystal state, many crystal defects such as dislocations are present in the crystal grains due to bending or branching of these columnar crystals. Laser irradiation
The purpose is to eliminate defects in crystal grains based on the columnar crystal component having good crystallinity, but in reality,
extremely difficult.

Actually, when a crystalline silicon film crystallized by a catalytic element is irradiated with a laser, there is almost no effect at a low laser power, and a state in which the original crystalline state is almost maintained but not greatly improved is obtained. On the other hand, at high laser power, the original crystal state is reset,
It will be in the same state as crystallized only by laser. It is very difficult to form the intermediate state, and there is no laser power margin.

As a result, when the crystalline silicon film crystallized by the catalytic element is irradiated with a laser beam to improve the crystallinity, and the active region of the TFT is formed, the characteristics of the TFT are as follows. Elemental crystallization only
The current driving capability is low, which is almost the same as that of the case formed without (laser irradiation), or the current driving capability is moderate but the characteristics vary greatly as in the case of crystallization by laser irradiation alone. That is, even if the silicon film crystallized by the catalytic element is further irradiated with laser light in the conventional method, no further significant improvement can be made.

In the method described in Japanese Patent Application Laid-Open No. Hei 7-221017, after introducing a catalytic element into an amorphous silicon film,
Heating for a short time to form only crystal nuclei,
After that, crystallization is performed by irradiating a laser beam. That is, the main crystallization is performed by laser light irradiation, and it is suitable to sufficiently bring out the effect of laser irradiation. However, in the method disclosed in the above publication, since the catalyst element is entirely introduced into the amorphous silicon film to form the crystal nucleus, it is difficult to sufficiently control the formation of the crystal nucleus. That is, generation of crystal nuclei is completely random, and it cannot be predicted at which position. If the position of the crystal nucleus is not sufficiently controlled, during crystallization by laser irradiation, depending on the location, there are regions where the crystal grows from the crystal nucleus formed by the catalytic element, and the crystal grows directly from the amorphous (i.e., Conventional laser irradiation crystal growth) regions also appear. This is because laser irradiation uses an instantaneous melting and solidification process in the silicon film to crystallize, so that crystal growth from the crystal nucleus occurs at a certain distance from the crystal nucleus formed by the catalytic element. This is because prior to reaching, conventional crystallization by natural solidification occurs. When a semiconductor device is manufactured using such a crystalline silicon film, the crystal state in each element region greatly varies. Therefore, as a result, the characteristics of the semiconductor device become unstable, and the characteristics vary greatly.

Therefore, an object of the present invention is to solve all of the above-mentioned problems and to provide a high-performance semiconductor device with little variation manufactured on a substrate having an insulating surface, and to provide such a semiconductor device with a high yield. It is an object of the present invention to provide a manufacturing method which can be manufactured by a simple method.

[0021]

Means for Solving the Problems The present inventors have paid attention to the microscopic crystallinity of a silicon film crystallized using a catalytic element, and by taking advantage of this advantage, a higher quality can be achieved. We thought whether a crystalline silicon film with excellent uniformity could be obtained, and repeated our research day and night. Finally, they realized this, and found a semiconductor device with very high performance and high stability, and a method for manufacturing such a semiconductor device.

That is, in the semiconductor device according to the present invention, a crystalline silicon film formed on a substrate having an insulating surface is used as an active (channel) region. Selective introduction of a catalytic element that promotes crystallization into the amorphous silicon film,
A crystalline silicon film including a first crystallized region crystallized by the heat treatment and a second crystallized region crystal-grown in a melt-solidification process using the first crystallized region as a seed. It is characterized by having.

According to the present invention, the second crystallized region grown in the melt-solidification process using the silicon film region selectively crystallized and crystal-grown as a seed,
This is very different from the silicon film crystallized by the conventional method disclosed in Japanese Patent Application Laid-Open No. 9-4531, and is a very high quality crystalline silicon film.

On the other hand, a conventional method (Japanese Unexamined Patent Publication No.
No. 4,591,331), after completely crystallizing an amorphous silicon film using a catalytic element, irradiation with intense light such as laser light is performed to improve the crystallinity of the region. However, as described above, the crystal defects existing after crystallization by the catalytic element cannot be sufficiently improved, and when the intensity of strong light is increased to enhance the improvement effect, the crystallization state by the catalytic element is reset. Will be done.

On the other hand, the second crystallized region in the semiconductor device of the present invention is obtained by crystal growth from the amorphous state by melting and solidifying, reflecting the crystallinity of the crystallized region by the catalytic element. As a result, a crystallographically favorable crystal component (columnar crystal component) in the crystallization region due to the catalyst element is efficiently taken over, and the crystal is grown from an amorphous state. Therefore, as in the case of crystallization by ordinary melt-solidification, the region has very few defects. In other words, the second crystallization region according to the present invention has a microscopically good crystal state obtained by crystallization with a catalytic element and a good crystal state in the crystal state characteristic of the solid-phase growth crystallization method in the substrate. A very high-quality crystalline silicon film incorporating all of the uniformity and the low intragranular defect density in the melt-solidification crystallization by intense light irradiation.

The very high quality second crystallized region is grown in the melt-solidification process by using the silicon film region where the catalytic element is selectively introduced into the amorphous silicon film for crystal growth as a seed. Let me get it. Therefore, it is very difficult to form the second crystallization region over a large area on the substrate, and only a minute region on the order of microns can be obtained. Therefore, both the first crystallized region where the catalytic element is introduced into the amorphous silicon film and crystallized by heat treatment, and the second crystallized region where the amorphous silicon film is grown as a seed in the melt-solidification process are used. Thus, the active (channel) region of the semiconductor device is formed.

In the semiconductor device having this configuration, carriers mainly move using the second crystallized region having very good crystallinity, and the active state of the semiconductor device is increased.
By configuring a part of the (channel) region with the second crystallization region, a very high performance (particularly, high current driving capability) semiconductor device can be realized.

Specifically, according to the present invention, a very large improvement of about 2 to 3 times as much as the field effect mobility is observed as compared with the TFT manufactured according to the conventional method disclosed in Japanese Patent Application Laid-Open No. 9-45831. Was.

The present invention is also different from that described in Japanese Patent Application Laid-Open No. Hei 7-221017 in which crystallization is performed by laser light. That is, in Japanese Patent Application Laid-Open No. Hei 7-221017, after introducing a catalytic element into the entire surface of an amorphous silicon film,
Heating for a short time to form only crystal nuclei,
After that, crystallization is performed by irradiating a laser beam. On the other hand, in the present invention, the introduction region of the catalyst element is controlled,
Instead of crystal nuclei, a tight crystallization region is first formed.

In the present invention, it is important to stabilize the crystallized state by intense light irradiation by forming a wide range of crystallized areas with stable crystallinity as seed regions instead of crystal nuclei. It is. Further, the amorphous silicon film is selectively crystallized by the catalytic element, selectively reflecting the crystallinity of the first crystallized region, and forming the second crystallized region crystallized by melt-solidification. obtain. Therefore,
It is easy to control the position of the second crystallization region due to the melting and solidification, and it is possible to control the positional relationship with the active (channel) region of the semiconductor device. Therefore, according to the present invention, unlike in Japanese Patent Application Laid-Open No. Hei 7-221017, the crystallinity of the active (channel) region can be made uniform in all the semiconductor elements, and stable characteristics with very little variation between the elements can be obtained. A high-performance semiconductor device can be realized.

In one embodiment of the present invention, in the above-mentioned semiconductor device, the first crystallized region and the second crystallized region are each substantially linear in plan view,
The linear (first crystallized region) and the second crystallized region are adjacent to each other, and an active (channel) region is formed by the crystalline silicon film in a striped state.

In this embodiment, the second crystallization region is
By performing one-dimensional crystal growth from the linear first crystallization region, a crystal growth direction and a crystal growth boundary are formed, and a second crystallization region having a relatively large area is obtained.
Further, by controlling the width of the first crystallization region and the width of the second crystallization region at this time, it is also possible to control the characteristics of the semiconductor device.

Further, in this embodiment, the size of the second crystallized region grown in the melt-solidification process is the most important parameter. The size of the second crystallization region can be controlled as the width between the linear first crystallization regions as described above.

The second crystallization region in this embodiment is:
It is meaningless unless the crystal is grown while inheriting the crystallinity of the adjacent first crystallization region. Therefore, the line width (width in the short side direction) of the second crystallization region needs to be equal to or less than the maximum width in which crystal growth is performed while inheriting the crystallinity of the adjacent first crystal growth region. .

According to another embodiment of the present invention, in the above-mentioned semiconductor device, the width of the linear second crystallization region is 6 μm or less.

In this embodiment, the second crystallization region is
Since the line width (width in the short side direction) is 6 μm or less, crystal growth is performed while inheriting the crystallinity of the adjacent first crystallization region. Therefore, in the second crystallization region,
In all cases, a high-quality crystalline silicon film crystallized in the melt-solidification process using the first crystallization region as a seed.

In one embodiment of the present invention, in the semiconductor device described above, a crystal growth boundary extends in a central portion of the linear second crystallized region, and the second crystallized region extends linearly. Exist in a line parallel to the direction in which the carrier is moving, and the linear crystal growth boundary does not cross at least a line extending in the direction of movement of carriers (channel direction) in the active (channel) region. Is located.

In this embodiment, the first crystallized region and the second crystallized region have a substantially linear shape, and have a stripe shape adjacent to each other. In this case, at the center of the linear second crystallization region, a crystal growth boundary formed by collision of regions that have grown and sandwiched from the first crystallization regions on both sides, respectively, appears. . The crystal boundary exists linearly at the center of the second crystallization region, parallel to the linear region. This growth boundary is formed by collision of the crystal regions, which proceed in completely opposite directions and completely break the bonding of Si atoms, causing a very large trap or scattering of carriers in the semiconductor device. It is central.

Therefore, in the present embodiment, the linear growth boundaries are arranged so as not to at least cross the moving direction (channel direction) of carriers in the active (channel) region of the semiconductor device. Thus, carriers can move in the channel without straddling the growth boundary, so that the effect of the growth boundary can be prevented, and a high-performance semiconductor device having a high current driving force can be realized.

In one embodiment of the present invention, in the semiconductor device, a crystal growth boundary is formed at a central portion of the linear second crystallization region in a direction in which the second crystallization region extends. Exist in parallel linearly, so that the moving direction (channel direction) of carriers in the active (channel) region and the linear extending direction of the linear crystal growth boundary are substantially parallel to each other. Are located.

In this embodiment, the moving direction (channel direction) of carriers in the active (channel) region of the semiconductor device
And the line direction of the linear growth boundary is arranged to be substantially parallel. As a result, all carriers can move in the channel at the shortest distance, the influence of this growth boundary is completely prevented, and a high-performance semiconductor device having a higher current driving force can be realized.

When the growth boundary is oblique to the channel direction, the carrier flows preferentially so as to avoid the growth boundary, so that the path lengthens.

In this embodiment, the carrier movement direction in the active (channel) region is perpendicular to the crystal growth direction in the melting and solidification process in the second crystallization region. Seems to inhibit.

Certainly, in this embodiment, the crystal grows in the lateral direction (the direction parallel to the substrate) at the time of crystallization in melt solidification, reflecting the crystallinity of the region crystallized by the catalytic element. At this time, crystal grain boundaries are generated in the direction perpendicular to the growth direction, reflecting the difference in the crystal state of the crystallized region due to the catalyst element serving as the seed region.

However, the trapping effect and scattering effect on carriers in the semiconductor device are much larger at the above-mentioned crystal boundary formed at the center of the second crystallization region than at the above-mentioned crystal grain boundaries. In this case, the structure is given priority to avoid the crystal boundary.

According to another embodiment of the present invention, in the semiconductor device, the active (channel) region includes at least a plurality of linear second crystallization regions.

In this embodiment, the active (channel) region includes at least a plurality of linear second crystallization regions. The larger the number of linear second crystallization regions included in the channel region, the better, the current driving capability is improved, and the variation in characteristics between elements is reduced.

In particular, a semiconductor element requiring current driving capability has a large channel width and can include many linear second crystallization regions. However, the minimum condition for a semiconductor element having a small channel width is as follows. At least a plurality of linear second crystallization regions need to be included in the channel region. As a result, it is possible to secure uniformity of characteristics of individual semiconductor elements and a semiconductor device with high performance and little variation.

According to another embodiment of the present invention, in the semiconductor device, the active (channel) region contains the catalyst element at a concentration of 1 × 10 ^{16 to} 5 × 10 ¹⁷ atoms / cm ^3. I have.

In one embodiment of the present invention, in the semiconductor device described above, the catalytic element contained in the active (channel) region is nickel.

In the semiconductor device of this embodiment, the active (channel) region is divided into a first crystallized region crystallized by heat treatment using a catalytic element and a seed region as a seed region during the melt-solidification process. And a second crystallized region where the crystal is grown. Therefore, in the semiconductor device obtained by this embodiment, the active region contains a certain amount of a catalytic element, which is the basis for specifying the semiconductor device of the present invention. The types of catalyst elements that can be used in the present invention include Ni, Co, Fe, Pd, and Pd.
t, Cu, and Au. One or a plurality of elements selected from these elements have an effect of promoting crystallization in a very small amount, tend to be relatively inert in a semiconductor (crystalline silicon), and have an adverse electrical effect on a semiconductor device. Can be suppressed. Therefore, in the semiconductor device of the present invention, any of these elements is contained in the active (channel) region by a certain amount.

It has been found that the most remarkable effect can be obtained particularly when Ni is used among these catalyst elements. The following model can be considered for this reason. The catalyst element does not act alone, but acts on crystal growth by bonding to the silicon film and silicidation. This is a model in which the crystal structure at that time acts like a kind of template when the amorphous silicon film is crystallized, and promotes the crystallization of the amorphous silicon film. Ni forms silicide of _two Si and NiSi2. NiSi ₂ exhibits a fluorite-type crystal structure, which is very similar to the diamond structure of single crystal silicon. Moreover, NiSi ₂ has a lattice constant of 5.406 °,
5.43 lattice constant of crystalline silicon in diamond structure
It has a value very close to 0 °. Therefore, NiSi ₂ is the best as a template for crystallizing an amorphous silicon film, and in fact, even in view of the crystallinity of the obtained crystalline silicon film and the catalytic effect of accelerating its crystallization. There is no doubt that Ni is the best catalyst element.

Also in the semiconductor device of this embodiment, the crystallinity of the crystallized region by the catalytic element, which is the seed region at the time of crystallization by melt-solidification, is very important, and greatly affects the characteristics of the semiconductor device. . Therefore, in the semiconductor device of the present embodiment, the fact that Ni is used as a catalytic element and a certain amount of Ni remains in the active region thereof is the result and evidence that the effects of the present embodiment were most effectively brought out. Become.

At this time, the concentration of the nickel element actually contained in the active region of the semiconductor device is 1 × 10
It is desirable to be ^{16 to} 5 × 10 ¹⁷ atoms / cm ³ . If the amount of nickel exceeds 5 × 10 ¹⁷ atoms / cm ³ , the active region is formed as nickel silicide.
Many unevenly distributed regions appear in the (silicon film), which adversely affects the characteristics of the semiconductor device. On the other hand, when the amount of nickel is 5 × 10 ¹⁷ atoms / cm ³ or less, it is considered that almost no nickel is precipitated as a silicide, a solid solution is formed in the silicon film, and the nickel is incorporated into crystal defects. . In such a state, no adverse effect on the semiconductor device is observed. As described above, when nickel silicide is deposited, an adverse effect on characteristics is observed. Conversely, the residual nickel concentration in the active region is 1 × 10 ¹⁶
If it is less than atoms / cm ³ , it is not considered that the amorphous silicon film was sufficiently crystallized using the catalytic effect of nickel. In this case, it is considered that the crystallinity of the seed region is low and the effect of the present invention cannot be obtained.

For example, even if a method for reducing the amount of nickel in the active region is used in a process after crystallization, if a sufficient amount of nickel is introduced as a catalyst to grow the crystal, 1 × 10 It cannot be reduced to an amount of ¹⁶ atoms / cm ³ or less, and an amount of nickel higher than this always remains. Therefore, in the semiconductor device of this embodiment, when the concentration of nickel contained in the active (channel) region is 1 × 10 ^{16 to} 5 × 10 ¹⁷ atoms / cm ³ , the effect of the present invention is obtained. It is in the most pulled state.

In a semiconductor device according to another embodiment, a crystalline silicon film is formed on a substrate having an insulating surface.
In a semiconductor device having a plurality of thin film transistors serving as a (channel) region, the plurality of thin film transistors are
A catalyst element that promotes the crystallization is selectively introduced into the amorphous silicon film, and the first crystallized region crystallized by the heat treatment is melted and solidified using the first crystallized region as a seed. A first type thin film transistor having an active (channel) region constituted by a second crystallized region grown in the process, and a catalytic element for promoting the crystallization of the amorphous silicon film, A second type thin film transistor having an active (channel) region constituted only by a first crystallized region crystallized by a heat treatment.

According to another embodiment of the present invention, there is provided a semiconductor device including a pixel electrode switching thin film transistor for switching a pixel electrode and a driver circuit for forming a driver circuit for driving the pixel electrode switching thin film transistor on a substrate having an insulating surface. In a driver monolithic active matrix semiconductor device provided with a thin film transistor, at least one of the driver circuit thin film transistors is formed on an amorphous silicon film,
A catalyst element for promoting the crystallization is selectively introduced, a first crystallized region crystallized by heat treatment, and a first crystallized region grown in a melt-solidification process using the first crystallized region as a seed. And an active (channel) region composed of a crystallization region of the second and the thin film transistor for pixel electrode switching, wherein a catalyst element for promoting crystallization is introduced into the amorphous silicon film, and the amorphous silicon film is subjected to heat treatment. It has an active (channel) region constituted only by the crystallized first crystallization region.

The above two embodiments are applied to a semiconductor device having a plurality of thin film transistors. Usually, a plurality of thin film transistor elements are provided on a substrate,
Although a semiconductor device is configured, characteristics required for each thin film transistor are not uniform, and differ depending on what purpose each is used. Generally, the channel width is increased for thin film transistors that require current driving capability, and the channel width is reduced for thin film transistors that require high charge retention capability (low leakage current) such as memory devices. To reduce the leakage current.

An object of the present invention is to further enhance the crystallinity of a crystalline silicon film forming a channel region of a thin film transistor and achieve a higher current driving capability.

In the case of simultaneously forming thin film transistors that require different characteristics as described above,
It is effective to properly use the effects of the present invention to obtain thin film transistors according to the respective characteristics. In particular, a thin film transistor which requires current driving capability has a wide channel width, and thus is suitable for applying the present invention. That is, a large number of second crystallized regions having high crystallinity are formed,
It is easy to include it in the channel.

On the other hand, a low leakage current is required, and particularly in a thin film transistor having a small channel width,
The channel region may be constituted only by the first crystallized region crystallized by the catalytic element without using the second crystallized region.

In a semiconductor device according to another embodiment, a crystalline silicon film is formed on a substrate having an insulating surface.
In a semiconductor device having a plurality of thin film transistors serving as a (channel) region, the plurality of thin film transistors are
A catalyst element for promoting crystallization is selectively introduced into the amorphous silicon film, and a first crystallized region crystallized by heat treatment and a first solidified region are used as seeds to form a melt-solidification process. A first type thin film transistor having an active (channel) region constituted by a second crystallized region grown by the method described above, and an amorphous silicon film is crystallized only by a melt-solidification process without using a catalytic element. The third
And a third type of thin film transistor having an active (channel) region constituted by the crystallization region of FIG.

In this embodiment, without introducing a catalytic element at all, the entire channel is left in an amorphous state in a completely masked state, and the third crystal is formed only by the melt-solidification process by direct intense light irradiation. The crystallized region was crystallized, and a channel region was formed using the third crystallized region. This is effective for a thin film transistor having a small channel width that requires a low leakage current.

When the second crystallized region is applied to a thin film transistor which requires a small leakage current and has a small channel width, when the number and the area of the second crystallized region are slightly varied in each element, a large characteristic difference occurs. Will appear. Therefore, in this case, it is rather preferable that the channel region is constituted only by the first crystallized region or the third crystallized region crystallized only by the melt-solidification process.

In one embodiment of the present invention, there is provided a semiconductor device comprising: a pixel electrode switching thin film transistor for switching a pixel electrode; and a driver circuit constituting a driver circuit for driving the pixel electrode switching thin film transistor, on a substrate having an insulating surface. In a driver monolithic active matrix semiconductor device provided with a thin film transistor, at least one of the thin film transistors for a driver circuit selectively introduces a catalytic element for promoting crystallization into an amorphous silicon film and heat-treats the amorphous silicon film. A first crystallized region crystallized by
And a second crystallized region formed by crystal growth in a melt-solidification process using the crystallized region as a seed, and a thin film transistor for pixel electrode switching, using a catalytic element. And an active (channel) region formed by a third crystallized region obtained by crystallizing an amorphous silicon film only by a melt-solidification process.

In this embodiment, in particular, a thin film transistor for switching a pixel electrode and a thin film transistor for switching the pixel electrode are driven as a semiconductor device having a large number of thin film transistors having completely different characteristics on the same substrate as described above. This is a driver monolithic active matrix semiconductor device provided with a thin film transistor forming a driver circuit.

The driver monolithic type active matrix semiconductor device is generally used for a liquid crystal display device, an image sensor and the like. This driver monolithic active matrix semiconductor device has a clear purpose and characteristic of each thin film transistor, and is suitable for making a thin film transistor suitable for each purpose by using the present invention.

Therefore, for the above-described reason, at least a part of the thin film transistor constituting the driver circuit (particularly, a TFT requiring a high current driving capability) has a channel region formed between the first crystallized region and the second crystallized region. And a crystallization region. On the other hand, in the thin film transistor for pixel electrode switching, the channel region is constituted by a third crystallized region in which an amorphous silicon film is crystallized only by a melting and solidifying process without using a catalytic element.

A method of manufacturing a semiconductor device according to another embodiment is characterized in that a catalytic element for promoting crystallization is selectively introduced into a part of an amorphous silicon film formed on a substrate having an insulating surface. A first crystal growth step of selectively crystal-growing the amorphous silicon film in the region where the catalyst element is selectively introduced, by performing a heat treatment, and irradiating strong light; Lateral direction from the above selectively grown region
(In the direction parallel to the substrate), a second crystal growth step of growing a crystal adjacent to the selectively crystallized region, and a region where the catalyst element is introduced and crystal growth is performed by heat treatment. At least an active region forming step of forming an active (channel) region of the semiconductor device using the region where the crystal is grown laterally by light irradiation.

In the manufacturing method of this embodiment, a region where a catalyst element is introduced and crystal growth is performed by heat treatment and a region where crystal growth is performed in the lateral direction by intense light irradiation are used.
The active (channel) region of the semiconductor device is formed.

At this time, in the second crystal growth step of irradiating strong light, crystal growth occurs in the lateral direction due to the melt-solidification phenomenon, reflecting the crystallinity of the region crystallized by the catalytic element. In other words, the strong light irradiation efficiently takes over the crystallographically favorable crystal components (columnar crystal components) in the crystallization region due to the catalytic element, and grows the crystals from the amorphous state. As a result, the microscopically good crystalline state obtained by crystallization with the catalytic element, the good uniformity of the crystalline state within the substrate, which is a feature of the solid-phase growth crystallization method, and the solidified crystal by intense light irradiation An extremely high-quality crystalline silicon film is formed in which all of the low intragranular defect densities due to the formation of the crystalline silicon film are incorporated.

Then, as a result of forming the crystallization region so as to be surely included in the active (channel) region of the semiconductor device, the crystallization region has extremely high performance (particularly high current driving capability) as never before. Thus, a semiconductor device exhibiting stable characteristics with very little variation between elements can be obtained.

In one embodiment of the method of manufacturing a semiconductor device, a catalytic element for promoting crystallization is selectively introduced into a part of an amorphous silicon film formed on a substrate having an insulating surface. The catalyst element introduction step and heat treatment are performed, and the amorphous silicon film in the region where the catalyst element is selectively introduced is selectively crystal-grown, and further from that region in a lateral direction (a direction parallel to the substrate). And a first crystal growth step of growing a crystal in a peripheral region thereof, and irradiating strong light to further grow the crystal in the horizontal direction by the above-mentioned heat treatment in the horizontal direction (in a direction parallel to the substrate). A second crystal growth step in which a region adjacent to the region crystallized in the lateral direction by the heat treatment is crystal-grown; a region in which the catalyst element is introduced and the crystal is grown in the heat treatment; Using the grown area At least an active region forming step of forming an active (channel) region of the semiconductor device.

In the manufacturing method according to this embodiment, the region where the crystal is grown in the lateral direction by the heat treatment is further irradiated in the lateral direction (in a direction parallel to the substrate) by the strong light irradiation. A crystal is grown in a region adjacent to the crystallized region. Thereafter, an active (channel) region of the semiconductor device is formed so as to include the region where the crystal is grown laterally by the intense light irradiation.

Also in the method of manufacturing a semiconductor device according to this embodiment, the crystallinity of the crystalline silicon film in the region crystallized by the heat treatment with the introduction of the catalytic element is the seed region at the time of crystallization by melt-solidification. ,is important. Because
This is because if the crystallinity of the seed region is low, the crystallinity obtained by melting and solidifying by intense light irradiation is also low reflecting this, and the characteristics of the semiconductor device are degraded.

The above method is effective as a method for further increasing the crystallinity of the seed region (that is, the crystalline silicon film crystallized by the heat treatment with the catalytic element).

That is, in this embodiment, by selectively introducing a catalytic element into a part of the amorphous silicon film and heating it, the other part is selectively left in the amorphous silicon film state. By crystallizing only the region into which the catalytic element has been introduced, and further extending the heating time, the crystal is grown in the lateral direction (the direction parallel to the substrate) from the introduced region. Inside this lateral crystal growth region, columnar crystals whose growth directions are substantially aligned in one direction are clinging together,
This is a region having better crystallinity as compared with a region where a catalyst element is directly introduced and crystal nuclei are randomly generated.

Therefore, in this embodiment, the crystalline silicon film in the lateral crystal growth region is used as a seed region for intense light irradiation to further enhance the crystallinity of the crystal growth region by intense light irradiation. And the performance of the semiconductor device can be further improved.

Further, in another embodiment of the method for manufacturing a semiconductor device, the method for manufacturing a semiconductor device according to the above-described method, wherein the selective introduction of a catalytic element into the amorphous silicon film is performed by: This is performed after forming a mask in which a region into which a catalytic element is selectively introduced is opened. The planar shape of the mask is a linear line & space shape arranged in parallel at a predetermined interval. is there.

In the manufacturing method of this embodiment, the region crystallized by the heat treatment is introduced by intense light irradiation, and the region crystallized by the heat treatment is used as a seed region to crystallize the adjacent region. The positional relationship (arrangement) between the seed region and the region that is crystallized by intense light irradiation is important. That is, the point is the pattern of selective introduction of the catalytic element into the amorphous silicon film performed in the previous step.

In this embodiment, the selective introduction of the catalytic element into the amorphous silicon film is achieved by forming a mask on the amorphous silicon film in which a region where the catalytic element is selectively introduced is opened. After that, the planar shape of the mask is a line and space shape in which each is linear and each is arranged in parallel. As in this embodiment, for example, by providing a mask formed by photolithography, it becomes possible to accurately control the line width and the space width, and to perform alignment with the active (channel) region of the semiconductor device later. Can be performed with high accuracy.

In this case, since the planar shape of the mask at this time is a linear shape and each is a line and space shape arranged in parallel, the selection of the catalyst element for the amorphous silicon film is performed. Introduction is performed linearly. Thereafter, the amorphous silicon film is selectively crystallized linearly by heat treatment, and the remaining amorphous (uncrystallized) region is also linearized.

In this embodiment, a linear amorphous (non-crystallized) region is provided so as to be sandwiched from both sides by a region crystallized linearly using a catalytic element, and is irradiated with strong light. Then, the crystal is grown laterally (in a direction parallel to the substrate) from the adjacent crystallization region. That is, the remaining amorphous (non-crystallized) regions that are crystallized by intense light irradiation are linearly sandwiched between the crystallized regions by the catalytic element. Thus, in the case of intense light irradiation, lateral crystal growth is performed from crystallized regions on both sides of the remaining amorphous (uncrystallized) region (that is, from two directions).

Thus, it is possible to efficiently reflect the crystallinity of the region crystallized by the adjacent catalyst element over a wide area.

With such a shape, one-dimensional crystal growth is performed in the direction along the line width direction or the short side direction during lateral crystallization by intense light irradiation. The growth is stabilized, and the control of crystal grain boundaries becomes easier.

Also, by setting the line width of the mask and the space width between the linear masks at this time, the width of the seed region (the region crystallized by the catalytic element) is reduced. It is possible to increase the area ratio of the region where the crystal is grown in the lateral direction. Accordingly, a high-quality crystalline silicon film formed by reflecting the crystallinity of the crystallized region of the catalytic element by intense light irradiation can be obtained as a region having a relatively large area, and the performance of the semiconductor device can be improved. Instead, the layout of the element region is facilitated.

In one embodiment, in the method of manufacturing a semiconductor device, the catalyst element is selectively introduced into the amorphous silicon film using a linear mask in the catalyst element introduction step. In the first crystal growth step, the amorphous silicon film in the region not covered by the mask is crystallized by heat treatment, while the region covered by the mask is kept in an amorphous state. In the two-crystal growth step, when irradiating strong light to crystallize the amorphous region covered with the mask, the line width (width in the short side direction) of the pattern of the mask is
The amorphous region covered by the mask inherits the crystallinity of the crystal growth region formed by the adjacent catalyst element and is set to be equal to or less than the maximum width in which crystal growth is performed.

An important point in this embodiment is that, after the selective crystal growth by the heat treatment with the catalytic element, the remaining region is sandwiched or surrounded by the selectively grown region. This is the width of the linear amorphous (non-crystallized) region. The line width (width in the short side direction) needs to be equal to or less than the width at which crystal growth is performed by taking over the crystallinity of the crystal growth region by the adjacent catalyst element in the intense light irradiation. Thus, the region is filled with a high-quality crystalline silicon film crystallized by intense light irradiation using the crystallized region of the catalyst element as a seed.

The crystallization by intense light irradiation causes the amorphous regions to melt preferentially, and these are crystallized by reflecting only the good crystal components in the crystallized regions. Where the size of the crystalline region is large, the region is solidified and crystallized before taking over a good crystal component of the crystallized region. If the line width or the width in the short side direction is equal to or greater than the maximum value of the width, the conventional strong light irradiation directly crystallized from the amorphous state by the strong light irradiation in the region. The crystalline silicon film formed only by the mixture is mixed. This not only reduces the characteristics of the semiconductor device, but also increases the variation in characteristics.

From the above points, in the manufacturing method of this embodiment, the line width of the linear mask for introducing the catalytic element is changed by changing the amorphous region covered by the linear mask to By taking over the crystallinity of the crystal growth region by the adjacent catalyst element, the width is set to be equal to or less than the maximum width in which crystal growth is performed.

In another embodiment, in the method of manufacturing a semiconductor device, the linear mask has a pattern line width (width in a short side direction) of 6 μm or less.

In this embodiment, after the selective crystal growth by the heat treatment with the catalytic element, a substantially linear non-linear portion remaining (or surrounded) by the region where the selective crystal growth has taken place. The line width (or the width in the short side direction) of the crystalline (non-crystallized) region is 6 μm or less.

When the line width is 6 μm or less, crystal growth is performed by taking over the crystallinity of the crystal growth region of the adjacent catalyst element in the intense light irradiation, and the entire region is irradiated with the intense light. It is filled with a high-quality crystalline silicon film crystallized using the crystallization region of the catalyst element as a seed. This line width value of 6 μm is a value obtained from the results of experiments actually performed by the present inventors.

FIG. 16 shows the result data of the above experiment. FIG. 16A shows an experimental result obtained by examining the crystallinity itself of a crystalline silicon film by Raman spectroscopy. FIG. 16B shows the field-effect mobility of a TFT manufactured using the crystalline silicon film. In this experiment, specifically, the length of the long side was fixed at 500 μm, and the amorphous silicon film was left in a rectangular pattern in which the length of the short side was varied from 2 μm to 16 μm. The center of the amorphous silicon film was measured using Raman spectroscopy with a spatial resolution of 1 μmφ.

In the case of a TFT, the channel direction was aligned with the short side direction, the channel length was fixed at 2 μm, and the TFT was disposed at the center of the rectangular pattern of the remaining amorphous region. FIG.
The vertical axis of (A) is the wave number of Raman shift. This FIG.
In (A), the Raman shift wave number decreases to 516 cm ^{-1 when} the length in the short side direction is at or above the boundary of 6 μm. This shows a state in which the amorphous state is directly melt-solidified and crystallized by intense light irradiation.

On the other hand, the silicon film crystallized in the lateral direction reflecting the crystallinity of the crystallized region by the catalytic element of the present embodiment has a Raman shift wave number of about 518 cm ^{-1 and} a relatively high wave number. When the width in the short side direction is 6 μm or less, it can be understood that the crystal growth using the crystallization region by the catalytic element as the seed region is performed up to the center.
That is, if the length is within 3 μm from one side, the crystallinity of the adjacent crystallized region and the crystal growth reflecting the length are performed.

FIG. 16B shows the characteristics showing the field effect mobility of the TFT made of the crystalline silicon film. When the length of the amorphous region in the short side direction exceeds 6 μm, the field effect mobility is also increased. It can be seen that the degree of reduction is seen and the variation is also large. The reason is, as shown in FIG. 16A, of course, because a crystal by conventional intense light irradiation appears. Therefore, in the manufacturing method of this embodiment,
The line width of each linear mask pattern for introducing a catalytic element is set to 6 μm or less.

In one embodiment, in the method of manufacturing a semiconductor device, in the step of introducing a catalytic element, the amorphous silicon film is formed by using a linear mask provided on the amorphous silicon film. And selectively growing the amorphous silicon film in a region where the catalyst element has been selectively introduced by heat treatment in the first crystal growth step. From that region, a peripheral region under the mask is crystal-grown in the lateral direction (a direction parallel to the substrate), and in the region under the mask, with a part of the amorphous region remaining,
The crystal growth is stopped, and in the second crystal growth step, strong light is irradiated to crystallize the remaining amorphous region. Line width of existing linear amorphous region (width in the short side direction)
Is set to be equal to or less than the maximum width in which the amorphous region takes over the crystallinity of the crystal growth region formed by the adjacent catalyst element and crystal growth is performed.

In this embodiment, for the same reason as described in the above-described embodiment, the line width of the linear amorphous region interposed between the regions where the crystal has grown in the lateral direction by the heat treatment is used.
The (width in the short side direction) is set to be equal to or less than the maximum width in which the amorphous region takes over the crystallinity of the crystal growth region formed by the adjacent catalyst element and crystal growth is performed. Accordingly, the amorphous region is filled with the high-quality crystalline silicon film crystallized by intense light irradiation using the crystallized region of the catalyst element as a seed.

In another embodiment, in the method of manufacturing a semiconductor device, the line width (in the short side direction) of the linear amorphous region interposed between the regions crystallized in the lateral direction by the heat treatment is provided. Is 6 μm or less.

In this embodiment, for the same reason as described in the above-described embodiment, the line width of the linear amorphous region sandwiched between the regions crystallized in the lateral direction by the above-mentioned heat treatment is used.
(Width in the short side direction) was 6 μm or less. Accordingly, the amorphous region is filled with the high-quality crystalline silicon film crystallized by intense light irradiation using the crystallized region of the catalyst element as a seed.

In one embodiment, in the method of manufacturing a semiconductor device, the catalyst element is selectively introduced into the amorphous silicon film by using a line-and-space linear mask. In a linear mask having a shape, the line direction (the direction parallel to the line) is the direction in which carriers as a semiconductor device flow in an active (channel) region.
(In the channel direction).

Crystal growth in the horizontal direction due to strong light irradiation occurs in a direction perpendicular to the line direction (the direction parallel to the line) in the line-and-space-shaped linear mask pattern. Therefore, the regions (second crystallized regions) that have grown from the crystallized regions serving as seeds on both sides by the strong light irradiation collide with each other at the center thereof, thereby forming a crystal growth boundary. That is, when the catalyst element is selectively introduced using the pattern of the linear mask having the line and space shape as described above, the crystal is grown parallel to the line direction at the center of the linear region grown by the strong light irradiation. That is, a growth boundary is formed. This growth boundary is such that the crystal regions advance and collide from completely opposite directions, the bond of Si atoms is completely interrupted, and a very large trap or scattering center is generated for carriers in the semiconductor device. ing. Therefore, in the manufacturing method of the present embodiment, the line direction of the pattern of the line-and-space-shaped linear mask for introducing the catalytic element is used.
The direction in which carriers flow in the subsequent active (channel) region (the channel direction) was made substantially parallel to (the direction parallel to the line). This allows the carrier
The channel can be moved without straddling the growth boundary, adverse effects due to the growth boundary can be prevented, and a high-performance semiconductor device having a higher current driving force can be realized.

In one embodiment, in the method of manufacturing a semiconductor device, the catalyst element is introduced and crystal growth is performed in a lateral direction using the region as a seed by crystal growth by heat treatment and irradiation with strong light. Using the area
In an active region forming step of forming an active (channel) region of a semiconductor device, the respective crystallized regions are adjacent to each other in a line-and-space shape, and at least two linear regions crystal-grown by intense light irradiation are formed. As described above, the channel width of the semiconductor device and the line width (width in the short side direction) of each crystallization region are set so as to be included in the active (channel) region of the semiconductor device.

In this embodiment, the channel width of the semiconductor device and the respective linear regions grown by intense light irradiation are included in at least two active (channel) regions of the semiconductor device. Line width of crystallized area
(Width in the short side direction) was set.

In the semiconductor device of this embodiment, the performance of the semiconductor device is improved by a high-quality crystallized region formed by intense light irradiation using the crystallized region formed by the catalytic element as a seed. However, as described above, since these regions cannot be formed over a large area, in the present embodiment, a crystallized region formed by a catalytic element and a high-quality crystallized region formed by intense light irradiation using the same as a seed. Thus, an active (channel) region is formed. Therefore, the higher the quality of the crystallized region due to the irradiation of strong light, the better the channel region is included. However, a variation in the area ratio causes variation in characteristics. In the arrangement as in the present embodiment, this variation can be controlled in the form of the number of linear regions crystallized by intense light irradiation.

Therefore, by taking into account the current driving capability required of the semiconductor element, the number of linear crystal growth regions included in the active (channel) region should be at least two or more, so that the characteristic variation can be reduced to a practical level. Level, and the minimum characteristic stability and high performance of the semiconductor device can be secured.

In one embodiment, in the method of manufacturing a semiconductor device, the temperature of the heat treatment in the first crystal growth step is controlled by a catalyst element without spontaneous generation of crystal nuclei due to the amorphous silicon film itself. The temperature is set such that only crystal nuclei are generated and only crystal growth by the catalytic element proceeds.

In this embodiment, after the catalyst element is selectively introduced into the amorphous silicon film, the temperature of the heat treatment for crystallization is adjusted so that the crystal nuclei are not spontaneously generated by the amorphous silicon film itself. The temperature was such that only crystal nuclei due to the catalytic element were generated and proceeded.

In this embodiment, the amorphous silicon film region is left even after crystallization by the heat treatment with the catalytic element, and the region is irradiated with intense light to grow the crystal. However, if the temperature of the heat treatment is too high, natural nucleation of the amorphous silicon film itself occurs, and crystal growth starts. The spontaneous nucleus does not depend on the catalytic element, and its crystal state has a twin structure with many defects obtained by conventional solid phase growth without using the catalytic element.

Therefore, at the time of crystallization by the catalytic element,
If there is a crystal nucleus naturally generated by the heat treatment in the amorphous region, in the intense light irradiation step, the crystal of the naturally-occurring nucleus is grown before taking over the crystallinity of the crystallized region due to the adjacent catalyst element. Inherited crystal growth occurs. Therefore, the effects of the present invention cannot be obtained.

Furthermore, considering that the present embodiment utilizes a microscopically good crystalline state in a region crystallized using a catalytic element, the heat treatment temperature at this time should be at least as low as possible. Crystal nuclei are generated by the catalytic element,
The temperature must be higher than the temperature at which crystal growth by the catalytic element proceeds.

In another embodiment, in the method of manufacturing a semiconductor device, the heat treatment is performed at 520 ° C. to 58 ° C.
Perform at a temperature in the range of 0 ° C.

Specifically, the temperature at which crystal growth by the catalytic element starts to occur is about 520 ° C., and the temperature at which spontaneous nucleus generation in the amorphous silicon film independent of the catalytic element is about 580 ° C. The latter greatly depends on the film quality of the amorphous silicon film, but the plasma CV effective for this embodiment is effective.
When the amorphous silicon film by the method D is considered, the above value is almost the same. Therefore, the heat treatment temperature at which the crystal nucleus is not spontaneously generated by the amorphous silicon film itself, only the crystal nucleus by the catalytic element is generated, and only the crystal growth by the catalytic element proceeds, is from 520 ° C. to 580 ° C. The range is most suitable.

In one embodiment, in the method for manufacturing a semiconductor device, the intensity of the intense light in the second crystal growth step is set such that the amorphous (uncrystallized) region is completely melted,
The region crystallized by the catalytic element does not completely melt,
The strength is set at least in such a range that the original crystal state is not lost.

In the step of irradiating the strong light, if the intensity of the strong light is low, the silicon film is hardly melted, and the remaining amorphous region does not grow sufficiently in crystallizing reflecting the crystallinity of the crystallized region. If the intensity of the strong light at this time is large, the crystallinity obtained by the catalyst element in the crystallization region is completely lost, that is, the crystallinity is reset. In this case, the entire surface becomes equivalent to the crystalline silicon film obtained by conventional laser crystallization, not only the performance is reduced, but also the problem of non-uniformity inherently possessed by laser crystallization. appear. That is, in any case, the effect of the present invention cannot be obtained at all depending on the intensity of the strong light in the step of irradiating the strong light. Therefore, the intensity of intense light irradiation in the present invention is very important.

Therefore, in the manufacturing method of the present embodiment, the intensity of intense light in the step of growing the adjacent region by crystal growth is reduced by the fact that the amorphous (non-crystallized) region is completely melted but crystallized by the catalytic element. The region was not completely melted and had a strength in a range such that at least the original crystal state was not lost. If it is not within such a range, the effect of the present embodiment is greatly impaired.

In another embodiment, in the method of manufacturing a semiconductor device, an excimer laser beam having a wavelength of 400 nm or less is used as intense light in the second crystal growth step.
The energy density with respect to the silicon film surface is 200 to 450
Irradiate strong light within the range of mJ / cm ² .

In the present embodiment, the most suitable intense light is excimer laser light having a wavelength of 400 nm or less. If the wavelength is 400 nm or less, the absorption coefficient for the silicon film is extremely high, and only the silicon film can be instantaneously heated without thermally damaging the glass substrate. Excimer laser light has a large oscillation output and is suitable for processing a large-area substrate.

Among them, Xe having a wavelength of 308 nm is particularly preferred.
Since the Cl excimer laser beam has a large output, the beam size at the time of irradiating the substrate can be increased, it is easy to cope with a large area substrate, and the output is relatively stable.

Then, it is desirable to perform the irradiation step on the surface of the silicon film by using the laser light so that the surface energy density of the laser light is 200 to 450 mJ / cm ² . Here, if the surface energy density of the laser beam is smaller than 200 mJ / cm ² , the silicon film is hardly melted, and the remaining amorphous region is not sufficiently crystal-grown reflecting the crystallinity of the crystallized region.

When the surface energy density is 450
If it is larger than mJ / cm ² , the crystallinity obtained by the catalyst element in the crystallization region is completely lost, that is, the crystallinity is reset. In this case, the entire surface becomes equivalent to the crystalline silicon film obtained by conventional laser crystallization, not only the performance is reduced but also the problem of non-uniformity inherent in laser crystallization occurs I do. That is, the energy density range in this embodiment is such that the above-mentioned amorphous region is crystallized reflecting the crystallinity of the crystallized region and the original crystallinity of the crystallized region is not lost. Is equivalent to

In one embodiment, in the method of manufacturing a semiconductor device, Ni, Co, Fe, Pd, Pt, Cu, and A are used as catalyst elements for promoting crystallization of the amorphous silicon film.
At least one element selected from u is used.

One or more kinds of elements selected in this embodiment are effective in promoting crystallization in a small amount.
Among them, the most remarkable effect can be obtained particularly when Ni is used. The reason is as described above.

In another embodiment, the method for manufacturing a semiconductor device according to the present invention is characterized in that, after the second crystal growth step, at least a region of the silicon film other than an active (channel) region of the semiconductor device is formed. Performing a group V element introduction step of introducing an element selected from group B and a second heat treatment to move the catalyst element to a region where the element selected from group V B is introduced; A catalyst element reducing step of reducing the amount of the catalyst element in the active (channel) region of the device.

In the crystal growth of the amorphous silicon film by the catalyst element, first, a silicide reaction between the catalyst element and the amorphous silicon occurs, and the silicide causes the crystal growth.
In other words, the catalyst element silicide is always present at the tip of the crystal growth, and it crystallizes the amorphous silicon in front thereof one after another. The growth boundary where the crystal growth finally collided is a region where the silicide of the catalytic element always present at the tip in the growth process becomes a drift and exists at a very high concentration. Catalytic elements are mainly metals, and the presence of a large amount of such elements in semiconductors impairs the reliability and electrical stability of devices using these semiconductors, and is not desirable. Not. In particular, these silicides have a T
In the FT, a large problem of an increase in a leak current at the time of an off operation is caused.

Therefore, in the present embodiment, a silicon element crystallized by heat treatment is used as a seed region using a catalytic element, and crystal growth is performed laterally from the silicon film by intense light irradiation. For this reason, in the intense light irradiation step, the catalyst element is diffused, and particularly localized at a high concentration at the crystal growth boundary. Therefore, how to reduce the catalytic element localized at a high concentration at the growth boundary or the like in the channel region is a major issue.

On the other hand, in this embodiment, after the catalyst element is used for the crystallization treatment of the amorphous silicon film, most of the catalyst element remaining in the silicon film is removed from the area other than the semiconductor element formation region. Moving to the area solves this problem.

More specifically, by intense light irradiation, the crystal is grown laterally from the region selectively grown by the catalytic element, and then the silicon film other than the active (channel) region of the semiconductor device is formed. , A step of introducing an element selected from Group V B and performing a second heat treatment was added. This method is very effective, and is used for crystal growth. Mainly, the catalyst element remaining at the growth boundary moves to the region where the element selected from the group V B is introduced, and as a result, The amount of the catalytic element in the active (channel) region of the semiconductor device can be greatly reduced. This method is particularly effective for a catalytic element in a silicide state that has a large adverse effect on semiconductor characteristics. Then, if the region where the group V element B is introduced and the catalyst element is collected is removed to form a final semiconductor element region, no high concentration region of the catalyst element remains on the substrate.

In one embodiment, the method for manufacturing a semiconductor device includes the steps of:
At least one element selected from P, N, As, Sb, and Bi is used.

In this embodiment, at least one element selected from the group consisting of P, N, As, Sb, and Bi is used as the element selected from Group V B. With one or more elements selected from these, the catalyst element can be efficiently moved, and a sufficient effect can be obtained. Although no detailed information has been obtained on this mechanism, the most effective of these elements is P
I know that

[0132]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on the illustrated embodiment.

[First Embodiment] A first embodiment of a method of manufacturing a semiconductor device according to the present invention will be described. In the first embodiment, the present invention is applied to a semiconductor device manufacturing process when an N-type TFT is manufactured on a glass substrate.

The TFT manufactured in the first embodiment is
It can be used not only as a driver circuit and a pixel portion of an active matrix type liquid crystal display device but also as an element constituting a thin film integrated circuit.

The outline of the steps of manufacturing the N-channel TFT manufactured in the first embodiment is shown in a plan view in the order of FIGS. 1 (A) → (B) → (C). 2A to 2D show the above manufacturing steps in a sectional view taken along line AA ′ in FIG. Further, in FIG. 3 in the order of (D) → (G), following FIG. 2, a sequentially proceeding manufacturing process is shown by a cross-sectional view taken along the line BB ′ in FIG. 1. The N-type TFT 127 is completed by the manufacturing steps shown in FIGS.

First, as shown in FIG. 2A, a glass substrate 101 having a thickness of 3
Underlayer 10 made of silicon oxide of about 100 to 500 nm
Form 2 The silicon oxide film 102 is provided for preventing diffusion of impurities from the glass substrate 101. Next, by a plasma CVD method or a low pressure CVD method,
An intrinsic (I-type) amorphous silicon film (a-Si film) 103 having a thickness of 20 to 80 nm (for example, 45 nm) is formed.

In the first embodiment, a parallel plate type plasma CVD apparatus was used, the heating temperature was set to 300 ° C., and the Si
H ₄ gas and H ₂ gas were used as material gases. Then, the power density of the RF power is set to 10 to 200 mW / cm ² (for example,
80 mW / cm ² ).

Next, an amorphous silicon film (a-Si film) 103
An insulating thin film such as a silicon oxide film or a silicon nitride film is deposited thereon and patterned by a photolithography process to form a mask 104. In the first embodiment, the mask 104 is a silicon oxide film. That is, T
EOS (Tetra Ethoxy Ortho Silicate) as raw material
Decomposed and deposited by RF plasma CVD together with oxygen.
It is desirable that the thickness of the mask 104 be 100 nm to 400 nm. In the first embodiment, the thickness of the mask 104 made of the silicon oxide film is set to 150 nm.

The planar pattern of the mask 104 is a plurality of lines as shown in FIG.
It has a line & space shape. Here, the mask 10
4 is desirably 6 μm or less. In the first embodiment, the line width β of the mask 104 is 4 μm. In the region 100 not covered by the mask 104, the amorphous silicon film (a-Si film) 103 is exposed, and the space width α is set to 2 μm.

Next, as shown in FIG. 2A, a slight amount of nickel 105 is added to the surfaces of the amorphous silicon film (a-Si film) 103 and the mask 104. This nickel 10
In the addition of a small amount of 5, a solution in which nickel is dissolved is held on the amorphous silicon film (a-Si) 103 and on the mask 104, and the solution is uniformly spread on the substrate 101 by a spinner and dried. I let it. In the first embodiment,
Nickel acetate was used as the solute, and ethanol was used as the solvent, so that the nickel concentration in the solution was 2 ppm.

The amorphous silicon film thus added
The nickel concentration on the surface of the (a-Si) 103 and the mask 104 was measured by total reflection X-ray fluorescence spectroscopy (TRXRF), and was about 1 × 10 ¹³ atoms / cm ² .

Here, in FIG. 1A, when viewed in a plan view, the nickel 105 has an amorphous silicon film (in the region extending linearly between the masks 104). a-Si film) 103.

Then, in this state, this is heated under an inert atmosphere (for example, under a nitrogen atmosphere) at a heating temperature of 520 to 580.
Anneal for 1 hour at ℃ (eg, 550 ° C.) to crystallize. At this time, nickel 105 is directly added to the amorphous silicon film (a-Si film) 103 in the region 100 not covered by the mask 104, and the amorphous silicon film (a-S
The silicidation of the nickel 105 added to the surface of the (i-film) 103 occurs. Then, the amorphous silicon film (a-Si film) 1 is formed using the silicidized nickel 105 as a nucleus.
The crystallization of 03 proceeds.

As a result, as shown in FIG. 2B, the crystalline silicon film 103a is formed only in the region 100 exposed from the mask 104, while the region under the mask 104 is in an amorphous state. Will be left as is. Here, in a combination of a certain nickel addition concentration and annealing temperature / time, nickel 105 is introduced and crystallized in a lateral direction from the crystalline silicon film 103a which is a crystallized region to a region under the mask 104. Although growth may be caused, in the first embodiment, the mask 10 is set by setting the nickel concentration and the annealing temperature / time as described above.
4 to prevent lateral crystal growth from occurring in the region below. This state corresponds to the state shown in FIG. At this time, the nickel 105 present on the mask 104 is blocked by the mask film 104, and the underlying amorphous silicon film (a-S
The amorphous silicon film (a-Si film) 103 is crystallized only by the nickel 105 introduced in the crystalline silicon film 103a in the above-mentioned region without reaching the (i-film) 103.

Next, a mask 104 made of a silicon oxide film is used.
Is removed by etching. As an etchant, it is sufficiently selective with respect to the underlying amorphous silicon film 103:
Wet etching was performed using 10 buffered hydrofluoric acid (BHF). Then, in this state, as shown in FIG.
From FIG. 3a, adjacent arrows 10 reflect the crystallinity.
The amorphous silicon film 10 in the region remaining in the direction indicated by 8
3 is crystallized.

As a result, the remaining amorphous region becomes a very high quality crystalline silicon film 103c. That is, by this laser irradiation, the amorphous region is preferentially melted and crystallized by reflecting only a good crystal component of the crystalline silicon film 103a which is a crystallized region. Then, from the crystalline silicon film 103a, which is both crystallization regions, a lateral direction 1
Boundary (growth boundary) 103d where crystal growth occurred in 08
Is formed at the center of the high-quality crystalline silicon film 103c. Further, by the irradiation step of the laser beam 107, the crystalline silicon film 1 which is a crystallized region by nickel is formed.
03a also has improved crystallinity, and the crystalline silicon film 103
a '. The planar state at this time corresponds to FIG.

That is, a crystalline silicon film having a width α = 2 μm
103a 'and a high-quality crystalline silicon film having a width? = 4 m.
103c are formed in a stripe shape. At this time
XeCl excimer laser as laser beam 107
(Wavelength 308 nm, pulse width 40 ns). Leh
The irradiation conditions of the laser light are as follows.
Heat to 50 ° C. (eg, 400 ° C.) and apply energy density 2
00-450mJ / cm ^Two(For example, 350 mJ / cm^Two)so
Irradiated. The beam size is 150 m on the substrate 101 surface.
m × 1mm long shape.
With a step width of 0.05 mm in the direction perpendicular to the scale direction
A sequential scan was performed. That is, the amorphous silicon film 103
At any one point, a total of 20 laser irradiations are performed
Will be.

Next, as shown in FIGS. 1C and 2D,
Using the crystalline silicon films 103c and 103a ', the silicon film in other unnecessary portions is removed to perform element isolation, and T
An island-shaped crystalline silicon serving as an active region of the FT is formed.
Here, the channel width W of the TFT is determined. As shown in FIG. 1C, finally, the direction 130 (channel direction) in which carriers flow in the TFT is the line of the crystal growth boundary 103d formed at the center of the high-quality crystalline silicon region 103c. It was arranged to be substantially parallel to the direction.
That is, the channel was prevented from crossing the crystal growth boundary 103d.

In the first embodiment, since the channel width W of the TFT is set to 34 μm, as shown in FIG. 1C and FIG.
Along 30, six high-quality crystalline silicon films 103 c having a width β = 4 μm are included, and five crystalline silicon films 103 a ′ serving as seeds having a width α = 2 μm are included. These constitute a channel region.

This state is shown in FIG. 1C, where BB ′
A cross section taken along a plane is shown in FIG. This figure 3
2 (D) is the same process as FIG. 2 (D), and the cross section of the configuration shown in FIG. 2 (D) viewed from a direction rotated by 90 ° is FIG.
(D).

The island-shaped silicon film 11 as shown in FIG.
2 and further manufacturing a TFT, for convenience of explanation, the cross section for explaining the process is switched to the cross section cut along the plane BB ′ in FIG. Continue to explain.

Next, as shown in FIG. 3E, a thickness of 20 nm is formed so as to cover the crystalline silicon film 112 serving as the active region.
A silicon oxide film having a thickness of 150 nm (here, 100 nm) is formed as the gate insulating film 113. Here, in forming this silicon oxide film, TEOS (Tetra Ethoxy Or
tho Silicate) as a raw material and a substrate temperature of 15 with oxygen.
0-600 ° C (preferably 300-450 ° C), RF
Decomposed and deposited by plasma CVD. The substrate temperature was set to 350 to 600 ° C. using TEOS as a raw material and a reduced pressure CVD method or a normal pressure CVD method together with ozone gas.
(Preferably 400 to 550 ° C.).

After the above film formation, 400 g under an inert gas atmosphere in order to improve the bulk characteristics of the gate insulating film 113 itself and the interface characteristics of the crystalline silicon film / gate insulating film.
Annealing was performed at ６００600 ° C. for 1 to 4 hours.

Subsequently, by a sputtering method,
An aluminum film having a thickness of 400 to 800 nm (for example, 600 nm) is formed. Then, the aluminum film is patterned to form a gate electrode 114. further,
The surface of the electrode 114 made of aluminum is anodized to form an oxide layer 115 on the surface. This state corresponds to FIG. In this anodization, tartaric acid is 1 to
Perform in a 5% ethylene glycol solution.
The voltage is increased to 220 V at a constant current, and the state is maintained for one hour to finish. The thickness of the obtained oxide layer 115 is 200 nm. Note that since the oxide layer 115 has a thickness for forming an offset gate region in a later ion doping process, the length of the offset gate region can be determined in the anodic oxidation process. This state corresponds to the state shown in FIG.

Next, as shown in FIG. 3F, an impurity (phosphorus) 1 is added to the active region by ion doping using the gate electrode 114 and the oxide layer 115 around the gate electrode 114 as a mask.
17 is injected. Phosphine as doping gas
(PH3) and an acceleration voltage of 60 to 90 kV (for example, 8
0 kV) and the dose is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² (for example, 2 × 10 ¹⁵ cm ⁻² ). By this step, the regions 121 and 122 into which the impurities are implanted are later formed by the TFT.
Source / drain regions. On the other hand, the gate electrode 11
The region 120 which is masked by the oxide layer 4 and the surrounding oxide layer 115 and into which impurities are not implanted later becomes a channel region of the TFT. That is, the channel region 120, the source region 121, and the drain region 122 have a plan view of FIG.
The arrangement is as shown in FIG.

After that, annealing is performed by laser light irradiation to activate the ion-implanted impurities, and at the same time, to improve the crystallinity of the portion where the crystallinity has deteriorated in the above-described impurity introducing step. At this time, a XeCl excimer laser (wavelength: 308 nm, pulse width: 40 nanoseconds) was used as a laser having an energy density of 150 to 400 nm.
mJ / cm ² (preferably, 200~250mJ / cm ²⁾ was irradiated with. The N-type impurity (phosphorus) regions 121 and 122 thus formed have a sheet resistance of 200 to 800 Ω / □.
Met.

Subsequently, as shown in FIG.
A silicon oxide film or a silicon nitride film of about 0 nm is formed as the interlayer insulating film 123. When a silicon oxide film is used, if TEOS is used as a raw material and formed by plasma CVD with oxygen (or reduced pressure CVD with ozone or normal pressure CVD), excellent step coverage can be obtained. An interlayer insulating film is obtained. Also, SiH ₄ and NH ₃
Using a silicon nitride film formed by plasma CVD using as a source gas, hydrogen atoms are supplied to the interface between the active region and the gate insulating film, which has the effect of reducing dangling bonds that degrade TFT characteristics. .

Next, a contact hole is formed in the interlayer insulating film 123, and an electrode wiring 124 of the TFT is formed with a metal material (for example, a two-layer film of titanium nitride and aluminum). The titanium nitride film is provided as a barrier film for preventing aluminum from diffusing into the semiconductor layer.
Finally, annealing is performed at 350 ° C. for 1 hour in a hydrogen atmosphere at 1 atm to form an N-channel TFT shown in FIG.
127 is completed. Further, if necessary, the TFT 12
For the purpose of protecting the TFT 7, a protective film made of a silicon nitride film or the like may be provided on the TFT 127. Depending on the circuit in which the TFT is used, a contact hole is also provided on the gate electrode 114 and connected to the electrode 124,
What is necessary is just to form wiring.

The TFT manufactured according to the above-described first embodiment has a very high performance with a field effect mobility of about 200 cm ² / Vs and a threshold voltage of about 2 V. Nevertheless, the characteristic variation in the substrate is ± 1 in the field-effect mobility.
It was about 0% and the threshold voltage was about ± 0.2 V, which was very good. Note that this is a result of measuring 200 points in the substrate using a size of 400 × 320 mm as the substrate.

On the other hand, in the case where the device is formed by the conventional method, the crystallinity greatly varies among the devices.
The variation in the field effect mobility is as large as about ± 50%, and the threshold voltage also varies greatly in the range of 2 ± 0.5 to 1.0V.

Therefore, according to the first embodiment,
It can be seen that there is a great effect not only on the high performance of the TFT but also on the improvement of the characteristic variation.

[Second Embodiment] Next, a manufacturing method according to a second embodiment of the present invention will be described. In the second embodiment, a driver monolithic active matrix substrate is formed on a glass substrate. The driver monolithic active matrix substrate manufactured in the second embodiment is applied to a liquid crystal display device, an image sensor, and the like. In the driver monolithic active matrix substrate manufactured in the second embodiment, a pixel TFT for switching a pixel electrode and a driver TFT constituting a driver circuit are formed at the same time. This second
In the embodiment, as a representative example, a circuit having a CMOS structure in which an N-channel TFT and a P-channel TFT are configured to be complementary is used as the driver TFT.

FIGS. 4 and 5 are plan views showing the outline of the manufacturing process in the second embodiment in the order of (A) → (D). FIGS. 4 and 5 show a process of manufacturing a CMOS structure (N-type TFT and P-type TFT) device in a driver circuit portion in a driver monolithic active matrix substrate manufactured in the second embodiment.

FIG. 6 is a plan view showing the outline of the steps of manufacturing the pixel TFT in the second embodiment in the order of (A) → (E). The actual active matrix substrate is composed of hundreds of thousands or more TFTs. In the second embodiment, the description will be simplified to nine TFTs in three rows × three columns.

FIG. 7 shows a cross section taken along the line AA ′ in FIGS. 5D and 6E.
FIG. 7 shows an arbitrary TFT. Also, FIG.
FIG. 4D and FIG. 5E show cross sections taken along the line BB ′. In FIG. 7, the manufacturing process proceeds in the order of (A) → (F), and subsequently, in FIG.
According to the order of (D) → (J), the N-type TFT 227, the P-type TFT 228, and the pixel TFT 229 are completed. In addition,
The steps shown in (D) → (F) of FIG. 7 and the steps shown in (D) → (F) of FIG. 8 are the same steps.

In the second embodiment, first, as shown in FIG. 7A, a base film 202 made of silicon oxide having a thickness of about 300 to 500 nm is formed on a glass substrate 201 by, for example, a sputtering method. . This silicon oxide film 202 is provided to prevent diffusion of impurities from the glass substrate 201. Next, a thickness of 20 to 80 nm (for example, 3
5 nm) intrinsic (I-type) amorphous silicon film (a-Si film) 2
03 is formed.

Next, an amorphous silicon film (a-Si film) 203
An insulating thin film such as a silicon oxide film or a silicon nitride film is deposited thereon and patterned by a photolithography process to form a mask 204. In the second embodiment, the mask 204 is formed using a silicon oxide film and TEOS
(Tetra Ethoxy Ortho Silicate) was used as a raw material, and was decomposed and deposited together with oxygen by an RF plasma CVD method. Mask 2
It is desirable that the thickness of the mask 04 is 100 nm to 400 nm. In the second embodiment, the thickness of the mask 204 made of the silicon oxide film is 150 nm. Mask 2
In the driver circuit section, the planar pattern 04 has a plurality of lines as shown in FIG. 4A, and has a line-and-space shape.

Here, the line width β of the mask 204 is 6 μm
In the second embodiment, it is preferable that
μm. In the region 200 not covered by the mask 204, the amorphous silicon film (a-Si film) 203
Is exposed, and the space width α is set to 2 μm. At this time, the entire surface of the pixel portion is exposed from the mask 204 as shown in FIG. That is,
No mask 204 is provided over the pixel portion.

Next, as shown in FIG. 7A, a slight amount of nickel 205 is added to the surfaces of the amorphous silicon film (a-Si film) 203 and the mask film 204. This nickel 205
Is added by holding a solution in which nickel is dissolved on an amorphous silicon film (a-Si film) 203 and a mask 204, and uniformly spreading the solution on a substrate 201 by a spinner and drying the solution. went. In the second embodiment, nickel acetate was used as a solute, and ethanol was used as a solvent, so that the nickel concentration in the solution was 2 ppm. When the nickel concentration on the surface of the amorphous silicon film (a-Si film) 203 and the mask 204 added in this manner was measured by total reflection X-ray fluorescence analysis (TRXRF), 1 × 10 ¹³ atoms / cm ² It was about.

Here, in the driver portion, when viewed in a plan view, the nickel 205 has an amorphous silicon film (a-Si film) in the region 200 sandwiched by the linear mask 204 in FIG. ) 203 is selectively added. On the other hand, in the pixel portion, as shown in FIG.
It is in a state of being completely added to the amorphous silicon film (a-Si film) 203.

Then, in this state, this is heated under an inert atmosphere (for example, under a nitrogen atmosphere) at a heating temperature of 520 to 580.
C. (for example, 550.degree. C.) for 1 hour for crystallization. At this time, since it is not covered with the mask 204,
In the amorphous silicon film (a-Si film) 203 in the region 200 to which nickel 205 is directly added, the amorphous silicon film (a
-Si film) The nickel 205 added to the surface is silicided. The crystallization of the amorphous silicon film (a-Si film) 203 proceeds with the silicified nickel as a nucleus. As a result, as shown in FIG. 4B, in the driver portion, the crystalline silicon film 203a is formed only in the region 200 exposed from the mask 204, and the other regions under the mask 204 are in an amorphous state. Will be left as is.

Here, in a combination of a certain nickel addition concentration, an annealing temperature, and a time, the crystalline silicon film 203a, which is a region into which nickel has been introduced and crystallized, extends from the crystalline silicon film 203a to the region under the mask 204 in the lateral direction. Although crystal growth may be caused, in the second embodiment, by setting the nickel concentration, the annealing temperature, and the time as described above, lateral crystal growth in the region below the mask 204 is prevented. I have to. This state corresponds to the state shown in FIG. On the other hand, in the pixel portion, a crystalline silicon film 203a is entirely formed.

Next, a mask 204 made of a silicon oxide film is used.
Is removed by etching. As an etchant, it has sufficient selectivity to the underlying amorphous silicon film 203:
Wet etching was performed using 10 buffered hydrofluoric acid (BHF). Then, in this state, the driver section irradiates a laser beam 207 as shown in FIG. 7C, thereby moving the crystalline silicon film 203a, which is a crystallization region, in a direction shown by an arrow 208. Crystallization is performed while reflecting the crystallinity, and the amorphous silicon film 203 remaining adjacent is crystallized. As a result, the remaining amorphous region becomes a very high quality crystalline silicon film 203c. That is, by this laser irradiation, the amorphous region is preferentially melted, and the crystalline silicon film 203a as the crystallized region is melted.
Is crystallized by reflecting only the favorable crystal components. Then, the crystalline silicon film 2 which is both crystallization regions
Crystal growth from 03a in lateral direction 208
(Growth boundary) 203d is a high-quality crystalline silicon film 203
It is formed at the center of c.

By the irradiation step of the laser beam 207, the crystallinity of the crystalline silicon film 203a, which is a crystallized region by nickel, is also improved.
03a '. That is, in the pixel portion, the crystalline silicon film 203a 'is formed entirely. FIG. 4B shows a planar state of the driver portion at this time.
Shown in That is, the crystalline silicon film 20 having a width α = 2 μm
3a 'and a high-quality crystalline silicon film 20 having a width β = 5 μm
3c are formed in a stripe shape. At this time, the laser beam is a XeCl excimer laser (wavelength 30).
8 nm, pulse width 40 nanoseconds). The irradiation condition of the laser light is such that the substrate is irradiated at 200 to 450 ° C. (for example, 4 ° C.).
00 ° C), and the energy density is 200-450 mJ /
cm ² (for example, 350 mJ / cm ² ). The beam size of the laser light is 150 mm on the surface of the substrate 101.
It was formed to have a long shape of × 1 mm, and scanning was sequentially performed in a direction perpendicular to the long direction at a step width of 0.05 mm. That is, laser irradiation is performed at a given point on the amorphous silicon film 203 a total of 20 times.

Next, as shown in FIG. 7D, an insulating thin film such as a silicon oxide film or a silicon nitride film is deposited on the crystalline silicon film 203a and patterned to form a mask 209.
To form In the second embodiment, the mask 20
Reference numeral 9 denotes a silicon oxide film, and TEOS (Tetra Ethoxy Ortho
Silicate) and RF plasma CV with oxygen
Decomposed and deposited by D method. The thickness of the mask 209 is
It is desirable that the thickness is 100 nm to 400 nm. In the second embodiment, the thickness of the silicon oxide film 209 is set to 15 nm.
It was set to 0 nm. Looking at this state from above the substrate,
As shown in FIGS. 5C and 6B, the crystalline silicon film 203a in the region to be the active region of the TFT is masked in the form of an island by the mask 209 in both the driver portion and the pixel portion. It is in a state. FIG. 8D shows a cross section of this state taken along the plane BB ′ in FIGS. That is, in the same state as shown in FIG.
FIG. 8D shows a cross section viewed from the direction rotated by 0 °.

Next, in this state, as shown in FIGS. 7D and 8D, the entire surface of the substrate 201 is ion-doped with phosphorus 210 from above. The doping condition of the phosphorus 210 at this time was set to an acceleration voltage of 5 to 10 kV and a dose of 5 × 10 ¹⁵ to 1 × 10 ¹⁶ cm ⁻² . By this ion doping step, phosphorus is implanted into the exposed crystalline silicon film 203a to form a phosphorus-doped crystalline silicon region 203f. Meanwhile, mask 2
09 of the crystalline silicon film 203 in a region covered by 09
c and 203a 'are not doped with phosphorus.
When the state at this time is viewed from above the substrate, the driver section is shown in FIG. 5C, and the pixel section is in a state shown in FIG. In (), phosphorus 210 is placed in an area outside the square mask 209 surrounded by a dashed line.
Is doped.

In this state, a heat treatment is performed under an inert atmosphere (for example, a nitrogen atmosphere) at a temperature of 550 to 650 ° C. for several hours to several tens of hours. In the second embodiment, as an example, the heat treatment is performed at 600 ° C. for 6 hours. In this heat treatment, the phosphorus 210 doped in the region 203f is changed to the nickel 20 existing in that region.
Trap 5 first. 5 (C) and FIG.
(B), as shown in FIGS. 7 (E) and 8 (E), nickel 205 existing in the crystalline silicon films 203c and 203a ′ under the mask 209, in particular, existing in the crystal growth boundary 203d. The nickel 205 is pulled out in the direction shown by the arrow 211. That is, the nickel 205 is drawn in all directions from the area covered by the mask 209 toward the outer area 203f.

As a result, the nickel concentration in the crystalline silicon films 203c and 203a 'under the mask 209 is greatly reduced. At this time, the actual crystalline silicon film 203
Secondary ion mass spectrometry (SIMS)
5 × 10 ¹⁶ atoms / cm ³
To a degree. By the way, before the heat treatment step, the nickel concentration in the crystalline silicon film 203c was about 5 × 10 ¹⁷ atoms / cm ³ .

Next, a mask 209 made of a silicon oxide film is used.
Is removed by etching. As an etchant, wet etching was performed using 1:10 buffered hydrofluoric acid (BHF) having sufficient selectivity for the lower crystalline silicon films 203a 'and 203c.

Thereafter, as shown in FIGS. 7F and 8F, the silicon film 20 in the region covered with the mask 209 is formed.
Using 3c and 203a ', other unnecessary portions of the silicon film are removed to perform element isolation.

That is, by the above process, the active region (source / drain) of the TFT is arranged in the driver portion in the arrangement as shown in FIG. 5D and in the pixel portion in the arrangement as shown in FIG. Then, island-shaped crystalline silicon films 212n, 212p and 212g to be regions and channel regions) are formed. FIG.
(D) and FIG. 6 (C) show the activation regions 212n,
12 shows the positional relationship between 12p and the phosphorus introduction mask 209. In this step, the channel width W of the TFT is determined.

In the driver portion, the direction in which carriers flow in the TFT (channel direction) finally crosses the line direction of the crystal growth boundary 203d formed in the center of the high-quality crystalline silicon region 203c. They were arranged almost parallel so as not to be present.

In the second embodiment, the driver TFT
Was 35 μm. As a result, FIG.
As shown in FIG. 7D and FIG.
n, 220p, along the channel direction, width β = 5μ
m of high-quality crystalline regions 203c, and a width α =
Four crystalline regions 203a 'serving as seeds of 2 μm are included. These constitute a channel region.

Next, as shown in FIG. 8G, the crystalline silicon films 212n, 212p and
A silicon oxide film having a thickness of 80 nm is formed as a gate insulating film 213 over the entire surface of the substrate so as to cover 2 g. In the step of forming the gate insulating film 213 in the second embodiment, T
Using EOS (Tetra Ethoxy Ortho Silicate) as a raw material, a substrate temperature of 150 to 600 ° C. (preferably 30
(0-450 ° C.) and decomposed and deposited by RF plasma CVD. In the above film formation step, TEOS is used as a raw material, and a low pressure CVD method or an ordinary pressure CV
Using the method D, the substrate temperature is set to 350 to 600 ° C. (preferably,
400-550 ° C).

After the above film formation, in order to improve the bulk characteristics of the gate insulating film itself and the interface characteristics between the crystalline silicon film and the gate insulating film, 400 to 600 ° C. in an inert gas atmosphere.
Annealing was performed at a temperature of 1 to 4 hours.

Subsequently, by the sputtering method,
An aluminum film having a thickness of 400 to 800 nm (for example, 600 nm) is formed. Then, the aluminum film is patterned to form gate electrodes 214n, 214p, and 214g. Further, the surface of this aluminum electrode is anodized to form an oxide layer 215n, 215p, 215g on the surface.
To form This state corresponds to FIG. At this time, in the pixel portion, the gate electrode 214g simultaneously constitutes a gate bus line in a plan view, and this state is shown in a plan view in FIG.

The above anodic oxidation is performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. First, the voltage is increased to 220 V at a constant current, and the state is maintained for 1 hour, thereby completing the process. The thickness of the obtained oxide layer 215 is 200 nm.
It is. Note that since the oxide layer 215 has a thickness for forming an offset gate region in a later ion doping process, the length of the offset gate region can be determined in the anodic oxidation process.

Next, as shown in FIG. 9H, a mask 216 is formed with a photoresist so as to cover the P-type TFT in the driver portion. Thereafter, the gate electrodes 214n and 214g and the surrounding oxide layers 215n and 215g are used as masks by ion doping.
An impurity (phosphorus) 217 is implanted into the active regions 212n and 212g of the N-type TFT.

As a doping gas, phosphine (P
H3) and an acceleration voltage of 60 to 90 kV (for example, 80
kV) and the dose is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm
⁻² (for example, 2 × 10 ¹⁵ cm ⁻² ). By this step, regions 221n and 222n into which phosphorus 217 has been implanted are formed.
Will be the source / drain regions of the N-type TFT in the driver section later. On the other hand, the region 220n which is masked by the gate electrode 214n and the surrounding oxide layer 215n and into which impurities are not implanted later becomes a channel region of the driver N-type TFT.

Also in the pixel TFT, the regions 221g and 222g into which the impurities are implanted become the source / drain regions of the subsequent pixel TFT. On the other hand, the gate electrode 214
The region 220g to which the impurity is not implanted by being masked by g and the surrounding oxide layer 215g becomes a channel region of the pixel TFT later. At this time, the active region 212p of the P-type TFT is not doped with phosphorus 217 by the mask 216 at all.

Next, after removing the photoresist mask 216, a mask 218 is newly formed with photoresist so as to cover the N-type TFT and the pixel TFT in the driver portion. Then, as shown in FIG. 9I, an impurity (boron) 219 is formed in the active region 220p of the P-type TFT by ion doping using the gate electrode 214p and the oxide layer 215p around it as a mask.
Inject. Here, diborane is used as the doping gas.
(B ₂ H ₆ ), the acceleration voltage is set to 40 kV to 80 kV (for example, 65 kV), and the dose is set to 1 × 10 ¹⁵ to 8 × 10 ^15.
cm ⁻² (for example, 5 × 10 ¹⁵ cm ⁻² ).

By this step, the regions 221p and 222p into which the boron 219 has been implanted later become source / drain regions of the P-type TFT in the driver portion. On the other hand, the region 220p, which is masked by the gate electrode 214p and the surrounding oxide layer 215p and is not doped with impurities, will later become a channel region of the driver P-type TFT. At this time, the active region 220n of the driver N-type TFT and the active region 220g of the pixel TFT are formed by the mask 218.
In this case, the boron 219 is not doped at all.

Thus, N-type impurity region 221 is formed.
n and 222n, 221g and 222g, and P-type impurity regions 221p and 222p are selectively formed, respectively. As shown in FIGS. 5D and 9I, the N-channel TFT 227 and the P-channel Type TFT 228 can be formed.

After that, the ion-implanted impurity is activated, and at the same time, the crystallinity of the portion where the crystallinity is deteriorated in the above-described impurity introducing step is improved. At this time, the laser used is a XeCl excimer laser (wavelength 308).
nm, a pulse width of 40 nanoseconds) and an energy density of 15
0 to 400 mJ / cm ² (preferably 200 to 250 mJ
/ cm ² ). The sheet resistance of the N-type impurity (phosphorus) regions 221n, 222n, 221g and 222g thus formed was 200 to 800Ω / □. Also,
The sheet resistance of the P-type impurity (boron) regions 221p and 222p was 500Ω / □ to 1kΩ / □.

Subsequently, as shown in FIG.
A silicon oxide film or a silicon nitride film having a thickness of about 0 nm is formed as the interlayer insulating film 223. When a silicon oxide film is used, if TEOS is used as a raw material and formed by plasma CVD with oxygen (or reduced pressure CVD with ozone or normal pressure CVD), excellent step coverage can be obtained. An interlayer insulating film 223 is obtained. In addition, SiH ₄
Using a silicon nitride film formed by plasma CVD using NH ₃ and NH ₃ as source gases, hydrogen atoms are supplied to the interface between the active region and the gate insulating film, thereby reducing the dangling bonds that degrade the TFT characteristics. There is.

Next, a contact hole is formed in the interlayer insulating film 223, and a two-layer film of a metal material (for example, titanium nitride and aluminum) is used to form an electrode wiring 224 of the driver TFT portion and a source electrode TFT of the pixel TFT. A source electrode wiring 225 is formed. The titanium nitride film is provided as a barrier film for preventing aluminum from diffusing into the semiconductor layer. Since the pixel TFT 229 is an element for switching the pixel electrode, the other drain electrode is a pixel electrode 22 made of a transparent conductive film such as ITO.
6 is provided. That is, in FIG. 6E, a video signal is supplied via the source bus line 225 and the pixel electrode 226 is supplied based on the gate signal of the gate bus line 214.
The necessary charge is written. And finally,
Annealing was performed at 350 ° C. for 1 hour in a hydrogen atmosphere of 1 atm. As shown in FIGS. 5D, 6E, and 9J, an N-channel TFT 227 and a P-channel TF
T228 completes the pixel TFT 229 in the pixel portion.
If necessary, a protective film made of a silicon nitride film or the like may be provided on the TFT for the purpose of protecting the TFT.

In the CMOS circuit of the driver section manufactured according to the above-described second embodiment, the field-effect mobility of each TFT is N-channel type TFT227.
250-300 cm ² / Vs, P-channel type TFT22
High as 120~150cm ² / Vs at 8, the threshold voltage is about 1V at N type TFT, and shows very good properties as about -1.5V in a P-type TFT.

The characteristic variation, which has been a problem in the past, was suppressed to about ± 10% in the field effect mobility and to about ± 0.2 V in the threshold voltage (400 × 320 mm of the substrate). Using the size, the result of measuring 200 points in the substrate). In addition, even after repeated measurements and durability tests with bias and temperature stress, almost no characteristic deterioration was observed, and the circuit exhibited extremely high reliability and stable circuit characteristics as compared with the conventional circuit. In the pixel TFT 229, the field effect mobility is 120c.
m ² / Vs, the threshold voltage was about 2 V, and the characteristics were sufficient for the pixel TFT. In addition, the increase and the variation of the leak current in the TFT off region where the catalytic element is particularly problematic can be reduced to about several pA, which is the same as when no catalytic element is used, without any abnormal point, thereby greatly improving the production yield. I was able to.

Then, when the active matrix substrate for liquid crystal display manufactured based on the second embodiment was actually evaluated for lighting, the display unevenness was smaller than that manufactured by the conventional method, and pixel defects due to TFT leak were also reduced. A very small liquid crystal panel with high contrast ratio and high display quality was obtained.

[Third Embodiment] Next, a method of manufacturing a semiconductor device according to a third embodiment of the present invention will be described.
In the third embodiment, as in the second embodiment, the present invention is applied to a case where a driver monolithic active matrix substrate is formed on a glass substrate. The driver monolithic active matrix substrate manufactured in the third embodiment is applied to a liquid crystal display device, an image sensor, and the like. In manufacturing a driver monolithic active matrix substrate in the third embodiment, a pixel TFT for switching a pixel electrode and a driver T for forming a driver circuit are used.
FT and FT are formed simultaneously. Also in the third embodiment, an N-channel TFT and a P-type TFT are used as driver TFTs.
A circuit having a CMOS structure in which channel type TFTs are configured in a complementary manner was used as a representative example.

FIGS. 10 and 11 show, in order of (A) → (D), C in the driver circuit portion of the driver monolithic active matrix substrate manufactured in the third embodiment.
An outline of a manufacturing process of a MOS structure (N-type TFT and P-type TFT) element is shown in a plan view. FIG. 12 is a plan view showing the outline of the progress of the manufacturing process of the pixel TFT in the order of (A) → (E).
An actual active matrix substrate is composed of hundreds of thousands or more TFTs. In the third embodiment, 3 rows ×
The description will be simplified to nine TFTs in three rows.

FIG. 13 shows a cross section taken along the line AA ′ in FIGS. 11 and 12, and FIG.
3 shows an arbitrary TFT. FIG. 14 shows a cross section taken along the line BB ′ in FIGS. 11 and 12.

The manufacturing process sequentially proceeds in the order of (A) → (E) of FIG. 13, and subsequently, (E) → FIG.
According to the order of (J), the N-type TFT 327 and the P-type TFT 3
28, the pixel TFT 329 is completed. The step of FIG. 13E and the step of FIG. 14E are the same step.

In the third embodiment, first, FIG.
As shown in FIG. 5, a base film 302 made of silicon oxide having a thickness of about 300 to 500 nm is formed on a glass substrate 301 by, for example, a sputtering method. The base layer 302 made of the silicon oxide film is provided to prevent diffusion of impurities from the glass substrate. Next, by plasma CVD or low pressure CVD, a thickness of 20 to 8
0 nm, eg, 45 nm intrinsic (I-type) amorphous silicon film
(a-Si film) 303 is formed. In the third embodiment, a parallel plate type plasma CVD apparatus was used, the heating temperature was set to 300 ° C., and SiH ₄ gas and H ₂ gas were used as material gases.

Next, an amorphous silicon film (a-Si film) 303
An insulating thin film such as a silicon oxide film or a silicon nitride film is deposited thereon and patterned to form a mask 304.
In the third embodiment, the mask 304 is made of a silicon oxide film, and TEOS (Tetra Ethoxy Ortho Silicate) is used as a raw material and is decomposed and deposited together with oxygen by an RF plasma CVD method. The thickness of the mask 304 is 100 nm to 400 n.
In the third embodiment, the thickness of the mask 304 made of the silicon oxide film is set to 150 nm.
And

The planar pattern shape of the mask 304 is as follows:
As shown in FIG. 10A, the driver circuit section has a plurality of linear shapes, and is formed in a line and space shape. In the third embodiment, the line width β of the mask 304 is 8 μm. In the region 300 not covered with the mask 304, the amorphous silicon film (a-
(Si film) 303 is exposed, and the space width α is set to 2 μm. At this time, in the pixel portion, FIG.
As shown in FIG. 2A, the entire surface is covered with the mask 304.

After the mask 304 is provided, a small amount of nickel 305 is added from above. This nickel 305
Was added by DC sputtering using a target of pure nickel (99.9% or more). Specifically, the sputtering process was performed at an extremely low DC power of 100 W or less and the substrate transfer speed was increased to 2000 mm / min. By using argon as a sputtering gas and raising the gas pressure during sputtering to a pure nickel target to 10 Pa or more, it is possible to perform ultra-low concentration sputtering of nickel.
Nickel 305 thus sputtered
Is displayed as a thin film in FIG.
Actually, it is a state of a monoatomic layer or less, which is not a state that can be called a film. Specifically, when sputtering was performed under the conditions of a DC power of 30 W and an argon gas pressure of 22 Pa, the nickel concentration on the substrate surface (the amorphous silicon film (a-Si film) 303 exposed with the mask 304) was: 2
It was about × 10 ¹³ atoms / cm ² (TRXRF measurement value). At this time, the nickel 305 is
In the driver section, a linear mask 304
In a region 300 shown by 0 (A), the amorphous silicon film (a-Si film) 303 is selectively added. On the other hand, the pixel portion is entirely covered with a mask 304 as shown in FIG.
05 is not added.

Then, in this state, this is heated under an inert atmosphere (for example, under a nitrogen atmosphere) at a heating temperature of 520 to 580.
C. (for example, 550.degree. C.) for 1 hour for crystallization. At this time, the amorphous silicon film in the region 300 not covered with the mask 304 and directly added with nickel 305 is used.
In the (a-Si film) 303, the amorphous silicon film (a-
The silicidation of the nickel 305 added to the surface of the (Si film) 303 occurs. This silicified nickel 30
With the nucleus 5 as a nucleus, the crystallization of the amorphous silicon film 303 proceeds. As a result, as shown in FIG. 13B, in the driver portion, the crystalline silicon film 303a is formed only in the region 300 exposed from the mask 304.

Subsequently, in a region below the mask 304,
In FIG. 10B and FIG. 13C, as indicated by an arrow 306, the crystalline silicon film 303a in the previously crystallized region extends in the lateral direction (the direction parallel to the substrate) toward the center of the mask 304. The crystal growth is performed in the lateral crystal growth region 30.
3b is formed. Here, in the third embodiment, by controlling the additive concentration of nickel, the annealing temperature and the time to the above-mentioned values at this time, the lateral crystal growth region 30 is formed.
3b prevents the area under the mask 304 from being completely filled. As a result, the lateral crystal growth region 3
03b, the amorphous silicon film 3 as an amorphous region
03 remains. At this time, the lateral crystal growth distance indicated by the arrow 306 (that is, the length x of the region 303b in the direction of the arrow 306) was 1 μm. The width y of the remaining amorphous silicon film 303 sandwiched between the lateral crystal growth regions 303b is desirably 6 μm or less according to the growth distance x.

Also in the third embodiment, the mask 30 is formed so that the width y of the remaining amorphous silicon film 303 becomes 6 μm.
4, a line width β, a space width α, and a lateral crystal growth distance x were set. This state is shown in FIG. 10 (B) and FIG.
It is shown in (C). At this time, the nickel 305 existing on the mask 304 is blocked by the mask film 304, does not reach the lower amorphous silicon film (a-Si film) 303, and is introduced into the region 300 to which nickel is directly added. An amorphous silicon film (a-Si film) 30 is formed only by the
3 is crystallized. Therefore, in the pixel portion, crystallization does not occur and the entire surface remains in an amorphous silicon film state.

Next, the silicon oxide film 3 used as a mask
04 is removed by etching. As an etchant, wet etching was performed using 1:10 buffered hydrofluoric acid (BHF) having sufficient selectivity for the lower amorphous silicon film 303. Then, in this state, FIG.
As shown in FIG. 5, the driver section irradiates a laser beam 307 so that the crystalline silicon film 30 serving as a crystallization region is formed.
3b, reflecting the crystallinity thereof, the adjacent remaining amorphous region 303 in the direction shown by the arrow 308.
Is crystallized. As a result, the amorphous region 303 having a width y
Becomes a very high quality crystalline silicon film 303c.

That is, the amorphous region 303 is preferentially melted by the laser irradiation, and is crystallized by reflecting only a favorable crystal component of the crystalline silicon film 303b as a crystallized region. Then, from both the crystalline silicon films 303b, the crystal grows further in the lateral direction 308, and a collision boundary (growth boundary) 303d is formed at the center of the high-quality crystalline silicon film 303c. Further, by the irradiation step of the laser beam 307, the crystalline silicon film 303a, which is a crystallization region of nickel, and the lateral growth region 3
03b also has somewhat improved crystallinity and becomes crystalline silicon films 303a 'and 303b'. This state is shown in FIG.
It is shown in (D). That is, the crystalline silicon region 30 in which nickel having a width α = 2 μm is directly introduced and crystallized.
A crystalline silicon film 303b ', which is a lateral crystal growth region having a width x = 1 .mu.m, is formed with a width .beta.
And a crystalline silicon film 303c, which is a high-quality crystalline silicon region of = 6 μm, is formed in a stripe shape. In the above process, the high-quality crystalline silicon film 303c crystallized by laser irradiation has higher crystallinity than the above-described first and second embodiments 103c and 203c. This is because, in the third embodiment, a lateral crystal growth region of nickel having higher crystallinity than a region in which nickel is directly introduced and crystallized is used as a seed region for the crystallization. is there.

On the other hand, in the pixel portion, a crystalline silicon film 303e which is directly crystallized from an amorphous state and entirely crystallized only by laser irradiation is formed by the laser beam 307 irradiation step. The state shown in FIG. As the laser light at this time, a XeCl excimer laser (wavelength 308 nm, pulse width 40 nanoseconds) was used. The irradiation conditions of the laser beam are as follows.
0 to 450 ° C., then heated for example to 400 ° C., the energy density 200~450mJ / cm ^2, for example, 350 mJ / cm ²
Irradiation. Further, the beam size was formed to be a long shape of 150 mm × 1 mm on the surface of the substrate 301, and scanning was sequentially performed in a direction perpendicular to the long direction with a step width of 0.05 mm. That is, the silicon film 303
In any one point of the above, laser irradiation is performed a total of 20 times.

Thereafter, as shown in FIG. 13E, the crystalline silicon films 303c, 303b ', 30
3a 'and the crystalline silicon film 303 in the pixel portion.
For e, unnecessary portions of the silicon film are removed to perform element isolation. That is, by the above-described element isolation step, the driver section is arranged as shown in FIG.
In the pixel portion, island-shaped crystalline silicon films 312n, 312p, and 312g to be active regions (source / drain regions, channel regions) of the TFT are formed in an arrangement as shown in FIG. Here, the channel width W of the TFT is determined.
In the driver portion, a line extending in the direction in which carriers finally flow (channel direction) in the TFT is substantially parallel to a crystal growth boundary 303d formed at the center of the high-quality crystalline silicon region 303c. It was arranged so that it might become. That is, the arrangement is such that the line extending in the channel direction does not cross the crystal growth boundary 303d.

In the third embodiment, the channel width W of the TFT is 46 μm. As a result, FIG.
And as shown in FIG.
n, within 320p, along the channel direction, width β = 6μ
crystalline silicon film 303c which is a high-quality crystalline region
And a crystalline silicon film 303b ', which is a lateral crystal growth region serving as a seed region thereof having a width x = 1 μm, is 8
The crystalline silicon film 303a 'which is a crystalline region in which nickel having a width α = 2 μm is directly introduced and crystallized is included.
Are included. These form a channel region.

FIG. 14 (E) shows a cross section of this state taken along the plane BB ′ in FIGS. 11 and 12. FIG. 14 (E) shows the same state as FIG. 13 (E), and FIG.
FIG. 14E shows a cross section viewed from a direction rotated by 90 ° from. Using the island-shaped silicon films 312n, 312p, and 312g to further fabricate a TFT,
For convenience of description, the description will be continued below with reference to FIG. 14 which shows a cross section taken along plane BB ′ in FIGS. 11 and 12.

Next, as shown in FIG. 14F, the crystalline silicon films 312n, 312p, and 312g serving as the active regions are formed.
To a thickness of 20 to 150 nm (here, 100
(nm) as a gate insulating film 313. This silicon oxide film is formed of TEOS (Tetra E
thoxy Ortho Silicate) as a raw material, with oxygen at a substrate temperature of 150 to 600 ° C. (preferably 300 to 450 ° C.)
Then, it was formed by decomposition and deposition by RF plasma CVD.

Subsequently, as shown in FIG. 14F, a high-melting-point metal is deposited by a sputtering method, and is patterned to form a gate electrode 314n, 314p,
314 g. At this time, the high melting point metal is preferably tantalum (Ta) or tungsten (W). In the third embodiment, a two-layer structure of Ta and pure Ta to which a small amount of nitrogen is added is used as the gate electrode, and the total thickness is 300 to 600 nm (for example, 450 nm). At this time, in the pixel portion, FIG.
2 (D), and the gate electrode 314 g
Constitute the gate bus lines at the same time.

[0219] Next, as shown in FIG.
At T, a mask 316 made of a photoresist is formed so as to largely cover the gate electrode 314g. Here, the distance r from the end of the gate electrode 314g to the end of the mask 316 is the offset length of the pixel TFT. In this state, as shown in FIG. 14G, the active regions 312n and 312p of the driver portion are formed by ion doping.
Then, phosphorus 317 is implanted using the gate electrodes 314n and 314p as a mask. Also, the active area 312g of the pixel portion
Then, phosphorus 317 is formed using resist mask 316 as a mask.
Inject. Here, using phosphine (PH3) as a doping gas, the doping condition, the acceleration voltage 60～90KV (e.g., 80 kV) and, the dose ^{2 × 10 1 5 ~8 × 10} 15 cm -2 ( e.g., 5 × 10 ¹⁵ cm
^-2 ).

In the driver portion, the regions which are masked by the gate electrodes 314n and 314p and are not implanted with phosphorus by the ion doping process later become the channel regions 320n and 320p of the TFT. Further, by this step, N-type impurity regions 321n and 322n in the N-channel TFT are formed. However, in the P-channel type TFT, the source / drain region 321
At this stage, n ′ and 322n ′ are N-type impurity regions as a result of doping with phosphorus 317. Further, in the pixel portion, phosphorus is not implanted into the region of the distance r from the end of the gate electrode 314g to the end of the mask 316 by the resist mask 316. This distance r is set to 2 μm in the third embodiment. That is, the region at the distance r becomes an offset region in the pixel TFT, and the leakage current during the off operation is reduced. In FIG. 14G, the offset region and the channel region (the gate electrode 314g
This is indicated by reference numeral 320g together with the lower region).
Further, phosphorus is implanted into regions other than the mask 316 to form source / drain regions 321g and 322g.

Next, after the mask 316 is removed, a photolithography step is further performed by using a photoresist so as to completely cover the N-type TFT and the pixel TFT of the driver portion as shown in FIG. A mask 318 for selective doping is formed. In this state, only the P-type TFT is selectively applied to the active region 312p by the ion doping method.
Is used as a mask, boron 319 is implanted. At this time,
Diborane (B ₂ H ₆ ) was used as a doping gas,
1 × at an accelerating voltage of kV to 80 kV (for example, 65 kV).
10 ^{16 to} 5 × 10 ¹⁶ cm ⁻² (for example, 2 × 10 ¹⁶ cm ⁻² )
At a high dose.

In this step, the channel region 320p of the later P-type TFT is masked by the gate electrode 314p, and boron is not implanted. On the other hand, the gate insulating film 313
Region 321 doped with boron 319
In n ′ and 322n ′, the previously doped N-type impurity, phosphorus, is canceled, and is inverted by excess boron to form P-type impurity regions 321p and 322p. So-called counter doping is performed. Thus, the N-channel TFT and the P-channel TFT
Are formed respectively.

After the photoresist used as a mask for the selective doping is removed, the photoresist is removed under an inert atmosphere (for example, a nitrogen atmosphere) for 500 to 60 hours.
A heat treatment is performed at a temperature of 0 ° C. for several hours to several tens of hours.
In the third embodiment, as an example, the processing was performed at 550 ° C. for 6 hours. By this heat treatment, phosphorus doped in the source / drain regions 321n, 322n, 321p, and 322p in the TFT active region of the driver portion first traps nickel present in the region. Then, as shown in FIG. 15 (I), nickel existing in the channel regions 320n and 320p is transferred to the adjacent source / drain in the direction shown by the arrow 311.
It is moved to the drain regions 321n, 322n, 321p, and 322p. As a result, the channel regions 320n and 32n
The nickel concentration in 0p is greatly reduced. When the nickel concentration in the channel regions 320n and 320p at this time was measured by secondary ion mass spectrometry (SIMS), it was reduced to about 5 × 10 ¹⁶ atoms / cm ³ . Incidentally, the crystalline silicon film 303c before the above process
Was about 5 × 10 ¹⁷ atoms / cm ³ . Further, by this heat treatment, the source / drain regions 321n, 322n, 321p, 322p, 32
Activation of 1 g and 322 g is performed simultaneously. N-type impurity regions 321n, 322n, and 32 obtained by the above steps
The sheet resistance of 1 g and 322 g was 0.5 to 1 kΩ / □, and the sheet resistance of the P-type impurity regions 321 p and 322 p was 2 to 3 kΩ / □. Further, the baking treatment of the gate insulating film 313 is performed at the same time, and the gate insulating film 31 is fired.
3. The bulk characteristics of itself and the interface characteristics of the crystalline silicon film / gate insulating film can be improved.

Subsequently, as shown in FIG.
A 00 nm silicon oxide film is formed as an interlayer insulating film 323 by a plasma CVD method, a contact hole is formed therein, and a metal material (for example, a two-layer film of titanium nitride and aluminum) is used to form an electrode wiring 324 of a driver TFT portion. Then, the source electrode wiring 325 of the source electrode TFT of the pixel TFT is formed. Since the pixel TFT 329 is an element for switching the pixel electrode, the other drain electrode has a pixel electrode 3 made of a transparent conductive film such as ITO.
26 are provided. That is, in FIG. 12E, a video signal is supplied via the source bus line 325, and necessary charges are written to the pixel electrode 326 based on the gate signal of the gate bus line 314g. Finally, annealing is performed at 350 ° C. for 1 hour in a hydrogen atmosphere at 1 atm. As shown in FIGS. 11D, 12E, and 15J, the N-channel TFT 327 is And the P-channel TFT 328 are completed, and the pixel T
FT329 is completed. If necessary, a protective film made of a silicon nitride film or the like may be provided on the TFT for the purpose of protecting the TFT.

In the CMOS circuit of the driver section manufactured according to the third embodiment, the field-effect mobility of each TFT is 25 for an N-channel TFT.
0 to 300 cm ² / Vs.
It was as high as 20 to 150 cm ² / Vs. The threshold voltage is about 1 V for an N-type TFT, and -1.
It was about 5 V, showing very good characteristics. In addition, the characteristic variation, which has been a problem in the past, was suppressed to about ± 10% in the field effect mobility, and was able to be suppressed to about ± 0.2 V in the threshold voltage (using a size of 400 × 320 mm as the substrate, Result of 200 measurements in substrate). In addition, even after repeated measurements and durability tests with bias and temperature stress, the characteristics were hardly degraded, showing very high reliability and stable circuit characteristics as compared with the conventional one.

A pixel TFT has a field effect mobility of 8
0 cm ² / Vs, the threshold voltage is about 2.5 V, and the pixel T
The characteristics were sufficient for FT. In addition, the increase and the variation of the leakage current in the TFT off region where the catalytic element is particularly problematic can be reduced to about several pA which is the same as when no catalytic element is used without any abnormal point, and the production yield can be greatly improved. Was. Then, when the active matrix substrate for liquid crystal display manufactured based on the third embodiment was actually evaluated for lighting, the display unevenness was smaller than that manufactured by the conventional method, and the pixel defect due to TFT leak was extremely small. It was a high display quality liquid crystal panel with a high contrast ratio.

Although the first, second, and third embodiments based on the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and is based on the technical idea of the present invention. Various modifications based on this are possible.

For example, in the above three embodiments, the shape of the remaining amorphous region in the silicon film before laser light irradiation is both linear, but may be rectangular. It is particularly effective if the shape sandwiches or surrounds. At this time, the line width or the width in the short side direction may be 6 μm or less. Even if the remaining amorphous region is not surrounded in this manner, the region crystallized in the lateral direction from the crystallized region by laser irradiation can be replaced by T
The effect of the present invention can be obtained if used in a part of the FT channel region.

In the above three embodiments,
As a method for introducing nickel, a method of applying an ethanol solution in which a nickel salt is dissolved on the surface of an amorphous silicon film
(Or a method of forming a nickel thin film by a sputtering method), a method of selectively adding a trace amount of nickel and performing crystal growth was employed. However, as a method for introducing nickel, various other methods can be used. For example, as a solvent for dissolving a nickel salt,
Water may be used simply, or SOG (spin on glass)
There is also a method in which the material is diffused from the SiO ₂ film as a solvent. Also, a method of forming a thin film by a vapor deposition method or a plating method, a method of directly introducing a thin film by an ion doping method, and the like can be used. Further, as impurity metal elements that promote crystallization, in addition to nickel, cobalt, iron, palladium,
Similar effects can be obtained by using platinum, copper, and gold.

Further, in the second and third embodiments, a method of reducing nickel in the element region is added, and a group V element is used. Nitrogen, arsenic, antimony, bismuth may be used.

Further, in the above embodiment, as a means for obtaining a higher quality crystalline silicon film by reflecting the crystallinity of the crystalline silicon film crystallized by nickel, a wavelength of 30 nm is used.
An XeCl excimer laser of 8 nm was used, but an excimer laser such as KrF or ArF having a shorter wavelength or YA was used.
A G laser or the like may be used. Further, other than the pulse laser, the same processing can be performed using, for example, a continuous wave Ar laser.

Further, as an application of the present invention, in addition to an active matrix type substrate for liquid crystal display, for example, a contact type image sensor, a thermal head with a built-in driver, and a driver built-in type using an organic EL as a light emitting element. An optical writing element, a display element, a three-dimensional IC, and the like can be considered. By using the present invention, high performance such as high speed and high resolution of these elements is realized. Further, the present invention is not limited to the MOS transistor described in the above embodiment, and can be widely applied to all semiconductor processes including a bipolar transistor using a crystalline semiconductor as an element material and an electrostatic induction transistor.

[0233]

As is clear from the above, in the semiconductor device of the present invention, the active (channel) region is formed by selectively introducing a catalytic element for promoting crystallization into the amorphous silicon film to grow the crystal. The second crystallized region grown in the melting and solidifying process using the silicon film region as a seed is a very high quality crystalline silicon film.

Since the second crystallized region in the semiconductor device of the present invention is formed by melting and solidifying from the amorphous state to reflect the crystallinity of the crystallized region by the catalytic element, Effectively takes over a crystallographically favorable crystal component (columnar crystal component) in the crystallization region due to, and grows the crystal from an amorphous state. Therefore, as in the case of crystallization by ordinary melt-solidification, the region has very few defects.

In the semiconductor device having this structure, carriers mainly move using the second crystallized region having very good crystallinity, and the active state of the semiconductor device is reduced.
By configuring a part of the (channel) region with the second crystallization region, a very high performance (particularly, high current driving capability) semiconductor device can be realized.

In the present invention, it is important to stabilize the crystallized state by the subsequent intense light irradiation by forming a wide range of crystallized area with stable crystallinity as a seed area instead of a crystal nucleus. It is. Further, the amorphous silicon film is selectively crystallized by the catalytic element, selectively reflecting the crystallinity of the first crystallized region, and forming the second crystallized region crystallized by melt-solidification. obtain. Therefore,
It is easy to control the position of the second crystallization region due to the melting and solidification, and it is possible to control the positional relationship with the active (channel) region of the semiconductor device. Therefore, according to the present invention, the crystallinity of the active (channel) region can be made uniform in all the semiconductor elements, and a high-performance semiconductor device having stable characteristics with very little variation between elements can be realized.

In one embodiment of the semiconductor device according to the present invention, the first crystallized region and the second crystallized region are each substantially linear in plan view, The first crystallized region and the second crystallized region are adjacent to each other and have a stripe shape. In this embodiment, since the second crystallized region is one-dimensionally grown from the linear first crystallized region, the crystal growth direction and the crystal growth boundary are formed, and the second crystallized region is relatively large. A second crystallization region of area is obtained. Further, by controlling the width of the first crystallization region and the width of the second crystallization region at this time, it is also possible to control the characteristics of the semiconductor device.

Further, in the present embodiment, the size of the second crystallized region grown in the melt-solidification process is the most important parameter. The size of the second crystallization region can be controlled as the width between the linear first crystallization regions as described above.

The second crystallization region in this embodiment is:
It is meaningless unless the crystal is grown while inheriting the crystallinity of the adjacent first crystallization region. Therefore, the line width (width in the short side direction) of the second crystallization region needs to be equal to or less than the maximum width in which crystal growth is performed while inheriting the crystallinity of the adjacent first crystal growth region. .

In another embodiment of the semiconductor device according to the present invention, the linear second crystallization region is
Since the width is 6 μm or less, crystal growth is performed while inheriting the crystallinity of the adjacent first crystallization region. Therefore, the entire inside of the second crystallization region becomes a high-quality crystalline silicon film crystallized in the melt-solidification process using the first crystallization region as a seed.

In one embodiment of the present invention, in the above-mentioned semiconductor device, a linear growth boundary is defined at least with respect to an extension of a carrier moving direction (channel direction) in an active (channel) region of the semiconductor device. It is arranged not to cross. This allows carriers to move across the channel without straddling this growth boundary,
The influence of the growth boundary can be prevented, and a high-performance semiconductor device having a high current driving force can be realized.

In the semiconductor device of another embodiment, the moving direction (channel direction) of carriers in the active (channel) region of the semiconductor device and the line direction of the linear growth boundary are different from those in the semiconductor device. , Are arranged substantially parallel. As a result, all carriers can move in the channel at the shortest distance, the influence of this growth boundary is completely prevented, and a high-performance semiconductor device having a higher current driving force can be realized.

In one embodiment of the present invention, in the semiconductor device, the active (channel) region includes at least a plurality of linear second crystallization regions. The larger the number of linear second crystallization regions included in the channel region, the better, the current driving capability is improved, and the variation in characteristics between elements is reduced.

In another embodiment of the present invention, the active (channel) region contains the catalyst element at a concentration of 1 × 10 ^{16 to} 5 × 10 ¹⁷ atoms / cm ^3. I have.

In one embodiment of the present invention, in the semiconductor device described above, the catalytic element contained in the active (channel) region is nickel.

In the semiconductor device of this embodiment, the active
The (channel) region is composed of a first crystallized region crystallized by heat treatment using a catalytic element, and a second crystallized region crystallized in the melt-solidification process using the first crystallized region as a seed region. Things. Therefore, in the semiconductor device obtained by this embodiment, the active region contains a certain amount of a catalytic element, which is the basis for specifying the semiconductor device of this embodiment. The types of catalyst elements that can be used in the present embodiment include Ni, Co, Fe, and P.
d, Pt, Cu, and Au. One or a plurality of elements selected from these elements have an effect of promoting crystallization in a very small amount, tend to be relatively inert in a semiconductor (crystalline silicon), and have an adverse electrical effect on a semiconductor device. Can be suppressed. Therefore, in the semiconductor device of this embodiment, any of these elements is contained in the active (channel) region in a certain amount.

It has been found that the most remarkable effect can be obtained particularly when Ni is used among these catalyst elements.

At this time, the concentration of nickel element actually contained in the active region of the semiconductor device is 1 × 10
It is desirable to be ^{16 to} 5 × 10 ¹⁷ atoms / cm ³ . If the amount of nickel exceeds 5 × 10 ¹⁷ atoms / cm ³ , the active region is formed as nickel silicide.
Many unevenly distributed regions appear in the (silicon film), which adversely affects the characteristics of the semiconductor device. On the other hand, when the amount of nickel is 5 × 10 ¹⁷ atoms / cm ³ or less, almost no silicide is precipitated, the solid solution is formed in the silicon film, and the nickel is incorporated into crystal defects.
In such a state, no adverse effect on the semiconductor device is observed. Conversely, when the residual nickel concentration in the active region is 1 × 1
When it is less than 0 ¹⁶ atoms / cm ³ , the crystallinity of the seed region is low and the effect of the present invention cannot be obtained.

[0249] Further, the semiconductor device of one embodiment is a semiconductor device having a plurality of thin film transistors. In particular, a thin film transistor which requires current driving capability has a wide channel width, and thus is suitable for applying the present invention. That is, it is easy to include many second crystallized regions having high crystallinity in the channel. On the other hand, in a thin film transistor which requires a low leakage current and particularly has a small channel width, the second crystallized region is not used, and the channel region is formed only by the first crystallized region crystallized by the catalytic element. May be configured. In the case where thin-film transistors requiring different characteristics are simultaneously formed as described above, it is effective to selectively use the effects of the present invention and obtain thin-film transistors corresponding to the respective characteristics.

In the semiconductor device of another embodiment, the melting and solidification process by direct intense light irradiation is performed without introducing a catalytic element at all, leaving the entire channel in an amorphous state in a completely masked state. Only the third crystallized region was crystallized, and a channel region was formed using the third crystallized region. This is effective for a thin film transistor having a small channel width that requires a low leakage current. When the second crystallized region is applied to a thin film transistor having a small channel width which requires a low leak current, a large difference in the number and area of the second crystallized region in each element causes a large characteristic difference. Will appear. Therefore, in this case, rather, only the first crystallization region or the third crystallization region crystallized only in the melt-solidification process,
It is preferable to configure the channel region.

Further, the semiconductor device of one embodiment is
As a semiconductor device including a large number of thin film transistors having completely different characteristics on the same substrate as described above, a thin film transistor for switching a pixel electrode and a thin film transistor for forming a driver circuit for driving the thin film transistor for switching the pixel electrode are provided. It is a driver monolithic active matrix semiconductor device. The driver monolithic active matrix semiconductor device is generally used for a liquid crystal display device, an image sensor, and the like. This driver monolithic active matrix semiconductor device has a clear purpose and characteristic of each thin film transistor, and is suitable for making a thin film transistor suitable for each purpose by using the present invention. Therefore, for the above-described reason, at least a part of the thin film transistor constituting the driver circuit (particularly, a TFT requiring a high current driving capability) has a channel region composed of the first crystallized region and the second crystallized region. It is constituted by and. On the other hand, in the thin film transistor for pixel electrode switching, the channel region is constituted by a third crystallized region in which an amorphous silicon film is crystallized only by a melting and solidifying process without using a catalytic element.

The method of manufacturing a semiconductor device according to another embodiment uses a region where a catalytic element is introduced and crystal is grown by heat treatment, and a region where crystal is grown laterally by intense light irradiation. The active (channel) region of the semiconductor device is formed. In the second crystal growth step of irradiating the strong light, crystal growth occurs in the lateral direction due to the melt-solidification phenomenon, reflecting the crystallinity of the region crystallized by the catalytic element. In other words, the strong light irradiation efficiently takes over the crystallographically favorable crystal components (columnar crystal components) in the crystallization region due to the catalytic element, and grows the crystals from the amorphous state. As a result, the microscopically good crystalline state obtained by crystallization with the catalytic element, the good uniformity of the crystalline state within the substrate, which is a feature of the solid-phase growth crystallization method, and the solidified crystal by intense light irradiation An extremely high-quality crystalline silicon film is formed in which all of the low intragranular defect densities due to the formation of the crystalline silicon film are incorporated. Then, as a result of aligning the crystallization region so as to be surely included in the active (channel) region of the semiconductor device, the crystallization region has extremely high performance (particularly high current driving capability), and the A semiconductor device exhibiting stable characteristics with very little variation can be obtained.

The method of manufacturing a semiconductor device according to another embodiment of the present invention is directed to a method of manufacturing a semiconductor device, in which, by irradiating intense light, the region where the crystal is grown in the lateral direction by the heat treatment is further extended in the lateral direction (the direction parallel to the substrate). A region adjacent to the region crystallized in the lateral direction by the heat treatment is grown. Thereafter, an active (channel) region of the semiconductor device is formed so as to include the region where the crystal is grown laterally by the intense light irradiation.

That is, in this embodiment, by selectively introducing a catalytic element into a part of the amorphous silicon film and heating it, the other part is selectively left in the state of the amorphous silicon film. By crystallizing only the region into which the catalytic element has been introduced, and further extending the heating time, the crystal is grown in the lateral direction (the direction parallel to the substrate) from the introduced region. Inside this lateral crystal growth region, columnar crystals whose growth directions are substantially aligned in one direction are clinging together,
This is a region having better crystallinity as compared with a region where a catalyst element is directly introduced and crystal nuclei are randomly generated. Therefore, in this embodiment, by using the crystalline silicon film in the lateral crystal growth region as a seed region for intense light irradiation, it is possible to further enhance the crystallinity of the crystal growth region by intense light irradiation, The performance of the semiconductor device can be further improved.

In the method of manufacturing a semiconductor device according to another embodiment, the selective introduction of the catalytic element into the amorphous silicon film is achieved by selectively introducing the catalytic element onto the amorphous silicon film. Performed after forming a mask in which the region is opened,
Each planar shape of the mask is linear,
In addition, each of them has a line and space shape arranged in parallel. By providing a mask formed by, for example, photolithography, as in this embodiment, it becomes possible to accurately control the line width and the space width, and to perform alignment with the active (channel) region of the semiconductor device later. Can be performed with high accuracy.

In this embodiment, a linear amorphous (non-crystallized) region is provided so as to be sandwiched from both sides by a region crystallized linearly using a catalytic element, and the region is irradiated with strong light. Then, the crystal is grown laterally (in a direction parallel to the substrate) from the adjacent crystallization region. That is, the remaining amorphous (non-crystallized) regions that are crystallized by intense light irradiation are linearly sandwiched between the crystallized regions by the catalytic element. Thus, in the case of intense light irradiation, lateral crystal growth is performed from crystallized regions on both sides of the remaining amorphous (uncrystallized) region (that is, from two directions). This makes it possible to efficiently reflect the crystallinity of the region crystallized by the adjacent catalyst element over a wide area.

With such a shape, one-dimensional crystal growth is performed in the direction along the line width direction or the short side direction during the lateral crystallization by intense light irradiation. The growth is stabilized, and the control of crystal grain boundaries becomes easier.

The width of the seed region (the region crystallized by the catalytic element) is reduced by setting the line width of the mask and the space width between the linear masks at this time. It is possible to increase the area ratio of the region where the crystal is grown in the lateral direction. Accordingly, a high-quality crystalline silicon film formed by reflecting the crystallinity of the crystallized region of the catalytic element by intense light irradiation can be obtained as a region having a relatively large area, and the performance of the semiconductor device can be improved. Instead, the layout of the element region is facilitated.

In this embodiment, an important point is that after the selective crystal growth by the heat treatment with the catalytic element, the region is sandwiched or surrounded by the selectively crystallized region. Linear amorphous material remaining
This is the width of the (uncrystallized) region. This line width (width in the short side direction)
Is required to be less than or equal to the maximum width in which crystal growth is performed by taking over the crystallinity of the crystal growth region by the adjacent catalyst element in the intense light irradiation. Thus, the region is filled with a high-quality crystalline silicon film crystallized by intense light irradiation using the crystallized region of the catalyst element as a seed.

According to another embodiment, in the method of manufacturing a semiconductor device, the linear mask has a pattern line width (width in a short side direction) of 6 μm or less. If the line width is 6 μm or less, intense light irradiation takes over the crystallinity of the crystal growth region by the adjacent catalyst element,
Crystal growth is performed, and the entire area is filled with a high-quality crystalline silicon film crystallized by intense light irradiation using the crystallized area of the catalyst element as a seed. The value of this line width is 6 μm
Is a value obtained from the results of experiments actually performed by the present inventors.

In one embodiment, for the same reason as described in the previous embodiment, the line width of the linear amorphous region interposed between the regions crystallized in the lateral direction by the heat treatment ( The width of the short side direction), the amorphous region takes over the crystallinity of the crystal growth region by the adjacent catalyst element,
The width is set to be equal to or less than the maximum width at which crystal growth is performed. Accordingly, the amorphous region is filled with the high-quality crystalline silicon film crystallized by intense light irradiation using the crystallized region of the catalyst element as a seed.

In another embodiment, for the same reason as described in the above-described embodiment, the line width of the linear amorphous region interposed between the regions crystallized in the lateral direction by the above heat treatment is set. (Width in the short side direction) was 6 μm or less. Accordingly, the amorphous region is filled with the high-quality crystalline silicon film crystallized by intense light irradiation using the crystallized region of the catalyst element as a seed.

In one embodiment, in the method of manufacturing a semiconductor device, the catalyst element is selectively introduced into the amorphous silicon film by using a line-and-space-shaped linear mask. The linear mask of the shape
The line direction is formed so as to be substantially parallel to the direction in which carriers as a semiconductor device flow in the active region. Therefore, the crystal growth in the horizontal direction due to the intense light irradiation occurs in the line & space linear mask pattern in a direction perpendicular to the line direction.

Accordingly, the regions (second crystallized regions) that have grown from the seed crystallized regions on both sides by the strong light irradiation collide with each other at the center thereof to form a crystal growth boundary. This growth boundary is such that the crystal regions advance and collide from completely opposite directions, the bond of Si atoms is completely interrupted, and a very large trap or scattering center is generated for carriers in the semiconductor device. ing.

Therefore, in the manufacturing method of the present embodiment,
The direction in which carriers flow in the subsequent active region is made substantially parallel to the line direction of the pattern of the line-and-space linear mask for introducing the catalytic element.
As a result, carriers can move in the channel without straddling the growth boundary, adverse effects due to the growth boundary can be prevented, and a high-performance semiconductor device having higher current driving power can be realized. .

In another embodiment, at least two or more linear regions are grown by intense light irradiation.
The channel width of the semiconductor device and the line width (width in the short side direction) of each crystallization region were set so as to be included in the active (channel) region of the semiconductor device.

In the present embodiment, the performance of a semiconductor device is improved by a high-quality crystallized region formed by intense light irradiation using a crystallized region formed by a catalytic element as a seed. Therefore, the higher the quality of the crystallized region due to the irradiation of strong light, the better the channel region is included. However, a variation in the area ratio causes variation in characteristics. In the arrangement as in the present embodiment, this variation can be controlled in the form of the number of linear regions crystallized by intense light irradiation. Therefore, by taking into account the current driving capability required of the semiconductor element, by making at least two or more linear crystal growth regions included in the active (channel) region,
The characteristic variation can be suppressed to a practical level, and the minimum characteristic stability and high performance of the semiconductor device can be secured.

In one embodiment, the amorphous silicon film region remains even after crystallization by heat treatment with a catalytic element,
The crystal is grown by irradiating it with strong light. However, if the temperature of the heat treatment is too high, natural nucleation of the amorphous silicon film itself occurs, and crystal growth starts. The spontaneous nucleus does not depend on the catalytic element, and its crystal state has a twin structure with many defects obtained by conventional solid phase growth without using the catalytic element. Therefore, in the present embodiment, after selectively introducing the catalyst element into the amorphous silicon film, the temperature of the heat treatment for crystallization, the spontaneous generation of crystal nuclei due to the amorphous silicon film itself does not occur, The temperature was such that only crystal nuclei due to the catalytic element were generated and proceeded.

According to another embodiment, in the method of manufacturing a semiconductor device, the heat treatment is performed at a temperature of 520 ° C. to 58 ° C.
Perform at a temperature in the range of 0 ° C.

Specifically, the temperature at which the crystal growth by the catalytic element starts to occur is about 520 ° C., and the temperature at which spontaneous nucleation is generated in the amorphous silicon film without the catalytic element is about 580 ° C. Therefore, when the heat treatment temperature is in the range of 520 ° C. to 580 ° C., spontaneous generation of crystal nuclei due to the amorphous silicon film itself does not occur, and only crystal nuclei due to the catalyst element are generated. Only growth proceeds.

In one embodiment, the intensity of the intense light is adjusted so that the amorphous (uncrystallized) region is completely melted, while the region crystallized by the catalyst element is not completely melted. The strength is set in such a range that the crystal state of is not lost. Thereby, the residual amorphous region is sufficiently crystal-grown by reflecting the crystallinity of the crystallized region by the strong light irradiation, and the crystallinity obtained by the catalytic element is not lost in the crystallized region. . Therefore, a semiconductor device with high performance and small variation can be manufactured. In another embodiment, as the intense light, an excimer laser beam having a wavelength of 400 nm or less is used, and the energy density on the silicon film surface is within a range of 200 to 450 mJ / cm ² ,
Irradiate strong light.

As the strong light, excimer laser light having a wavelength of 400 nm or less is most suitable. 400 nm wavelength
If it is below, the absorption coefficient for the silicon film is extremely high, and only the silicon film can be instantaneously heated without thermally damaging the glass substrate. Excimer laser light has a large oscillation output and is suitable for processing a large-area substrate. Among them, XeCl excimer laser light with a wavelength of 308 nm has a large output, so that the beam size can be increased when irradiating the substrate, and it can be easily applied to a large-area substrate, and the output is relatively stable. Most desirable in doing. Then, it is desirable to perform the irradiation step on the silicon film surface using the laser light so that the surface energy density of the laser light is 200 to 450 mJ / cm ² . Here, if the surface energy density of the laser beam is smaller than 200 mJ / cm ² ,
The silicon film is hardly melted, and the remaining amorphous region is not sufficiently crystallized, reflecting the crystallinity of the crystallized region.

When the surface energy density is 450
If it is larger than mJ / cm ² , the crystallinity obtained by the catalyst element in the crystallization region is completely lost, that is, the crystallinity is reset. In this case, the entire surface becomes equivalent to the crystalline silicon film obtained by conventional laser crystallization, not only the performance is reduced but also the problem of non-uniformity inherent in laser crystallization occurs I do. That is, the energy density range in this embodiment is such that the above-mentioned amorphous region is crystallized reflecting the crystallinity of the crystallized region and the original crystallinity of the crystallized region is not lost. Is equivalent to

In one embodiment, in the method of manufacturing a semiconductor device, Ni, Co, Fe, Pd, Pt, Cu, and A are used as catalyst elements for promoting crystallization of the amorphous silicon film.
At least one element selected from u is used. If one or more elements selected in this embodiment,
Although a trace amount has the effect of promoting crystallization, among them, the most remarkable effect can be obtained particularly when Ni is used.

In another embodiment, by irradiating with strong light, the crystal is grown laterally from the region selectively grown by the catalyst element, and then becomes the active (channel) region of the semiconductor device. A step of introducing an element selected from Group V B into the region of the silicon film and performing a second heat treatment. This method is very effective, and is used for crystal growth. Mainly, the catalyst element remaining at the growth boundary moves to the region where the element selected from the group V B is introduced, and as a result, The amount of the catalytic element in the active (channel) region of the semiconductor device can be greatly reduced. This method is particularly effective for a catalytic element in a silicide state that has a large adverse effect on semiconductor characteristics. And the group V element B is introduced,
If the region where the catalytic element is collected is removed to form a final semiconductor element region, no high concentration region of the catalytic element remains on the substrate.

In one embodiment, at least one element selected from P, N, As, Sb, and Bi is used as the element selected from Group 5B. With one or more elements selected from these, the catalyst element can be efficiently moved, and a sufficient effect can be obtained. It has been found that among these elements, P has the highest effect.

As described above, by using the present invention, it is possible to realize a semiconductor element having very high performance and stable characteristics with little variation. Further, a high-performance semiconductor device with a high degree of integration can be manufactured in a simple manufacturing process. Obtained. Also,
In the manufacturing process, the non-defective rate can be greatly improved, and the cost of the product can be reduced. In particular, in a liquid crystal display device,
The switching characteristics of the pixel switching TFT required for the active matrix substrate, the high performance and the high integration required for the TFTs constituting the peripheral drive circuit portion are simultaneously satisfied, and the active matrix portion and the peripheral drive are mounted on the same substrate. A driver monolithic active matrix substrate constituting a circuit unit can be realized, and the module can be made compact, high-performance, and low in cost.

[Brief description of the drawings]

FIGS. 1A to 1C are plan views sequentially showing manufacturing steps according to a first embodiment of the present invention.

FIGS. 2A to 2D are cross-sectional views sequentially showing a manufacturing process (first half) of the first embodiment.

FIGS. 3D to 3G are cross-sectional views sequentially showing a manufacturing process (second half) of the first embodiment.

FIGS. 4A and 4B are plan views sequentially showing a manufacturing process (first half) of a driver circuit unit according to a second embodiment.

FIGS. 5C and 5D are plan views sequentially showing a process (first half) of manufacturing a driver circuit unit according to the second embodiment.

FIGS. 6A to 6E are plan views sequentially showing a process of manufacturing a pixel portion according to the second embodiment.

FIGS. 7A to 7F are cross-sectional views sequentially showing a manufacturing process (first half) of the second embodiment.

FIGS. 8D to 8G are cross-sectional views sequentially showing a manufacturing process (second half I) of the second embodiment.

FIGS. 9H to 9J are cross-sectional views sequentially showing the manufacturing process (second half II) of the second embodiment.

FIGS. 10A and 10B are plan views sequentially showing a process of manufacturing a driver circuit unit according to a third embodiment.

FIGS. 11 (C) and 11 (D) are plan views sequentially showing steps of manufacturing a driver circuit unit according to the third embodiment.

FIGS. 12A to 12E are plan views sequentially illustrating a process of manufacturing a pixel portion according to a third embodiment.

FIGS. 13A to 13E are cross-sectional views sequentially showing a manufacturing process (first half) of the third embodiment.

FIGS. 14E to 14G are cross-sectional views sequentially showing a manufacturing process (second half I) of the third embodiment.

FIGS. 15H to 15J are cross-sectional views sequentially showing a manufacturing process (second half II) of the third embodiment.

FIGS. 16A and 16B are characteristic diagrams showing how the Raman shift wave number and the field effect mobility change according to the width of the remaining amorphous region in the present invention.

[Explanation of symbols]

101, 201, 301: glass substrate, 102, 202, 3
02: base film, 103, 203, 303: amorphous silicon film, 103a, 203a, 303a: crystalline silicon film, 1
04,204,304 ... nickel introduction mask, 105,2
05,305: nickel, 306: crystal growth direction by nickel, 107, 207, 307: laser beam, 10
8, 208, 308: crystal growth direction by laser beam irradiation, 209: phosphorus introduction mask, 210: phosphorus, 211,
311 ... nickel gettering direction, 112, 212,
312... TFT active region (element region), 113, 213, 3
13: gate insulating film, 114, 214, 314: gate electrode, 115, 215: anodic oxide layer, 216, 316: resist mask for phosphorus, 117, 217, 317: phosphorus, 2
18, 318: resist mask for boron, 219, 31
9 ... boron, 120,220,320 ... channel region, 1
21,221,321 ... source region, 122,222,32
2 ... drain region, 123, 223, 323 ... interlayer insulating film, 124, 224, 324 ... electrode wiring, 225, 325
... Source electrodes, 226,326 ... Pixel electrodes, 127,22
7,327 ... N-type TFT, 228,328 ... P-type TFT,
229: pixel TFT, 130: channel direction (carrier moving direction).

Continued on the front page F-term (reference) GG47 HJ01 HJ04 HJ12 HJ23 HL01 HL03 HL07 HL11 HM14 NN04 NN23 NN24 NN35 NN72 NN78 PP01 PP03 PP04 PP06 PP10 PP13 PP24 PP29 PP34 QQ11 QQ23 QQ24 QQ28

Claims (28)

[Claims] 1. A semiconductor device comprising, as an active region, a crystalline silicon film formed on a substrate having an insulating surface, wherein the active region promotes crystallization of the amorphous silicon film. A first crystallized region selectively introduced with a catalytic element and crystallized by a heat treatment, and a second crystallized region crystal-grown in a melt-solidification process using the first crystallized region as a seed. A semiconductor device comprising a crystalline silicon film made of: 2. The semiconductor device according to claim 1, wherein each of the first crystallized region and the second crystallized region is substantially linear in plan view, and A semiconductor device, wherein an active region is constituted by a crystalline silicon film in a state where a first crystallized region and a second crystallized region are adjacent to each other and are in a stripe shape. 3. The semiconductor device according to claim 1, wherein the width of the linear second crystallization region is 6 μm or less. 4. The semiconductor device according to claim 1, wherein a center of the linear second crystallization region has a crystal growth boundary, and the second crystallization region has a line. The linear crystal growth boundary is arranged so as not to cross at least a line segment extending in the carrier moving direction in the active region. A semiconductor device characterized by being performed. 5. The semiconductor device according to claim 4, wherein a center of the linear second crystallization region has a crystal growth boundary parallel to a direction in which the second crystallization region extends. Wherein the direction in which carriers move in the active region and the direction in which the linear crystal growth boundary extends linearly are substantially parallel to each other. apparatus. 6. The semiconductor device according to claim 1, wherein the active region includes at least a plurality of linear second crystallization regions. apparatus. 7. The semiconductor device according to claim 1, wherein the active region includes the catalyst element in an amount of 1 × 10 ^{16 to} 5 × 10 6.
A semiconductor device characterized by containing at a concentration of ¹⁷ atoms / cm ³ . 8. The semiconductor device according to claim 7, wherein the catalytic element contained in the active region is nickel. 9. A semiconductor device having a plurality of thin film transistors having a crystalline silicon film as an active region on a substrate having an insulating surface, wherein the plurality of thin film transistors are formed by forming an amorphous silicon film into crystallization. A second crystallization region in which a catalyst element to be promoted is selectively introduced, and the first crystallization region crystallized by the heat treatment, and the first crystallization region is used as a seed to grow crystals in a melt-solidification process A first-type thin film transistor having an active region constituted by a region, and a first crystallized region crystallized by a heat treatment by introducing a catalytic element for promoting crystallization into an amorphous silicon film. And a second type thin film transistor having an active region constituted by: 10. A driver monolithic comprising a pixel electrode switching thin film transistor for switching a pixel electrode and a driver circuit thin film transistor constituting a driver circuit for driving the pixel electrode switching thin film transistor provided on a substrate having an insulating surface. In the active matrix semiconductor device of the type, at least one of the thin film transistors for the driver circuit selectively introduces a catalytic element for promoting crystallization into the amorphous silicon film, and heats the amorphous silicon film. And a second crystallized region formed by crystal growth in a melting and solidification process using the first crystallized region as a seed. The crystallization of amorphous silicon film Introducing a catalytic element which promotes, wherein a has a active region that is configured only by the first crystallized region that has been crystallized by heat treatment. 11. A semiconductor device having a plurality of thin film transistors having a crystalline silicon film as an active region on a substrate having an insulating surface, wherein the plurality of thin film transistors are formed by crystallization of an amorphous silicon film. A first crystallized region crystallized by a heat treatment by selectively introducing a catalyst element to be promoted, and a second crystallized region grown by crystal growth in a melt-solidification process using the first crystallized region as a seed. A thin-film transistor having an active region constituted by: a first type thin film transistor having an active region; and a third crystallized region formed by crystallizing an amorphous silicon film only by a melting and solidifying process without using a catalytic element. And a third type thin film transistor having a region. 12. A driver monolithic type in which a pixel electrode switching thin film transistor for switching a pixel electrode and a driver circuit thin film transistor constituting a driver circuit for driving the pixel electrode switching thin film transistor are provided on a substrate having an insulating surface. In the active matrix semiconductor device, at least one of the driver circuit thin film transistors selectively introduces a catalyst element for promoting crystallization into an amorphous silicon film and heat-treats the first silicon film. The thin film transistor for pixel electrode switching has an active region formed by a crystallized region and a second crystallized region grown by crystal in a melting and solidifying process using the first crystallized region as a seed. Amorphous without the use of catalytic elements Wherein a has a active region made is constituted by a third crystallization region where the silicon film is crystallized only by melt solidification process. 13. A catalyst element introducing step of selectively introducing a catalytic element for promoting crystallization of a part of an amorphous silicon film formed on a substrate having an insulating surface, and a heat treatment, A first crystal growth step of selectively crystal-growing the amorphous silicon film in a region where the catalyst element is selectively introduced; and irradiating strong light to the substrate from the region where the crystal is selectively grown. A second crystal growth step of growing a crystal adjacent to the selectively crystallized region in a lateral direction parallel to the above, a region where the catalyst element is introduced and the crystal is grown by heat treatment, and A method of forming an active region of a semiconductor device by using a region that has been laterally crystal-grown by the method. 14. A catalyst element introducing step for selectively introducing a catalytic element for promoting crystallization to a part of an amorphous silicon film formed on a substrate having an insulating surface; A first crystal growth for selectively crystal-growing the amorphous silicon film in a region into which the catalyst element is selectively introduced, and further growing a crystal in a peripheral region from the region in a lateral direction parallel to the substrate; A step of irradiating intense light and growing a region adjacent to the region laterally crystallized by the heat treatment from the region crystallized laterally by the heat treatment to the lateral direction. An active region for forming an active region of a semiconductor device using a two-crystal growth process, a region where the catalyst element is introduced, and a crystal is grown by heat treatment, and a region where a crystal is grown laterally by intense light irradiation. Forming process and A method for manufacturing a semiconductor device, comprising at least: 15. The method for manufacturing a semiconductor device according to claim 13, wherein the selective introduction of the catalytic element into the amorphous silicon film is performed by selectively introducing the catalytic element onto the amorphous silicon film. The mask is formed after forming a mask having an opening in which a region to be introduced is opened, and the planar shape of the mask is a linear line & space shape arranged in parallel at a predetermined interval. Semiconductor device manufacturing method. 16. The method for manufacturing a semiconductor device according to claim 13, wherein in the catalyst element introducing step, the catalyst element is selectively introduced into the amorphous silicon film using a linear mask. In the first crystal growth step, the amorphous silicon film in the region not covered by the mask is crystallized by heat treatment, while the region covered by the mask remains in an amorphous state; In the second crystal growth step, when irradiating strong light to crystallize the amorphous region covered with the mask, the width of the pattern of the mask in the short side direction was covered with the mask. A method of manufacturing a semiconductor device, wherein an amorphous region inherits the crystallinity of a crystal growth region formed by an adjacent catalyst element and has a width equal to or less than a maximum width for crystal growth. 17. The method of manufacturing a semiconductor device according to claim 16, wherein the linear mask has a width in a short side direction of the pattern.
A method for manufacturing a semiconductor device, wherein the thickness is 6 μm or less. 18. The method for manufacturing a semiconductor device according to claim 14, wherein, in the step of introducing a catalyst element, the amorphous silicon film is formed using a linear mask provided on the amorphous silicon film. The catalyst element is selectively introduced into the silicon film. In the first crystal growth step, the amorphous silicon film in the region where the catalyst element is selectively introduced is selectively crystal-grown by a heat treatment. Further growing a peripheral region under the mask from the region in a lateral direction parallel to the substrate, and stopping the crystal growth in a region under the mask, with a part of the amorphous region remaining, In the second crystal growth step, when the remaining amorphous region is crystallized by irradiating intense light, a linear amorphous material interposed between the regions crystallized laterally by the heat treatment is present. The line width in the short side direction of the region is Succeeds to crystallinity of the crystal growth region by adjoining the catalytic element, a method of manufacturing a semiconductor device, characterized by the following widest crystal growth is performed. 19. The method for manufacturing a semiconductor device according to claim 18, wherein the line width in the short side direction of the linear amorphous region interposed between the regions crystallized in the lateral direction by the heat treatment is reduced. , 6 μm or less. 20. The method of manufacturing a semiconductor device according to claim 13, wherein the catalytic element is selectively applied to the amorphous silicon film by a line-and-space linear mask. The line and space-shaped linear mask is formed so that the line direction is substantially parallel to the direction in which carriers as the semiconductor device flow in the active region. Method. 21. The method for manufacturing a semiconductor device according to claim 13, wherein the catalyst element is introduced, and a region is grown by heat treatment, and the region is seeded by intense light irradiation. In an active region forming step of forming an active region of a semiconductor device using a region crystallized in the lateral direction, the respective crystallized regions are adjacent to each other in a line & space shape, and crystal growth is performed by intense light irradiation. The channel width of the semiconductor device and the line width in the short side direction of each crystallized region are set so that at least two or more linear regions included in the active region of the semiconductor device are included. Semiconductor device manufacturing method. 22. The method for manufacturing a semiconductor device according to claim 13, wherein the temperature of the heat treatment in the first crystal growth step is set to a value corresponding to the spontaneous generation of crystal nuclei by the amorphous silicon film itself. A method for manufacturing a semiconductor device, characterized in that the temperature is set such that only crystal nuclei due to a catalytic element are generated and only crystal growth using a catalytic element proceeds. 23. The method of manufacturing a semiconductor device according to claim 22, wherein the heat treatment is performed at a temperature in a range of 520 ° C. to 580 ° C. 24. The method of manufacturing a semiconductor device according to claim 13, wherein the intensity of strong light in the second crystal growth step is such that the amorphous region is completely melted, and the catalyst is A method for manufacturing a semiconductor device, wherein a region crystallized by an element is not completely melted, and is set to have a strength in such a range that at least an original crystal state is not lost. 25. The method of manufacturing a semiconductor device according to claim 24, wherein in the second crystal growth step, an excimer laser beam having a wavelength of 400 nm or less is used as intense light, and the energy density on the silicon film surface is 200.
A method for manufacturing a semiconductor device, characterized by irradiating intense light within a range of up to 450 mJ / cm ² . 26. The method for manufacturing a semiconductor device according to claim 13, wherein Ni, Co, Fe, Pd, or Pt is used as a catalyst element for promoting crystallization of the amorphous silicon film. A method for manufacturing a semiconductor device, comprising using at least one element selected from the group consisting of Cu, Cu and Au. 27. The method for manufacturing a semiconductor device according to claim 13, wherein after the second crystal growth step, at least a region of the silicon film other than an active region of the semiconductor device later. To introduce an element selected from Group V B
Performing a group B element introduction step and a second heat treatment to move the catalyst element to a region where the element selected from the group V B is introduced, thereby reducing the amount of the catalyst element in the active region of the semiconductor device. And a catalyst element reducing step. 28. The method for manufacturing a semiconductor device according to claim 27, wherein P, N, As, Sb,
A method for manufacturing a semiconductor device, wherein at least one element selected from Bi is used.