JP2002035227A - Game machine and storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To hardly cause a phenomenon that the progress and presentation of games drift from each other when a power supply is restored after its cutoff. SOLUTION: A main CPU 112 sends a command specifying a series of games to a sub-substrate, and a sub-CPU 32e decodes the command and lets a game machine to execute a series of games according to the command. When the power supply cutoff occurs during a series of games, the sub-CPU 32e stores and holds the data indicating the unexecuted portion of a series of games being executed immediately before the cutoff with a buckup means. When the power supply is restored, the main CPU 112 sends an operation start signal Xs to the sub-CPU 32e. Upon receiving the operation start signal Xs, the sub-CPU 32e resumes the game from the state based on the data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine for controlling a game by a computer and a recording medium on which a computer program for causing the game machine to function is recorded.

[0002]

2. Description of the Related Art Conventionally, as this type of gaming machine, for example, a pachinko machine having an electrical configuration shown in FIG. 15 is known. The CPU 501 mounted on the main board 500 controls and processes the following contents in a machine cycle. (1) The signal output from the winning ball detection switch 521 or the six payout detection switches 524 is taken in through the board relay board 520, and the payout of the prize ball is instructed to the CPU 601 mounted on the general relay board 600. (2) The signal output from the first-type starting port switch 522 is taken in through the board relay board 520, and the special symbol display device 511 is provided.
Activate (3) The signal output from the normal symbol operation switch 523 is taken in via the board relay board 520,
The normal symbol display device 512 is operated. (4) The signal output from the accessory continuous operation switch 531 at the time of occurrence of the big hit is taken in from the large winning opening centralized board 530 via the board relay board 520, and the signal is transmitted from the board intermediate board 520 via the big winning opening concentrated board 530. Output, and drives the special winning opening solenoid 534. (5) The signal output from the count switch 532 is taken in from the special winning opening concentrated board 530 via the board relay board 520, and the number of winnings to the special winning opening is counted. (6) A signal is output from the board relay board 520 via the special winning opening concentrated board 530 to drive the ordinary electric accessory opening solenoid 533. (7) Board relay board 510
To control the illumination lamp 513.
(8) Output a signal via the board relay board 520 and
The D board 525 is controlled. (9) A signal is output from the board relay board 520 via the special winning opening concentrated board 530, and the LE
The D board 535 is controlled. (10) Big hit information and the like are transmitted to a host computer installed in a pachinko hall management room or the like via the game board information terminal 540. (1
1) Drive the launching device 620. (12) The audio output device 622 that outputs a sound effect or the like is controlled. (13) Detection switches 6 such as a metal frame detection switch and a fullness detection switch
The signal output from 21 is fetched to detect opening / closing of a gold frame, full of award balls, and the like. (14) The signal output from the ball cut switch 613 is taken in via the external connection terminal board 610, and the ball cut is detected. (15) External connection terminal board 6
A signal is output via the LED 10 to control the LED board 611 and various lamps 612 such as a winning lamp and a ball-out lamp. (16) Input / output signals to / from the prepaid card unit 614 via the external connection terminal board 610.

As described above, the CPU 501 mounted on the main board 500 includes devices such as the special symbol display device 511, the ordinary symbol display device 512, the ordinary electric accessory opening solenoid 533, and the special winning opening opening solenoid 534, and lighting. Lamp 513, various lamps 612, LED substrates 525, 5
Control of lamps such as 35 and 611 is performed in the machine cycle. That is, each device and lamps are stored in the CPU 501.
It is activated and turned on by a signal periodically output from the controller, or maintains an operation stopped state and an extinguished state.

[0004] Further, C
The PU 601 drives the winning ball payout device 623 in accordance with the winning ball payout command output from the CPU 501, and pays out a predetermined number of winning balls. The power supplied from the main power supply 615 is
The external connection terminal board 610 → the general relay board 600 → the main board 500 → the board-side relay boards 510, 520 → the winning opening concentrating board 530 are supplied, and each board is transformed into a required voltage.

However, as described above, in the conventional pachinko machine, the CPU 501 mounted on the main board 500 stops each device except when operating each device or turning on lamps and LEDs. A signal for maintaining the state and a signal for maintaining the state in which the lamps and LEDs are turned off must be periodically output. That is, when the CPU 501 mounted on the main board 500 does not need to output an operation signal, it must periodically output an operation stop signal. Therefore, the load on the CPU 501 is large, and the processing speed of the CPU 501 decreases. There was a problem.

[0006]

Therefore, the present inventor has proposed:
In order to reduce the load on the CPU mounted on the main board, a payout board for controlling the payout of prize balls, a special symbol display device, a lamp control device for controlling various LEDs and lamps, and a voice control device for controlling various sounds. In addition, a configuration is considered in which a sub-board is provided for each function, and a sub-CPU is mounted on each of the sub-boards. Then, a control command is transmitted from the main CPU mounted on the main board to each sub CPU, and each sub CPU analyzes the control command transmitted from the main CPU and performs a corresponding operation based on the analysis result. (Figure 3
See).

In the new system, the main CPU mounted on the main board sends one control command to each of the sub-CPUs mounted on the payout board, the special symbol display device, the lamp control device and the voice control device. . Each sub CPU
Executes a process for activating a series of games corresponding to the one control command. That is, the main CPU executes the series of games (for example, one variation of the special symbol,
Only a control command for designating one pattern of lamp lighting and extinguishing and one part voice) is sent, and the actual control is left to each sub CPU, so that the burden is reduced. Further, the control command is not newly transmitted until a series of games is completed.

By the way, in general, when power is supplied by turning on the power, the CPU is inoperable until each power supply driving voltage (DC) rises to a predetermined set voltage. After a reset and a reset release and a check of the contents of the ROM by the built-in logic, a start-up state is established. For this reason, in the development stage of the above-mentioned new system, the main board and each sub-board may have variations in electronic components used for each board, and each CPU may have a different processing time for initial setting. As a result, it was found that there is a possibility that not all of them are started at the same time when the power is turned on.

That is, if a sub-board whose activation is early and a sub-board whose activation is late are mixed with respect to the activation time of the main board, or if the activation of the main substrate is shifted with respect to each sub-substrate, the sub-board whose activation is slow is A part or all of the control command from the main board or the data related to the payout of the prize ball fails to be received, so that the start-up is early and the matching with the sub board successfully received cannot be achieved.
For example, if the sub-board that starts up slowly with respect to the main board is a payout board that controls prize ball payout, and the sub-board that starts up quickly is a board for lamp display that turns on an LED, etc. In this case, even if there is a prize immediately after the power is restored, only the LED or the like is turned on and the prize ball is not paid out, thereby giving a disadvantage to the player.

Further, in the new system, as described above, a series of games is commanded by one control command. Therefore, a series of games on the sub-board in response to the control command sent to the sub-board immediately before power-off is performed. Is often cut off on the way. In the case of a gaming machine that takes such power outages into consideration,
Backup means is required to store the state of the game when the power is cut off and to restart the game based on the storage when the power supply is restored. As for the game stored by the backup means, it is desirable to store a game state immediately before power-off. As a result, the game states resumed at the time of return match, and continuity of the game is obtained.

[0011] However, the backup means considered in the above-mentioned new system can store the contents of a game in control command units, but if the power is cut off during a series of games, the immediately preceding game It has been difficult to memorize the state and resume from the gaming state when the power is restored. That is, there is a problem that continuity without duplication of games on one sub-board cannot be ensured.

[0012] Even if the restart game state at the time of power return can be made to match the stop game state at the time of power shutdown, the timing of activation of the sub-board relative to the main board at the time of power return is different. Then, the progress of the plurality of games by the respective sub-boards loses synchronization, and the player feels uncomfortable with the games. The present invention has been made in view of the above-described problems, and when returning from a power supply interruption in progress of a game, a certain continuity with the state at the time of power supply interruption is obtained in the resumed game state, and It is an object of the present invention to realize a gaming machine and a recording medium capable of securing the synchronization of the progress of the game.

[0013]

In order to achieve the above object, the present invention has the following features.
The gaming machine according to claim 1, wherein a main board for controlling a game, and one or more machines for executing a predetermined process by executing a predetermined process based on a signal from the main board. A game machine provided with a sub-board, wherein the sub-board is a non-executable part of a series of games according to a command from the main board which was being executed by the sub-board immediately before the power was turned off. The main board is provided with backup means for storing and holding data indicating that, immediately after the power is restored, the secondary board restarts the game from the unexecuted portion based on the data stored and held in the backup means on the sub-board. Technical means is used which comprises game restart control means for sending a prompting operation start signal. 2. The gaming machine according to claim 1, wherein the main board sends a command designating a series of games to the sub board, and the sub board decodes the command and causes the gaming machine to execute a series of games according to the command. .
If a power interruption such as an abnormal drop in the power of the gaming machine or a power failure occurs during the series of games, the sub-board uses the backup means to store data indicating an unexecuted portion of the series of games executed immediately before the interruption. Remember. When the power is restored, the main board performs its own preparation processing and then sends an operation start signal to the sub-board. Before receiving the operation start signal, the sub-board to which the operation start signal has been sent is
Other than performing necessary preparation processing such as initial setting, processing relating to the progress of the game is completely prohibited. When the operation start signal is received from the main board, the game is restarted from the state based on the data stored and held by the backup means. As a result, the restarted game is restarted from the game state when the power is turned off, and a certain continuity can be secured between the game state when the power is turned off and the restarted game state.

According to a second aspect of the present invention, in the gaming machine according to the first aspect, as the data stored and held by the backup means, a series of data executed on the sub-board immediately before the power supply is cut off. A technical means is used which comprises the same command as a command designating a game and the elapsed time or remaining time of the series of games according to this command. In the gaming machine according to the second aspect of the present invention, the sub-board may execute the same command as the command executed immediately before the power is turned off, without newly creating a command indicating an unexecuted portion. The data including the elapsed time or the remaining time of a series of games, which means, may be stored by the backup means. The elapsed time and the remaining time are time data, and can be easily counted by the built-in timer of the sub-board.

According to a third aspect of the present invention, in the gaming machine according to the first or second aspect, the game resuming control means sends an operation stop signal from the main board immediately before the power supply is cut off. Technical means is used to cause the sub-board to define the time length of the unexecuted portion. 4. The gaming machine according to claim 3, wherein the sub-board, which has received the operation stop signal from the main board immediately before the power is turned off, sets the elapsed time of a series of games based on the command executed immediately before the power was turned off. Alternatively, the remaining time can be stored by being stopped by an operation stop signal for the built-in timer. By using this operation stop signal, the elapsed time or the remaining time of each board is precisely aligned, particularly in a gaming machine having a plurality of sub-boards. Therefore, the state of the game in which each sub-board is restarted is synchronized, and the synchronous progress of the game executed by the plurality of sub-CPUs can be reliably guaranteed.

According to a fourth aspect of the present invention, in the gaming machine according to any one of the first to third aspects, when the command is of a specific type, the unexecuted portion includes the series of unexecuted portions. Even in the middle of the game, a technical means of starting from the game state at the beginning of the specific command or slightly before the specific command is used. In the gaming machine according to the above-described Product 4, when a series of games executed at the time of power-off is a specific command type, even if an unexecuted part is in the middle of the series of games, the gaming machine at the beginning of the series or By starting from the gaming state slightly earlier than that, for example, in the case of a series of games by the fluctuation command of the reach symbol, it is possible to resume from the beginning of the reach symbol or the gaming state slightly earlier than the reach symbol, Has the effect of increasing

According to a fifth aspect of the present invention, in the gaming machine according to the third or fourth aspect, the main board sends the operation start signal and the operation stop signal as a parallel signal composed of predetermined bits. Use means.
In the gaming machine according to the fifth aspect, by transmitting the operation start signal and the operation stop signal to the sub-board as parallel signals, the game can be restarted after the sub-board is activated in a shorter time. And the time burden on the main board can be reduced.

According to a sixth aspect of the present invention, there is provided a gaming machine comprising: a main board for controlling a game; and one or more sub-boards for executing a game by executing a predetermined process based on a signal from the main board. Is a recording medium on which a computer program for causing a computer program to function is executed, and an unexecuted portion that cannot be executed in a series of games according to a command from the main board that was being executed by the sub board immediately before the power was turned off. A backup process for storing and holding the indicated data, and restarting the game from the unexecuted portion based on the data stored and held by the backup process when the sub-board receives an operation start signal from the main board when the power is restored A technical means of a recording medium on which a computer program for executing the game restart control process to be executed is recorded is used. In other words, in gaming machines that control games by computer,
As described in an embodiment of the invention described below, for example,
The backup process can be performed by the PU 32e executing the computer program recorded in the ROM 32i, and a game from an unexecuted portion based on the data stored and held by the backup process is started from the main board. Claims 1 to 3 can execute a game restart control process of receiving and restarting a signal.
5 can be performed.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a gaming machine according to the present invention will be described below with reference to the drawings. In the following embodiments, a first-type pachinko machine will be described as an example of a gaming machine according to the present invention. This embodiment is defined in claims 1 and 2.
And 5 are realized. [Overall Main Configuration] First, the main configuration of the pachinko machine according to this embodiment will be described with reference to FIG. Figure 1
1 is an explanatory perspective view of a pachinko machine according to this embodiment. The pachinko machine 10 is provided with a front frame 11 that can be opened and closed by a hinge 19, and a glass frame 13 is attached to the front frame 11 so that it can be opened and closed. On the right side of the front frame 11, a keyhole 12 for inserting a key for opening and closing the glass frame 13 is provided. A game board 14 is provided inside the glass frame 13.
A firing handle 15a for operating a firing motor (indicated by reference numeral 15e in FIG. 3) for firing game balls to the game board 14 is rotatably attached to the lower right of the front frame 11. ing.

Below the glass frame 13, there is formed a prize ball / lending ball supply port 20a to which a prize ball / lending ball is supplied. An upper tray 20 for storing the prize balls and the lending balls supplied from the prize ball / lending ball supply port 20a is attached. Upper saucer 2
Below 0, there is formed an outlet 21a for discharging a prize ball that has flowed past the number of upper trays 20 that can be accommodated or a game ball discharged from the upper tray 20 by operating the upper tray ball pulling lever 20b. I have. On the discharge side of the discharge port 21a,
A lower tray 21 is provided for accommodating game balls discharged from the discharge port 21a. The ashtray 17 is provided on the left side of the lower tray 21.

[Main Configuration of Game Board 14] Next, the game board 1
4 will be described with reference to FIG. A center case 30 is provided substantially at the center of the game board 14. The center case 30 has a prize entrance 31
And a normal symbol display device 34 including three LEDs, and 4 indicating the number of times the normal symbol display device 34 is operated.
A normal symbol storage display LED 35a consisting of three LEDs,
A special symbol display device 3 that variably displays a plurality of symbols, for example, 0-9 special symbols, on a special symbol display 32b on a liquid crystal display.
2, and a special symbol storage display LED 36a composed of four LEDs for displaying the number of times that the special symbol display device 32 can be started (special symbol start storage number).

On the left and right sides of the center case 30, there are ordinary symbol operation gates 2 for operating the ordinary symbol display device 34.
6, 26 are provided. Below the center case 30, a first type starting port 27 having a function of operating the special symbol display device 32 is provided. Below the first type starting port 27, a stop symbol of the ordinary symbol display device 34 is provided. Ordinary electric accessory 28 that opens both wings when hit
Is provided. The opened ordinary electric accessory 28 has a function of starting the operation of the special symbol display device 32, similarly to the first type starting port 27. A variable winning device 40 which is activated when the stop symbol of the special symbol display device 32 hits the symbol is provided below the ordinary electric accessory 28.

The variable winning device 40 is provided with a large winning opening 41 in the form of a door which is opened when a hit occurs. The winning winning opening 41 can be opened and closed. Are provided respectively. Further, inside the special winning opening 41, there is provided a specific area 42 having a function of continuously opening the special winning opening 41, and a specific area switch (reference numeral 42 in FIG. 3) for detecting a game ball passing through the specific area 42.
a) and a special winning opening switch (indicated by reference numeral 43a in FIG. 3) for counting the number P of game balls that have won the special winning opening 41.

In addition, the game board 14 includes a rotary windmill 2
3, 23, fixed right windmill 325, left windmill 326,
A right sleeve winning port 24, a left sleeve winning port 25, and an out port 45 for collecting game balls that have not won as an out ball are provided. Also, the game board 14 is provided with various lamps such as a right corner decoration lamp 321a composed of three LEDs, a left corner decoration lamp 322a composed of three LEDs, a right side decoration lamp 314a, and a left side decoration lamp 315a. ing. Further, many nails 47 are driven into the game board 14, and the game balls fired on the game board 14 fall while disturbing between the nails 47. In addition, one LED of the left corner decoration lamp 322a is
It is a ball out lamp 322b which lights up when the ball is out.

[Electrical Configuration of Pachinko Machine 10] Next, the electrical configuration of the pachinko machine 10 will be described with reference to FIG. The pachinko machine 10 is provided with a main board 100, on which a microprocessor 110 is mounted. The microprocessor 110 includes a main CPU 112 that executes game control (mainly various controls such as management of paying out balls and prize balls, jackpot determination, and management of special symbol variation patterns), and the main CPU 112 as described later. ROM 114 in which various control programs for executing various controls including the control according to the present invention are recorded, and control programs read from ROM 114 when main CPU 112 executes various control programs and data relating to big hits generated during a game. And a RAM 116 for temporarily storing various data such as data.

The following components are electrically connected to the main substrate 100. Power supply board 80, payout control board 200 for controlling payout of award balls, etc., special symbol display device 3
2, a lamp control device 300 for controlling a lamp and an LED provided on the game board 14, a voice control device 79 for controlling a sound effect during a game, and the like, and a first device for detecting the passage of the game ball through the first type starting port 27. Seed starting port switch 27a, a game frame information terminal board 52, a board relay board 51, and a game frame relay for transmitting game board information relating to winnings, big hits, and the like to a computer (not shown) provided in a pachinko hall management room or the like. The substrate 53.

The payout control board 200 is provided with a microprocessor 210 which operates by inputting a control command sent from the main board 100. The microprocessor 210 has a sub CPU 2 which controls payout of award balls and the like.
12 and an RO in which various control programs for the sub CPU 212 to execute control such as payout of award balls are recorded.
M214 and a RAM 216 for temporarily storing a control program read from the ROM 214 when the sub CPU 212 executes various control programs and various data such as the number of prize balls generated during the game are mounted. The payout control board 200 includes a power supply board 80 and a CR connection board 5.
6. The firing motor drive board 15c for driving the firing motor 15e, the game frame information terminal board 52, and the payout relay board 55 are electrically connected.

The game frame relay board 53 has a full detection switch 2 for detecting that the lower tray 21 is full of prize balls.
1b and the sensor relay board 54 are electrically connected. The sensor relay board 54 is electrically connected to the prize ball payout sensors 62a and 62b and the payout relay board 55 provided in the prize ball unit 62. Prize ball unit 62
Is provided with prize ball payout sensors 62a and 62b and a prize ball payout motor 62c. There are two prize ball payout mechanisms for efficiently paying out prize balls, and each payout mechanism is driven by a prize ball payout motor 62c. The prize ball payout sensor 62a is provided in one mechanism, and the prize ball payout sensor 62b is provided in the other mechanism. The detection signals from the prize ball payout sensors 62a and 62b are transmitted from the sensor relay board 54 to the main board 1 via the game frame relay board 53.
00 to the payout control board 200 via the payout relay board 55. Then, the sub CPU 212 mounted on the payout control board 200 takes in the detection signals sent from the prize ball payout sensors 62a and 62b, and counts the number of prize balls paid out. For example, sub CPU2
12 subtracts “1” from the value of the area in the RAM 216 storing 15 payout balls every time the detection signal is taken.

The payout relay board 55 is electrically connected to a ball-off switch 61 for detecting that the ball is no longer available, a prize-ball payout motor 62c, and a ball-for-ball unit 63. The following components are electrically connected to the board relay board 51. Ordinary electric accessory solenoid 28a for opening and closing the ordinary electric accessory 28, ordinary symbol display board 34, gate switch 26 provided on the ordinary symbol actuation gate 26
a, a special winning opening switch 43a, a sleeve winning opening switch 24a detecting a winning in the sleeve winning opening 24, a lower winning opening switch 29a detecting a winning in the lower winning opening 29, and detecting a winning in the natural winning opening 31. The winning opening switch 31a and the winning opening relay board 50.

A special winning area solenoid 42b, a special winning area solenoid 43b, and a specific area switch 42a are electrically connected to the special winning opening relay board 50. The power supply board 80 is electrically connected to the CR connection board 56,
The CR connection substrate 56 is electrically connected to the pachinko machine external device portion 22 including a frequency display substrate for displaying the remaining frequency of the prepaid card and a device for reading the prepaid card. The power supply board 80 is AC24V (50 Hz
/ 60 Hz) from the main power supply 70. Normally, the power supply board 80 derives 12V and 5V drive power supply voltages to the main board 100, the payout control board 200, the special symbol control board 32d, the voice control device 79 and the lamp control device 300.

The power supply board 80 includes a RAM 116 on the main board 100, a RAM 216 on the payout control board 200, a RAM 32h in the special symbol display device 32 (see FIG. 4), a voice control R in device 79
AM (not shown) and RAM in lamp control device 300
Voltage supply means 81 to 84 (power supply lines) for supplying a drive power supply voltage for maintaining each backup area in a storage holding state (not shown) are provided. These voltage supply means 81 to 84 supply a drive power supply voltage of, for example, 5 V even while the power supply is shut off by the voltage holding function of the capacitor.

As shown in FIG. 4, the special symbol display device 32 controls the control command signal 100a from the main board 100.
, A special symbol control board 32d for generating a symbol signal in the RGB format based on the above, a liquid crystal analog board 32c, a liquid crystal inverter board 32a, and a special symbol display 32b.

As shown in FIG. 4, the special symbol control board 32d includes a sub CPU 32e, a program ROM 32f, a backup RAM 32j, and a pallet RAM 3j.
A video display processor (VDP) 32g containing 2h and a character ROM 32i are provided. The sub CPU 32e receives the signal 100 from the main board 100.
a (image control command) is analyzed by a computer program recorded in the program ROM 32f, and the design or character of the display content according to the result is displayed on the VDP3.
Output to 2g. VDP32g is the character R
The palette RAM 32h is driven for the symbols and characters read from the OM 32i to execute processing such as display color, rotation, enlargement and reduction, and the processing results are temporarily stored in the built-in palette RAM 32h. Then VDP 32g
Sends RGB signals to the liquid crystal analog board 32c based on the processing results stored in the pallet RAM 32h. The liquid crystal analog board 32c performs color correction and brightness adjustment of the captured RGB signals, and sends the signals to the liquid crystal inverter board 32a. LCD inverter board 32a
Plays a role of a backlight power supply, boosts the taken signal (for example, from 12 V to 600 V), and sends it to the special symbol display 32b. The special symbol display 32b switches and displays the liquid crystal dots corresponding to the captured signal. As a result, the special symbol control board 32d performs a series of games, such as a special symbol change display, a stop symbol display, an animation display, and a big hit display. The backup RAM 32j stores and holds the image control command sent from the main substrate 100 immediately before the power is turned off under the supply of the drive power supply voltage from the voltage supply means 81.

Although not shown, the voice control device 79 and the lamp control device 300 are each also provided with a microprocessor having a central processing function and a storage function which are dependent on the main CPU 112 of the main board 100. Yes, one part (series) of sound or one pattern (series) of lamps are turned on and off by a control command from the main board 100.

[Signal sent from main board to sub-board] FIG. 5 shows a timing chart of a control command (for example, a prize ball control command) sent from the main CPU 112 to each sub-CPU. As shown in FIG. 5A, the main CPU 112
A control command expressed in a hexadecimal machine language, for example, HD0 to HD7 is transmitted by two sequential transfer signals HDSTR in FIG.
The format shown in (B), that is, two bytes are transmitted to the sub CPU in byte units. For example, main CPU1
Among the control commands output from the sub-CPU 212 of the payout control board 200 to the payout control board 200, control commands for instructing 15 payout numbers are represented by, for example, 3FH to C1H, and control commands for instructing 5 payout numbers are, for example, 35H to CB
H. Further, the control command for instructing the change of the special symbol is represented by, for example, E1H to 00H. FIG.
As shown in (A), a transfer signal (strobe signal (HDSTR)) is output together with the control command, and the sub CPU captures the control command when the transfer signal HDSTR is input.

In this embodiment, the main substrate 100 is
An operation start signal is sent to a sub-board such as the special symbol control board 32d. This operation start signal is also transmitted as a 2-byte signal together with the transfer signal HDSTR, similarly to the control command. The transmission timing is at the time of power return as described later.

Next, the flow of the above control command will be described with reference to FIG. 6 as a representative example of the signal 101 (signal 100a in the case of the special symbol control board 32d) to the sub CPU 212 of the payout control board 200. As shown in FIG.
The prize ball control command that is normally output from 2 is:
The prize ball control command is output to the output port 120 via the main CPU bus 118, and is output to the main CPU 11
Output buffer 1 via the parallel output port 124
26, and then temporarily stored in the input buffer 220 connected to the sub CPU 212. The transfer signal output from the main CPU 112 is
U bus 118 to output port 122, output buffer 12
8 and the trigger input (TRG2) 226 of the sub CPU 212 via the input buffer 222, the prize ball control command stored in the input buffer 220 is
Sub CPU 212 via PU parallel input port 228
Is input to the input port 224 of the
The PU 212 executes a command input process.

Sub CPU 32e of special symbol control board 32d
100a (image control command), a lamp control command to the sub CPU of the lamp control device 300, and a voice control command to the sub CPU of the voice control device 79 (hereinafter, these are referred to as each sub CPU). In the same manner as described above, the parallel output is
32e is input in parallel. [Normal Operation After Starting Normal Power] (Main Processing of Main Substrate 100) FIGS.
FIG. 7 is a diagram for explaining a normal operation performed by the main CPU 112 at the time of power-on. FIG. 7 is a flowchart showing the entire operation of the main CPU 112, and FIG. 8 is a time chart at the time of power-on and power-on. When the main power supply 70 is turned on at the time of opening the store, the main CPU 112 first executes a step (hereinafter referred to as S
(Abbreviated as 10). The preparation process S10 includes reset and reset release, security check, and the like. The security check is a self-diagnosis function for inspecting the logic circuit built in the main CPU with the contents of the ROM.

After execution of S10, the main CPU 112 is activated, and S11 [timer start], S12 [T ≧
Ta] and S13 [operation start signal output]. In this operation start signal output processing, S11 sets a time Ta in a built-in timer to start a count operation. As shown in FIG. 8, the time Ta is set to a value (Ta> Th) that is longer than the delay time Th of the sub CPU whose activation is the slowest with respect to the main CPU 112. Then, a timer operation for the time Ta is performed in next S12. That is, as shown in the processing time series of the main CPU and the slowest-starting sub-CPU shown in FIG. 8, the CPU waits for the start-up of the slower sub-CPU (the state after the completion of the preparation process). In addition,
This operation start signal output processing is also executed at the time of power return later, and the operation start signal output processing at the time of power return is defined as game restart control means in the present invention.

As shown in FIG. 7, when the main CPU 112 counts up the time Ta, it executes the next step S13 and sends an operation start signal to the sub CPU 21 at the timing of the transfer signal HDSTR.
2 and each sub CPU. The operation start signal is shown in FIG.
This is a signal transmitted on the same line as the command described in (A) and (B). The operation start signal is represented in hexadecimal notation as “0FDH0FH” as shown in FIG.
Since it is composed of two bytes, a transfer signal is output for each byte.

At this time, as shown in FIG. 8, the slowest activation sub CPU has completed its own preparation processing after the elapse of the time Th, and is waiting for the input (reception) of an operation start signal. The processing time series of the sub CPU shown in FIG.
FIG. 9 is a flowchart showing the equivalent processing of FIG.
It is. As shown in FIG. 9, when the power is turned on, each sub CPU performs a preparation process S1 such as reset, security check, and user reset. Then, each sub C
PU sets S2 [Operation start signal received? As shown in FIG.
The operation wait signal input of the processing time series shown in FIG. This state is a kind of interrupt disabled state in which no signal other than the operation start signal is received. When the operation start signal is received (Yes in S2), the normal processing, that is, FIG.
S3 (command input process) is possible.

When the power is turned on, the main CPU 112 and each sub C
As described below, the continuity of the game executed by one sub CPU is ensured at the time of the return after the power is turned off, assuming that the PU and the PU transmit and receive the operation start signal first. In addition, the synchronous progress of the game executed by the plurality of sub CPUs is ensured.

After outputting the operation start signal in S13 (FIG. 7), the main CPU 112 executes the following processing shown in S14 to S90 in FIG. The sub CPU 2 of the payout control board 200 based on signals from various winning opening switches
12 to output a winning ball control command to the winning ball processing (S2
0). Turn ON / OFF the normal electric accessory solenoid 28a
Normal electric accessory processing (S30). Normal symbol processing for controlling the normal symbol display device 34 (S40). Big hit determination processing (S50) for determining whether or not a big hit occurs when the first-type starting port switch 27a is turned on. Special symbol display device 32
Design processing to output image control commands to the
0). Special winning opening processing for controlling the specific area solenoid 42b and the special winning opening solenoid 43b (S70). Voice processing for outputting a voice control command to the voice control device 79 (S80). Lamp processing for outputting a lamp control command to the lamp control device 300 (S90).

(Processing of Each Sub-Board for Command) The sub-CPU 21 of the payout control board 200 corresponding to the above-mentioned prize ball processing
2 performs a preparation process such as an initial setting and a security check similarly to the main board 100 after the normal power supply is started, and then performs a program start process first. The program start process prohibits an interrupt, prepares a stack pointer holding the address of the main routine when shifting from the main routine to the subroutine, and permits the interrupt. After this program start processing, the process shifts to the main program. The main program is executed by the CTC channel 3 interrupt. Thereby, the payout control board 2
00 pays out prize balls every time a prize ball control command is transferred using the transfer signal HDSTR as an interrupt signal.

The special symbol control board 32d, the lamp control device 300, and the audio control device 79, for example, the sub CPU 32e of the special symbol control board 32d (hereinafter, collectively referred to as each sub CPU) are activated after the normal power supply is turned on. After the initial processing, security check, and other preparation processing are performed in the same manner as the main board 100, the apparatus enters a command input waiting state.

FIG. 10 is a flowchart showing the processing (A) of the main CPU 112 and the processing (B) of the sub CPU 32e using the special symbol control board 32d as an example. When the special symbol processing shown in FIG. 10A detects that the special symbol start storage number is 1 or more (S62 in FIG. 10A: Yes),
After determining whether or not a big hit has occurred, a change pattern of a special symbol is set to 1 from a table (not shown) in which the change pattern is set.
(S64), and outputs an image control command (S6).
6) What you do. Further, the main CPU 112 executes S64
The image control command corresponding to the fluctuation pattern determined in is output to the output port 120 (FIG. 6), and the transfer signal is output to the output port 122 (S68). The image control command output to the output port 120 is taken into the input port of the sub CPU 32e via a predetermined path,
The sub CPU 32e executes a command input process (FIG. 10).
(B)).

As shown in FIG. 10B, the sub CPU 32
When e inputs the image control command output from the main CPU 112 (S300), e checks the input image control command (S302). For example, the image control command is distributed to each byte. Then the sub CPU
32e analyzes the content of the input image control command (S304). For example, if the image control command is E0
If it is H00H (hexadecimal notation), it is analyzed as an image control command indicating that all symbols start to fluctuate with a fluctuation time of 9312 ms, and if it is E1H00H, “0” is displayed when the left symbol stops. It is analyzed as an image control command indicating display. And the sub CPU 32e
Converts the display signal corresponding to the analysis result in S304 to V
It is sent to DP 32g (FIG. 4).

FIG. 11 shows the driving power supply voltage (A) supplied to each substrate, the main CPU 112, and the sub C of the payout control substrate 200.
PU212, sub CPU32 of special symbol control board 32d
3E is a time chart illustrating the operation states of the sub CPU of the voice control device 79 and the sub CPU of the lamp control device 300. As shown in FIG. 11B, the main CPU 112
The award ball control command H is sent to the PU 212, and each sub CPU
Control commands Q1 to Q4. The control commands Q1 to Q4 are a group of effect data having continuity. Further, the control commands Q1 to Q4 are image control commands Q1V to Q2V to the sub CPU 32e of the special symbol control board 32d.
FIG. 11 (F) (G) (H) contains time-divisional sound control commands Q1A to Q4A and lamp control commands Q1L to Q4L to each of the sub CPUs of Q4V, the sound control device 79 and the lamp control device 300. ), The sub CPU 32d of the special symbol control board 32d, the sub CPUs of the audio control device 79 and the lamp control device 300 respectively control the image control commands Q1V to Q4V and the audio control command Q1A.
To Q4A and the lamp control commands Q1L to Q4L, and perform an effect according to each command. The series of games referred to in the present invention is, for example, Q in the special symbol control board 32d.
1V only, Q2V only, etc.

[Operation at Power-off] (Main CPU 112) When the power-off phenomenon occurs, the main CP
The processing performed by U112 will be described with reference to FIGS. 11 and 12A. FIG. 12A shows the main CPU 1 when the power is turned off.
12 shows the operation performed. When the 12V drive power supply voltage shown in FIG.
U112 transitions to the reset state as shown in FIG. 11B (from high level to low level), and
(Non-maskable interrupt) processing (S4) is performed.
The low-level signal in FIG. 11C indicates an NMI signal for performing the NMI process. In the NMI process performed by the main CPU 112, access prohibition is set in an access register for the RAM 116 (S5), and the NMI process is executed with the highest priority over other interrupt processes. In other words, the main purpose is to prevent the untransferred prize ball control commands stored in the RAM 116 from being rewritten by prohibiting access to the RAM 116. For this reason, the untransferred prize ball control commands are stored and held in the backup area of the RAM 116.

(Operation of Dispensing Control Board and Other Sub-Boards) On the other hand, the dispensing control board 200 has a drive power supply voltage of 12 V shown in FIG. 11 (A) whose falling detection voltage Vdh (Vdh <Vd).
m), the NM decreases as shown in FIG.
After performing the I processing, reset is performed (transition from high level to low level) as shown in FIG. When the 5V drive power supply voltage shown in FIG. 11A falls below the drop detection voltage Vds, each sub CPU inputs a low-level NMI signal to the NMI terminal for a predetermined period as shown in FIG. 11I. Is done. After the input period of the NMI signal, each sub CPU is reset (transition from high level to low level) as shown in FIGS. 11 (F), (G) and (H), respectively.
Is done.

During the input period of the NMI signal, as shown in the flowchart of FIG. 12B, for example, the sub CPU 32e of the special symbol control
Perform I processing S6. In detail, S6 is composed of S61 (NMI signal input) and S63 (Q4V and a signal indicating the time length of the unexecuted portion thereof are stored and held). S6 indicates an input stage of the NMI signal. S63 is a process of storing the image control command Q4V sent immediately before power-off and the elapsed time Tkv of a series of games according to the command in the backup area of the RAM 32j. The elapsed time Tkv of a series of games indicated by the image control command Q4V can be recognized from the value of a built-in timer or a built-in counter. The remaining time Tn may be stored instead of the elapsed time Tkv. The remaining time Tn may be recognized from the value of a subtraction type built-in timer or built-in counter, or may be subtracted from the total time of a series of games known. By the way, the control command of the symbol fluctuation pattern 1 is “0E0H, 00” in hexadecimal.
H, and the total elapsed time is “0FEH, 3
It is 9312 ms at "0H". Assuming that the power supply shuts down after the lapse of 2 seconds during execution of this control command, "0FE
H, 32H "may be stored.

As described above, each sub CPU is configured as shown in FIG.
As shown in (H), the image control command Q4V, the voice control command Q4A, and the ramp control command Q4V sent immediately before the power is turned off, and the elapsed time T of a series of games according to the commands.
kv (TkA: in the case of the sub CPU of the voice control device 79, TkL: in the case of the lamp control device 300) and the voltage supply means 81 to
The data is held in the backup area of each RAM under the backup of the drive power supply voltage by the 83.

[Operation at Power Return] (Main CPU 112) When the power is restored, for example, FIG.
The drive power supply voltage of 12V shown in FIG.
To rise more. After that, the main CPU 112
As shown in (B), for example, a reset release state is set at time t1. After the reset is released, the main CPU 112 is activated, and the operation after the normal power supply is started (S11 in FIG. 7).
To S13 and FIG. 8), that is, the game restart control process (means) according to the present invention. In FIG. 11B, the operation start signal is represented by Xs, and indicates that it is sent to each sub-board.

(Operation of Payout Control Board and Other Sub-Boards) When the power is restored, the payout control board 200 is
The drive power supply voltage of 12V shown in FIG.
After ascending further, a reset release state is set. Vuh is set to a value smaller than Vum.
“0” is activated earlier than the main substrate 100. In the payout control board 200, in this embodiment, the winning data is backed up in the winning table of the RAM 216 by the voltage supply means 84. Therefore, the payout control board 200
When the operation start signal Xs from the main CPU 112 is received, the payout starts.

Each of the sub-substrate CPUs is connected to the sub-board CPU 5 shown in FIG.
When the drive power supply voltage of V rises above the rise detection voltage Vus,
After that, the state of the reset is released. After reset release,
Each of the sub-substrate CPUs determines the main CP according to the flowchart of FIG.
Wait for the operation start signal Xs to be transferred from U112.
Upon receiving the operation start signal Xs, the sub CPU 32e of the special symbol control board 32d reads and executes the data indicating the unexecuted portion stored in the backup RAM 32j by S6 (backup means) in FIG. 12B. In the case of the sub CPU 32e of the special symbol control board 32d,
Since the control command of a series of games (fluctuations) executed immediately before power-off is Q4V, this command Q4V and its elapsed time Tkv are read and analyzed, and the game is executed based on the result. That is, the change of the special symbol after the power is restored can be restarted from the state at the time of the power shutdown.

The sub CPUs of the voice control device 79 and the ramp control device 300 transmit the voice control command Q4A and the elapsed time TkA of a series of games according to the voice control command Q4A and the ramp control commands Q4V and TkL. Is read and analyzed, and the operation is resumed from the state at the time of power-off. Thus, when each sub-board CPU is brought into the starting state after the power is restored, the game is restarted from the state at the time of power shutdown, and the continuity between the game state at the time of power shutdown and the resumed game state is maintained. Can be.

[Effects Specific to Embodiment] In this embodiment, in particular, as shown in FIGS. 11F to 11H, the main board 100 is a sub CPU 32e of the special symbol control board 32d.
Sub CPU of the sound control device 79 and the lamp control device 30
The operation start signal Xs is sent to the three sub CPUs including the zero sub CPU, and after the power is restored, the fluctuation of the symbols, the display of the lamp, and the output of the sound can be resumed in a simultaneous relationship. Therefore, the progress of a plurality of games by each sub-board has synchronization, and the game does not feel uncomfortable.

In the time chart of FIG. 11, each of the sub-boards, the payout control board 200 and the main
The start-up is performed in the order of 00, but by using a signal indicating the start of operation called an operation start signal, there is an effect that such a design constraint does not need to be provided. Further, in the present embodiment, the operation start signal transmitted from the main CPU 112 is transmitted to each of the sub-CPs such as the sub-CPU 32e.
Since the data is input in parallel to U, the time burden on the main CPU 112 is reduced (an effect corresponding to claim 5).

[Other Embodiment 1] (Main Substrate) FIGS. 13 and 14 show a third embodiment of the present invention.
13 is a flowchart according to another embodiment, in which FIG. 13 is a flowchart corresponding to FIG. 12, and FIG. 14 is a time chart corresponding to FIG. In FIG. 14, the time axis when the power is turned off is larger than the time axis when the power is restored to make the operation clearer, and the rise and fall characteristics of each drive power supply voltage are different. Only. A feature of this other embodiment is that the main CPU 112 sends out an operation stop signal Xe as a game restart control means (process) of the present invention when the power is turned off. That is, FIG.
The drive power supply voltage of 12V shown in FIG.
′, The main CPU 112 outputs the operation stop signal X
e is sent to each sub CPU (S8 in FIG. 13). here,
Vdm 'needs to be detected earlier in time than the fall detection voltage Vdm of the previous embodiment, and Vdm'> Vdm is set. After sending the operation stop signal Xe, the main CPU 112 executes NMI processing and RAM by S4 and S5 as in the previous embodiment.
Set the access prohibited state and wait for the power to return. Also, as in the previous embodiment, the processing of the main CPU 112 when the power is restored also includes the preparation processing of S10 in FIG.
The game restart control means (process) consisting of S13 is executed.

(Each Sub-Board) Sub-CP of Discharge Control Board 200
The process when the power is turned off and the process in U212 are the same as those in the previous embodiment. Sub CPU 32e of special symbol control board 32d
As shown in the processing from S9 (reception of operation stop signal) to S6 (backup means) in FIG. 14 (F) and FIG. 13, after receiving the operation stop signal Xe sent from the main CPU 112 at the time of the power supply cutoff, , NMI signal (S61)
Thus, the image control command Q4V and a signal indicating the time length of the unexecuted portion are stored and held in the backup RAM 32j (S63). The same applies to the other sub-substrates. That is, in the present embodiment, each sub-substrate does not perform the NMI process unless it receives the operation stop signal Xe from the main CPU 112.

The advantage that each sub CPU receives the above-mentioned operation stop signal Xe when the power is cut off is, for example, that the special symbol control board 32
This is because in d, the time length of the unexecuted portion of the image control command Q4V can be easily specified accurately and in synchronization with other sub-boards while maintaining synchronization. That is, immediately before the power is cut off, the operation stop signal Xe from the main CPU 112 is transmitted to the sub CPU
When the sub CPU 32e receives the operation stop signal Xe, the sub CPU 32e instantly stores the elapsed time of a series of games based on the image control command Q4V being executed immediately before the power is turned off by using a built-in timer or the like. . This storage timing can be aligned between the sub-boards. On the other hand, in the previous embodiment, the process of S63 is
Although the MI signal is used as a trigger, when an NMI signal is used as a trigger, the built-in timers do not have a common time axis due to the difference in the fall of the driving power supply voltage of 5 V, and the state of the game to be backed up is time-dependent. There is a risk of deviation.

However, in this embodiment, the operation stop signal X
e serves as a soft stopper means common to the sub-boards, and the state of the game to be backed up does not shift between the sub-boards. (Effect of Other Embodiment 1) According to the present embodiment, the time length of the non-executed portion of each sub-board is determined by using the operation stop signal sent from the main board, so that the restart game state can be obtained. Can be stored in a state in which the synchronism is further ensured, and after the power is restored, the change of the symbol, the display of the lamp, and the output of the sound can be resumed with a strict simultaneous relationship. Also, by inputting the operation stop signal to each sub CPU in parallel, the main CPU 112 can send the operation stop signal without any time burden even in a short time of power-off.

[Other Embodiment 2] As an embodiment for realizing claim 4, the control command sent at the time of power-off is as follows:
For example, in the case of a reach symbol change command, it is preferable to restart from the beginning of the reach symbol or a game state slightly earlier than the reach symbol. In the case of a production in which the jackpot has an expectation, ignoring the continuity in this way and restarting the design with the expectation again has an effect of increasing the interest of the game.

[Correspondence Relationship between Claims and Embodiments] The backup means according to claim 1 comprises the voltage supply means 81 to 84 of FIG. 3, the RAM of each sub-board, and S6 of FIG. Have been. The game resumption control means includes S11 to S in FIG.
13 corresponds. The data indicating the unexecuted portion is stored and held, for example, in S63 of FIG. 12, and includes, for example, the image control command Q4V and the elapsed time Tkv of a series of games according to the command. The game resuming means according to the third aspect is shown in FIG.
S11 to S13 and S8 in FIG.
The means for transmitting the data according to claim 5 as a parallel signal consisting of predetermined bits includes a main CPU 1 in FIG.
This is realized by parallelizing the twelve outputs. The recording medium according to claim 6 is a recording medium on which a processing program for executing the game resumption control means and a processing program for executing the backup means are recorded, and for example, the processing program for executing the game resumption control means is mainly The processing program for executing the backup means can be stored in the ROM 114 of the board, respectively, in the ROM of the sub-board.

[Brief description of the drawings]

FIG. 1 is an explanatory perspective view of a pachinko machine according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a main configuration of a game board 14 provided in the pachinko machine 10 shown in FIG.

FIG. 3 is an explanatory diagram showing an electrical configuration of the pachinko machine 10 by blocks.

FIG. 4 is an explanatory diagram showing an electrical configuration of a special symbol control device provided in the pachinko machine of the embodiment according to the present invention.

FIG. 5A is a timing chart illustrating a control command sent from the main CPU 112 to each sub CPU, and FIG. 5B is an explanatory diagram illustrating a format of the control command.

FIG. 6 is an explanatory diagram showing a hardware configuration between a main CPU and a sub CPU.

FIG. 7 is a flowchart showing the operation of the main CPU.

FIG. 8 is a time chart for explaining the timing at which the main CPU 112 of the present invention sends out an operation start signal.

FIG. 9 is a flowchart illustrating a process in which the sub CPU according to the present invention receives the operation start signal.

10A and 10B are explanatory diagrams of a special symbol process, wherein FIG. 10A is a flowchart showing a process performed by a main substrate, and FIG.
It is a flowchart which shows the process which U32e performs.

FIG. 11 shows a drive power supply voltage supplied to each substrate and a main CPU.
112 is a time chart showing the operation states of the sub-CPU 212 of the payout control board 200 and each sub-board,
(A) is a voltage waveform indicating a drive power supply voltage supplied to each substrate, (B) is an operation state of the main substrate, and (C) is an NM of the main substrate.
(D) is the NMI of the dispensing controller board
(E) is the operating state of the payout control board, (F) is the operating state of the special symbol control board, (G) is the operating state of the voice control board, (H) is the operating state of the lamp control board, (I) shows the NMI timing of each sub-board of the special symbol control board, the voice control board, and the lamp control board.

FIGS. 12A and 12B are explanatory diagrams of special symbol processing according to the representative embodiment of the present invention, wherein FIG. 12A is a flowchart illustrating processing performed by a main board, and FIG. 12B is a flowchart illustrating processing performed by a sub CPU 32e.

FIG. 13 is a flowchart corresponding to FIG. 12 in another embodiment 1 of the present invention.

FIG. 14 is a time chart corresponding to FIG. 11 in another embodiment 1 of the present invention.

FIG. 15 is an explanatory diagram showing an electric configuration of a conventional pachinko machine by blocks.

[Explanation of symbols]

 10 pachinko machine (game machine) 70 main power supply 80 power supply board 100 main board 112 main CPU 200 payout control board 212 sub CPU 32e sub CPU 216 RAM 32j backup RAM Xs operation start signal Xe operation stop signal

Claims (6)

[Claims] 1. A gaming machine comprising: a main board for controlling a game; and one or more sub-boards for executing a game by executing a predetermined process based on a signal from the main board, wherein the sub-board The non-executable part of the series of games that cannot be executed in accordance with a command from the main board that has been executed by the predetermined sub-board immediately before the power supply that supplies the drive power supply voltage to the gaming machine is cut off. Backup means for storing and holding the indicated data, the main board is provided with an operation start signal for prompting a restart of the game from the unexecuted part based on the data stored and held by the backup means immediately after the power is restored. A game machine comprising: a game resumption control means for sending out. 2. The data stored and retained by the backup means follows the same command as a command specifying the series of games executed on the predetermined sub-board immediately before the power is turned off, and according to the command. 2. The gaming machine according to claim 1, comprising an elapsed time or a remaining time of the series of games. 3. The game resuming control means sends an operation stop signal sent from the main board to the predetermined sub-board immediately before the power is turned off, and sends the unexecuted portion to the predetermined sub-board. 3. The gaming machine according to claim 1, wherein a time length is defined. 4. The sub-board, when the command is of a specific type, even if the unexecuted part is in the middle of the series of games, from the gaming state at the beginning of the specific command or slightly earlier than the specific command. The gaming machine according to any one of claims 1 to 3, wherein the gaming machine is started. 5. The gaming machine according to claim 3, wherein the main board transmits the operation start signal and the operation stop signal as a parallel signal composed of predetermined bits. 6. A computer program for functioning a gaming machine having a main board for controlling a game, and one or more sub-boards for executing a predetermined process based on a signal from the main board to execute the game. A recording medium, which can be executed in a series of games according to a command from the main board executed by the predetermined sub-board immediately before the power supply for supplying the drive power supply voltage to the gaming machine is cut off. A backup process for storing and retaining data indicating an unexecuted portion that has not been executed, and the unexecuted portion stored and retained by the backup process when the predetermined sub-board receives an operation start signal from the main board when the power is restored. A recording medium characterized by recording a computer program including a game resumption control process for resuming a game from.