JP2001224756A - Game machine and recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a game machine which has high ability of dealing with increase in light emitting patterns of LEDs, or the like. SOLUTION: Sub-CPU 306 mounted on a lamp control distribution board 302 inputs lamp control commands from a main board 100 and analyzes data. The result in the analysis is temporarily stored in RAM 308. Then the sub-CPU 306 determines LEDs to be lit on, lighting intervals, lighting time, or the like. Signals corresponding to the determination are sent to the lamp control distribution board 302. Prescribed LEDs connected to the lamp control distribution board 302 are lit on or flashed or lit off. Thus, load on the main CPU can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine for controlling a game by a computer.

[0002]

2. Description of the Related Art Conventionally, as this type of gaming machine, for example, a pachinko machine having an electrical configuration shown in FIG. 19 is known. The CPU 501 mounted on the main board 500 controls and processes the following contents. (1) A lighting / flashing signal is output via the board relay board 510 to control the illumination lamp 513. (2) A light emitting pattern of an LED or the like is determined according to a game state such as occurrence of a big hit, and a signal corresponding to the determined content is output via the board relay board 520 to control the LED board 525. (3) A signal corresponding to the above determination is output from the board relay board 520 via the special winning opening concentrating board 530, and the LED board 535 is output.
Control. (4) A signal is output from the integrated relay board 600 via the external connection terminal board 610, and the LED board 611 is output.
And various lamps 612 are controlled. (5) Determine music and sound effects corresponding to the game state such as when a big hit occurs,
A signal corresponding to the determined content is output to the audio output device 622 via the integrated relay board 600, and the audio output device 622
Control. (6) The signal output from the first-type starting port switch 522 is taken in via the board relay board 520, and the special symbol display device 511 is operated. (7) Winning ball detection switch 521 or six payout detection switches 524
Is received via the board relay board 520, and the payout of the prize ball is performed by the C mounted on the general relay board 600.
Instruct the PU 601. (8) Normal design operation switch 5
The signal output from the board 23 is taken in via the board relay board 520, and the symbol display device 512 is normally operated. (9)
When the jackpot occurs, the signal output from the accessory continuous operation switch 531 is transferred from the special winning opening centralized board 530 to the board relay board 5.
20, a signal is output from the board relay board 520 via the special winning opening concentrated board 530, and the special winning opening solenoid 534 is driven. (10) The signal output from the count switch 532 is captured from the special winning opening concentrated board 530 via the board relay board 520, and the number of winnings to the special winning opening is counted. (11) A signal is output from the board relay board 520 via the special winning opening concentrated board 530 to drive the ordinary electric accessory opening solenoid 533.

(12) The launching device 620 is driven via the integrated relay board 600. (13) A signal output from a detection switch 621 such as a gold frame detection switch or a fullness detection switch is fetched to detect the opening / closing of the gold frame or the fullness of the prize ball. (14) The signal output from the out-of-ball switch 613 is taken in from the external connection terminal board 610 via the integrated relay board 600, and the out-of-ball is detected. (15) Input and output signals from the external connection terminal board 610 to the prepaid card unit 614 via the integrated relay board 600.
(16) Big hit information and the like are transmitted to the host computer installed in the control room of the pachinko hall through the game board information terminal 540. As described above, the CPU 501 mounted on the main board 500 includes the special symbol display device 511,
A series of controls for devices such as a normal symbol display device 512, a normal electric accessory opening solenoid 533, and a special winning opening opening solenoid 534, and a series of lamps such as an illumination lamp 513, various lamps 612, and LED boards 525, 535, and 611. Perform every cycle. That is, each device and lamps are activated and turned on by a signal periodically output from the CPU 501, or maintain an operation stopped state and an extinguished state.

[0004] Further, C
The PU 601 drives the winning ball payout device 623 in accordance with the winning ball payout command output from the CPU 501, and pays out a predetermined number of winning balls. The power supplied from the main power supply 615 is
The external connection terminal board 610 → the general relay board 600 → the main board 500 → the board-side relay boards 510, 520 → the winning opening concentrating board 530 are supplied, and each board is transformed into a required voltage.

[0005]

By the way, as described above, the conventional pachinko machine determines a light emitting pattern of an LED or the like in accordance with a game state such as occurrence of a big hit, and outputs a signal corresponding to the determined content to each panel. The game is enlivened by outputting via the relay boards 520 and 535 and lighting / flashing a plurality of LEDs provided on the LED boards 525, 535 and 611 in a predetermined pattern. However, the display content of the special symbol display device 511 is complicated and diversified, such as the use of a moving image by the special symbol display device 511 to display a story or the display of a story on the background of the special symbol, and accordingly, the LED is accordingly changed. Display patterns tend to increase.
However, as described above, in the conventional pachinko machine, the CPU 501 mounted on the main board 500 controls a plurality of devices such as the special symbol display device 511 and the audio output device 622 in addition to various LEDs. Due to the limited controllability of various LEDs, it has become difficult to respond to the above tendency.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problem, and has as its object to realize a gaming machine having a high processing capability capable of coping with an increase in the number of light emitting patterns of LEDs and the like.

[0007]

According to the present invention, in order to achieve the above object, a light emitting means for receiving a signal and emitting light in a predetermined pattern; A first computer that outputs a command corresponding to the pattern of the above, and a second computer that inputs the command output from the first computer and outputs a signal corresponding to the content of the input command to the light emitting unit. Technical means of having a computer.

That is, the first computer only needs to output to the second computer only a command indicating the pattern in which the light emitting means emits light, and the second computer outputs the command from the first computer. It is only necessary to output a signal corresponding to the content of the issued command to the light emitting means. Therefore, a conventional first computer (CP) which determines in what pattern the light emitting means emits light, outputs a signal corresponding to the determined content, and the like.
Since the load on the first computer can be reduced as compared with U501), the processing capacity of the entire gaming machine can be increased, and therefore, it is possible to cope with an increase in the light emission pattern of the light emitting means.

According to a second aspect of the present invention, in the gaming machine according to the first aspect, when the second computer inputs a command output from the first computer, the second computer executes the command by itself. Technical means for analyzing the input command by interrupt processing in a routine and outputting the signal corresponding to the analysis result to the light emitting means is used.

That is, when the second computer inputs a command output from the first computer,
The second computer analyzes the input command by an interrupt process in a routine executed by itself and outputs a signal corresponding to the analysis result to the light emitting unit. Therefore, the processing speed of the second computer can be increased.

According to a third aspect of the present invention, in the gaming machine according to the first or second aspect, there is provided a prize medium payout means for paying out a prize medium, and the first computer is provided with a predetermined amount. It has a function of outputting a command instructing the payout of the prize medium to the prize medium payout means, and uses a technical means that the second computer does not output a signal to the first computer.

That is, for example, in order to illegally increase the number of prize balls to be paid out, the second computer is modified and the first computer is modified.
The second computer cannot send a signal for rewriting the prize ball data output from the computer to the prize medium payout means even if the second computer attempts to send the prize ball data to the first computer. it can.

According to a fourth aspect of the present invention, in the gaming machine according to any one of the first to third aspects, the first computer prompts the second computer to input the command. The technical means of outputting the command to the second computer together with the transfer signal is used.

That is, since the second computer inputs the command output from the first computer when the transfer signal is input, the second computer periodically transmits the command output from the first computer. Need not be input, other processing can be performed when no command is input.

According to a fifth aspect of the present invention, in the gaming machine according to the fourth aspect, there is provided a storage means for temporarily storing a command output from the first computer, wherein the transfer signal is output. Technical means for outputting the command stored in the storage means to the second computer when the command is issued.

The command output from the first computer is temporarily stored by the storage means, and the stored command is output to the second computer when a transfer signal is output. Therefore, the first computer does not need to periodically output a command until the second computer inputs the command, so that the load on the first computer can be reduced. Also, the command output from the first computer is transmitted to the second
Is output to the second computer, so that the signal by the misconduct is transmitted from the second computer to the first computer by the storage means.
Can be prevented from reaching your computer.

According to the sixth aspect of the present invention, there is provided a light emitting means for inputting a signal and emitting light in a predetermined pattern, a first computer for outputting a command corresponding to the predetermined pattern, and A recording medium on which a computer program for causing a gaming machine including a second computer to input the output command and output a signal corresponding to the content of the input command to the light emitting means to function is recorded. Wherein said second
Recording the computer program for executing the process of inputting the command output from the first computer and outputting a signal corresponding to the content of the input command to the light emitting means. The technical means of the medium is used.

That is, a gaming machine that controls a game by a computer has a CPU that executes a computer program recorded on a recording medium such as a ROM provided in the gaming machine, as described in an embodiment of the invention described later. Since the computer functions when executed, the gaming machine according to any one of claims 1 to 5 can be realized by using a recording medium such as a ROM in which the computer program is recorded.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] Hereinafter, an embodiment of a gaming machine according to the present invention will be described with reference to the drawings. In the following embodiments, a so-called first class pachinko machine will be described as an example of a gaming machine according to the present invention. [Overall Main Configuration] First, the main configuration of the pachinko machine according to this embodiment will be described with reference to FIG. FIG.
1 is an explanatory perspective view of a pachinko machine according to this embodiment. The pachinko machine 10 is provided with a front frame 11 that can be opened and closed by a hinge 19, and a glass frame 13 is attached to the front frame 11 so that it can be opened and closed. On the right side of the front frame 11, a keyhole 12 for inserting a key for opening and closing the glass frame 13 is provided. A game board 14 is provided inside the glass frame 13.
A firing handle 15a for operating a firing motor (indicated by reference numeral 15e in FIG. 3) for firing game balls to the game board 14 is rotatably attached to the lower right of the front frame 11. ing.

Below the glass frame 13, there is formed a prize ball / lending ball supply port 20a to which a prize ball / lending ball is supplied. An upper tray 20 for storing the prize balls and the lending balls supplied from the prize ball / lending ball supply port 20a is attached. Upper saucer 2
Below 0, there is formed an outlet 21a for discharging a prize ball that has flowed past the number of upper trays 20 that can be accommodated or a game ball discharged from the upper tray 20 by operating the upper tray ball pulling lever 20b. I have. On the discharge side of the discharge port 21a,
A lower tray 21 is provided for accommodating game balls discharged from the discharge port 21a. The ashtray 17 is provided on the left side of the lower tray 21.

[Main Configuration of Game Board 14] Next, the game board 1
4 will be described with reference to FIG. A center case 30 is provided substantially at the center of the game board 14. The center case 30 has a prize entrance 31
And a normal symbol display device 34 including three LEDs, and 4 indicating the number of times the normal symbol display device 34 is operated.
A normal symbol storage display LED 35a consisting of three LEDs,
A special symbol display device 3 that variably displays a plurality of symbols, for example, 0-9 special symbols, on a special symbol display 32b on a liquid crystal display.
2, and a special symbol storage display LED 36a composed of four LEDs for displaying the number of times that the special symbol display device 32 can be started (special symbol start storage number).

On the left and right sides of the center case 30, there are ordinary symbol operation gates 2 for operating the ordinary symbol display device 34.
6, 26 are provided. Below the center case 30, a first type starting port 27 having a function of operating the special symbol display device 32 is provided. Below the first type starting port 27, a stop symbol of the ordinary symbol display device 34 is provided. Ordinary electric accessory 28 that opens both wings when hit
Is provided. The opened ordinary electric accessory 28 has a function of starting the operation of the special symbol display device 32, similarly to the first type starting port 27. A variable winning device 40 which is activated when the stop symbol of the special symbol display device 32 hits the symbol is provided below the ordinary electric accessory 28.

The variable winning device 40 is provided with a large winning opening 41 in the form of a door which is opened when a hit occurs. The winning winning opening 41 can be opened and closed. Are provided respectively. Further, inside the special winning opening 41, there is provided a specific area 42 having a function of continuously opening the special winning opening 41, and a specific area switch (reference numeral 42 in FIG. 3) for detecting a game ball passing through the specific area 42.
a) and a special winning opening switch (indicated by reference numeral 43a in FIG. 3) for counting the number P of game balls that have won the special winning opening 41.

In addition, the game board 14 includes a rotary windmill 2
3, 23, fixed right windmill 325, left windmill 326,
A right sleeve winning port 24, a left sleeve winning port 25, and an out port 45 for collecting game balls that have not won as an out ball are provided. Also, the game board 14 is provided with various lamps such as a right corner decoration lamp 321a composed of three LEDs, a left corner decoration lamp 322a composed of three LEDs, a right side decoration lamp 314a, and a left side decoration lamp 315a. ing. Further, many nails 28 are driven into the game board 14, and the game balls fired on the game board 14 fall while dancing between the nails 28. In addition, one LED of the left corner decoration lamp 322a is
It is a ball out lamp 322b which lights up when the ball is out. Further, many nails 28 are driven into the game board 14, and the game balls fired on the game board 14 fall while disturbing between the nails 28.

[Electrical Configuration of Pachinko Machine 10] Next, the electrical configuration of the pachinko machine 10 will be described with reference to FIG. The pachinko machine 10 is provided with a main board 100, on which a microprocessor 110 is mounted. The microprocessor 110 has a main CP for executing game control.
U112 and a ROM 11 in which various control programs for the main CPU 112 to execute various controls are recorded.
And a RAM 116 for temporarily storing various data such as a control program read from the ROM 114 when the main CPU 112 executes various control programs and data relating to a big hit occurring during a game.

The following components are electrically connected to the main substrate 100. Power supply board 80, payout control base 200 for controlling payout of award balls, etc., special symbol display device 3
2, a lamp control device 300 for controlling a lamp and an LED provided on the game board 14, a voice control device 79 for controlling a sound effect during a game, and the like, and a first device for detecting the passage of the game ball through the first type starting port 27. Seed starting port switch 27a, a game frame information terminal board 52, a board relay board 51, and a game frame relay for transmitting game board information relating to a winning or a big hit to a computer (not shown) provided in a control room of a pachinko hall or the like. The substrate 53.

The payout control board 200 is equipped with a microprocessor 210 that operates by inputting a control command sent from the main board 100. The microprocessor 210 has a sub CPU that controls payout of prize balls and the like.
212, a ROM 214 in which various control programs for the sub CPU 212 to execute control such as payout of prize balls, and a control program read from the ROM 214 when the sub CPU 212 executes various control programs and a game And a RAM 216 for temporarily storing various data such as the number of prize balls generated in the RAM. In addition, the power supply board 80, the CR connection board 56, the firing motor drive board 15c for driving the firing motor 15e, the game frame information terminal board 52, and the payout relay board 55 are electrically connected to the payout control board 200. I have.

The game frame relay board 53 has a full detection switch 2 for detecting that the lower tray 21 is full of prize balls.
1b and the sensor relay board 54 are electrically connected. The sensor relay board 54 is electrically connected to the prize ball payout sensors 62a and 62b and the payout relay board 55 provided in the prize ball unit 62. The prize ball unit 62
Prize ball payout sensors 62a, 62b and prize ball payout motor 6
2c. There are two prize ball payout mechanisms for efficiently paying out prize balls, and each payout mechanism is driven by a prize ball payout motor 62c. The prize ball payout sensor 62a is provided in one mechanism, and the prize ball payout sensor 62b is provided in the other mechanism. Detection signals from the prize ball payout sensors 62a and 62b are transmitted from the sensor relay board 54 to the main board 100 via the game frame relay board 53.
To the payout control board 200 via the payout relay board 55. And the payout control board 20
The sub CPU 212 mounted on the prize ball payout sensor 6
The detection signals transmitted from 2a and 62b are taken in, and the number of awarded prize balls is counted. For example, sub CPU2
12 subtracts “1” from the value of the area in the RAM 216 storing 15 payout balls every time the detection signal is taken.

The payout relay board 55 is electrically connected to a ball-off switch 61 for detecting that the ball is no longer available, a prize-ball payout motor 62c, and a ball-for-ball unit 63. The following components are electrically connected to the board-surface relay board 51. Ordinary electric accessory solenoid 28a for opening and closing the ordinary electric accessory 28, ordinary symbol display device 34, gate switch 26 provided on the ordinary symbol actuation gate 26
a, a special winning opening switch 43a, a sleeve winning opening switch 24a detecting a winning in the sleeve winning opening 24, a lower winning opening switch 29a detecting a winning in the lower winning opening 29, and detecting a winning in the natural winning opening 31. The winning opening switch 31a and the winning opening relay board 50.

A special winning area solenoid 42b, a special winning area solenoid 43b, and a specific area switch 42a are electrically connected to the special winning opening relay board 50. The power supply board 80 is electrically connected to the CR connection board 56,
The CR connection substrate 56 is electrically connected to the pachinko machine external device portion 22 including a frequency display substrate for displaying the remaining frequency of the prepaid card and a device for reading the prepaid card. The power supply board 80 is AC24V (50 Hz
/ 60 Hz) from the main power supply 70. In this embodiment, a proximity switch is used as the gate switch 26a, each winning opening switch, and the prize ball payout sensor.

(Main Processing Executed by Main CPU 112) Next, main processing executed by the main CPU 112 will be described with reference to the flowchart of FIG. First, when a pachinko hall person turns on the power of the pachinko machine 10, the main CPU 112 determines that the power is on (step (hereinafter abbreviated as S) 10: Y
es), perform initial setting (S12). Then the main CP
U112 determines that power is not being supplied (S10: N
o), the following process is executed. Sub C of the payout control board 200 based on signals from various winning opening switches
Prize ball processing for outputting a prize ball control command to PU 212 (S
20). Turn ON / OFF the normal electric solenoid 28a
F. Ordinary electric accessory processing (S30). Normal symbol processing for controlling the normal symbol display device 34 (S40). Big hit determination processing (S50) for determining whether or not a big hit occurs when the first-type starting port switch 27a is turned on. Special symbol display 3
2 which outputs an image control command to the special symbol processing (S6
0). Special winning opening processing for controlling the specific area solenoid 42b and the special winning opening solenoid 43b (S70). Voice processing for outputting a voice control command to the voice control device 79 (S80). Lamp processing for outputting a lamp control command to the lamp control device 300 (S90). Ball lending processing for controlling the ball lending unit 63 (S100).

(Control Commands Output from Main CPU 112) Next, control commands output from the main CPU 112 will be described with reference to FIG. FIG.
5A is a timing chart of a control command and a transfer signal, and FIG. 5B is an explanatory diagram showing a configuration of the control command. As shown in FIG.
2 transmits a 2-byte command to the sub CPU by using eight control commands (HD0 to HD7) and one transfer signal (HDSTR). For example, among the control commands output from the main CPU 112 to the sub CPU 212 of the payout control board 200, the control command instructing the payout number of 15 is represented by, for example, 3FHC1H (hexadecimal notation),
The control command instructing the number of payouts is, for example, 35
It is represented by HCBH (hexadecimal notation). The control command for instructing the operation of payout ball payout is, for example, 40H.
The control command, which is represented by C0H (hexadecimal notation) and instructs the operation of payout ball payout to be resumed, is, for example, 41HBFH (1
(Hexadecimal notation). Further, as shown in FIG. 5A, a transfer signal (strobe signal (S
TR)) is output, and the sub CPU captures the control command when the transfer signal is input.

(Award Ball Processing) Next, the flow of the award ball processing executed by the main CPU 112 in S20 of FIG. 4 and the flow of the processing executed by the sub CPU 212 of the payout control board 200 will be described with reference to FIGS. Will be explained. FIG. 6 is a flowchart showing a flow of a program start process executed by the sub CPU 212, and FIG.
12 is a flowchart showing the flow of a main program process executed by a main program 12; FIG. 8A is a flowchart showing the flow of the prize ball processing executed by the main CPU 112.
FIG. 8B is a flowchart illustrating a flow of a command input process executed by the sub CPU 212, and FIG. 8C is a flowchart illustrating a flow of an NMI interrupt process executed by the sub CPU 212. FIG. 9 shows the main CPU 112.
FIG. 19 is an explanatory diagram showing a flow of award ball control commands from the CPU to the sub CPU 212.

(Program Start Process of Sub CPU 212) First, the program start process executed by the sub CPU 212 will be described with reference to FIG. Sub C
The PU 212 sets interrupt prohibition (S20), and sets a stack pointer for holding the address of the main routine at the bottom of the address when shifting from the main routine to the subroutine (S202). Then sub C
The PU 212 sets access permission to the RAM 216 (FIG. 3) (S204), and sets mode 2 to the interrupt mode (S206). Subsequently, the sub CPU 212 sets an address to be used in mode 2 in the interrupt register (S208), and determines whether the check data in the RAM 216 is correct, for example, A5A5H (S5).
210), if the check data is correct (S210:
Yes), 0 in areas other than the backup area in the RAM 216
If the check data is not correct (S210: No), the entire area (for example, 256 bytes) of the RAM 216 is cleared (initialized) to 0 and the check data (for example, A5A5) is cleared.
H) is stored (S214). Subsequently, the sub CPU 21
2 initializes a built-in device such as a watchdog timer which is a timer for monitoring runaway of the sub CPU 212 (S216), and initializes a work area (S2).
18). Subsequently, the sub CPU 212 sets interruption permission (S220), and shifts to an infinite loop in which this S220 is repeated.

(Main Program Processing of Sub CPU 212) Next, the flow of the main program processing executed by the sub CPU 212 will be described with reference to FIG. This main program process is executed by a channel 3 interrupt of a not-shown CTC (timer counter). The sub CPU 212 sets interruption permission (S1), and restarts the watchdog timer (S2). Subsequently, the sub CPU 212 outputs data and commands (S
3), input processing (S4), payout processing (S5) such as storage of the number of prize balls to be paid out and a payout instruction, and ball lending for controlling the ball lending unit 63 based on data from the CR connection board 56 (FIG. 3). The process (S6) is executed.

(Prize ball processing of the main CPU 112 and command input processing of the sub CPU 212)
The flow of the award ball processing executed by U112 and the flow of command input processing executed by sub CPU 212 will be described with reference to FIG. The pachinko machine 10 is set so that the number of payouts differs depending on the winning opening. For example, in this embodiment, when the special winning opening switch 43a (FIG. 3) is turned on, 15 prize balls are paid out, and the other sleeve winning opening switch 24a, lower winning opening switch 29a, and natural winning opening switch 31a. When one of the first-type starting port switch 27a and the gate switch 26a is turned on, five prize balls are paid out. The various switches are electrically connected to different input ports of the main CPU 112 of the main board 100. When the main CPU 112 inputs the detection signal sent from the switch (S22), the main CPU 112 takes in any input port. The number of payouts is determined according to whether or not the payout has occurred (S24). Subsequently, the main CPU 112 outputs a winning ball control command for instructing the payout of the number of winning balls determined in S24 to the sub CPU 212 (S26), and outputs a transfer signal (S28).

As shown in FIG. 9, the prize ball control command output from the main CPU 112 is
18 is output to an output port 120, and the output prize ball control command is temporarily stored in an output buffer 126 via a main CPU parallel output port 124, and then is input to an input buffer connected to a sub CPU 212. 220 is temporarily stored. And the main CPU 1
The transfer signal output from the main CPU bus 11
8 is input to the trigger input (TRG2) 226 of the sub CPU 212 via the output port 122, the output buffer 128, and the input buffer 222, the input buffer 2
The award ball control command stored in the sub CPU 212 is input to the input port 224 of the sub CPU 212 via the sub CPU parallel input port 228, and the sub CPU 212 executes a command input process (FIG. 8B).

This command input processing is executed by a CTC channel 2 interrupt. Sub CPU 212
Receives the award ball control command (S230), and checks the input award ball control command (S23).
2). For example, the control command is distributed to each byte. Subsequently, the sub CPU 212 determines whether the inputted prize ball control command is a control command meaning, for example, a command indicating a payout command of five prize balls or a command indicating a payout command of 15 prize balls. Is analyzed (S234), and interruption permission is set (S236). And sub CPU2
12 outputs a signal corresponding to the analysis result in S234 to a motor drive circuit (not shown), and a drive pulse is output from the motor drive circuit to the prize ball payout motor 62c;
A predetermined number of prize balls are paid out by driving the prize ball payout motor 62c. As described above, the command input process is assigned to the channel 2 interrupt, and is executed in the second priority order following the NMI interrupt process described later. For example, the sub CPU 212 outputs a drive pulse to the prize ball payout motor 62c. If a prize ball control command is transmitted from the main CPU 112 during the operation, the analysis of the prize ball control command is performed with priority. Therefore, it is possible to eliminate a prize ball payout error due to a failure to receive a control command from the main board 100.

(NMI Interrupt Processing of Sub CPU 212)
Next, an NMI interrupt process executed by the sub CPU 212 will be described with reference to FIG. Sub CPU 21
When the NMI signal is generated when the power is turned off, the RAM
Access prohibition is set in the access register for the H.216 (S240). This interrupt process is executed with the highest priority over other interrupt processes. In other words, by prohibiting access to the RAM 216, the prize ball data stored in the RAM 216 is prevented from being rewritten.

As described above, the main CPU 112 sends the prize ball control command to the sub CPU only when a signal is input from the input port, that is, only when the signal needs to be output.
212, a signal indicating that there is no prize ball payout when there is no prize, as in the related art which does not rely on the control command method, is used instead of the main CP.
The load on U112 can be reduced. Also, the sub CPU 212
When the prize-ball control command output from the main CPU 112 is input, the prize-ball control command is analyzed by interrupt processing in a routine executed by itself, and a drive signal corresponding to the analysis result is output to the motor. The output to the drive circuit allows the sub CPU 212 to perform other processing without inputting the award ball control command, so that the processing speed of the sub CPU 212 can be increased. Further, the sub CPU 212 is
In order to illegally increase the number of payouts, the payout control board 200 is crafted so that a signal for rewriting the prize ball control command is sent from the payout control board 200 to the main board 100 in order to increase the number of payouts. Therefore, it is possible to prevent an increase in the number of prize balls paid out due to wrongdoing.

(Electrical Configuration of Special Symbol Display Device 32) Next, the main electrical configuration of the special symbol display device 32 will be described.
This will be described with reference to FIG. The special symbol display device 32 includes a special symbol display 32b, a liquid crystal inverter board 32a, a liquid crystal analog board 32c, and a special symbol control board 32d. The main board 100 is a special symbol display 3
The sub CPU 3 mounted on the special symbol control board 32d transmits an image control command instructing the content to be displayed by 2b.
2e. The sub CPU 32e receives the image control command sent from the main board 100 via the line 100a, and analyzes the content of the received image control command according to a computer program recorded in the ROM 32f.

Subsequently, the sub CPU 32e sends the analysis result to a VDP (video display processor) 32g.
Send to Subsequently, the VDP 32g stores a character ROM in which patterns, characters, and the like corresponding to display contents are recorded.
32i, a pattern or a character corresponding to the above analysis result is read out, and the dot address, display color, rotation, enlargement, reduction, etc. of the read out pattern or character are calculated based on the above analysis result. The result is temporarily stored in the built-in pallet RAM 32h. Subsequently, the VDP 32g sends out RGB signals to the liquid crystal analog board 32c based on the calculation results stored in the pallet RAM 32h. Subsequently, the liquid crystal analog substrate 32c is
The color correction and the brightness adjustment of the captured RGB signals are performed, and the signals are transmitted to the liquid crystal inverter board 32a. The liquid crystal inverter board 32a plays the role of a backlight power supply, and boosts the received signal (for example, from 12V to 600V).
V) and sends it to the special symbol display 32b. The special symbol display 32b switches and displays the liquid crystal dots corresponding to the fetched signal. As a result, the display of the change of the special symbol, the display of the stop symbol, the display of the animation,
In the present embodiment, a TFT is used as the liquid crystal constituting the special symbol display 32b.

(Special Symbol Processing of Main CPU 112 and Command Input Processing of Sub CPU 32e) Next, the flow of the special symbol processing executed by the main CPU 112 in S60 of FIG. 4 and the command input processing executed by the sub CPU 32e will be described with reference to FIGS. This will be described with reference to FIG. FIG. 11A is a flowchart showing the flow of the special symbol processing executed by the main CPU 112.
(B) is a flowchart showing the flow of a command input process executed by the sub CPU 32e. FIG. 12 shows the main C
FIG. 11 is an explanatory diagram showing a flow of an image control command from a PU 112 to a sub CPU 32e.

When the main CPU 112 detects that the special symbol start storage number is one or more (S in FIG. 11A).
62: Yes), and after determining whether it is a big hit or not (S in FIG. 4)
50), one variation pattern is determined from a table (not shown) in which the variation pattern of the special symbol is set (S6).
4). Subsequently, the main CPU 112 transmits an image control command corresponding to the fluctuation pattern determined in S64 in FIG.
As shown in FIG. 2, the signal is output to the output port 120 (FIG. 12) via the main CPU bus 118 (S66), and the transfer signal is output to the output port 122 (S68). The output image control command is temporarily stored in the output buffer 126 via the main CPU parallel output port 124, and then temporarily stored in the input buffer 32m connected to the sub CPU 32e. Also, the output port 122
Is input to the trigger input (TRG2) 32k of the sub CPU 32e via the output buffer 128 and the input buffer 32n, the input buffer 3
The image control command stored in 2m is input to the input port 32j of the sub CPU 32e via the sub CPU parallel input port 32p, and the sub CPU 32e executes a command input process (FIG. 11B).

Upon input of the image control command (S300 in FIG. 11B), the sub CPU 32e checks the input image control command (S302). For example, the image control command is distributed to each byte. Subsequently, the sub CPU 32e analyzes the content of the input image control command (S304). For example, if the image control command is E0H00H (hexadecimal),
It is analyzed that this is an image control command indicating that all symbols start to fluctuate in a fluctuation time of 9312 ms, and if E1H00H, it is an image control command indicating that “0” is displayed when the left symbol stops. To analyze. Then, the sub CPU 32e sends a display signal corresponding to the analysis result of the command in S304 to the VDP 32g (FIG. 10) (S306).

As described above, the main CPU 112 sends the image control command to the sub CPU only when the number of special symbols to be stored is one or more, that is, only when it is necessary to output.
32e, the special symbol display device 511 (FIG. 19) as in the related art that does not rely on the control command method.
The load on the main CPU 112 can be reduced as compared with the case where the CPU 501 periodically outputs an operation stop signal when the CPU does not operate.

(Electrical Configuration of Voice Control Device 79)
The main electrical configuration of the voice control device 79 will be described with reference to FIG. The audio control device 79 includes a speaker 79a, a speaker relay board 79b, an amplifier 79
c, a sound source IC 79d and an audio control board 79f. When the variation pattern is determined in the special symbol processing (S64 in FIG. 11A), the main board 100 sends a voice control command instructing the content to be reproduced by the speaker 79a to the sub CPU 7 mounted on the voice control board 79f.
Send to 9g. The sub CPU 79g receives the voice control command transmitted from the main board 100 via the line 100b, analyzes the content of the received voice control command according to a computer program stored in the ROM 79h, and temporarily analyzes the analysis result. RAM7
9i.

Subsequently, the sub CPU 79g sends the analysis result to the sound source IC 79d. Next, the sound source IC 79
d indicates the sound source data corresponding to the analysis result in the sound source ROM 7.
9e, and converts the read sound source data into an analog audio signal. The audio signal is amplified to a predetermined size by the amplifier 79c and output to the speaker 79a via the speaker relay board 79b. Thereby, the speaker 79a reproduces a sound corresponding to the sound control command sent from the main board 100, for example, a sound effect at the time of winning or a big hit.

(Audio processing of main CPU 112, sub C
Next, the flow of the audio processing executed by the main CPU 112 in S80 of FIG. 4, the main program processing executed by the sub CPU 79g, and the command input processing executed by the sub CPU 79g will be described with reference to FIGS. This will be described with reference to FIG. FIG. 14A is a flowchart showing the flow of audio processing executed by the main CPU 112.
FIG. 14B is a flowchart showing the flow of the main program processing executed by the sub CPU 79g.
(C) is a flowchart showing the flow of a command input process executed by the sub CPU 79g. FIG. 15 shows the main C
FIG. 11 is an explanatory diagram showing a flow of a voice control command from a PU 112 to a sub CPU 79g.

The main CPU 112 refers to the variation pattern determined in the special symbol processing (S64 in FIG. 11A) (S82 in FIG. 14A) and associates the variation pattern of the special symbol with the voice control command. A voice control command associated with the fluctuation pattern is determined from a table (not shown) configured as described above (S84). Subsequently, the main CPU 112 outputs the voice control command determined in S84 to the output port 120 via the main CPU bus 118 as shown in FIG. 15 (S86).
The transfer signal is output to the output port 122 (S88).

The main program executed by the sub CPU 79g is executed by a channel 3 interrupt of a not-shown CTC (timer counter). Sub CPU 79g
Sets interrupt permission (S400 in FIG. 14B),
Restart the watchdog timer (S41
0). Subsequently, the sub CPU 79g is connected to the main CPU 112.
Input processing for inputting a command output from (S42)
0), the analysis result of the input command is VDP32g
An output process (S430) of outputting to (S430) is executed.

As shown in FIG. 15, the voice control command output from the main CPU 112 to the output port 120 in S88 (FIG. 14A) is temporarily stored in the output buffer 126 via the main CPU parallel output port 124. After that, the data is temporarily stored in the input buffer 79m connected to the sub CPU 79g. The output port 12
2 is input to the trigger input (TRG2) 79k of the sub CPU 79g via the output buffer 128 and the input buffer 79n, the voice control command stored in the input buffer 79m is transmitted to the sub CPU 79g.
The data is input to the input port 79j of the sub CPU 79g via the parallel input port 79p, and the sub CPU 79g executes a command input process (FIG. 14C).

Upon input of the voice control command (S422), the sub CPU 79g analyzes the input voice control command (S424). For example, if the voice control command is A0H (hexadecimal display), the big hit start sound is analyzed as a voice control command indicating that the special symbol is to be output in a combination of big hits when it is determined. The big hit end sound is analyzed as a voice control command to be output when the big hit ends. And sub CP
U79g sets the interruption permission (S426), and S42
4 reproduces the reproduced signal corresponding to the analysis result.
9d (FIG. 13) (S43 in FIG. 14B).
0).

As described above, since the main CPU 112 only needs to output the voice control command to the sub CPU 79g only when the special symbol starts to change, for example, the main CPU 112 does not use the control command method as in the prior art. 6
The load on the main CPU 112 can be reduced as compared with the case where the operation stop signal is periodically output when the operation of the motor 22 (FIG. 19) does not operate. In addition, since the signal is not output from the voice control device 79 to the main board 100, for example, the voice control device 79 is modified for the purpose of illegally increasing the number of prize balls to be paid out, and is output from the main CPU 112 to the sub CPU 212. Since a signal for rewriting the prize ball control command to be transmitted cannot be sent from the voice control device 79 to the main CPU 112, it is possible to prevent an increase in the number of prize ball payouts due to fraud.

(Electrical Configuration of Lamp Control Device 300) Next, the main electrical configuration of the lamp control device 300 will be described.
This will be described with reference to FIG. The lamp control device 300 includes a special winning opening lamp relay board 301, a lamp control distribution board 302, a frame lamp relay board 303, and a frame LED.
A board 304 and a lamp control board 305 are provided. The lamp control distribution board 302 includes a right side decorative lamp 314.
a (FIG. 2) is mounted on the right side LED board 314;
Left side LE equipped with left side decorative lamp 315a
D board 315 and LED board 3 above the center, on which LEDs provided on the upper side of center case 30 (FIG. 2) are mounted.
16 and LE provided at the back of the center case 30.
D, a center LED board 317 on which the LED is mounted, a center LED board 318 on which LEDs provided below the center case 30 are mounted, and a special symbol storage display LED
Special design memory display board 36 on which 36 (FIG. 2) is mounted
And a normal symbol memory display board 35 on which the normal symbol memory display LED 35 is mounted, and a right corner decoration lamp 321a
A right corner LED board 321 on which (FIG. 2) is mounted;
Left corner LED board 322 on which left corner decorative lamp 322a is mounted, and LE provided in right sleeve winning opening 24
D, a left chucker LED board 25a on which LEDs provided on the left sleeve winning opening 25 are mounted, and an LE provided on the right windmill 325.
D is mounted on the right windmill LED board 325a and the left windmill 3
26 is connected to a left windmill LED board 328 on which LEDs are mounted.

The special winning opening lamp relay board 301 connected to the lamp control distribution board 302 includes a special winning opening right LED board 309 having an LED mounted on the right side of the special winning opening 41 (FIG. 2); A special winning opening left LED board 310 on which LEDs provided on the left side of the special winning opening 41 are mounted, a special winning opening middle LED board 311 on which LEDs provided near the center of the special winning opening 41 are mounted, The special winning opening upper right LED board 312 provided with the LED provided at the upper right of the mouth 41 and the special winning opening upper left LED board 313 provided with the LED provided at the upper left of the special winning opening 41 are connected. .

On the frame lamp relay board 303 connected to the lamp control distribution board 302, the frame LED board 30 on which the LED provided on the frame lamp 304a (FIG. 1) is mounted.
4 are connected. The lamp control distribution board 302 includes:
A lamp control board 305 for controlling lighting or blinking of the various LEDs is connected. Lamp control board 305
Are the sub CPU 306, the ROM 307, and the RAM 30
8 is provided. The sub CPU 306 inputs the lamp control command sent from the main board 100 via the line 100c, analyzes the contents of the lamp control command according to the computer program stored in the ROM 307, and temporarily stores the analysis result in the RAM 308. Store.
Subsequently, the CPU 306 determines an LED to be lit, a lighting interval, a lighting time, and the like, and sends a signal corresponding to the determination to the lamp control distribution board 302. Then, a predetermined LED connected to the lamp control distribution board 302 turns on, blinks or turns off.

(Ramp Processing of Main CPU 112, Main Program Processing and Command Input Processing of Sub CPU 306) Next, ramp processing executed by the main CPU 112 in S90 of FIG. 4, main program processing executed by the sub CPU 306, and execution of the sub CPU 306 FIGS. 17 and 18 show the flow of command input processing
This will be described with reference to FIG. FIG. 17A shows the main CPU 11.
FIG. 17B is a flowchart showing a flow of a ramp process executed by the sub CPU 306, and FIG. 17B is a flowchart showing a flow of a main program process executed by the sub CPU 306;
FIG. 17C is a flowchart illustrating the flow of a command input process executed by the sub CPU 306. FIG. 18 is an explanatory diagram showing a flow of a lamp control command from the main CPU 112 to the sub CPU 306.

The main CPU 112 refers to the fluctuation pattern determined in the special symbol processing (S64 in FIG. 11A) (S92 in FIG. 17A) and associates the fluctuation pattern with the lamp control command. The lamp control command is determined from the table (not shown) (S9).
4). Subsequently, the main CPU 112 outputs the lamp control command determined in S94 to the output port 120 via the main CPU bus 118 as shown in FIG. 18 (S96), and outputs a transfer signal to the output port 122 (S98). .

The main program executed by the sub CPU 306 is executed by a CTC (timer counter) channel 3 interrupt (not shown). Sub CPU 306
Sets interrupt permission (S500 in FIG. 17B),
Restart the watch dog timer (S51
0). Subsequently, the sub CPU 306 is
Input processing for inputting a command output from (S52)
0), an output process of outputting a signal corresponding to the analysis result of the input command to the lamp control distribution board 302 (S5).
Execute 30).

As shown in FIG. 18, the lamp control command output from the main CPU 112 to the output port 120 in S96 (FIG. 17A) is temporarily stored in the output buffer 126 via the main CPU parallel output port 124. After that, the data is temporarily stored in the input buffer 306m connected to the sub CPU 306. When the transfer signal output to the output port 122 is input to the trigger input (TRG2) 306k of the sub CPU 306 via the output buffer 128 and the input buffer 306n, the lamp control command stored in the input buffer 306m is changed. It is taken into the input port 306j of the sub CPU 306 via the sub CPU parallel input port 306p,
The PU 306 executes a command input process (FIG. 17).
(C)).

This command input processing is executed by the CTC channel 2 interrupt. Sub CPU 30
6 receives the lamp control command (S522),
The input lamp control command is analyzed (S52).
4). For example, when the lamp control command is 60H (hexadecimal display), the left side LED board 315 (FIG. 1)
6), right side LED board 314, big winning opening upper right LED
L provided on the substrate 312, the upper left LED substrate 313 of the special winning opening, the right LED substrate 309 of the special winning opening, the left LED substrate 310 of the special winning opening, and the LED substrate 317 at the center rear, respectively
ED goes out, left windmill LED board 326a, right windmill LE
D board 325a, left gate LED board 328, right gate LED board 327, left chucker LED board 25a, right chucker LED board 24a, center LED board 3
The LED provided on the LED board 18 and the LED board 316 on the center are analyzed as a lamp control command for blinking. Then, the sub CPU 306 sets the interrupt permission (S526), and transmits the display signal corresponding to the analysis result in S524 to the lamp control distribution board 302, the special winning opening lamp relay board 301, and the frame lamp relay board 303.
(S530 of FIG. 17B).

As described above, the main CPU 112 only outputs the lamp control command to the sub CPU 306, and the sub CPU 306 creates the display signal.
Since the load on the main CPU 112 can be reduced, various LE
The processing capacity of the pachinko machine 10 for turning on and blinking D can be increased. Therefore, it is possible to cope with an increase in lighting / flashing patterns of various LEDs. Also, the main C
The PU 112 may output the lamp control command to the sub CPU 306 only when the special symbol display device 32 changes the special symbol, that is, only when it is necessary to output the special symbol. As described above, the illumination lamp 513, various lamps 612, LED
The load on the main CPU 112 can be reduced as compared with the case where the CPU 501 periodically outputs a non-control signal when it is not necessary to control the boards 525, 535, and 611. further,
Since the signal is not output from the lamp control device 300 to the main board 100, for example, the lamp control device 300 is crafted for the purpose of illegally increasing the number of award balls to be paid out.
A signal for rewriting the prize ball control command output from the main CPU 112 to the sub CPU 212 is transmitted to the lamp control device 300.
However, it is impossible to send the prize balls to the main CPU 112, so that it is possible to prevent an increase in the number of prize balls paid out due to fraud.

As described above, by using the pachinko machine 10 according to the above-described embodiment, it is possible to realize a pachinko machine with a high processing capability in which various lighting and blinking patterns of various LEDs and lamps are provided. Also, the main CPU 112
Can be output to each sub CPU only when it is necessary to output various control commands.
Since the load on the PU 112 can be reduced, the main CPU 11
2 can increase the processing speed. Furthermore, each sub C
The PU analyzes the contents of the control command sent from the main CPU 112 and, based on the analysis result,
In order to control the device and lamp corresponding to U112, the main CPU 112 need only determine the type of control command. For this reason, the main CPU 112
Since the control command to be sent to the CPU has only a simple content, the load on the main CPU 112 can be reduced.

By the way, conventionally, the CPU 501 (FIG. 19) mounted on the main substrate 500 controls various devices and lamps in addition to determining the number of awarded balls to be paid out. Even when inspecting a portion where the number of payouts is likely to be increased, the main substrate 500 must be inspected while various devices and lamps controlled by the CPU 501 are connected, and the inspection contents are complicated. In addition, there was a problem that it took a lot of time. But,
If the pachinko machine 10 according to the above-described embodiment is used, the main CPU
Since the presence or absence of fraudulent acts can be inspected only by inspecting the content of the award ball control command sent to the server, the inspection content is simple and requires no time and effort. In the above-described embodiment, the first-type pachinko machine has been described as an example of the gaming machine according to the present invention. However, the second-type pachinko machine, the third-type pachinko machine, other types of pachinko machines, or ,
Of course, the present invention can be applied to other gaming machines such as slot machines.

[Correspondence between Claims and Embodiments] FIG. 1
6. Each of the LED boards shown in FIG. 6 and the LEDs provided on the LED boards are provided with a sub-CP
U306 provides the second computer with the main CPU 112
Correspond to the first computers, respectively. In addition, the game ball corresponds to the prize medium according to claim 3, and the prize ball unit 62
Corresponds to the prize medium payout means. Further, output buffer 1
26 or the input buffer 306m corresponds to the storage unit according to the fifth aspect, and the ROM 114 corresponds to the recording medium according to the sixth aspect. Then, S executed by the main CPU 112
92 to S98 function as the first computer, and S500 to S530 and S5 executed by the sub CPU 79g.
22 to S526 function as the second computer.

[Brief description of the drawings]

FIG. 1 is an explanatory perspective view of a pachinko machine according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a main configuration of a game board 14 provided in the pachinko machine 10 shown in FIG.

FIG. 3 is an explanatory diagram showing an electrical configuration of the pachinko machine 10 by blocks.

FIG. 4 is a flowchart illustrating main processing executed by a main CPU 112;

FIG. 5A is a timing chart of a control command and a transfer signal, and FIG. 5B is an explanatory diagram showing a configuration of the control command.

FIG. 6 is a flowchart illustrating a flow of a program start process executed by a sub CPU 212;

FIG. 7 is a flowchart illustrating a flow of a main program process executed by a sub CPU 212;

FIG. 8A is a flowchart showing the flow of a prize ball process executed by the main CPU 112, and FIG.
FIG. 8C is a flowchart showing the flow of a command input process executed by the sub CPU 212, and FIG.
3 is a flowchart illustrating a flow of an NMI interrupt process executed by a 212.

FIG. 9 is an explanatory diagram showing a flow of a winning ball control command from the main CPU 112 to the sub CPU 212.

FIG. 10 is an explanatory diagram showing a main electrical configuration of a special symbol display device 32.

11A is a flowchart showing a flow of a special symbol process executed by the main CPU 112, and FIG. 11B is a flowchart showing a flow of a command input process executed by the sub CPU 32e.

FIG. 12 is an explanatory diagram showing a flow of an image control command from a main CPU 112 to a sub CPU 32e.

FIG. 13 is an explanatory diagram showing a main electrical configuration of a voice control device 79.

FIG. 14A is a flowchart showing the flow of audio processing executed by the main CPU 112;
(B) is a flowchart showing the flow of a command input process executed by the sub CPU 79g.

FIG. 15 is an explanatory diagram showing a flow of a voice control command from the main CPU 112 to the sub CPU 79g.

FIG. 16 is an explanatory diagram showing a main electrical configuration of the lamp control device 300.

FIG. 17A is a flowchart showing the flow of a ramp process executed by the main CPU 112, and FIG.
FIG. 7B is a flowchart showing the flow of the main program processing executed by the sub CPU 306.
(C) is a flowchart showing the flow of a command input process executed by the sub CPU 306.

FIG. 18 is an explanatory diagram showing a flow of a lamp control command from the main CPU 112 to the sub CPU 306.

FIG. 19 is an explanatory diagram showing an electric configuration of a conventional pachinko machine by blocks.

[Explanation of symbols]

 Reference Signs List 10 pachinko machine (game machine) 100 main board 112 main CPU (first computer) 114 ROM (recording medium) 300 lamp control unit 306 sub CPU (second computer) 314 right side LED board (light emitting means) 328 left gate LED board (light emitting means)

Claims (6)

[Claims] 1. A light emitting means for receiving a signal and emitting light in a predetermined pattern, and a first means for outputting a command corresponding to the predetermined pattern.
And a second computer that inputs the command output from the first computer and outputs a signal corresponding to the content of the input command to the light emitting unit. Gaming machine to do. 2. When the second computer inputs a command output from the first computer, the second computer analyzes the input command by interrupt processing in a routine executed by the second computer, and analyzes the analysis result. The gaming machine according to claim 1, wherein the signal corresponding to (i) is output to the light emitting unit. 3. A prize medium payout means for paying out a prize medium, wherein the first computer has a function of outputting a command for instructing the payout of a predetermined amount of the prize medium to the prize medium payout means. The gaming machine according to claim 1, wherein the second computer does not output a signal to the first computer. 4. The computer according to claim 1, wherein the first computer outputs the command to the second computer together with a transfer signal for prompting the second computer to input the command. The gaming machine according to any one of the above. 5. A storage device for temporarily storing a command output from the first computer, wherein a command stored in the storage device when the transfer signal is output is stored in the second computer. The gaming machine according to claim 4, wherein the output is to a computer. 6. A light emitting means for receiving a signal to emit light in a predetermined pattern, a first computer for outputting a command corresponding to the predetermined pattern, and receiving the command output from the first computer. Along with
A second computer that outputs a signal corresponding to the content of the input command to the light-emitting means. A computer-readable storage medium storing a computer program for causing a gaming machine to function, the second computer comprising: A computer program for executing a process of inputting the command output from the first computer and outputting a signal corresponding to the content of the input command to the light emitting means. Recording medium.