JP2002026299A - Semiconductor substrate and its manufacturing method and semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To significantly improve the operational performance and reliability of an element by reducing the interfacial level in the interface between the semiconductor layer and insulating layer of an SOI substrate and improving the carrier mobility of the substrate when improving the operating speed of a semiconductor device, reducing the power consumption of the device, and so on, by using the SOI substrate. SOLUTION: In constituting the semiconductor device by using the SOI(silicon (semiconductor) on insulator) substrate 1 as a semiconductor substrate, the interfacial level in the interface between the semiconductor layer (surface silicon layer: SOI layer) 12 and insulating layer (buried oxide layer: BOX(buried oxide) layer) 11 is reduced and the channel mobility in the interface is improved by segregating nitrogen in the interface to a prescribed concentration, in this case, about 5×1020 atoms/cm3 (0.9%).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate having an SOI structure and a method of manufacturing the same, and a semiconductor device provided with the semiconductor substrate and a method of manufacturing the same. It will greatly contribute.

[0002]

2. Description of the Related Art In recent years, as a semiconductor substrate for a high-performance transistor, a wafer having an SOI structure has attracted attention. This S
OI wafers have higher device speed and lower power consumption due to lower junction capacitance, lower operating voltage due to lower substrate bias effect, improved soft error resistance due to complete isolation of elements, suppression of latch-up, and substrate interference noise. Contributes to the suppression of

[0003]

When manufacturing, for example, a MOSFET using an SOI wafer, the step of forming a gate insulating film is the same as that when using a normal wafer (CZ wafer, epitaxial wafer, etc.). After the formation of the insulating film, a method of passivating the interface state of the gate insulating film by heat treatment in a hydrogen atmosphere is generally performed. However, hydrogen in which the interface state of the gate insulating film is passivated is easily dissociated during operation of the device, resulting in deterioration of device characteristics (channel mobility) (time-dependent change).
(JWLyding et.al., App
l. Phys. Lett. 68, 2526 (1996)), and the hydrogen treatment has a large cost burden.

Further, a semiconductor layer (surface silicon layer: SOI
Layer (SOI / BOX interface) between the insulating layer (buried oxide film layer: BOX layer) and the insulating layer (buried oxide film layer: BOX layer).
^A method has also been reported in which the occurrence of crystal defects in the SOI layer is suppressed by preventing segregation to ¹⁵ / cm ^{2 to} 1.5 × 10 ¹⁵ / cm ² ) and preventing the occurrence of bird's beaks (Japanese Unexamined Patent Application Publication No. Hei 5 (1993) -205).
-259418). However, this method
Although this contributes to suppressing the generation of crystal defects in the SOI layer, it does not contribute to reducing the interface state at the SOI / BOX interface due to the large amount of nitrogen.

The present invention has been made in view of the above-described problems, and is intended to improve the speed of operation and reduce power consumption of a device using an SOI substrate. It is an object of the present invention to provide a semiconductor substrate, a method of manufacturing the same, and a semiconductor device and a method of manufacturing the same, in which interface states are reduced and carrier mobility is improved to greatly improve element operation performance and reliability.

[0006]

Means for Solving the Problems As a result of intensive studies, the present inventors have reached the following aspects of the invention.

[0007] The present invention relates to an S-type semiconductor device having a semiconductor layer on an insulating layer.
An OI substrate, specifically, a bonded type or a SIMOX type is targeted. This semiconductor substrate is characterized in that nitrogen segregates at the interface between the insulating layer and the semiconductor layer and the peak concentration of the nitrogen is 1.45 × 10 ²¹ (atoms / cm ³ ) or less.

In manufacturing an SOI substrate having the above structure, in the case of a bonding type, a step of forming an insulating layer on a semiconductor layer of the first substrate and a heat treatment on the first substrate in a nitriding gas atmosphere are performed. A peak concentration of 1.45 × 10 ²¹ (atoms / atom) at the interface between the insulating layer and the semiconductor layer.
cm ³ ) or less, and a step of bonding the first substrate to a second substrate via the insulating layer to complete the SOI substrate.

In the case of the SIMOX type, the semiconductor substrate
After introducing oxygen ions, heat treatment is applied to form an insulating layer
And heating the semiconductor substrate in a nitriding gas atmosphere.
Performing a process, at the interface between the semiconductor substrate and the insulating layer,
1.45 × 10 peak concentration ^{twenty one}(Atoms / cm^Three)
Through the step of segregating nitrogen so that
Complete the I substrate.

Further, the present invention is directed to a semiconductor device using the SOI substrate having the above structure and having a semiconductor element formed on the SOI substrate.

Further, when manufacturing this semiconductor device, the SOI substrate is subjected to a heat treatment in a nitriding gas atmosphere, and a peak concentration of 1.45 × 10 ²¹ (atoms) is present at the interface between the insulating layer and the semiconductor layer. / Cm ³ ).

Specifically, the SOI substrate is subjected to a heat treatment in a nitriding gas atmosphere, and a peak concentration of 1.45 × 10 ²¹ (atoms) is formed at an interface between the insulating layer and the semiconductor layer.
/ Cm ³ ) or less of nitrogen is preferable.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings.

First, the main configuration of the present invention will be outlined. The present invention relates to an SOI (Silicon)
When a semiconductor device is constructed using a (Semiconductor) On insulator) substrate, a semiconductor layer (surface silicon layer: S)
OI layer) and insulating layer (buried oxide layer: BOX (Buried O
xide) layer is mainly characterized by segregating nitrogen to a predetermined concentration at the interface (SOI / BOX interface), thereby reducing the interface state at the SOI / BOX interface and improving the channel mobility. It is. In the present invention, SOI / B
The concentration of nitrogen segregated at the OX interface is important, and the optimum concentration value was determined by the following method.

FIG. 1 shows an example of a method for manufacturing a MOSFET using an SOI substrate according to the present invention. First, five SOI substrates 1 each having a surface silicon layer 12 having a thickness of about 37 nm formed on a BOX layer 11 are prepared (FIG. 1A).

Subsequently, each SOI substrate 1 is placed in an atmosphere having a different nitrogen concentration (NO: flow rate (L / min) = 0, 0.
3, 0.4, 0.6 N ₂ : heat treatment at 900 ° C. for 15 minutes in a flow rate (L / min) = 10 (FIG. 1B). By this heat treatment, nitrogen is introduced into the SOI / BOX interface and segregated and distributed, whereby the nitride segregation layer 13 is formed.

Subsequently, the SOI substrate 1 is washed with hydrofluoric acid to remove the oxynitride film 20 formed on the surface of the surface silicon layer 12 (FIG. 1C).

As shown in FIG. 1D, the gate electrode 15 is formed on the gate insulating film 14 using the SOI substrate 1 in which the nitride segregation layer 13 is formed at the SOI / BOX interface by segregation of nitrogen. Are formed on the surface silicon layer 12 on both sides of the gate electrode 15 so that the source / drain 1
6 were formed, and tungsten (W) electrodes 17 connected to the gate electrode 15 and the source / drain 16, respectively, were formed, thereby producing a fully depleted MOSFET. In this case, the gate length of the gate electrode 15 is 50 μm,
The thickness of the gate insulating film 14 is about 3 nm,
Became about 5000 μm ² .

The concentration of nitrogen segregated at the SOI / BOX interface of the MOSFET (to silicon) was measured by SIMS. As a result, the nitrogen concentration at the interface of the five SOI substrates 1 was 0.0, 0.9, 1.. 1,2.9,3.5 (%).

FIG. 2 shows the MOSFET shown in FIG.
When the nitrogen concentration at the SOI / BOX interface is 0.9%
Of nitrogen, oxygen and silicon in the depth direction of the SOI substrate 1
3 shows a concentration distribution. The horizontal axis in FIG. 2 is the W electrode 1 in FIG.
7 shows the depth from 7 toward the BOX layer 11. nitrogen
Is 5 × 10 at the SOI / BOX interface²⁰atoms / cm ^Three
(0.9%) It turns out that it has segregated. The gate
The interface between the oxide film 14 and the gate electrode 15 (a SiON layer is formed)
And nitrogen at the interface between the gate electrode 15 and the W electrode 17.
Is observed. This is due to the heat treatment in the device fabrication process.
It is considered that nitrogen moved due to the above.

FIG. 3 shows the effective electron mobility for each nitrogen concentration. Mobility increases with increasing nitrogen concentration,
When it exceeds 0.9%, it again decreases, and at 2.9%, the highest effective mobility is obtained. At 3.5%, the mobility is lower than when nitrogen segregation is not performed (0%). Become like
From this, the optimum value of the nitrogen concentration contributing to the improvement of the channel mobility (about 2.9 × 5 × 10 ²⁰ = 1.45 × 10
²¹ (atoms / cm ³ )) suggests that there is an appropriate range with the peak.

Next, the cause of the mobility change is SOI / B
In order to confirm that there was a change in the interface state at the OX interface, the interface state density was examined by the charge pumping method. FIG. 4 shows the results. As is clear from FIG. 4, as in the case of the mobility, the interface state temporarily decreases and increases again according to the nitrogen concentration. From this, it can be seen that the cause of the mobility change is a change in the SOI / BOX interface state.

From the above, the concentration within the appropriate range at the SOI / BOX interface, preferably 1.45 × 10 ²¹ (atom)
s / cm ³ ) or less by segregating nitrogen
The interface state at the I / BOX interface can be reduced, and the channel mobility can be improved. In addition, by forming a semiconductor element using an SOI substrate whose interface state is optimized as described above, a high-performance and highly reliable semiconductor device can be obtained.

In the above example, the MOSF of the fully depleted type is used.
The ET will be described, and not only the interface of the gate insulating film but also the SOI / BOX interface will have a significant effect on channel mobility and switching characteristics.
Although the performance and reliability of the MOSFET can be improved by stabilizing and passivating the BOX interface state, the same applies to the partially depleted MOSFET, because the off-state current is caused by the SOI / BOX interface state. , SO
An I / BOX interface state is reduced to improve the reliability of the MOSFET.

Based on the main configuration of the present invention described above,
The configuration of the MOSFET according to the present embodiment will be described together with its manufacturing method. FIG. 5 is a schematic cross-sectional view showing the method of manufacturing the MOSFET using the SOI substrate according to the present embodiment in the order of steps.

First, as shown in FIG. 5A, the SOI substrate 1 is heat-treated at 900 ° C. for 15 minutes in a nitrogen atmosphere to
1.45 × 10 ²¹ (atoms / c) at the OI / BOX interface
m ³ ), after phosphoric acid (H ₃ P)
Cleaning with O ₄ ) removes the surface nitride film. Here, the heat treatment may be performed in a nitrogen-containing atmosphere (nitrogen oxide gas, ammonia, NF ₃ , nitrous oxide, nitrogen plasma induced by ECR, or the like). Instead of the above-described nitrogen segregation step, an SOI substrate in which the above concentration of nitrogen is segregated in advance at the SOI / BOX interface may be used instead.

For comparison, a conventional SOI substrate that has not been heat-treated, that is, has no nitrogen segregation at the SOI / BOX interface, is also prepared. For convenience, in each of FIGS. 5A and 5B, a manufacturing process using the SOI substrate 1 of the present embodiment is illustrated.

Subsequently, as shown in FIG. 5B, these SOI substrates (the SOI substrate 1 according to the present embodiment and the SOI substrate of the comparative example) are heat-treated in a dry oxygen atmosphere at 950 ° C. Oxide film 21 is formed to a thickness of about 3 nm.

Next, a silicon nitride film 22 is deposited on the silicon oxide film 21 by CVD (SiH ₂ Cl ₂ + NH ₃ ) at 750 ° C. to a thickness of about 112 nm. Further, a photoresist 23 is applied on the silicon nitride film 22.

Subsequently, as shown in FIG. 5C, the photoresist 23 is processed by photolithography to form a resist mask (not shown), and the silicon nitride film 22 is formed of CF ₄ using this as a mask. Patterning is performed by the used plasma etching. Thereafter, the resist mask is removed by, for example, an ashing process using oxygen plasma.

Subsequently, as shown in FIG.
Using the silicon nitride film 22 as a mask,
Selective oxidation is performed in a wet atmosphere at 0 ° C.
Form field insulating film (LOCOS) 25 of about nm
To define an element region. Then, the silicon nitride film 22
Is removed. Further, a p-type impurity is added to the defined element region.
Here, boron (B) is accelerated at an energy of 30 keV,
8 × 10¹²/ Cm ^TwoAfter channel ion implantation with
Heat-treated in a wet atmosphere at 800 ° C. to a thickness of about 5 nm
A gate insulating film 26 is formed.

Subsequently, as shown in FIG. 5E, 620 is formed on the gate insulating film 26 by the CVD method (SiH ₄ + H ₂ ).
At 180 ° C., a polycrystalline silicon film 27 is laminated to a thickness of about 180 nm, and an n-type impurity, here, phosphorus (P) is ion-implanted at an acceleration energy of 20 keV and a dose of 4 × 10 ¹⁵ / cm ² to 800 ° C. The phosphorus is diffused into the polycrystalline silicon film 27 by a heat treatment for 60 minutes. Further, a plasma CVD method (SiH ₄ + N) is formed on the polycrystalline silicon film 27.
H ₃₎ by a silicon nitride film 28 thickness 29 at 400 ° C.
It is deposited to about nm.

Subsequently, as shown in FIG. 5F, a photoresist (not shown) is applied on the silicon nitride film 28,
The photoresist is processed by photolithography to form a resist mask, and the silicon nitride film 28, the polycrystalline silicon film 27, and the gate insulating film 26 are patterned by plasma etching (CF ₄ and HBr) using the resist mask as a mask. A gate electrode 29 and its cap insulating film 30 are formed on the insulating film 26.

Next, after removing the resist mask, an n-type impurity having an acceleration energy of 5 keV and a dose of 1 × 10 ¹⁵ / cm ² is applied to the SOI substrate using the cap insulating film 30 and the field insulating film 25 as a mask. Then arsenic (A
s) is ion-implanted and heat-treated at 1000 ° C. for 10 seconds to form a source / drain 30 on both sides of the gate electrode 29 in the SOI substrate.

Subsequently, as shown in FIG.
A silicon oxide film is deposited to a thickness of about 100 nm on the entire surface at 750 ° C. by the method (SiH ₄ + N ₂ O), the entire surface of the silicon oxide film is anisotropically etched (etched back), and the side wall of the gate electrode 29 is formed on the silicon. A sidewall 31 covered with an oxide film is formed. Then, the silicon nitride film 28 is removed using an organic solvent or the like.

Subsequently, as shown in FIG. 5H, a silicon nitride film (temperature 750) is formed on the entire surface by a plasma CVD method.
° C, film thickness of about 80 nm) and silicon oxide film (temperature of 35
(0 ° C., film thickness of about 400 nm) are sequentially deposited to form an interlayer insulating film 32.

Next, a photoresist is applied on the interlayer insulating film 32 and processed by photolithography to form a resist mask (not shown). Using this resist mask, the interlayer insulating film 32 is plasma-etched (CF ₄ ).
Then, each contact hole 33 exposing a part of the surface of the gate electrode 29 and the source / drain 30 is formed.

Next, tungsten (W) is deposited by sputtering so as to fill each contact hole 33 and cover the surface of the interlayer insulating film 32. The tungsten is patterned by photolithography and subsequent dry etching to form a gate. Electrode 29 and source / drain 30
Are formed to be connected to each of the electrodes.

Thereafter, the MOSFET using the SOI substrate 1 of the present embodiment and a conventional MOS which is a comparative example thereof are subjected to a post-process such as formation of an additional interlayer insulating film and connection wiring.
Complete each FET.

Each MOSFET fabricated in this manner
Using (the present embodiment and a comparative example), the effective mobility of electrons and the interface state density at the SOI / BOX interface were measured. FIG. 6 shows the result. Here, (a) represents the effective mobility, and (b) represents the interface state density.

In the MOSFET of this embodiment, the effective mobility is increased and the interface state density is reduced due to the segregation of nitrogen at the SOI / BOX interface, as compared with the comparative example. Since the source / drain current I _SD can be expressed as I _SD = (W / L) C _ox (V _D −V _th ) ² , when (V _g −V _th ) = 3 (MV / cm), FIG. In the MOSFET of the present embodiment in which nitrogen segregates at the SOI / BOX interface,
The mobility is about 10% larger than the conventional MOSFET not segregated at the interface, and the source / drain current I _SD is also improved by about 10%.

From the above, by segregating nitrogen at a predetermined concentration (about 1.45 × 10 ²¹ atoms / cm ³ or less) at the SOI / BOX interface, the interface state at the SOI / BOX interface is reduced. The channel mobility can be improved, and the source / drain current I _SD can be improved.

Therefore, according to the present embodiment, when achieving high-speed operation and low power consumption of the device using the SOI substrate, the interface state at the SOI / BOX interface is reduced and the carrier mobility is improved. It is possible to realize a significant improvement in element operation performance and reliability.

In addition, due to the heat treatment during the manufacturing process, nitrogen is segregated at the interface of the gate insulating film 26, and a secondary effect of reducing the gate insulating film interface level can be expected.

[0045]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of an SOI substrate, which is a main component of the present invention, will be described below in terms of its structure together with a manufacturing method.

(Embodiment 1) Here, a so-called bonded SOI substrate is used. FIG. 7 is a schematic cross-sectional view illustrating a method for manufacturing a bonded SOI substrate according to the first embodiment in the order of steps.

First, as shown in FIG. 7A, a semiconductor substrate 41 is prepared, and the semiconductor substrate 41 is heat-treated in a wet atmosphere at 1000 ° C. to form an insulating layer 42 having a thickness of about 400 nm on the surface. .

Subsequently, as shown in FIG. 7B, the semiconductor substrate 41 is placed in a nitrogen-containing atmosphere (nitrogen monoxide gas,
Heat treatment at 900 ° C. for 4 hours with ammonia, NF ₃ , nitrous oxide, nitrogen plasma induced by ECR, etc., and nitrogen is turned into a semiconductor so that the peak concentration becomes about 1.45 × 10 ²¹ (atoms / cm ³ ). The nitride segregation layer 4 is segregated at the interface between the substrate 41 and the insulating layer 42, that is, at the SOI / BOX interface.
Form 3

Subsequently, as shown in FIG. 7C, the semiconductor substrate 41 having been subjected to the above-described processing is replaced with the unprocessed semiconductor substrate 4.
4, the insulating layer 42, and the mirror portion of the semiconductor substrate 44 are bonded to face each other, and heat-treated at 1100 ° C. so that the two are completely adhered to each other.

Thereafter, as shown in FIG. 7D, the upper surfaces of the bonded semiconductor substrates 41 and 44 (that is, the lower surfaces of the semiconductor substrates 41) are polished and thinned to obtain SOI.
A bonded SOI substrate having nitrogen segregated at the / BOX interface is completed.

(Embodiment 2) Here, a so-called SIMO
Targets an X-type SOI substrate. FIG. 8 is a schematic cross-sectional view showing a method for manufacturing a SIMOX SOI substrate according to the second embodiment in the order of steps.

First, as shown in FIG. 8A, a semiconductor substrate 51 is prepared, and an acceleration energy of 170 ke is applied so that oxygen ions reach a predetermined portion in the semiconductor substrate 51.
V ions and oxygen ions are implanted under the conditions of a dose of 4 × 10 ¹⁷ / cm ² . Thereafter, a heat treatment is performed at 1300 ° C. for 6 hours to form an insulating layer (buried oxide layer: BOX layer) 52 in the portion of the semiconductor substrate 51 into which oxygen ions have been implanted.

Thereafter, as shown in FIG.
The semiconductor substrate 51 is placed in a nitrogen-containing atmosphere (nitrogen monoxide gas).
Water, ammonia, NF_ThreeInduced by Nitrous oxide, ECR
Heat treatment at 900 ° C for 15 minutes
And the peak concentration is 1.45 × 10 ^{twenty one}(Atoms / cm
^Three) Nitrogen to the semiconductor substrate 51 and the BOX layer.
52 segregated at the SOI / BOX interface
The segregation layer 53 is formed.

Here, the BOX after oxygen ion implantation is used.
In the case where the atmosphere for the heat treatment for forming the layer 52 is an oxidizing atmosphere, an oxide film adheres to the surface of the semiconductor substrate 51. Therefore, after removing the oxide film, the above heat treatment is performed to perform the SOI / BOX interface. Segregation of nitrogen into the nitrided segregation layer 5
Form 3

Through the above steps, an SOI substrate having a predetermined concentration (about 1.45 × 10 ²¹ (atoms / cm ³ )) of nitrogen segregated at the SOI / BOX interface is completed.

In the SOI substrate manufactured as described above, nitrogen of a specific concentration (about 1.45 × 10 ²¹ (atoms / cm ³ )) is segregated at the SOI / BOX interface, so that the SOI / BOX interface state is reduced. As a result, the dependence of the effective mobility on the electric field shows a decrease in the inclination on the high electric field side. This is a manifestation of the effect of reducing the interface state or smoothing the interface (T. Hori, Gate Dielectrics of M
OS ULSIs, Springer-verlag (1998)). From the above, it has been clarified that the carrier mobility is improved by the effect of reducing the interface state from the change in the field effect dependence of the effective mobility.

Hereinafter, various aspects of the present invention will be described.

(Supplementary Note 1) A semiconductor device in which a semiconductor element is formed on an SOI substrate having a semiconductor layer on an insulating layer, wherein nitrogen segregates at an interface of the insulating layer with the semiconductor layer, and Has a peak concentration of 1.45 × 10 ²¹ (a
(toms / cm ³ ) or less.

(Supplementary Note 2) The SOI substrate is SIMOX
The semiconductor device according to claim 1, wherein the semiconductor device is a substrate.

(Supplementary Note 3) The semiconductor device according to supplementary note 1, wherein the SOI substrate is a bonded substrate.

(Supplementary Note 4) A method of manufacturing a semiconductor device in which a semiconductor element is formed on an SOI substrate having a semiconductor layer on an insulating layer, wherein the SOI substrate is subjected to a heat treatment in a nitriding gas atmosphere. The peak concentration at the interface between the insulating layer and the semiconductor layer is 1.45 × 10 ²¹ (atoms / c).
m ³ ) A method for manufacturing a semiconductor device, wherein nitrogen is segregated to be as follows.

(Supplementary Note 5) The SOI substrate is SIMOX
5. The method for manufacturing a semiconductor device according to claim 4, wherein the method is a substrate.

(Supplementary Note 6) The method of manufacturing a semiconductor device according to supplementary note 4, wherein the SOI substrate is a bonded substrate.

(Supplementary Note 7) The manufacturing of the semiconductor device according to Supplementary Note 4, wherein after segregating nitrogen at the interface, the surface of the semiconductor layer is washed to form a gate insulating film of the semiconductor element. Method.

(Supplementary Note 8) A semiconductor substrate having a semiconductor layer on an insulating layer, wherein an interface between the insulating layer and the semiconductor layer has a peak concentration of 1.45 × 10 ²¹ (atoms / c).
m ³ ) A semiconductor substrate characterized in that the following nitrogen is segregated.

(Supplementary note 9) The semiconductor substrate according to supplementary note 8, wherein the semiconductor substrate has a SIMOX type SOI structure.

(Supplementary Note 10) The semiconductor substrate according to Supplementary Note 8, wherein the semiconductor substrate has a bonding type SOI structure.

(Supplementary Note 11) In manufacturing a semiconductor substrate having a bonded SOI structure, a step of forming an insulating layer on a semiconductor layer of the first substrate; A heat treatment is performed so that the interface between the semiconductor layer and the insulating layer has a peak concentration of 1.45 × 10 ²¹ (at
oms / cm ³ ) or less, and a step of bonding the first substrate to a second substrate via the insulating layer. .

(Supplementary Note 12) In manufacturing a semiconductor substrate having a SIMOX type SOI structure, a step of introducing oxygen ions into the semiconductor substrate and then performing a heat treatment to form an insulating layer; Performing a heat treatment in a gas atmosphere to segregate nitrogen at the interface between the semiconductor substrate and the insulating layer so that the peak concentration is 1.45 × 10 ²¹ (atoms / cm ³ ) or less. A method for manufacturing a semiconductor substrate.

[0070]

According to the present invention, when achieving high-speed operation and low power consumption of a device using an SOI substrate,
Reducing the interface state between the semiconductor layer and the insulating layer of the SOI substrate,
By improving the carrier mobility, it is possible to significantly improve the device operation performance and reliability.

[Brief description of the drawings]

FIG. 1 is a MOSFET using an SOI substrate according to the present invention.
It is a schematic sectional drawing which shows an example of the manufacturing method of.

FIG. 2 is a characteristic diagram showing a concentration distribution of nitrogen, oxygen, and silicon in a depth direction of an SOI substrate when a nitrogen concentration at an SOI / BOX interface in a MOSFET is 0.9%.

FIG. 3 is a characteristic diagram showing the effective mobility of electrons with respect to each nitrogen concentration.

FIG. 4 is a characteristic diagram showing a result of examining an interface state density by a charge pumping method.

FIG. 5 shows a MOSF using the SOI substrate according to the present embodiment.
It is an outline sectional view showing a manufacturing method of ET in order of a process.

FIG. 6 is a characteristic diagram showing the results of measuring the effective mobility of electrons and the interface state density at the SOI / BOX interface.

FIG. 7 is a schematic cross-sectional view showing a method for manufacturing a bonded SOI substrate according to Example 1 in the order of steps;

FIG. 8 is a schematic cross-sectional view showing a method for manufacturing a SIMOX SOI substrate according to the second embodiment in the order of steps;

[Explanation of symbols]

 Reference Signs List 1 SOI substrate 11, 42, 52 BOX layer 12 Surface silicon layer 13, 43, 53 Nitride segregation layer 14, 26 Gate insulating film 15, 29 Gate electrode 16 Source / drain 17 Each tungsten (W) electrode 21 Silicon oxide film 22, Reference Signs List 28 silicon nitride film 23 photoresist 24 resist mask 25 field insulating film 27 polycrystalline silicon film 30 source / drain 31 side wall 32 interlayer insulating film 41, 44, 51 semiconductor substrate 42 insulating layer

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Kenichi Hitsuya 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa F-term within Fujitsu Limited (reference) 5F110 AA01 AA14 CC02 DD05 DD12 DD13 DD14 DD15 DD17 DD25 EE04 EE09 EE32 EE38 EE44 EE45 FF02 FF23 GG02 GG12 GG25 GG28 GG32 GG34 HJ01 HJ04 HJ13 HL04 HL23 NN03 NN23 NN24 NN35 NN62 NN66 QQ08 QQ11 QQ17

Claims (6)

[Claims] 1. A semiconductor device in which a semiconductor element is formed on an SOI substrate having a semiconductor layer on an insulating layer, wherein nitrogen segregates at an interface between the insulating layer and the semiconductor layer, and a peak of the nitrogen is generated. When the concentration is 1.45 × 10 ²¹ (atoms /
cm ³ ) or less. 2. A method for manufacturing a semiconductor device in which a semiconductor element is formed on an SOI substrate having a semiconductor layer on an insulating layer, wherein the SOI substrate is subjected to a heat treatment in a nitriding gas atmosphere.
A method for manufacturing a semiconductor device, wherein nitrogen is segregated at an interface between the insulating layer and the semiconductor layer such that a peak concentration is 1.45 × 10 ²¹ (atoms / cm ³ ) or less. 3. The method according to claim 2, wherein after segregating nitrogen at the interface, a surface of the semiconductor layer is washed to form a gate insulating film of the semiconductor element. . 4. A semiconductor substrate having a semiconductor layer over an insulating layer, wherein nitrogen having a peak concentration of 1.45 × 10 ²¹ (atoms / cm ³ ) or less is provided at an interface between the insulating layer and the semiconductor layer. A semiconductor substrate characterized by being segregated. 5. A step of forming an insulating layer on a semiconductor layer of a first substrate when manufacturing a semiconductor substrate with a bonded SOI structure, and subjecting the first substrate to a heat treatment in a nitriding gas atmosphere. Alms,
A step of segregating nitrogen at an interface of the semiconductor layer with the insulating layer so that the peak concentration is 1.45 × 10 ²¹ (atoms / cm ³ ) or less; And bonding the substrate to a second substrate. 6. A method of manufacturing a semiconductor substrate having a SIMOX type SOI structure, comprising the steps of: introducing oxygen ions into the semiconductor substrate and performing a heat treatment to form an insulating layer; Heat treatment,
A step of segregating nitrogen at an interface between the semiconductor substrate and the insulating layer so that a peak concentration is 1.45 × 10 ²¹ (atoms / cm ³ ) or less. .