JP2002009200A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JP2002009200A
JP2002009200A JP2000185862A JP2000185862A JP2002009200A JP 2002009200 A JP2002009200 A JP 2002009200A JP 2000185862 A JP2000185862 A JP 2000185862A JP 2000185862 A JP2000185862 A JP 2000185862A JP 2002009200 A JP2002009200 A JP 2002009200A
Authority
JP
Japan
Prior art keywords
circuit board
semiconductor
semiconductor device
sealing resin
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000185862A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002009200A5 (enExample
Inventor
Haruto Nagata
治人 永田
Takeshi Morikawa
健 森川
Atsuo Oki
篤夫 大木
Fumio Sato
文男 佐藤
Yoshiaki Shimizu
義明 清水
Yuki Koishi
勇喜 小石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2000185862A priority Critical patent/JP2002009200A/ja
Publication of JP2002009200A publication Critical patent/JP2002009200A/ja
Publication of JP2002009200A5 publication Critical patent/JP2002009200A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Dicing (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2000185862A 2000-06-21 2000-06-21 半導体装置の製造方法 Pending JP2002009200A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000185862A JP2002009200A (ja) 2000-06-21 2000-06-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000185862A JP2002009200A (ja) 2000-06-21 2000-06-21 半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008313841A Division JP2009055069A (ja) 2008-12-10 2008-12-10 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2002009200A true JP2002009200A (ja) 2002-01-11
JP2002009200A5 JP2002009200A5 (enExample) 2006-04-06

Family

ID=18686119

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000185862A Pending JP2002009200A (ja) 2000-06-21 2000-06-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JP2002009200A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008235913A (ja) * 2008-03-31 2008-10-02 Renesas Technology Corp 半導体装置の製造方法
JP2012227371A (ja) * 2011-04-20 2012-11-15 Disco Abrasive Syst Ltd パッケージ基板の加工方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008235913A (ja) * 2008-03-31 2008-10-02 Renesas Technology Corp 半導体装置の製造方法
JP2012227371A (ja) * 2011-04-20 2012-11-15 Disco Abrasive Syst Ltd パッケージ基板の加工方法

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