JP2001332641A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To raise reliability to mechanical vibration and impact in a connection between a semiconductor chip and a mounting substrate. SOLUTION: A solder ball 4 is formed of a composition of about 97.7 to 99.3 wt.% of Sn, about 0.5 to 1.5 wt.% of Ag, and about 0.2 to 0.8 wt.% of Cu.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing technology, and more particularly to a semiconductor device in which a semiconductor chip is mounted on a mounting board using solder and a technology effective when applied to the manufacturing technology. It is.

[0002]

2. Description of the Related Art As electronic devices become smaller and lighter, semiconductor device packages are also required to be thinner and smaller and lighter. CSP (Chip Size Package) is a general term for packages that are equal to or slightly larger than the size of a semiconductor chip. The CSP can be made smaller and lighter, and the internal wiring length can be shortened. It has been put to practical use as a package structure that can reduce the amount of light.

In order to mount such a CSP type semiconductor chip on a mounting board, solder balls are attached to the semiconductor chip, and solder paste is printed on the mounting board. Conventionally, Sn (tin) -Pb (lead) -based solder material has been used as a solder material.
Today, the demand for environmental protection measures has increased, and the development of solder materials that do not contain Pb, which is an environmentally hazardous substance, has been promoted.

[0004] As an effective Pb-free solder material, for example, February 3-4, 2000, 6 t
h Symposium on Microjoini
ngand Assembly Technology
in Electronicsonics, P297-P30
2. “Experimental considerations on reduction of fillet peeling of lead-free solder” include Sn-Ag (silver) based, Sn-Ag
There are descriptions of Bi (bismuth) -based and Sn-Zn (zinc) -based solder materials.

[0005] Solder materials such as Sn-Ag, Sn-Ag-Bi and Sn-Zn have inferior wettability and higher melting point than conventional Sn-Pb solder materials. As the melting point of the solder material increases, it becomes necessary to increase the heat resistance of components constituting the semiconductor device. However, initially, the present inventors considered that the wettability and the melting point were not other than the wettability and the melting point from the viewpoint that the wettability and the melting point were not fundamental problems in practical use when the semiconductor chip was mounted on the mounting substrate. We have examined whether there are any practical problems with regard to the characteristics of. That is, the solder balls are attached to the semiconductor chip and the solder paste is printed on the mounting board on which the semiconductor chip is mounted. Among them, the eutectic composition of Sn-Ag system is 96.
5Sn-3.5Ag (the content of Ag is expressed as (100-x) Sn-xAg as x in weight% unit)
It has been applied as a solder ball to be attached to a semiconductor chip.

Also, for example, (a) February 3, 2000
Sun to 4th, 6th Symposium on Mic
rojoining and Assembly Te
Chronology in Electronics, P
125 to P130, "B using Cu core solder ball
GA joint structure and mechanical properties-2nd report-", (b) 2
February 3-4, 2000, 6th Symposium
on Microjoining and Asses
mbly Technology inElector
onics, P255-P260, "Effect of Cu core on BGA joint structure using Sn-Ag solder",
In this method, Cu (copper) is used as the core of the solder ball to suppress the growth of the interface reaction layer of the solder ball due to reflow and high temperature storage, thereby deteriorating the joint strength of the solder ball and reducing the solder ball and pad (package side). )), There is a description of a technique for preventing the deterioration of the shear strength at the joint with the above.

[0007]

However, the above-mentioned 9
When 6.5Sn-3.5Ag is used as a solder ball attached to a semiconductor chip and a solder paste printed on a mounting board on which the semiconductor chip is mounted, the following problems occur.

That is, when 96.5Sn-3.5Ag is used as a solder ball to be attached to a semiconductor chip, during the manufacture and testing of a large number of semiconductor chips, this solder ball can be used for mechanical tests such as vibration and drop tests. The present inventors have found that there is a problem that the impact falls off although the ratio is small.

[0009] 96.5Sn-3.5Ag is a point at which the temperature at which the phase changes from the liquid phase to the solid phase and from the solid phase to the liquid phase is 221 ° C. In other words, a solder ball using 96.5Sn-3.5Ag solidifies instantaneously at 221 ° C. when cooled after melting. At that time, 96.5Sn-3.5Ag
Becomes a mixed state of Sn and Ag ₃ Sn, and Ag ₃ Sn
May appear as needle-like crystals on the surface of the solder ball. Therefore, the composition and the surface of the solder ball tend to be non-uniform, and the connection strength may be reduced. That is, the present inventors have found that a decrease in the connection strength causes the solder ball to fall off due to mechanical shock such as vibration or a drop test.

When 96.5Sn-3.5Ag is used as a solder paste to be printed on a mounting board on which a semiconductor chip is mounted, a test is performed by applying the solder paste to the connection between the semiconductor chip and the mounting board. In the meantime, the present inventors have found that there is a problem that a break occurs at a connection portion due to a mechanical impact. The present inventors analyzed and examined the solder paste at the broken portion when the break occurred, and found that voids remained in the solder paste.

Further, the present inventors have found that the connection at the portion where the void remains is weak and is the main cause of disconnection failure of a semiconductor device having a semiconductor chip mounted on a mounting substrate.

An object of the present invention is to provide a technique capable of improving the reliability against mechanical vibration and impact at a connection portion between a semiconductor chip and a mounting substrate.

Another object of the present invention is to provide a technique capable of stably ensuring the reliability against mechanical vibration and impact at a connection portion between a semiconductor chip and a mounting substrate.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0015]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the present invention provides a step of forming a semiconductor chip by cutting a semiconductor wafer having a semiconductor element and a wiring layer on a main surface, and placing the semiconductor chip at a predetermined position on the main surface of the first substrate. Mounting, electrically connecting a wiring layer of the semiconductor chip to a wiring layer of the first substrate, forming a sealing insulating film on a main surface of the first substrate, And forming a bump electrode at a predetermined position on the back surface of the first substrate, the bump electrode being electrically connected to the wiring layer of the first substrate. 0.7% to 99.3% by weight, silver 0.5% to 1.5% by weight and copper 0.2%
The composition is formed so as to have a total content of 2% by weight or less of bismuth, lead, antimony, zinc and indium in the above composition.

Further, according to the present invention, a step of forming a bump electrode electrically connected to the wiring layer at a predetermined position on a back surface of a first substrate having a semiconductor element and a wiring layer on a main surface; Cutting one substrate to form a semiconductor chip, wherein the bump electrode contains 97.7% to 99.3% by weight of tin and 0.5% to 1.5% by weight of silver.
And at least one of bismuth, lead, antimony, zinc, and indium in a composition in which the content of copper is 0.2% by weight to 0.8% by weight or the composition described above is 2% by weight in total.
It is formed with the composition contained below.

According to the present invention, a semiconductor chip having a semiconductor element and a wiring layer on a main surface, and the semiconductor chip mounted on the main surface, and an internal wiring layer and a wiring layer included in the semiconductor chip are formed. A first substrate electrically connected thereto, and a bump electrode electrically connected to a wiring layer inside the first substrate at a predetermined position on a back surface of the first substrate, wherein the bump electrode includes tin. 97.7% by weight to 99.3%
% By weight, 0.5% to 1.5% by weight of silver and 0.2% to 0.8% by weight of copper, or at least one of bismuth, lead, antimony, zinc and indium in the aforementioned composition. One is formed with a composition containing 2% by weight or less in total.

Further, according to the present invention, a bump electrode electrically connected to the wiring layer at a predetermined position on a back surface of the first substrate having a semiconductor element and a wiring layer on a main surface, and the first substrate is cut off. The bump electrode includes 97.7% by weight of tin to 97.7% by weight.
9.3% by weight, 0.5% to 1.5% by weight of silver and 0.2% to 0.8% by weight of copper, or bismuth, lead, antimony, zinc and indium Is formed with a composition containing at least 2% by weight or less in total.

According to the above-described present invention, the bump electrode of the semiconductor device is provided with 97.7% to 99.3% by weight of tin, 0.5% to 1.5% by weight of silver and 0% by weight of copper. .2
Since the bump electrode is formed with a composition of from 0.8% by weight to 0.8% by weight, the bump electrode can have improved resistance to vibration and drop.

Further, according to the present invention described above, the bump electrode of the semiconductor device is provided with tin of 97.7% by weight to 99.9% by weight.
3% by weight, 0.5% to 1.5% by weight of silver and 0.2% to 0.8% by weight of copper, so that the composition and surface of the bump electrode are uniform. be able to.

Further, according to the present invention, since the composition and surface of the bump electrode of the semiconductor device can be homogenized, it is possible to prevent the connection strength of the bump electrode from decreasing.

Further, according to the present invention, the bump electrode included in the semiconductor device is provided with tin of 97.7% by weight to 99.9% by weight.
3% by weight, 0.5% by weight to 1.5% by weight of silver and 0.2% by weight to 0.8% by weight of copper. The generated stress can be absorbed by the bump electrode.

Further, according to the present invention, the bump electrode included in the semiconductor device is provided with tin of 97.7% by weight to 99.9% by weight.
3% by weight, 0.5% by weight to 1.5% by weight of silver and 0.2% by weight to 0.8% by weight of copper make it possible to prevent voids from entering the bump electrode. it can.

Further, according to the present invention, since it is possible to prevent voids from entering the bump electrodes of the semiconductor device, it is possible to prevent a reduction in the connection strength of the connection portion due to the bump electrodes and a disconnection failure.

Further, according to the present invention, the bump electrode included in the semiconductor device is formed by adding 97.7% by weight of tin to 99.9% by weight.
3% by weight, 0.5% to 1.5% by weight of silver and 0.2% to 0.8% by weight of copper, so that bismuth, lead, antimony, and zinc are included in the composition. 2% by weight of at least one of indium and indium
Also in the case of adding below, it is possible to prevent a decrease in the resistance to vibration and the resistance to falling of the bump electrode.

[0027]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, members having the same functions are denoted by the same reference numerals, and the repeated description thereof will be omitted.

(Embodiment 1) In Embodiment 1, for example, the present invention is applied to a solder ball of a CSP of a system LSI.

FIG. 1A is a plan view of a main part of the CSP 1 of the system LSI according to the first embodiment, and FIG.
FIG. 2 is a cross-sectional view of a main part along line AA in FIG. Note that in FIG. 1A, the system L
An SI chip (semiconductor chip) 3 and a solder ball (bump electrode) 4 are also shown.

As shown in FIGS. 1A and 1B, the CSP 1 of the system LSI according to the first embodiment includes, for example, a system LSI chip 3 on a substrate (first substrate) 2.
It has a structure equipped with. The CSP 1 has a maximum height of about 1.2 mm and an outer shape of about 14 mm square. The diameter of the terminal pad (wiring layer) of the substrate 2 is about 0.45 mm, which is 176 pins. The substrate 2 is made of six layers of organic materials, and has a surface on which terminal pads are formed, subjected to electroless plating of nickel (Ni) and gold (Au). In FIG. 1, the illustration of the terminal pads is omitted.

On the back surface of the substrate 2, solder balls 4 having a diameter of about 0.46 mm are arranged at intervals of about 0.8 mm to form a system LSI.
The chips 3 are arranged in four rows so as to surround them.

The system LSI chip 3 is electrically connected to the substrate 2 by wire bonding using bonding wires 5. Further, the system LSI chip 3 connected to the substrate 2 is resin-sealed with a mold resin 6 of about 10 mm square. This mold resin 6
Is made of, for example, an epoxy resin.

Next, FIG. 2 shows the composition of the solder ball 4. The composition of the solder ball 4 is composed of a ternary system of Sn, Ag and Cu. In the first embodiment, the present inventors have studied the solder ball 4 having the composition indicated by the composition points 11 to 38.

In manufacturing the solder ball 4, the material lot consists of three lots of Sn, Ag and Cu. The solder balls 4 can be manufactured by printing and reflowing the substrate 2 for each material lot.
In addition, any of the above-described Sn, Ag, and Cu may be used for printing and reflowing the substrate 2 from any material, so that the number of processes for manufacturing the solder balls 4 can be nine.

The reflow condition is a maximum temperature of 245 ° C.
5 seconds under the above conditions, the above composition points 11 to 11
It was confirmed that the solder balls 4 having any composition indicated by 38 were melted.

After manufacturing the CSPs 1, the present inventors manufactured six CSPs 1 for each of the solder balls 4 having different compositions, and performed the following measurements. That is, the resistance value between the surface of the solder ball 4 which is all the terminals of the six CSPs 1 and the wiring portion connected to the pad electrically connected to the solder ball 4 was measured by the four-terminal method. Table 1 shows the measurement results. In Table 1, sample numbers 11 to 38 are
This corresponds to composition points 11 to 38 shown in FIG.

[0037]

[Table 1] Further, the present inventors manufactured 32 CSPs 1 for each solder ball 4 having a different composition, and performed the following drop test.
That is, one side (X direction) of the CSP1 is perpendicular to the floor from a position 1.5 m above the plastic floor,
The other side (Y direction) and thickness direction (Z direction) of CSP1 were dropped horizontally on the floor. Subsequently, from a position 1.5 m above the floor, the CSP 1 was dropped with the Y direction perpendicular to the floor and the X direction and Z direction horizontal to the floor. Continue further,
From a position 1.5 m above the floor, the CSP 1 was dropped with the Z direction vertical to the floor and the X direction and Y direction horizontal to the floor. All three drop tests were performed once, and three, five, ten, fifteen, and twenty drop tests were repeated. By the drop test, the CSP 1 from which the solder ball 4 was dropped even by one bump was determined to be defective, the number of defective CSPs 1 was counted, and the total number was counted each time. Table 1 shows the results.

Further, the present inventors manufactured 32 CSPs 1 for each solder ball 4 having a different composition, and conducted the following vibration test. That is, about 16 mm square and 1.5 m height
16 CSP1s were placed in each of the two plastic cases, and the case lid was fixed. Subsequently, one side of the case is defined as the X direction, the other side is defined as the Y direction, and the height direction is defined as the Z direction.
frequency of about z to 500 Hz and about 29.4 m / s ²
Vibration was applied at an acceleration of about 2 hours. As in the case of the drop test described above, in the case of the vibration test as well, the CSP 1 from which the solder ball 4 dropped even with one bump was regarded as defective. Table 1 shows the number of CSPs that failed in this vibration test.
Shown in

From the results shown in Table 1, the solder balls 4
Is about 97.7% by weight to 99.3% by weight of Sn,
g was about 0.5% to 1.5% by weight and Cu was about 0.2% to 0.8% by weight (in Table 1, sample numbers are marked with circles). It has been found that the resistance to vibration and the resistance to falling of the solder ball 4 can be improved.

As described above, the Sn content is about 97.7% by weight to 9%.
The solder ball 4 having a composition of about 9.3% by weight, about 0.5% to 1.5% by weight of Ag and about 0.2% to 0.8% by weight of Cu is cooled after melting. S
Since n suppresses the crystal growth of Ag ₃ Sn, the composition and the surface of the solder ball 4 can be made uniform.

The Ag forming the solder ball 4
However, for example, in the case of about 1% by weight, the temperature at which the solder ball 4 becomes a liquid phase is about 217 ° C., and the temperature range at which the solder ball 4 becomes a state where a solid phase and a liquid phase coexist is about 10 ° C.
It is. Therefore, even when the solder ball 4 has a partial deviation in the initial composition, there is a time allowance for the solder ball 4 to be homogenized from a molten state to a solidified state.

That is, Sn is about 97.7% by weight to 9% by weight.
Solder ball 4 formed with a composition of about 9.3% by weight, about 0.5% to 1.5% by weight of Ag, and about 0.2% to 0.8% by weight of Cu, Since the composition and the surface can be homogenized, it is possible to prevent a decrease in connection strength with the bump. further,
When the CSP 1 of the first embodiment is connected to the mounting board by the solder balls 4, it is possible to prevent a decrease in connection strength at the connection portion and a disconnection failure.

Further, since the composition and the surface of the solder ball 4 can be homogenized, Ag ₃ Sn can be prevented from forming as needle-like crystals on the surface of the solder ball 4. Therefore, it is possible to prevent the solder balls 4 from short-circuiting between the terminal pads.

Further, the above-mentioned solder ball 4 has a thickness of about 0.1 mm.
Since approximately 2% by weight to 0.8% by weight of copper is included, it is possible for the solder balls 4 to absorb stress generated by impact, heat, or the like. That is, it is possible to prevent a decrease in joint strength and a decrease in shear strength of the solder ball 4 due to reflow and high temperature storage.

Further, according to an experiment conducted by the present inventors, when the above-mentioned solder ball 4 is made to have about 0.5% by weight to about 1.5% by weight of Ag, a void is formed inside thereof. Was difficult to enter. As described above, when Ag is about 1% by weight, the temperature range in which the solder ball 4 is in a state where the solid phase and the liquid phase coexist is as wide as about 10 ° C. Therefore, after the solder ball 4 is heated and melted in a reflow furnace or the like, when the solder ball 4 solidifies from the melt, the composition surrounding the composition that solidifies first integrates the solder particles. Voids can be prevented. That is, when the CSP 1 of the first embodiment is connected to the mounting board by the solder balls 4, it is possible to prevent a decrease in connection strength at the connection portion and a disconnection failure.

Meanwhile, the substrate 2 used in the first embodiment is formed by electroless plating of Ni and Au on the surface on which the terminal pads are formed. According to an experiment conducted by the present inventors, in manufacturing the CSP 1, the Ag that forms the solder balls 4 using the substrate 2 whose storage state is not good.
Is about 2% by weight or more, it has been found that the solder balls 4 may not be wet on the surface of the substrate 2 where the terminal pads are formed. According to an experiment performed by the present inventors, when Ag contained in the solder ball 4 is set to about 0.5% by weight to 1.5% by weight, the terminal pad of the substrate 2 is formed. No poor wetting of the solder balls 4 on the surface was observed. That is, Ag contained in the solder ball 4 is set to about 0.5% by weight to 1.5% by weight.
When the content is about% by weight, the wettability between the substrate 2 and the solder ball 4 can be improved.

In the first embodiment, the composition of the solder ball 4 is about 97.7% to 99.3% by weight of Sn, about 0.5% to 1.5% by weight of Ag,
By making u about 0.2% to 0.8% by weight,
Its composition and surface can be homogenized. Also,
Since the solder ball 4 contains about 0.2% to 0.8% by weight of copper, the stress generated by impact, heat, and the like can be absorbed by the solder ball 4. Further, the solder ball 4 reduces Ag contained in the solder ball 4 by about 0.5.
By setting the content to about 1.5 to 1.5% by weight, it is possible to make it difficult for voids to enter the inside. By superimposing the effects of these three points, the bonding strength by the solder ball 4 can be further strengthened. That is, the CSP 1 according to the first embodiment can have higher resistance to mechanical shock.

Since the solder ball 4 described in the first embodiment does not contain Pb, the load on the environment can be reduced.

(Embodiment 2) In Embodiment 2, the present invention is applied to, for example, a flip-chip (FC) type CSP solder ball on which a memory chip is mounted.

FIG. 3A is a plan view of a main part of the CSP 41 on which the memory chip 43 of the second embodiment is mounted, and FIG. 3B is a view taken along a line BB in FIG. 3A. It is principal part sectional drawing. In FIG. 3A, a memory chip (semiconductor chip) 43 and a solder ball 44 (bump electrode) are also shown for explanation.

As shown in FIGS. 3A and 3B, the CSP 4 having the memory chip according to the second embodiment is mounted.
1 has an outer shape of about 7 mm × 11 mm square. Further, the diameter of the terminal pad of the substrate 42 is about 0.45 mm, which is 60 pins. The substrate (first substrate) 42 is made of four layers of organic materials, and the terminal pads (wiring layers) are made of Cu. The resist opening diameter when forming the terminal pad is about 0.4 mm. In FIG. 3, illustration of the terminal pads is omitted.

On the back surface of the substrate 42, a diameter of about 0.46 mm
Are arranged at intervals of about 0.8 mm. In the second embodiment, the solder balls 4
As a composition of No. 4, a composition comprising Sn, Ag and Cu ternary system described in Embodiment 1 with reference to FIG. 2 and at least one of Bi, Pb, Sb, Zn and In added. Was used. In addition, a dedicated tray is used for storing the solder balls 44.

The memory chip 43 is electrically connected to the substrate 42 by wire bonding using bonding wires 45. Further, the memory chip 43 connected to the substrate 42 is resin-sealed with a mold resin 46 of about 7 mm × 10 mm square. The mold resin 46 is made of, for example, an epoxy resin.

The present inventors manufactured 32 CSPs 41 for each solder ball 4 having a different composition, and performed a drop test similar to the drop test described in the first embodiment. Table 2 shows the results. Note that, in Table 2, the CSP 41 is expressed as FC.

[0055]

[Table 2] In addition, the present inventors manufactured 32 CSPs 41 for each solder ball 44 having a different composition, and described the first embodiment.
A vibration test similar to the vibration test described above was performed.
Table 2 shows the results.

From the results shown in Table 2, the solder balls 44
In the first embodiment, the same Sn as that of the solder ball 4 described with reference to FIGS.
7wt% ~ 99.3wt%, Ag is about 0.5wt%
About 1.5% by weight and about 0.2% by weight of Cu to 0.1% by weight.
A composition having a composition of about 8% by weight is defined as one component.
When at least one of b, Sb, Zn and In is added in a total amount of about 2% by weight or less (composition in Table 2 with a sample number marked with a circle), resistance to vibration and dropping It was found that the resistance did not decrease. That is, Bi, P added to the solder ball 44
b, Sb, Zn and In are added in an amount of about 2% by weight.
It has been found that when the degree is less than the degree, the resistance to vibration and the resistance to falling are not reduced. Table 2
In the above, Sn contained 98.25% to 98.75% by weight, Ag contained 0.75% to 1.25% by weight and C
Only the results when u is 0.25% by weight to 0.75% by weight are shown.

In the second embodiment, as in the case of the solder ball 4 described in the first embodiment, the composition of the solder ball 44 is such that the Sn content is about 97.7% by weight to 99.3% by weight.
The composition and surface can be homogenized by adjusting the amount of Ag to about 0.5% to 1.5% by weight and Cu to about 0.2% to 0.8% by weight. In addition, since the solder ball 44 contains about 0.2% to 0.8% by weight of copper, the stress generated by impact, heat, or the like can be absorbed by the solder ball 44. Further, the solder ball 44 is formed such that the amount of Ag contained in the solder ball 44 is about 0.5% to 1.5% by weight, similarly to the solder ball 4 described in the first embodiment. Voids can be reduced.
By superimposing these three effects, the bonding strength of the solder ball 44 can be further increased. That is, similarly to the CSP 1 described in the first embodiment with reference to FIG. 1, the CSP 41 according to the second embodiment can have higher resistance to mechanical shock.

Third Embodiment In a third embodiment, the present invention is applied to, for example, a solder ball of a microcomputer CSP.

FIG. 4A is a plan view of a main part of a microcomputer CSP 51 according to the third embodiment, and FIG.
It is principal part sectional drawing in the CC line | wire in (a). In addition,
In FIG. 4A, a microcomputer chip (semiconductor chip) 53 and a solder ball (bump electrode) 54 are also shown for explanation.

As shown in FIGS. 4A and 4B, the microcomputer CSP 51 according to the third embodiment has an outer shape of about 14.5 mm square and a height of about 1.2 mm. The diameter of the bump attached to the terminal pad of the substrate (first substrate) 52 is about 0.46 mm outside the substrate 52, and the diameter of the terminal pad (wiring layer) is 6 mm.
0 pin. The substrate 52 is composed of six layers of organic materials. In FIG. 4, illustration of terminal pads and bumps is omitted.

On the back surface of the substrate 52, a diameter of about 0.46 mm
225 solder balls 54 are arranged at intervals of about 0.8 mm. In the third embodiment, the solder ball 54 is made of the ternary system of Sn, Ag and Cu described in the first embodiment with reference to FIG. About 5% by weight, about 1% by weight of Ag and about 0.5% by weight of Cu (9
8.5Sn-1Ag-0.5Cu).

The microcomputer chip 53 is electrically connected to the substrate 52 by wire bonding using bonding wires 55. Further, the microcomputer chip 53 connected to the substrate 52 is resin-sealed with a mold resin 56 having an outer shape of about 14 mm square. The mold resin 56 is made of, for example, an epoxy resin.

The present inventors manufactured six microcomputers CSP51 for each solder ball 54 having a different composition, and formed a surface of the solder ball 54 and a wiring portion connected to a pad electrically connected to the solder ball 54. Between 4
It was measured by the terminal method. In addition, the present inventors have determined that each of the 32 microcomputer CSP5
1 was manufactured, and a drop test similar to the drop test described in the first embodiment was performed. In addition, we have:
Thirty-two microcomputers CSP51 were manufactured for each solder ball 54 having a different composition, and the same vibration test as that described in the first embodiment was performed.

As a result, the solder balls 54 are
It was found that when formed with the composition of n-1Ag-0.5Cu, the resistance to vibration and resistance to drop of the solder ball 54 can be improved in the same manner as the case of the solder ball 4 described in the first embodiment.

In the third embodiment, the composition of the solder ball 54 is about 98.5% by weight of Sn and about 1% of Ag.
When the content is about 0.5% by weight and the content of Cu is about 0.5% by weight, the composition and the surface can be homogenized similarly to the solder ball 4 described in the first embodiment. Further, since the solder ball 54 contains about 0.5% by weight of copper, the stress generated by impact, heat, or the like can be absorbed by the solder ball 54. Further, the solder ball 54 contains about 1% by weight of Ag contained in the solder ball 54.
By setting the degree, it is possible to make it difficult for voids to enter inside the solder ball 4 similarly to the solder ball 4 described in the first embodiment. By superimposing the effects of these three points, the bonding strength of the solder balls 54 can be further strengthened. That is, similar to the CSP 1 described with reference to FIG.
Microcomputer CSP51 can be made more resistant to mechanical shock.

(Embodiment 4) In Embodiment 4, for example, the CSP1 of the system LSI described with reference to FIG. 1 in Embodiment 1 is replaced by Ag-Pt on an alumina (Al ₂ O ₃ ) multilayer substrate. The present invention is applied to a case where the present invention is mounted on a (platinum) pad.

As shown in FIGS. 5A and 5B, in the fourth embodiment, the CSP1 of the system LSI described in the first embodiment with reference to FIG. ) Ag-Pt pad 62 on 61
To be implemented. The Ag-Pt pad 62 in the portion where the CSP 1 of the system LSI is mounted is smaller than the Ag-Pt pad 62 on the outer peripheral portion of the alumina multilayer substrate 61 and is difficult to illustrate, so that it is omitted in FIG. Also,
FIG. 5B is a cross-sectional view of a principal part taken along line DD in FIG. 5A. In FIG. 5A, a system LSI chip 3 and solder balls 4 are also shown for explanation.

The alumina multilayer substrate 61 has an outer shape of about 2
It is about 7 mm square, and W (tungsten)
Is formed.

The mounting of the CSP 1 on the alumina multilayer substrate 61 is performed by applying a flux to the mounting surface and ensuring the wettability of the molten solder balls 4 on the joint surface between the CSP 1 and the alumina multilayer substrate 61.

The present inventors set the composition of the solder ball 4 as described with reference to FIG.
A ternary system of n, Ag and Cu is used, and there are 29 kinds thereof. Table 3 shows the composition of the solder ball 4 in the fourth embodiment.

[0071]

[Table 3] Then, the present inventors manufactured six alumina multilayer boards 61 each having the CSP 1 mounted thereon for each solder ball 4 having a different composition, and electrically connected the surface of the solder ball 4 to the solder ball 4. The resistance between the wiring portion connected to the pad and the wiring portion was measured by a four-terminal method. Table 3 shows the measurement results.
Shown in

The present inventors manufactured 32 alumina multilayer substrates 61 each having the CSP 1 mounted thereon for each solder ball 4 having a different composition, and conducted the following vibration test. That is, after the alumina multilayer substrate 61 is directly fixed to the vibrating table, one side of the alumina multilayer substrate 61 is defined as the X direction, the other side is defined as the Y direction, and the height direction is defined as the Z direction. , Y, Z about 15 to 500
Vibration was applied for 2 hours at a frequency of about Hz and an acceleration of about 29.4 m / s ² . As in the case of the drop test described in the first embodiment, also in the fourth embodiment, the CS in which the solder ball 4 has fallen off even with one bump.
P1 was regarded as defective. CS that failed in this vibration test
Table 3 shows the number of P1.

Further, the present inventors manufactured 32 alumina multilayer substrates 61 each having the CSP 1 mounted thereon for each solder ball 4 having a different composition, and performed the same drop test as in the drop test described in the first embodiment. The test was performed. Table 3 shows the results.

From the results shown in Table 3, the solder balls 4
Is about 97.7% by weight to 99.3% by weight of Sn,
g was about 0.5% to 1.5% by weight and Cu was about 0.2% to 0.8% by weight (in Table 3, circles are added to the sample numbers). It has been found that the resistance to vibration and the resistance to falling of the solder ball 4 can be improved.

In the fourth embodiment, similar to the solder ball 4 described in the first embodiment, the composition of the solder ball 4 is such that Sn is about 97.7% by weight to 99.3% by weight and Ag is About 0.5% to 1.5% by weight and C
By making u about 0.2% to 0.8% by weight,
The bonding strength by the solder balls 54 can be improved. That is, similarly to the CSP 1 described with reference to FIG. 1 in the first embodiment, the resistance to mechanical shock at the joint between the alumina multilayer substrate 61 and the CSP 1 in the fourth embodiment is to be increased. It becomes possible.

(Embodiment 5) This embodiment 5 relates to a CSP 41 mounted with components such as a flash memory, a gate array and a chip capacitor, and the memory chip described with reference to FIG. The present invention is applied to an MCM (Multichip Module) in which the microcomputer CSP51 or the like described in the third embodiment with reference to FIG. 4 is mounted on a module card substrate.

As shown in FIGS. 6A and 6B, in the fifth embodiment, for example, a flash memory (electronic component) 72 is provided on an organic substrate 71 for a module card.
a, 72b, gate array (electronic component) 73, CS
P41 and the microcomputer CSP51 are mounted. FIG.
FIG. 7B is a cross-sectional view of a main part along line EE in FIG.

The organic substrate (second substrate) 71 is composed of four layers of organic materials, and although not shown in FIG. 6, the above-mentioned flash memories 72a, 72b, gate array 7
3, a pad for mounting the CSP41 and the microcomputer CSP51. The pad is Ni (nickel)
/ Au plating is applied. At the end of the organic substrate 71, a stopper 74 is formed. Flash memory 7
2b is a flash memory 72 on the organic substrate 71.
a, gate array 73, CSP41 and microcomputer CS
It is mounted on the surface opposite to the surface on which P51 is mounted.

The CSP 41 and the microcomputer CSP 51 have a solder ball 44 and a solder ball 54, respectively.
CSP41 and microcomputer CSP
51 and the above-mentioned flash memories 72a and 72b
And mounting components such as the gate array 73 on the organic substrate 71.
First, a solder paste is printed on the organic substrate 71. This solder paste is used for solder balls 4
4 can be used. Table 4 shows the compositions of the solder paste and the solder balls 44.

[0080]

[Table 4] After printing the solder paste on the organic substrate 71, the above-mentioned mounted components are mounted on the organic substrate 71, and about 2
The solder paste, the solder balls 44 and the solder balls 54 are melted by performing a heat treatment at about 40 ° C. to 250 ° C. Subsequently, by solidifying the melted solder paste, the solder balls 44 and the solder balls 54, each mounted component can be mounted on the organic substrate 71 at a time.

In addition, components other than the mounting components described above
Those manufactured on the premise that they are mounted using solder composed of b and Sn have a heat-resistant temperature of about 240 ° C. to 245 ° C. It can be mounted on and heat-treated. It is also possible to mount and heat the other of the mounted components and the other components first, and then mount and heat the other.

The present inventors conducted a vibration test on the organic substrate 71 on which each mounted component was mounted, in the same manner as in the fourth embodiment. At this time, for each of the solder pastes and solder balls 44 having different compositions, 32 organic substrates 71 on which the respective mounted components were mounted were prepared. Table 4 shows the number of CSPs 41 in which a failure occurred in the vibration test. In Table 4, the CSP 41 is expressed as FC.

Subsequently, the present inventors conducted a drop test on the organic substrate 71 on which each mounted component was mounted, in the same manner as in the fourth embodiment. At this time, for each of the solder pastes and solder balls 44 having different compositions, 32 organic substrates 71 on which the respective mounted components were mounted were prepared. Table 4 shows the number of CSPs 41 that failed in the drop test.

From the results shown in Table 4, the solder paste and the solder balls 44 contained Sn in an amount of about 97.7% by weight to 9%.
A composition containing about 9.3% by weight, about 0.5% to 1.5% by weight of Ag, and about 0.2% to 0.8% by weight of Cu is defined as one component. Pb, Sb, Z
When at least one of n and In is added in a total amount of about 2% by weight or less (in Table 4, the composition in which a circle is added to the sample number), the resistance to vibration and the resistance to drop are not reduced. I understand. That is,
Bi, P added to solder ball 44
b, Sb, Zn and In are added in an amount of about 2% by weight.
It has been found that when the degree is less than the degree, the resistance to vibration and the resistance to falling are not reduced. Table 4
In the above, Sn contained 98.25% to 98.75% by weight, Ag contained 0.75% to 1.25% by weight and C
Only the results when u is 0.25% by weight to 0.75% by weight are shown.

In the fifth embodiment, the composition of the solder paste and the solder ball 44 is about 97.7% to 99.3% by weight of Sn and about 0.5% by weight of Ag.
About 1.5% by weight and about 0.2% to 0.8% Cu
By adjusting the content to about% by weight, the composition and the surface can be homogenized. Further, since the solder paste and the solder balls 44 contain about 0.2% to 0.8% by weight of copper, the stress generated by impact or heat is absorbed by the solder paste and the solder balls 44. can do. Furthermore, the solder paste and the solder balls 44 can make it difficult for voids to be formed therein by setting the Ag contained in the solder paste and the solder balls 44 to about 0.5% by weight to 1.5% by weight. . When these three effects are superimposed, the bonding strength of the solder paste and the solder balls 44 can be further increased. That is, it is possible to make the organic substrate 71 on which the respective mounted components of the fifth embodiment are mounted more resistant to mechanical shock.

(Embodiment 6) In Embodiment 6, for example, a wafer level process package (Wafer Process
The present invention is applied to a semiconductor device manufactured using a package (hereinafter abbreviated as WPP) technology.

FIGS. 7A and 7B are plan views of a main part of a microcomputer chip (semiconductor chip) 81 according to the sixth embodiment, and FIG. 7B is a plan view of F in FIG. 7A. It is principal part sectional drawing in the -F line.

As shown in FIGS. 7A and 7B, the microcomputer chip 81 has an outer shape of about 10 mm square and has 256 terminals around it. Part 2
Solder balls (bump electrodes) 82 are attached to the 56 terminals. On the surface of the microcomputer chip 81, a sealing resin film 97 made of, for example, a polyimide resin is formed.

Next, a method of manufacturing the microcomputer chip 81 will be described with reference to FIGS.

Semiconductor wafer (first substrate) 91 shown in FIG.
For example, a p-type MISFET (Metal Insulator Semiconduc
A predetermined integrated circuit element such as a torField Effect Transistor, an n-type MISFET, and an information storage element (for example, a capacitor) is formed. A wiring layer L is formed on the semiconductor wafer 91 on the region where the microcomputer chip 81 is formed. The wiring layer L is formed by alternately stacking interlayer insulating films and wiring layers. FIG. 8 shows only bonding pad 93 formed on interlayer insulating film 92 made of, for example, a silicon oxide film. The bonding pad 93 is made of, for example, aluminum or an aluminum-silicon-copper alloy.

On the interlayer insulating film 92, a surface protection film 94 is formed, which covers the uppermost wiring layer (for example, the bonding pad 93). The surface protection film 94 includes a surface protection film 94a and a surface protection film 94b. The surface protection film 94a is made of, for example, TEOS
Plasma CV using (Tetraethoxyorthosilane) gas
A silicon nitride film formed by, for example, a plasma CVD method is stacked on a silicon oxide film formed by a D (Chemical Vapor Deposition) method. Surface protective film 9
4b is made of, for example, a polyimide resin.

In the surface protective film 94 in the region where the bump electrode is to be formed, a connection hole 95 is formed so that a part of the upper surface of the bonding pad 93 is exposed. In the connection hole 95, the side surface of the portion formed on the surface protection film 94b is formed in a forward tapered shape.

First, as shown in FIG. 9, a conductor film 96a made of, for example, chromium, a conductor film 96b made of, for example, copper, and a conductor film 96c made of, for example, chromium are sequentially formed on a semiconductor wafer 91 as described above. After being deposited by a sputtering method or the like, this is patterned by an etching technique using a photoresist film as a mask. The lowermost conductive film 96a is, for example, a film having a function of suppressing or preventing the diffusion of copper and a function of improving the adhesion between the conductive film 96b and the surface protection film 94b made of a polyimide resin. The conductor films 96a and 96c are not limited to chromium, but can be variously modified, for example, titanium, titanium tungsten, titanium nitride, or tungsten. At this stage, the conductor films 96a to 96c left in the regions where the bump electrodes are to be formed are formed.
Are electrically connected to the bonding pads 93 through the connection holes 95.

Next, as shown in FIG. 10, a conductor film 96 is formed by an etching technique using a photoresist film as a mask.
By selectively removing a and 96c, a rewiring (wiring layer) 96 is formed in a region where a bump electrode is to be formed.
The rewiring 96 is electrically connected to the bonding pad 93 through the connection hole 95.

Next, as shown in FIG. 11, a sealing resin film 97 made of, for example, a photosensitive polyimide resin is applied on the semiconductor wafer 91, and the sealing resin film 97 itself is exposed and developed. Thus, a connection hole 98 is formed in the sealing resin film 97. A part of the upper surface of the rewiring 96 is exposed from the connection hole 98.

Subsequently, for example, chromium, nickel-copper alloy, and gold are sequentially deposited on the sealing resin film 97 including the inside of the connection hole 98 from a lower layer by a sputtering method or the like, and then the photoresist film is used as an etching mask. By performing the patterning by the etching process described above, the under bump metal pattern (wiring layer) 99 is formed. The bump base metal pattern 99 is formed, for example, in a plane circular shape, and can have a diameter of about 0.25 mm. In addition, the bump base metal pattern 99 is
8 and is electrically connected to the rewiring 96. Here, the underlying metal pattern 99 is formed on the semiconductor wafer 91.
Can be 256 (16 columns × 16 rows), and the distance between adjacent bump base metal patterns 99 is about 0.5
mm. Further, by making the uppermost layer of the bump base metal pattern 99 be gold, Sn forming the solder balls 82 formed in the next step is diffused by heat treatment and reacts with Cu forming the conductor film 96b to form a brittle metal. Compound formation can be prevented.

Next, as shown in FIG. 12, after a flux is printed on the metal pattern 99 under the bump using, for example, a metal mask, the solder ball 82 is placed on the metal pattern 99 under the bump using a ball transfer device. . Subsequently, the semiconductor wafer 91 is set to a maximum temperature of about 24, for example.
It is passed through a reflow furnace at about 5 ° C. to perform reflow treatment. By this step, the solder balls 82 can be used as bump electrodes, and the microcomputer chip 81 of the sixth embodiment shown in FIG. 7 can be manufactured. Solder ball 8
2 can have a diameter of, for example, about 0.3 mm, and its material is, for example, 98.5Sn-1A.
g-0.5Cu can be exemplified. Here, according to an experiment performed by the present inventors, the reflow temperature was set to about 245.
98.5Sn-1Ag-0.
It was found that voids could be prevented from entering the inside of the solder ball 82 made of 5Cu. That is, by setting the reflow temperature to about 245 ° C.,
The mechanical strength of the solder ball 82 of the microcomputer chip 81 in the sixth embodiment can be improved.
In the sixth embodiment, by using a flux having a higher activity than a conventionally used flux, the solder ball 82 can be more securely fixed on the bump base metal pattern 99. The manufacturing process of the solder ball 82 is performed in one lot, and the solder ball 82 is
And the process of performing the reflow process is performed in three lots.

Further, after cleaning the semiconductor wafer 91 and cutting out the individual microcomputer chips 81 from the semiconductor wafer 91, the microcomputer chips 81 are mounted on the wiring board (second substrate) 100 as shown in FIG. Can be. At this time, the solder balls 82 serving as the bump electrodes of the microcomputer chip 81 are electrically connected to the lands 101 of the wiring board 100. A filler 102 is interposed between the main surface of the microcomputer chip 81 and the main surface of the wiring board 100.

In the sixth embodiment, 70 microcomputer chips 81 are manufactured for each lot to be subjected to the above-described reflow processing. After that, the present inventors used six of the 70 microcomputer chips 81 for each lot to determine the distance between the surface of the solder ball 82 and the underlying metal pattern 99 electrically connected to the solder ball 82. Was measured.

Further, the present inventors used a drop test similar to the drop test described in the first embodiment by using 32 of the 70 microcomputer chips 81 for each lot to be subjected to each reflow process described above. Was done.

Further, the present inventors have set 70 microcomputer chips 81 for each lot to be subjected to each reflow process described above.
A vibration test similar to the vibration test described in the first embodiment was performed using 32 of them. However, in the sixth embodiment, one microcomputer chip 81 is attached to two plastic cases of about 12 mm square and 1.1 m height.
A vibration test was conducted by inserting six pieces each.

Further, after the drop test and the vibration test described above, the resistance value between the surface of the solder ball 82 of the microcomputer chip 81 and the metal pattern 99 under the bump used for the drop test and the vibration test was measured. .

The present inventors found that the solder ball 82 was 98.5 Sn-1 Ag based on the drop test and the vibration test described above.
It has been found that, when formed with -0.5Cu, the solder ball 82 can have improved resistance to vibration and drop. Further, it was found from the above-described resistance value measurement that there was no increase in the resistance value between the surface of the solder ball 82 and the bump underlying metal pattern 99 before and after the drop test and the vibration test.

In the sixth embodiment, the composition of the solder ball 82 is about 98.5% by weight of Sn and about 18.5% of Ag.
When the content is about 0.5% by weight and the content of Cu is about 0.5% by weight, the composition and the surface can be homogenized similarly to the solder ball 4 described in the first embodiment. Further, since the solder ball 82 contains approximately 0.5% by weight of copper, the stress generated by impact, heat, or the like can be absorbed by the solder ball 82. Further, the solder ball 82 contains about 1% by weight of Ag contained in the solder ball 82.
By setting the degree, it is possible to make it difficult for voids to enter inside the solder ball 4 similarly to the solder ball 4 described in the first embodiment. By superimposing these three effects, the bonding strength of the solder ball 82 can be further increased. That is, similar to the CSP 1 described with reference to FIG.
Of the microcomputer chip 81 can be made more resistant to mechanical shock.

(Embodiment 7) The present embodiment 7 relates to, for example, an FC-BGA (flip chip BGA (Ball Grid
Array)) The present invention is applied to a semiconductor device manufactured using technology.

FIGS. 14A and 14B are plan views of main parts of the FC-BGA 111 according to the seventh embodiment.
15B is a cross-sectional view of a main part along line GG in FIG. In FIG. 14A, a memory chip (semiconductor chip) 112 and a solder ball (bump electrode) 115 are also shown for explanation.

As shown in FIGS. 14A and 14B,
In the FC-BGA 111 according to the seventh embodiment, the memory chip 112 is connected to an organic substrate (second substrate) 1 serving as an interposer.
13. Although not shown, a solder ball 114 attached to the memory chip 112 is provided on the side of the organic substrate 113 on which the memory chip 112 is mounted.
Pads made of, for example, nickel-gold are formed at positions corresponding to. The pad is electrically connected to a terminal (solder ball 115) on the back surface of the organic substrate 113. A space between the memory chip 112 and the organic substrate 113 is filled with a filler 116 made of, for example, an underfill which is an epoxy resin. further,
On the back surface of the memory chip 112, an adhesive 117
For example, a heat sink 118 made of aluminum is attached.

The memory chip 112 has, for example, an outer size of about 7 mm × 14 mm square, and has 200 terminals. Solder balls 114 are attached to about 200 terminals. Solder ball 11
4 can have a diameter of about 0.25 mm, for example, and its material is 98.5Sn-1Ag-0.
5Cu can be exemplified. Although not shown, a sealing resin film made of, for example, a polyimide resin is formed on the surface of the memory chip 112.

The solder balls 115 are, for example, 17 columns × 9 rows and about 1.27 on the back surface of the organic substrate 113.
mm, and the number is 1
It becomes 53 pieces. Although the number of terminals of the memory chip 112 is 200, the number of terminals on the rear surface of the organic substrate 113 to which the memory chip 112 is electrically connected is reduced by collecting power and ground terminals of the memory chip 112.
It can be reduced to three. The solder balls 11
5 can have a diameter of about 0.67 mm, for example, and its material can be exemplified by 37Pb-63Sn.

Next, a method of manufacturing the above-described FC-BGA 111 will be described with reference to FIGS.

First, the memory chip 112 is manufactured by substantially the same manufacturing process as that of the microcomputer chip 81 described in the sixth embodiment with reference to FIGS. 8 to 12, and then the memory chip 112 is mounted on the organic substrate 113. Attach to At this time, the memory chip 112 can be attached to the organic substrate 113 by melting the solder balls 114 by performing a reflow process at about 245 ° C. using, for example, a flux and then solidifying the solder balls. Also, by setting the reflow temperature to about 245 ° C., 98.5Sn−1Ag can be obtained similarly to the solder ball 82 described in the sixth embodiment with reference to FIG.
It is possible to prevent voids from entering the solder balls 114 made of -0.5Cu. That is, by setting the reflow temperature to about 245 ° C., the solder balls 1 of the memory chip 112 in the seventh embodiment are set.
14, the mechanical strength can be improved.

Although not shown in FIG. 15, the under bump metal pattern 99 described in the sixth embodiment with reference to FIG. 11 has a diameter of about 0.2 mm in the seventh embodiment. can do. here,
The base metal pattern 99 in the seventh embodiment is 153
(10 columns × 20 rows), and the interval between adjacent bump base metal patterns 99 can be about 0.63 mm.

The solder ball 114 is formed by printing a paste-like solder material (solder paste) on a semiconductor wafer using a mask for solder printing and then passing the solder ball 114 through a reflow furnace having a maximum temperature of about 245 ° C., for example. It is formed by performing processing. Also, by this step, the solder balls 114 can be used as bump electrodes. In the seventh embodiment, the steps of printing the solder paste and performing the reflow process are performed in three lots.

In the seventh embodiment, the solder balls 114 are formed by printing a solder paste on a semiconductor wafer.
It is formed by performing a reflow process. Therefore, after printing the flux on the position where the solder ball 114 is formed on the semiconductor wafer, the solder ball 114 is placed using a ball transfer device, and then the solder ball 114 is fixed by performing a reflow process. Thus, it is not necessary to use a ball transfer device and a flux printing machine. When the solder balls 114 are formed on the semiconductor wafer using the solder paste, the solder balls 114 are prepared in advance,
The material cost can be reduced as compared with a case where the solder balls are directly placed at predetermined positions on the semiconductor wafer and fixed by reflow processing. That is, when the solder balls 114 are formed on a semiconductor wafer using a solder paste as shown in the seventh embodiment, the solder balls 114 are prepared in advance, and the solder balls 114 FC-BG according to the seventh embodiment, compared to the case where the
The manufacturing cost of A111 can be reduced.

After the formation of the solder balls 114, the semiconductor wafer is cleaned, and the semiconductor wafer can be cut into individual memory chips 112 by dicing.

After the memory chip 112 is mounted on the organic substrate 113 and the remaining flux is washed, a filler 116 is filled between the memory chip 112 and the organic substrate 113, and a heat treatment at about 150 ° C. is performed. Cures the filler 116.

Next, as shown in FIG. 16, 37Pb-63
A solder ball 115 made of Sn is formed on a pad on the back surface of the organic substrate 113.

Subsequently, the adhesive 11 is applied to the back surface of the memory chip.
By attaching the heat radiating plate 118 according to FIG.
Can be manufactured.

In the seventh embodiment, 70 FC-BGAs 111 were manufactured for each lot to which the above-mentioned solder paste was printed and subjected to reflow processing. Thereafter, the present inventors conducted the same resistance value measurement, drop test, and vibration test as in the sixth embodiment using the 70 FC-BGAs, and performed the same resistance value measurement, drop test, and vibration test. went. For the vibration test, F
The test was performed by fixing the C-BGA 111 directly to the stage of a vibration tester without putting it in a plastic case.

The present inventors found that the solder ball 114 was 98.5Sn-1A based on the drop test and the vibration test described above.
g-0.5Cu, solder balls 11
4 was found to be able to improve the resistance to vibration and the resistance to falling. Further, it was found from the above-described resistance value measurement that there was no increase in the resistance value at the connection portion of the solder ball 114 before and after the drop test and the vibration test.

In the seventh embodiment, the composition of the solder ball 114 is about 98.5% by weight of Sn, about 1% by weight of Ag, and about 0.5% by weight of Cu. Similar to the solder ball 4 described in the first embodiment, the composition and the surface can be homogenized.
Further, since the solder ball 114 contains about 0.5% by weight of copper, the stress generated by impact, heat, or the like can be absorbed by the solder ball 114. Furthermore, by setting the Ag contained in the solder ball 114 to about 1% by weight, it is possible to make it difficult for voids to enter inside the solder ball 114, similarly to the solder ball 4 described in the first embodiment. . By superimposing the effects of these three points, the bonding strength of the solder balls 114 can be further increased. That is, similarly to the CSP 1 described with reference to FIG. 1 in the first embodiment, the FC-BGA 111 according to the seventh embodiment can have higher resistance to mechanical shock.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the fifth embodiment,
Each component having a solder ball with a composition of Sn, Ag and Cu as one component and at least one of Bi, Pb, Sb, Zn and In added thereto,
The case of mounting on an organic substrate using a solder paste having the same composition as that of the solder ball has been exemplified.
A solder paste having a composition of n may be used. This is because the material forming the solder ball and the material forming the solder paste having the composition of Pb and Sn do not form a mechanically brittle metal compound even when mutually diffused by heat treatment or the like.

[0124]

The effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows. (1) According to the present invention, a solder ball included in a semiconductor device is provided with Sn of about 97.7% by weight to about 99.3% by weight,
Since the solder ball is formed with a composition in which Ag is about 0.5% to 1.5% by weight and Cu is about 0.2% to 0.8% by weight, the solder ball has resistance to vibration and drop. Can be improved. (2) According to the present invention, the solder ball included in the semiconductor device is provided with Sn of about 97.7% by weight to about 99.3% by weight,
Since the composition is such that Ag is about 0.5% to 1.5% by weight and Cu is about 0.2% to 0.8% by weight, the composition and the surface of the solder ball are uniform. be able to. (3) According to the present invention, the composition and the surface of the solder ball of the semiconductor device can be homogenized, so that the connection strength between the solder ball and the pad can be prevented from lowering. (4) According to the present invention, the solder ball included in the semiconductor device is formed by adding Sn of about 97.7% by weight to about 99.3% by weight,
Ag is formed in a composition of about 0.5% to 1.5% by weight and Cu is formed in a composition of about 0.2% to 0.8% by weight. The generated stress can be absorbed by the solder ball. (5) According to the present invention, the solder ball included in the semiconductor device is provided with Sn of about 97.7% by weight to about 99.3% by weight,
Since Ag is formed in a composition of about 0.5% to 1.5% by weight and Cu is formed in a composition of about 0.2% to 0.8% by weight, it is possible to prevent voids from entering solder balls. it can. (6) According to the present invention, it is possible to prevent voids from entering the solder balls of the semiconductor device, so that it is possible to prevent a decrease in the connection strength of the connection portion due to the solder balls and a disconnection failure. (7) According to the present invention, the solder ball included in the semiconductor device is provided with Sn of about 97.7% by weight to about 99.3% by weight,
Since Ag is formed in a composition of about 0.5% to 1.5% by weight and Cu is formed in a composition of about 0.2% to 0.8% by weight, Bi, Pb, Sb, Zn is contained in the composition. And I
Even when at least one of n is added in a total amount of about 2% by weight or less, it is possible to prevent the resistance of the solder ball to vibration and drop from dropping.

[Brief description of the drawings]

FIGS. 1A and 1B are a main part plan view and a main part cross-sectional view of a semiconductor device according to an embodiment of the present invention;

FIG. 2 is an explanatory diagram showing an example of a composition of a solder ball used in a semiconductor device according to an embodiment of the present invention.

FIGS. 3A and 3B are a main part plan view and a main part cross-sectional view of a semiconductor device according to an embodiment of the present invention;

FIGS. 4A and 4B are a main part plan view and a main part cross-sectional view of a semiconductor device according to an embodiment of the present invention;

FIGS. 5A and 5B are a main part plan view and a main part cross-sectional view of a semiconductor device according to an embodiment of the present invention;

FIGS. 6A and 6B are a main part plan view and a main part cross-sectional view of a semiconductor device according to an embodiment of the present invention;

FIGS. 7A and 7B are a main part plan view and a main part cross-sectional view of a semiconductor device according to an embodiment of the present invention;

8 is a fragmentary cross-sectional view showing one example of a method for manufacturing the semiconductor device shown in FIG. 7;

9 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 8;

10 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 9;

11 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 10;

12 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 11;

13 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 12;

FIGS. 14A and 14B are a main part plan view and a main part cross-sectional view of a semiconductor device according to an embodiment of the present invention;

15 is a fragmentary cross-sectional view showing one example of the method for manufacturing the semiconductor device shown in FIG. 14;

16 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 15;

[Explanation of symbols]

 Reference Signs List 1 CSP 2 substrate (first substrate) 3 system LSI chip (semiconductor chip) 4 solder ball (bump electrode) 5 bonding wire 6 molding resin 11 to 38 composition point 41 CSP 42 substrate (first substrate) 43 memory chip (semiconductor chip) ) 44 Solder ball (bump electrode) 45 Bonding wire 46 Mold resin 51 Microcomputer CSP 52 Substrate (first substrate) 53 Microcomputer chip (semiconductor chip) 54 Solder ball (bump electrode) 55 Bonding wire 56 Mold resin 61 Alumina multilayer substrate (No. 2 substrate) 62 Ag-Pt pad 63 wiring 71 organic substrate (second substrate) 72a flash memory (electronic component) 72b flash memory (electronic component) 73 gate array (electronic component) 74 connector 81 microcomputer chip (semiconductor chip) 82) Solder ball (bump electrode) 91 Semiconductor wafer (first substrate) 92 Interlayer insulating film 93 Bonding pad 94 Surface protection film 94a Surface protection film 94b Surface protection film 95 Connection hole 96 Rewiring (wiring layer) 96a Conductive film 96b Conductive film 96c Conductive film 97 Sealing resin film 98 Connection hole 99 Under bump metal pattern (wiring layer) 100 Wiring substrate (second substrate) 101 Land 102 Filler 111 FC-BGA 112 Memory chip (semiconductor chip) 113 Organic substrate ( (Second substrate) 114 solder ball (bump electrode) 115 solder ball 116 filler 117 adhesive 118 heat sink L wiring layer

Continued on the front page (72) Inventor Kenichi Yamamoto 5-2-1, Josuihonmachi, Kodaira-shi, Tokyo Within the Semiconductor Group, Hitachi, Ltd. (72) Inventor Kazuma Miura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture (72) Inventor Ryosuke Kimoto 5-22-1, Kamizuhoncho, Kodaira-shi, Tokyo Inside Hitachi Super-LSI Systems Co., Ltd. (72) Inventor Kawakubo Hiroshi 5-22-1, Josuihoncho, Kodaira-shi, Tokyo Inside Hitachi Cho LSI Systems Co., Ltd.

Claims (5)

[Claims] (A) cutting a semiconductor wafer having a semiconductor element and a wiring layer on a main surface to form a semiconductor chip; (b) placing the semiconductor chip at a predetermined position on a main surface of a first substrate (C) electrically connecting the wiring layer of the semiconductor chip to the wiring layer of the first substrate; and (d) forming a sealing insulating film on the main surface of the first substrate. (E) sealing the semiconductor chip;
Forming a bump electrode electrically connected to the wiring layer of the first substrate at a predetermined position on the back surface of the substrate;
Wherein the bump electrode contains 97.7% by weight of tin to 9% by weight.
9.3% by weight, 0.5% to 1.5% by weight of silver and 0.2% to 0.8% by weight of copper, or bismuth, lead, antimony, zinc and indium Characterized in that at least one of them is formed with a composition containing 2% by weight or less in total. 2. (a) forming a bump electrode electrically connected to the wiring layer at a predetermined position on the back surface of a first substrate having a semiconductor element and a wiring layer on a main surface;
(B) cutting the first substrate to form a semiconductor chip, wherein the bump electrode contains 97.7% by weight of tin.
９９99.3% by weight, silver of 0.5% to 1.5% by weight and copper of 0.2% to 0.8% by weight or the above-mentioned composition containing bismuth, lead, antimony, zinc and A method for manufacturing a semiconductor device, characterized in that at least one kind of indium is formed in a composition containing 2% by weight or less in total. 3. A step of forming a semiconductor chip by cutting a semiconductor wafer having a semiconductor element and a wiring layer on a main surface, and (b) a predetermined position of the semiconductor chip on a main surface of a first substrate. (C) electrically connecting the wiring layer of the semiconductor chip to the wiring layer of the first substrate; and (d) forming a sealing insulating film on the main surface of the first substrate. (E) sealing the semiconductor chip;
Forming a bump electrode electrically connected to the wiring layer of the first substrate at a predetermined position on the back surface of the substrate;
(F) electrically connecting a plurality of electronic components including the first substrate to a second substrate after the steps (a) to (e);
Wherein the bump electrode contains 97.7% by weight of tin to 9% by weight.
9.3% by weight, 0.5% to 1.5% by weight of silver and 0.2% to 0.8% by weight of copper, or bismuth, lead, antimony, zinc and indium Wherein at least one of the first and second substrates is formed with a composition containing 2% by weight or less in total, and electronic components other than the first substrate are connected to the second substrate with a solder material having the same composition as the bump electrodes. A method for manufacturing a semiconductor device. 4. A semiconductor chip formed by cutting a semiconductor wafer having a semiconductor element and a wiring layer on the main surface, and (b) the semiconductor chip mounted on the main surface, and A first substrate in which a wiring layer and a wiring layer included in the semiconductor chip are electrically connected; and (c) electrically connecting to a wiring layer inside the first substrate at a predetermined position on a back surface of the first substrate. Connected to a bump electrode, said bump electrode comprising 97.7% to 99.3% by weight of tin, 0.5% to 1.5% by weight of silver and 0.2% by weight of copper.
% By weight or a composition containing at least one of bismuth, lead, antimony, zinc and indium in the above composition in a total amount of 2% by weight or less. Semiconductor device. 5. A bump electrode electrically connected to said wiring layer at a predetermined position on a back surface of a first substrate having a semiconductor element and a wiring layer on a main surface;
A semiconductor chip formed by cutting a substrate, wherein the bump electrode contains 97.7% by weight to 99.9% by weight of tin.
3% by weight, 0.5% by weight to 1.5% by weight of silver and 0.2% by weight to 0.8% by weight of copper, or bismuth, lead, antimony, zinc and indium. A semiconductor device, wherein at least one kind is formed with a composition containing 2% by weight or less in total.