JP2001318648A - Method for driving plasma display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for driving a plasma display panel improved in display quality so as to compensate for a decrease in the number of display pixels for solving such a problem that resolution of the whole screen is decreased when the upper and lower or the left and right parts of the screen are not used at all depending on a format of a video signal. SOLUTION: A voltage signal in one field is configured of plural sub-fields having a write process in which a scanning pulse 1 being a 2nd voltage is applied between 1st row electrodes 111Xj-n and 2nd row electrodes 112Yj-n for scanning only pixel area to be selected by an external signal, and a write pulse 2 being a 3rd voltage is applied to write electrodes 108W1-m corresponding to only the pixel area to be selected by the above external signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving an AC plasma display panel of a surface discharge type, among AC plasma display panels.

2. Description of the Related Art FIG. 6 shows a conventional AC type plasma display disclosed in Japanese Patent Application Laid-Open No. 10-149133.
In the figure, 101 is a front glass substrate formed of an insulating transparent substrate as a display surface, and 102 is a front glass substrate 10
1, a rear glass substrate 111 (X1 to Xn), which is disposed opposite to the discharge space and is made of an insulating transparent substrate, is arranged on a front glass substrate 101 in a row direction as scanning electrodes of a plasma display panel. First row electrode, 1
12 (Y1 to Yn) are second row electrodes arranged in parallel and alternately on the front glass substrate 101, 103X is a transparent electrode constituting the first row electrode 111X, and 104X is fixed to the transparent electrode 103X. A row electrode 111X is formed to form a row electrode 111X, 103Y is a transparent electrode forming a second row electrode 112Y, 104Y is a row electrode fixed to the transparent electrode 103Y and forms a row electrode 112Y, and 105 is a first row electrode. A dielectric layer covering the first row electrode 111X and the second row electrode 112Y;
06 is an MgO (magnesium oxide) film covering the dielectric layer 105, and 108 (W1 to Wm) is the rear glass substrate 10.
A write electrode 109 disposed on the write electrode 108 so as to intersect the first row electrode 111X and the second row electrode 112Y emits red, green, and blue light on the write electrode 108 for each write electrode. The phosphor layer 107 is a pair of row electrodes 1
A set of three red, green, and blue discharge pixels at the intersection formed by 11, 112 and the writing electrode 108 orthogonal to each other constitutes one pixel, and is a partition for separating these discharge pixels and maintaining a discharge space. Further, a discharge gas mainly composed of a rare gas such as a Ne—Xe mixed gas or a He—Xe mixed gas is sealed in a discharge space sandwiched between the front glass substrate 101 and the rear glass substrate 102.

Next, an outline of the operation will be described. A voltage pulse is alternately applied between the first row electrode 111 and the second row electrode 112 to cause a discharge in which the polarity is inverted every half cycle to cause the pixel to emit light. In color display, the phosphor layer 109 formed in each pixel is excited by ultraviolet light from discharge to emit light. First row electrode 111 for performing discharge for display
And the second row electrodes 112 are covered with the dielectric layer 105, so that once a discharge occurs between the electrodes of each pixel, the charged particles generated in the discharge space move in the direction of the applied electric field, and Accumulate on layer 105. These accumulated charged particles are called wall charges. Since the electric field formed by the wall charges has the opposite polarity to the applied electric field, the discharge quickly disappears as the wall charges grow. When the electric field whose polarity is reversed from that of the previous discharge is applied after the discharge is extinguished, the electric field formed by the wall charges and the externally applied electric field are superimposed. Therefore, the applied voltage having a smaller absolute value than the previous discharge is applied. Discharge starts. Thereafter, the discharge can be maintained by the alternately inverted applied voltage having a small absolute value with the assistance of the wall charges. Such a function is called a memory effect. A discharge sustained at a low applied voltage using the memory effect is called a sustain discharge, and a voltage pulse applied to the first row electrode 111 and the second row electrode 112 every half cycle is called a sustain pulse. This sustain discharge continues as long as the sustain pulse is applied, as long as the wall charges are not extinguished. The operation of extinguishing wall charges is called erasing, while forming the wall charges on the dielectric first is called writing.

FIG. 7 is a diagram of Japanese Patent Application Laid-Open No. 10-149133.
In the conventional plasma display panel shown in
Voltage waveform indicating the driving method in one subfield
(Ming chart). In this conventional example, the first line
The pole 111X is commonly connected on the entire panel.
Thus, a common voltage is applied to all the row electrodes X.
You. On the other hand, the second row electrode 112Y and the write electrode 108
W can apply individual voltage to each line
You. The voltage waveform shown in the figure is the first electrode 111 in order from the top.
X_{1 ~ n}, The second row electrode 112Y_{1 ~ n}, Writing electrode 108
W_{1 ~ m}FIG.

First, the reset period is a period in which all pixels of the AC type plasma display panel are kept in the same state. A full writing pulse 4 (priming pulse), which is a first voltage of opposite polarity, is applied to a first row electrode 111X and a second row electrode 112Y that are commonly connected to all the screens. Since this full address pulse 4 is set to be equal to or higher than the discharge starting voltage between the first row electrode 111X and the second row electrode 112Y, all pixels discharge and emit light regardless of the light emission or non-light emission of the previous subfield. When the full address pulse 4 is applied, a strong discharge occurs between the X and Y electrodes, and wall charges of opposite polarities accumulate on each of the X and Y electrodes, and the discharge ends.

Next, the entire surface write pulse 4 becomes 0 V,
When the voltage applied to the first row electrode 111X and the second row electrode 112Y is removed, an electric field due to the wall charges accumulated by the rising discharge of the entire address pulse 4 remains between the XY electrodes. Since the voltage value of the entire address pulse 4 is set so that this electric field is large enough to generate a discharge,
Again, an XY discharge occurs. Since the discharge at this time has no externally applied voltage, the charged particles generated by the discharge (self-erasing discharge) generated only by the voltage of the wall charge without the externally applied voltage have the wall charge so that the electric field in the pixel becomes zero. Sum up. In this manner, all pixels can be written and erase reset regardless of the presence or absence of wall charges due to the lighting state of the previous subfield.

At the end of the reset period, almost no wall charges remain on the first row electrode X and the second row electrode Y. On the other hand, in the discharge pixels, neutral particles excited to a metastable level having a long life during the entire writing / erasing discharge remain, and the role of seed particles for lowering the firing voltage in the subsequent discharge is as follows. do.

The writing period (T _W1 ) is a period for controlling the presence or absence of wall charges of each pixel by selecting an arbitrary pixel on the screen in a matrix with row electrodes and writing electrodes. First, a negative scan pulse 1, which is a second voltage, is sequentially applied to the second row electrodes 112Y1 to Yn. On the other hand, a positive write pulse 1, which is a third voltage corresponding to the image data, is applied to the write electrode W. An arbitrary pixel is matrix-selected by the scan pulse 1 applied to the second row electrode Y and the write pulse 1 applied to the write electrode W. The potential difference between Y-W of the pixel selected by the scan pulse 1 and the address pulse 1 is set to be equal to or higher than the discharge starting voltage of the Y-W discharge, and the Y-W discharge occurs only in the pixels selected in the matrix.

During the writing period, a positive voltage is applied to the commonly connected first row electrodes 111X, but the voltage value causes discharge between the XY electrodes or the XW electrodes. Not set. However, when a YW discharge occurs in a pixel selected in a matrix by the first row electrode Y and the writing electrode W, this discharge is used as a trigger,
An XY discharge occurs. First row electrode X and second row electrode Y
Accumulates wall charges. It takes (duration of scan pulse 1) × (number of lines) time for the writing period to complete scanning of scan line 1 on all lines of the screen.

After the operation of all the screens of the second row electrodes Y1 to Yn is completed, a sustain period continues. In the sustain period (T _c1 ), a sustain pulse, which is a fourth voltage of positive polarity, is alternately applied to the first row electrode X and the second row electrode Y, and only pixels that have accumulated wall charges during the address period are applied. Sustain discharge is performed to emit light.
The light emission luminance per subfield is determined by the number of sustain pulses 3, and a plurality of subfields having different numbers of sustain pulses 3 are arranged in one field for displaying one screen per unit time, and a plasma display is formed by combining the subfields. Performs panel gradation expression.

Next, a brief description will be given of a gradation display method of the AC type plasma display panel. FIG. 8 is a diagram showing a configuration in one field showing a gradation display method of a conventional plasma display panel disclosed in, for example, JP-A-10-149133. One field is a time for displaying one picture on a screen, and is about 16.7 ms (60 Hz) in the case of NTSC. In the drawing, a display line is a line in the row direction composed of first and second row electrodes of an AC type plasma display panel, and the horizontal direction in the drawing is a time axis. One field is divided into a plurality of subfields, and each subfield includes a reset period, a writing period, and a sustain period. For example, 25
In the case of 6 gradation display, one field is divided into eight subfields, and the temporal weight of the sustain period of each subfield is 2 ^p (p = 0 to 7).

FIG. 8 shows a conventional configuration of one field subfield as type 1. Type 1 is
A plasma display panel of 480 × 680 pixels (3: 4), sub-fields SF1 to SF8, sustain pulses of 256 tones of 1 to 128, reset period 27
The configuration shown in Table 1 below is 0 μS, the writing period is 970 μS, and the empty area is 5072 μS.

[0012]

[Table 1]

Japanese Patent Application Laid-Open No. Hei 10-214058 discloses that a plasma display panel is divided into upper and lower rows by a row electrode group, and a pulse of a row electrode group having no lighting pixel is determined from image data via a lighting pixel determination unit. And a method for driving a plasma display panel for saving power. However, the driver of the writing electrode (column electrode) does not pass through the above-mentioned illuminated pixel determination unit, and the writing electrode and the row electrode group scan all the display areas including the unnecessary display area. . That is, the writing period is constant.

[0014]

Depending on the format of the video signal, the top and bottom or left and right of the screen may not be used at all. In such a case, for example, Japanese Patent Application Laid-Open
In Japanese Patent No. 214058, the pulse of the row electrode group is stopped to save power. However, there is no solution to the problem that the resolution of the entire screen is reduced because the total number of pixels on the screen is fixed. SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and a method of driving a plasma display panel which has an improved display quality so as to shorten a writing period and compensate for a reduction in the number of display pixels, corresponding to a video format. The purpose is to provide.

[0015]

In the plasma display driving method according to the present invention, the first and second row electrodes scan only the pixel area selected by an external signal. A voltage signal in one field is constituted by a plurality of subfields having a writing step of applying a voltage of 2 and applying a third voltage to a writing electrode corresponding only to the pixel region selected by the external signal. It was done.

Further, an arbitrary subfield is added corresponding to a pixel area other than the pixel area selected by the external signal.

Further, the sustain pulse of each subfield is multiplied by a constant corresponding to a pixel region other than the pixel region selected by the external signal.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a voltage waveform (timing chart) showing a driving method in one subfield in the plasma display panel according to the first embodiment. The present plasma display panel includes a plurality of first row electrodes 111 arranged in a row direction as scanning electrodes.
When a plurality of second row electrodes 112Y _{1 ~ n} I arranged in parallel and alternately to each of the first row electrodes 111X _{1 ~ n,} and the first row electrode and the second row electrodes To form a matrix of n rows × m columns including the write electrodes 108W _{1 to m} constituting the pixels. Now, the matrix of n rows × m columns, the pixel area selected by a signal from the outside first row electrodes 111X _{j ~ n,} the second row electrodes 112Y _{j ~ n} and write electrodes 108W _{1 ~ m} ( (nj) A voltage waveform (timing chart) in one subfield when a matrix of rows × m columns is displayed.

[0019] In view, in the reset period, corresponding to the entire screen first row electrodes 111X _{1 ~ n} and the second row electrode 1
Applying discharge start a voltage higher than the first voltage reset between 12Y _{1 ~ n.} In the reset period, all pixels are discharged and wall charges are erased at the same time to increase the discharge probability of all pixels.

Next, in the writing period (T _W2 ), the first row electrodes 111X _{j + 1 to n} and the second row electrodes 112Y _{j +} that scan only the pixel area selected by an external signal. _{1
To n} , a scan pulse 1 which is a second voltage is applied, and the pixel region (n-
j) applying a write pulse 2 is a third voltage to the writing electrodes 108W _{1 ~ m} corresponding to only a matrix of rows × m columns. Scan pulses 1, first row electrodes 111X _{1 ~ j} and the second row electrodes 112Y _{1 ~} ignoring _j is a pixel region that is not selected by the signal from the outside, in the pixel area selected by a signal from the outside It begins to scan from a certain first row electrodes 111X _{j + 1} and the second row electrodes 112Y _{j + 1.}

That is, in the prior art, the writing period (= T _W2 ) of the present embodiment can be shortened compared to the writing period (= T _W1 ) in which the scan pulse 1 is sequentially scanned over the entire matrix group. (T _w1 > T _w2 )

In the sustain period, the first row electrode 111X
And the second row electrode 112Y alternately applies the sustain pulse 3, which is a fourth voltage, to the row electrodes 111X and 112X.
Of the pixels formed at the intersections of the Y row electrode pairs and the write electrodes 108W, the lit pixels that have been subjected to the address discharge in the above write period are repeatedly discharged until an arbitrary luminance is obtained.

Here, the image display in NTSC is 1/60.
A method of displaying a picture of one field in seconds, a method of dividing the display period of the one field into p-bit display data and dividing the display period into p subfields that emit light for a time corresponding to the weight of each bit digit. (Called the subfield method). For example, in the case of 4 subfields,
2 ⁴ = 16 gradations, and 5 5 subfields, 2 ⁵ =
There are 32 gradations. That is, as the number of subfields increases, the number of gradations increases accordingly. Subfields can be added corresponding to the above-mentioned shortened writing time T _W1 −T _W2 .

In other words, if the shortened time corresponds to the period of α subfields, the number of subfields in the first embodiment is p instead of p in the prior art.
Since the number of gradations can be increased, the display quality of the plasma display panel can be improved as compared with the conventional plasma display panel.

FIG. 2 shows a signal configuration of one field when a 16: 9 image is displayed on a plasma display panel having a screen configuration of 4: 3. In the drawing, the upper and lower portions of the plasma display panel screen, that is, 1/4 of the screen, are black portions without screen display. However, as shown in the first embodiment, scan pulse 1 is not scanned for row electrode groups 112b _{1 to j} without display, and scan pulse 1 is applied only for row electrode groups 112b _{j + 1 to n} with display. Scanning, the conventional writing period can be reduced to 3/4 (T _W2 = 3/4).
T _W1 ).

Conventional type 1 writing period T _w1 = 970
μS becomes T _w2 = 728 μS in the type 2 writing period. Subfield SF _2. 1 to that constituted by the signal
Shortening time T _W1 -T _W2 by SF ₂ 8 occurs 1940Myuesu. By substituting SF ₂ 9 sustain pulses 256 in the shorter time T _W1 -T _W2, the drive arrangement of the type 2 is the structure shown in Table 2 and Figure 2.

[0027]

[Table 2]

[0028] In the type 2 configuration, an increasing number of 256 gradations SF ₂ 9 becomes 512 gradations, it is possible to increase the display quality. In addition, as shown in Table 3 and FIG.
In accordance with the shortening period, ΔSF ₂ p (p = 1, ₂ ,.
.) Can be substituted, and one gradation of SF ₂ 1 and S
Put two gradations of F ₂ 2, it may be a 259 gray scale.

[Table 3] Further, any subfield to be substituted is set to one of the three primary colors.
For example, by using for blue display, the color temperature of the screen display can be improved.

According to this embodiment, the number of selected pixels is reduced to 3/4, but the display quality of the display screen can be improved by increasing the number of gradations.

Embodiment 2 FIG. FIG. 4 shows the second embodiment.
Sub-feed in plasma display panel
Voltage waveform (drive timing)
G). In the figure, reset period and write period
(T_W2Is configured the same as in the first embodiment. However,
Shortening time T_W1-T_W2Is increased by multiplying the sustain pulse 3 by a constant.
Let me. This allows the conventional maintenance period (T_C1)
Rather than the maintenance period (T_C2> T _C1Extend)
You can also.

For example, when the writing period is reduced to ／ in a plasma display panel that requires 2000 μsec for each subfield in 480 × 680 (3: 4),
Sustain period T _C2 of each subfield (SF ₃ 1~SF ₃ 8)
= T _C1 × 2, resulting in a configuration of type 3 in Table 4 below.
FIG. 5 shows a signal configuration of one field according to the second embodiment when a 16: 9 image is displayed on a plasma display panel having a screen configuration of 4: 3.

[Table 4]

According to the present embodiment, the number of selected pixels is reduced to ／, but the luminance can be increased by increasing the number of sustain pulses, and the brightness difference can be widened to improve the contrast.

In this embodiment, the case where the row electrodes X and Y are not selected has been shown. However, when it is desired to select the writing electrode W according to the video format, the writing period is similarly shortened to increase the gradation and contrast. As a result, it is possible to improve display quality to compensate for a decrease in resolution due to a decrease in the number of pixels.

According to the present invention, since it is configured as described above, the following effects can be obtained.

A second voltage is applied between a first row electrode and a second row electrode for scanning only a pixel area selected by an external signal, and a pixel selected by the external signal is applied. By providing an address period for applying the third voltage to the address electrode corresponding to only the region, the address period in one subfield can be shortened.

In addition, by adding an arbitrary subfield corresponding to a pixel area other than the pixel area selected by the external signal, the gradation is improved, and the resolution is reduced due to the reduction of the display area. It can be complemented by increasing the key.

Further, the sustaining pulse of each subfield is multiplied by a constant corresponding to the pixel area other than the pixel area selected by the external signal, thereby increasing the light emission luminance and widening the brightness difference. By improving the contrast, it is possible to compensate for a decrease in resolution due to a decrease in the display area.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a voltage signal (timing chart) according to a first embodiment;

FIG. 2 is a diagram showing a configuration of one field of type 2 in the first embodiment.

FIG. 3 is a diagram showing a configuration of one field of type 2-2 according to the first embodiment.

FIG. 4 is a diagram illustrating a voltage signal (timing chart) according to a second embodiment;

FIG. 5 is a diagram showing a configuration of one field of type 3 in the second embodiment.

FIG. 6 is a diagram showing a panel configuration of a plasma display.

FIG. 7 is a diagram showing a conventional voltage signal (timing chart).

FIG. 8 is a diagram showing a configuration of one field of type 1 in the related art.

[Explanation of symbols]

Reference Signs List 1 scan pulse, 2 write pulse, 3 sustain pulse, 101 front glass substrate, 102 rear glass substrate, 103a transparent electrode, 103b transparent electrode, 104a mother electrode, 104b mother electrode, 10
5 dielectric layer, 106 MgO film, 107 partition,
108 writing electrode, 109 phosphor, 111X
First row electrode, 112Y Second row electrode.

Claims (3)

[Claims] 1. A plurality of first row electrodes arranged in a row direction as scanning electrodes of a plasma display panel, and a plurality of second row electrodes arranged in parallel and alternately with each of the first row electrodes.
A row electrode, and a writing electrode that intersects the first row electrode and the second row electrode and constitutes a pixel, between the first row electrode and the second row electrode. A reset step of applying a first voltage equal to or higher than a discharge starting voltage; and a second step between the first row electrode and the second row electrode for scanning only a pixel region selected by an external signal. A writing step of applying a voltage and applying a third voltage to a writing electrode corresponding only to the pixel region selected by the external signal; and between the first row electrode and the second row electrode. A voltage signal in one field is constituted by a plurality of sub-fields comprising a step of alternately applying a fourth voltage to the plasma display panel. 2. The method according to claim 1, wherein an arbitrary subfield is added corresponding to a pixel area other than the pixel area selected by the external signal. 3. The plasma display according to claim 1, wherein the sustain pulse of each subfield is multiplied by a constant corresponding to a pixel area other than a pixel area selected by the external signal. Drive method.