JP2001290040A - Method for manufacturing optical waveguide parts and optical waveguide parts - Google Patents

Method for manufacturing optical waveguide parts and optical waveguide parts

Info

Publication number
JP2001290040A
JP2001290040A JP2000102472A JP2000102472A JP2001290040A JP 2001290040 A JP2001290040 A JP 2001290040A JP 2000102472 A JP2000102472 A JP 2000102472A JP 2000102472 A JP2000102472 A JP 2000102472A JP 2001290040 A JP2001290040 A JP 2001290040A
Authority
JP
Japan
Prior art keywords
optical waveguide
cladding layer
cores
core
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000102472A
Other languages
Japanese (ja)
Inventor
Akifumi Nakajima
章文 中嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP2000102472A priority Critical patent/JP2001290040A/en
Publication of JP2001290040A publication Critical patent/JP2001290040A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing optical waveguide parts by which a part between adjacent cores is embedded without increasing a polarization dependent loss caused by a thermal stress and without generating voids when a clad layer is formed on a substrate and to provide an optical waveguide parts. SOLUTION: In the method for manufacturing the optical waveguide parts and the optical waveguide parts 1 wherein the optical waveguide parts are manufactured by forming cores 4 having a desired shape on the substrate 2 and forming the clad layer 3 coating the cores, the optical waveguide part 1 is manufactured by repeating a process in which overhanging parts Poh of the clad layer 3 formed in the upper part of the cores 4 are removed by etching after the clad layer 3 consisting of silicon oxide coating the cores 4 is formed in a prescribed thickness by a plasma CVD method.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、光導波路部品の製
造方法と光導波路部品に関する。
The present invention relates to a method for manufacturing an optical waveguide component and an optical waveguide component.

【0002】[0002]

【従来の技術】光通信で用いられる光導波路部品は、コ
ア及びクラッド層が石英系材料からなり、コアの屈折率
をクラッド層の屈折率よりも少し大きく設定し、コア内
の光をクラッド層との界面で反射させてコア内に閉じ込
めながら伝搬させている。従来の石英系の光導波路部品
は、シリコン(Si)からなる基板上に下部クラッド
層、コア及びコアを覆う上部クラッド層が形成された3
層構造か、基板が石英の場合には、基板上にコア及びコ
アを覆うクラッド層が形成された2層構造である。
2. Description of the Related Art In an optical waveguide component used in optical communication, a core and a cladding layer are made of a silica-based material, and the refractive index of the core is set to be slightly larger than the refractive index of the cladding layer. The light is reflected at the interface with the substrate and propagated while being confined in the core. A conventional quartz optical waveguide component has a lower clad layer, a core and an upper clad layer covering the core formed on a substrate made of silicon (Si).
When the substrate is quartz, it has a two-layer structure in which a core and a cladding layer covering the core are formed on the substrate.

【0003】[0003]

【発明が解決しようとする課題】ところで、前記コア及
び上部クラッド層や下部クラッド層を含むクラッド層
は、火炎堆積法,CVD(chemical vapor deposition)
法あるいはPVD(physical vapor deposition)法に
よって形成している。このとき、クラッド層は、隣接し
たコア間を埋め込むように形成する必要があり、通常、
埋め込み性が良好な火炎堆積法やCVD法によって形成
されている。
The core and the cladding layers including the upper cladding layer and the lower cladding layer are formed by a flame deposition method, a CVD (chemical vapor deposition) method.
It is formed by a method or a PVD (physical vapor deposition) method. At this time, the cladding layer needs to be formed so as to bury the space between adjacent cores.
It is formed by a flame deposition method or a CVD method having a good embedding property.

【0004】しかし、これらの方法を用いてクラッド層
を形成すると、以下のような問題が生じる。先ず第1
に、火炎堆積法は、石英微粒子を基板上に堆積した後、
この微粒子を1000℃以上の熱処理を行って溶融さ
せ、透明な二酸化ケイ素膜にすることで光導波路を形成
する。従って、隣接した複数のコア間をクラッド層で埋
め込むことは比較的簡単である。しかし、石英微粒子を
溶融させたときの熱応力によって二酸化ケイ素膜にクラ
ックが入り易く、また、基板と二酸化ケイ素膜との熱膨
張係数の違いから、二酸化ケイ素膜に残留応力が生じ、
偏波依存性が大きくなるという問題が生じる。
However, when the cladding layer is formed by using these methods, the following problems occur. First,
In the flame deposition method, after depositing quartz fine particles on a substrate,
The fine particles are subjected to a heat treatment at 1000 ° C. or more to be melted, and a transparent silicon dioxide film is formed to form an optical waveguide. Therefore, it is relatively easy to embed a plurality of adjacent cores with a cladding layer. However, cracks easily occur in the silicon dioxide film due to thermal stress when the quartz fine particles are melted, and residual stress occurs in the silicon dioxide film due to a difference in thermal expansion coefficient between the substrate and the silicon dioxide film.
There is a problem that the polarization dependence is increased.

【0005】第2に、CVD法は、ガラス層からなる透
明なクラッド層を基板上に低温で直接形成することがで
きる。従って、CVD法は、熱処理が不要で、火炎堆積
法で問題となる熱応力に起因した光学特性の劣化を防ぐ
ことができる。しかし、CVD法は、コア側面部、上面
部及びコア間におけるクラッド層の形成速度が異なり、
特に、コアの上部角部におけるクラッド層の形成速度が
早くなり、コア上部におけるクラッド層がオーバーハン
グ形状となる。この結果、CVD法によって形成される
クラッド層は、隣接したコア間が十分に埋め込まれない
状態で形成される結果、内部の隣接したコア間にボイド
が発生してしまうという問題あった。
[0005] Second, the CVD method can form a transparent cladding layer made of a glass layer directly on a substrate at a low temperature. Therefore, the CVD method does not require heat treatment, and can prevent deterioration of optical characteristics due to thermal stress, which is a problem in the flame deposition method. However, in the CVD method, the formation speed of the cladding layer is different between the core side surface, the upper surface, and the core.
In particular, the formation speed of the clad layer in the upper corner of the core is increased, and the clad layer in the upper part of the core has an overhang shape. As a result, the cladding layer formed by the CVD method has a problem in that voids are generated between adjacent cores as a result of being formed in a state where the space between adjacent cores is not sufficiently buried.

【0006】このようなボイドに対する対策として、通
常はドーパントを添加してクラッド層を形成した後、高
温でリフローすることで、ボイドを除去している。しか
し、この場合にも、熱応力に起因した複屈折が生じ、偏
波依存損失が増加する問題が生じる。本発明は上記の点
に鑑みてなされたもので、基板上にクラッド層を形成す
る際に、熱応力に起因する偏波依存損失の増加を起こさ
ず、ボイドを発生することなく隣接したコア間を埋め込
むことが可能な光導波路部品の製造方法と光導波路部品
を提供することを目的とする。
As a countermeasure against such voids, voids are usually removed by forming a cladding layer by adding a dopant and then reflowing at a high temperature. However, also in this case, there arises a problem that birefringence due to thermal stress occurs and polarization-dependent loss increases. The present invention has been made in view of the above points, and does not cause an increase in polarization-dependent loss due to thermal stress when forming a cladding layer on a substrate and between adjacent cores without generating voids. It is an object of the present invention to provide an optical waveguide component manufacturing method and an optical waveguide component that can embed an optical waveguide.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
本発明の光導波路部品の製造方法においては、基板上に
所望形状のコアを形成し、前記コアを覆うクラッド層を
形成して光導波路部品とする光導波路部品の製造方法に
おいて、前記コアを覆う酸化ケイ素からなるクラッド層
をプラズマCVD法によって所定厚さに形成した後、前
記コア上部に形成される前記クラッド層のオーバーハン
グ部をエッチングで除去する工程を繰り返す構成とした
のである。
In order to achieve the above object, in a method for manufacturing an optical waveguide component according to the present invention, a core having a desired shape is formed on a substrate, and a cladding layer covering the core is formed. In the method of manufacturing an optical waveguide component as a component, a cladding layer made of silicon oxide covering the core is formed to a predetermined thickness by a plasma CVD method, and then an overhang portion of the cladding layer formed on the core is etched. The configuration is such that the step of removing is repeated.

【0008】また、上記目的を達成するため本発明の光
導波路部品においては、上記製造方法によって製造する
構成としたのである。
In order to achieve the above object, the optical waveguide component of the present invention is configured to be manufactured by the above manufacturing method.

【0009】[0009]

【発明の実施の形態】以下、本発明の光導波路部品の製
造方法とこの方法によって製造される光導波路部品に係
る一実施形態を図1乃至図4に基づいて詳細に説明す
る。光導波路部品1は、図1に示すように、シリコン製
の基板2の上に下部クラッド層3aと上部クラッド層3
bからなるクラッド層3が形成され、下部クラッド層3
a上に所望形状に形成されたコア4が上部クラッド層3
bで覆われている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing an optical waveguide component according to the present invention and an optical waveguide component manufactured by the method will be described below in detail with reference to FIGS. As shown in FIG. 1, an optical waveguide component 1 includes a lower clad layer 3a and an upper clad layer 3 on a silicon substrate 2.
b is formed, and the lower cladding layer 3 is formed.
a formed in a desired shape on the upper clad layer 3
b.

【0010】上記のように構成される光導波路部品1
は、以下に説明する方法によって製造される。先ず、シ
リコン製の基板2の上に火炎堆積法によりP2O5,B2
O3等のドーパントを添加した二酸化ケイ素(SiO2)
を所望厚さ(=20μm)堆積させた後、これを燒結し
て下部クラッド層3aを形成する(図2(a)参照)。
Optical waveguide component 1 configured as described above
Is manufactured by the method described below. First, P2O5, B2 was deposited on a silicon substrate 2 by flame deposition.
Silicon dioxide (SiO2) doped with dopants such as O3
Is deposited to a desired thickness (= 20 μm) and then sintered to form a lower cladding layer 3a (see FIG. 2A).

【0011】次に、下部クラッド層3aの上にGeO2,
P2O5,B2O3等のドーパントを添加した二酸化ケイ素
(SiO2)を火炎堆積法により堆積させた後、これを
燒結し、下部クラッド層3aよりも僅かに高屈折率で、
厚さ約7μmののコア層5を形成する(図2(b)参
照)。このとき、基板2の素材として石英を用いた場
合、基板2は、下部クラッド層3aは不要で、コア層5
を基板2の上に直接形成する。
Next, GeO 2,
After depositing silicon dioxide (SiO2) to which a dopant such as P2O5 or B2O3 is added by a flame deposition method, this is sintered and has a slightly higher refractive index than the lower cladding layer 3a.
A core layer 5 having a thickness of about 7 μm is formed (see FIG. 2B). At this time, when quartz is used as the material of the substrate 2, the substrate 2 does not need the lower cladding layer 3a,
Is formed directly on the substrate 2.

【0012】また、下部クラッド層3aやコア層5を形
成する手段としては、前記火炎堆積法以外に、CVD法
(常圧CVD法,減圧CVD法,プラズマCVD法)や
PVD法(EB(electron beam)蒸着法,スパッタ法)
を使用することができる。次いで、コア層5をフォトリ
ソグラフィ及び反応性イオンエッチングによりパターン
化して幅8μmの所望形状の複数のコア4を形成する
(図2(c)参照)。このとき、複数のコア4は、隣接す
る最も接近した部分における高さ/間隔の比が1以上
(高さ>間隔)となるように形成する。
As means for forming the lower cladding layer 3a and the core layer 5, in addition to the flame deposition method, a CVD method (normal pressure CVD method, low pressure CVD method, plasma CVD method) or a PVD method (EB (electron beam) evaporation method, sputtering method)
Can be used. Next, the core layer 5 is patterned by photolithography and reactive ion etching to form a plurality of cores 4 having a desired shape with a width of 8 μm (see FIG. 2C). At this time, the plurality of cores 4 are formed such that the ratio of the height / interval at the nearest adjacent portion is 1 or more (height> interval).

【0013】しかる後、複数のコア4を覆う二酸化ケイ
素(SiO2)からなる上部クラッド層3bを、プラズ
マCVD法により以下のように形成する。ここで、上部
クラッド層3bの形成に使用するプラズマCVD装置
(以下、「PCVD装置」という)の概略を図3に基づ
いて説明する。PCVD装置10は、チャンバー11内
に基板保持台11aとシャワープレート11bが対向配
置されると共に、加熱ヒータ線11cがシャワープレー
ト11bの近傍に配線されている。基板保持台11aと
シャワープレート11bは、それぞれ平行平板型の下部
電極と上部電極を形成し、基板保持台11aにはマッチ
ングボックス12を介して高周波電源13から高周波電
圧が印加される。また、チャンバー11は、第1配管1
4によってプロセスガスのタンク15に接続されてい
る。第1配管14は、図3に示すように、酸素ガス(O
2)やアルゴンガス(Ar)を導入する第2配管16が接
続されると共に、ヒータ14a,気化器14b及びプロ
セスガスの流量を制御する制御器14cが設けられてい
る。そして、チャンバー11は、前記プロセスガスの排
出側にメカニカルブースターポンプとロータリーポンプ
を組み合わせたポンプ17が配置されている。ここで、
プロセスガスとしては、原料用ガスとしてシラン(Si
H4)又はテトラエトキシシラン(TEOS)を使用し、
原料用ガスに添加する反応ガスとしてNO2,O2,H2
等のガスを使用する。
Thereafter, an upper cladding layer 3b made of silicon dioxide (SiO 2) covering the plurality of cores 4 is formed by a plasma CVD method as follows. Here, an outline of a plasma CVD apparatus (hereinafter, referred to as “PCVD apparatus”) used for forming the upper cladding layer 3b will be described with reference to FIG. In the PCVD apparatus 10, a substrate holding table 11a and a shower plate 11b are arranged opposite to each other in a chamber 11, and a heater wire 11c is wired near the shower plate 11b. The substrate holder 11a and the shower plate 11b form a parallel plate type lower electrode and upper electrode, respectively, and a high frequency voltage is applied to the substrate holder 11a from a high frequency power supply 13 via a matching box 12. The chamber 11 is provided with the first pipe 1
4 is connected to a process gas tank 15. As shown in FIG. 3, the first pipe 14 is provided with an oxygen gas (O
2) and a second pipe 16 for introducing argon gas (Ar) is connected, and a heater 14a, a vaporizer 14b, and a controller 14c for controlling the flow rate of the process gas are provided. In the chamber 11, a pump 17 which is a combination of a mechanical booster pump and a rotary pump is arranged on the discharge side of the process gas. here,
As a process gas, silane (Si
H4) or tetraethoxysilane (TEOS)
NO2, O2, H2 as reaction gas added to the raw material gas
Use a gas such as

【0014】従って、上部クラッド層3bをPCVD装
置10で成膜するときは、先ず、タンク15から第1配
管14によって供給されるプロセスガス(TEOS)を気
化器14bで110℃で気化させ、ヒータ14aで12
0℃に加熱しながら第2配管16から酸素を約20cm
3/分で供給し、チャンバー11内へ導入した。そし
て、高周波電源13の出力を100Wとし、コア4が形
成された図2(c)に示す基板2を基板保持台11a上で
200℃に加熱しながら成膜した。
Therefore, when the upper cladding layer 3b is formed by the PCVD apparatus 10, first, the process gas (TEOS) supplied from the tank 15 by the first pipe 14 is vaporized at 110 ° C. by the vaporizer 14b, 12 at 14a
While heating to 0 ° C., about 20 cm of oxygen is supplied from the second pipe 16.
It was supplied at a rate of 3 / min and introduced into the chamber 11. Then, the output of the high-frequency power supply 13 was set to 100 W, and the substrate 2 on which the core 4 was formed as shown in FIG. 2C was formed while being heated to 200 ° C. on the substrate holding table 11a.

【0015】このとき、コア4に堆積する二酸化ケイ素
(SiO2)は、膜厚が約2μmになると、コア4の上
部角における膜厚が約2.5μmなる。このため、成膜
された二酸化ケイ素(SiO2)からなる上部クラッド
層3bには、図4(a)に示すように、コア4の幅方向
両側へひさし状に張り出すオーバーハング部Pohが形成
される。そこで、オーバーハング部Pohの形成を目安と
して成膜を一時停止する。成膜を一時停止するときの膜
厚は、上記厚さ(=約2μm)に限定されない。但し、
二酸化ケイ素(SiO2)の膜が過度に厚くなると、こ
の膜が隣接したコア4に堆積した膜と繋がって、次のエ
ッチング工程でオーバーハング部Pohを除去できなくな
る。このため、オーバーハング部Pohが形成される手前
の段階で成膜を一時停止することが望ましい。
At this time, when the thickness of the silicon dioxide (SiO 2) deposited on the core 4 becomes about 2 μm, the thickness at the upper corner of the core 4 becomes about 2.5 μm. For this reason, as shown in FIG. 4A, an overhang portion Poh that protrudes in both sides in the width direction of the core 4 is formed in the formed upper cladding layer 3b made of silicon dioxide (SiO2). You. Therefore, the film formation is temporarily stopped with the formation of the overhang portion Poh as a guide. The film thickness when the film formation is temporarily stopped is not limited to the above thickness (= about 2 μm). However,
If the silicon dioxide (SiO2) film becomes excessively thick, this film is connected to the film deposited on the adjacent core 4, so that the overhang portion Poh cannot be removed in the next etching step. For this reason, it is desirable that the film formation be temporarily stopped before the overhang portion Poh is formed.

【0016】次に、プロセスガス(TEOS)及び酸素の
供給を停止し、新たにアルゴンガスを第2配管16から
約50cm3/分でチャンバー11内へ導入し、高周波
電源13の出力を400Wに設定してエッチングを行っ
た。このとき、エッチング時間を成膜時間の2倍とする
ことで、図4(b)に示すように、上部クラッド層3b
のオーバーハング部Pohを除去することができ、コア4
は上部の角が削れることがなかった。但し、図示のよう
に、エッチングによってコア4の間の上部クラッド層3
bには凹溝Tが生じる、凹溝Tは後述のようにして埋め
戻される。ここで、エッチングに使用するガスは、前記
アルゴンガスに限定されるものでなく、例えば、ヘリウ
ム(He),酸素(O2),窒素(N2)等のガスを使用するこ
とができる。
Next, supply of the process gas (TEOS) and oxygen is stopped, argon gas is newly introduced into the chamber 11 from the second pipe 16 at about 50 cm 3 / min, and the output of the high frequency power supply 13 is reduced to 400 W. Etching was performed by setting. At this time, by making the etching time twice as long as the film forming time, as shown in FIG.
Of the core 4 can be removed.
Did not scrape the upper corner. However, as shown, the upper cladding layer 3 between the cores 4 is etched by etching.
A groove T is formed in b, and the groove T is backfilled as described later. Here, the gas used for etching is not limited to the above-mentioned argon gas, and for example, gases such as helium (He), oxygen (O2), and nitrogen (N2) can be used.

【0017】次いで、エッチングを施した二酸化ケイ素
(SiO2)膜の上に、再度PCVD法で二酸化ケイ素
(SiO2)の膜を成膜した。このとき、二酸化ケイ素
(SiO2)の膜に図4(a)に示すオーバーハング部
Pohが形成されたときには、再度エッチングを行ってこ
の部分を図4(b)に示すように除去する。このよう
に、成膜とエッチングによるオーバーハング部Pohの除
去とを交互に繰り返すことで、図4(b)に示す凹溝T
は、図4(c)に示すように埋め戻されてゆく。そし
て、最終的には、図1に示すように、複数のコア4の上
部が僅かに隆起しているが、凹溝Tの痕跡のない光導波
路部品1が製造される。
Next, a silicon dioxide (SiO 2) film was formed again by the PCVD method on the etched silicon dioxide (SiO 2) film. At this time, when the overhang portion Poh shown in FIG. 4A is formed on the silicon dioxide (SiO2) film, etching is performed again to remove this portion as shown in FIG. 4B. As described above, by alternately repeating the film formation and the removal of the overhang portion Poh by etching, the concave groove T shown in FIG.
Are backfilled as shown in FIG. Finally, as shown in FIG. 1, the optical waveguide component 1 in which the upper portions of the plurality of cores 4 are slightly raised but have no trace of the concave groove T is manufactured.

【0018】製造された光導波路部品1は、複数のコア
4の間隔が狭い部分でもボイドが発生することはなかっ
た。また、製造された光導波路部品1は、PCVD法に
よる上部クラッド層3bの成膜中、基板2の温度を20
0℃と従来の成膜方法よりも低い温度に保持したので、
熱応力によって生じる偏波依存損失の増加も防ぐことが
できる。
In the manufactured optical waveguide component 1, no void was generated even in a portion where the interval between the plurality of cores 4 was narrow. In addition, during the formation of the upper cladding layer 3b by the PCVD method, the temperature of the
Because it was kept at 0 ° C, a lower temperature than the conventional film forming method,
An increase in polarization dependent loss caused by thermal stress can also be prevented.

【0019】[0019]

【発明の効果】請求項1,2の発明によれば、基板上に
クラッド層を形成する際に、熱応力に起因する偏波依存
損失の増加を起こさず、ボイドを発生することなく隣接
したコア間を埋め込むことが可能な光導波路部品の製造
方法と光導波路部品を提供することができる。
According to the first and second aspects of the present invention, when the cladding layer is formed on the substrate, the polarization dependent loss caused by the thermal stress does not increase and the adjacent layers do not generate voids. It is possible to provide a method of manufacturing an optical waveguide component capable of embedding between cores and an optical waveguide component.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の光導波路部品を示す断面図である。FIG. 1 is a sectional view showing an optical waveguide component of the present invention.

【図2】図1の光導波路部品に下部クラッド層と複数の
コアを形成するプロセスを示す工程図である。
FIG. 2 is a process chart showing a process of forming a lower cladding layer and a plurality of cores on the optical waveguide component of FIG.

【図3】上部クラッド層の成膜に用いるPCVD装置の
概略構成図である。
FIG. 3 is a schematic configuration diagram of a PCVD apparatus used for forming an upper cladding layer.

【図4】上部クラッド層の成膜プロセスを示す工程図で
ある。
FIG. 4 is a process diagram showing a film forming process of an upper clad layer.

【符号の説明】[Explanation of symbols]

1 光導波路部品 2 基板 3 クラッド層 3a 下部クラッド層 3b 上部クラッド層 4 コア DESCRIPTION OF SYMBOLS 1 Optical waveguide component 2 Substrate 3 Cladding layer 3a Lower cladding layer 3b Upper cladding layer 4 Core

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 基板上に所望形状のコアを形成し、前記
コアを覆うクラッド層を形成して光導波路部品とする光
導波路部品の製造方法において、前記コアを覆う酸化ケ
イ素からなるクラッド層をプラズマCVD法によって所
定厚さに形成した後、前記コア上部に形成される前記ク
ラッド層のオーバーハング部をエッチングで除去する工
程を繰り返すことを特徴とする光導波路部品の製造方
法。
1. A method for manufacturing an optical waveguide component, wherein a core having a desired shape is formed on a substrate, and a cladding layer covering the core is formed to form an optical waveguide component. A method for manufacturing an optical waveguide component, comprising: forming a predetermined thickness by a plasma CVD method; and repeating a process of removing an overhang portion of the cladding layer formed on the core by etching.
【請求項2】 請求項1の製造方法によって製造される
ことを特徴とする光導波路部品。
2. An optical waveguide component manufactured by the manufacturing method according to claim 1.
JP2000102472A 2000-04-04 2000-04-04 Method for manufacturing optical waveguide parts and optical waveguide parts Pending JP2001290040A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000102472A JP2001290040A (en) 2000-04-04 2000-04-04 Method for manufacturing optical waveguide parts and optical waveguide parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000102472A JP2001290040A (en) 2000-04-04 2000-04-04 Method for manufacturing optical waveguide parts and optical waveguide parts

Publications (1)

Publication Number Publication Date
JP2001290040A true JP2001290040A (en) 2001-10-19

Family

ID=18616347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000102472A Pending JP2001290040A (en) 2000-04-04 2000-04-04 Method for manufacturing optical waveguide parts and optical waveguide parts

Country Status (1)

Country Link
JP (1) JP2001290040A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09133827A (en) * 1995-11-09 1997-05-20 Nec Corp Production of optical waveguide
JPH09297232A (en) * 1996-05-08 1997-11-18 Hitachi Cable Ltd Polymer waveguide and its production
JPH10221557A (en) * 1997-02-06 1998-08-21 Sumitomo Electric Ind Ltd Waveguide film forming method
JPH11271553A (en) * 1998-03-23 1999-10-08 Hitachi Cable Ltd Method and device for forming glass film for optical waveguide
JPH11295544A (en) * 1998-04-13 1999-10-29 Oki Electric Ind Co Ltd Manufacture of buried planar optical wave circuit element
JP2001337241A (en) * 2000-03-23 2001-12-07 Hitachi Cable Ltd Method for manufacturing optical waveguide

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09133827A (en) * 1995-11-09 1997-05-20 Nec Corp Production of optical waveguide
JPH09297232A (en) * 1996-05-08 1997-11-18 Hitachi Cable Ltd Polymer waveguide and its production
JPH10221557A (en) * 1997-02-06 1998-08-21 Sumitomo Electric Ind Ltd Waveguide film forming method
JPH11271553A (en) * 1998-03-23 1999-10-08 Hitachi Cable Ltd Method and device for forming glass film for optical waveguide
JPH11295544A (en) * 1998-04-13 1999-10-29 Oki Electric Ind Co Ltd Manufacture of buried planar optical wave circuit element
JP2001337241A (en) * 2000-03-23 2001-12-07 Hitachi Cable Ltd Method for manufacturing optical waveguide

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