JP2000089053A - Manufacture of optical waveguide circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a low branching loss and an optical coupling of a high efficiency in a manufacturing method for an optical waveguide circuit in which the core-to-core distance is controlled to be equal to or below the wavelength. SOLUTION: An optical waveguide pattern in the optical waveguide circuit is divided into two parts with an optically coupled part or an branching part as a boundary. First, a first core part 5 corresponding to one optical waveguide is formed, and next, a clad between the two optical guides is formed by forming a clad film 6 so as to cover this first core part 5. Thereafter, a second core part corresponding to the other optical waveguide is formed. To independently form the clad layer 6 between the cores, the desired core-to-core distance is made to be obtd. by a film forming process at a comparatively low temp.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an optical waveguide circuit such as a branch circuit, a directional coupler, or a Mach-Zehnder interferometer.

[0002]

2. Description of the Related Art Conventionally, as a method of manufacturing this type of optical waveguide circuit, a manufacturing method based on a flame deposition method is known. For example, the document "NTT R & D Vol.40, No.2,
In the method shown in FIG. 2 on page 103 of "1991", first, silicon oxide glass fine particles (particle diameter: about 0.1) obtained by hydrolyzing silicon tetrachloride in an oxyhydrogen flame.
mm) on a silicon substrate. next,
The silicon oxide glass fine particle film is heated at a temperature of 1250 ° C. or more in an electric furnace to form a transparent silicon oxide glass film. The lower clad and the core layer are formed by changing the composition of the silicon oxide glass fine particles. Next, the core layer was processed by reactive ion etching to obtain a line width of 4 μm.
A core having a height of 4 to 10 μm and a height of 4 to 10 μm is formed. At this time, in an optical waveguide circuit such as a Y-branch circuit, a directional coupler, or a Mach-Zehnder interferometer, the processing is performed so that all the cores are formed on the same plane on the lower clad. Finally, an upper clad is formed to cover the core in the same manner as the lower clad.

[0003]

However, even in the above-described manufacturing method, when the upper cladding layer is formed, for example, when the height of the core portion is 8 μm and the distance between the cores is 4 μm or less, the distance between the cores is reduced. Embedded in the upper cladding layer was not easy. On the other hand, the distance between the cores is desirably equal to or less than the wavelength used in the optical waveguide in order to obtain low-loss branching and high-efficiency mode coupling. Is preferably 1.3 μm or less. Further, in the above manufacturing method,
After the formation of silicon oxide glass fine particles, it is necessary to heat at a temperature of 1250 ° C. or more to vitrify. Therefore, when the temperature is returned to room temperature, thermal stress is generated, and the birefringence of the optical waveguide is induced. However, it is not easy to obtain a sharp refractive index distribution because impurities doped for controlling the refractive index are diffused by the high-temperature treatment. Accordingly, an object of the present invention is to reduce the distance between cores to a wavelength or less, and realize an optical waveguide capable of realizing low-loss branch loss in a Y-branch and high-efficiency optical coupling in a directional coupler or a Mach-Zehnder. An object of the present invention is to provide a method of manufacturing a waveguide circuit.

[0004]

According to the present invention, an optical waveguide pattern in an optical waveguide circuit is divided into two portions at an optical coupling portion or a branch portion, and first, a first core portion corresponding to one of the optical waveguides is formed. Then, a clad film is formed so as to cover the first core portion to form a clad between the two optical waveguides, and thereafter, a second core portion corresponding to the other optical waveguide is formed. It is. According to this manufacturing method, since the cladding layer between the cores is formed independently,
By a relatively low temperature film forming process, a desired distance between cores can be obtained.

According to a first aspect of the present invention, a first core layer is deposited on a substrate having a lower cladding layer on a surface, and thereafter, unnecessary portions of the first core layer are removed by etching to form a pattern corresponding to the first optical waveguide. Forming a first core portion.
In addition, the method further includes a step of depositing an inter-core clad film having a thickness corresponding to a distance between the trunk optical waveguide and the optical coupling waveguide so as to cover the first core portion, and subsequently depositing a second core layer. . Further, an etching mask having a pattern corresponding to the second optical waveguide is formed on the second core layer, and then unnecessary portions of the core layer are removed by etching using the etching mask to form a pattern corresponding to the second optical waveguide. Forming a second core portion. According to this manufacturing method, the first optical waveguide including the trunk optical waveguide and one of the Y-branch optical waveguides connected thereto, the optical coupling waveguide disposed close to the main optical waveguide, and the optical waveguide connected to the first optical waveguide. An optical waveguide circuit having a second optical waveguide composed of the other branch optical waveguide of the Y branch can be obtained.

According to a second aspect of the present invention, a first core layer is deposited on a substrate having a lower cladding layer on the surface, and then unnecessary portions of the first core layer are removed by etching, so as to correspond to the first optical waveguide. Forming a first core portion of the pattern. Further, a thin inter-core clad film is deposited so as to cover the first core portion, and subsequently anisotropic etching is performed to leave the inter-core clad film on the side wall of the first core portion and to form the first inter-core clad film. And removing the inter-core clad film on the one core portion and the lower clad layer. Further, by depositing a second core layer and subsequently performing an etch-back process, the second core layer is formed until the height of the second core layer becomes substantially equal to the height of the first core portion.
A step of etching and removing the core layer. Also, the first
An etching mask having a pattern corresponding to the optical waveguide and the second optical waveguide and covering the top of the inter-core clad film on the side wall of the first core portion is formed. Subsequently, the second etching mask is formed using this etching mask. An unnecessary portion of the core layer is removed by etching to form a second core portion having a pattern corresponding to the second optical waveguide. According to this manufacturing method, the first optical waveguide including the trunk optical waveguide and one of the Y-branch optical waveguides connected thereto and the other branch optical waveguide of the Y-branch, one end of which is a side wall of the first waveguide. And a second optical waveguide having a shape abutted and connected to the optical waveguide circuit.

According to a third aspect of the present invention, a first core layer is deposited on a substrate having a lower clad layer on the surface, and thereafter, unnecessary portions of the first core layer are removed by etching, so as to correspond to the first optical waveguide. Forming a first core portion of the pattern. The method further includes depositing an inter-core clad film having a thickness corresponding to a distance between the first optical waveguide and the second optical waveguide in the optical coupling portion so as to cover the first core portion. Also,
A step of depositing a second core layer and subsequently performing an etch-back process to remove the second core layer by etching until the height becomes substantially equal to the height of the first core portion. First
An etching mask having a pattern corresponding to the optical waveguide and the second optical waveguide and covering the inter-core cladding film is formed. Subsequently, an unnecessary portion of the second core layer is etched and removed using the etching mask. Forming a second core portion having a pattern corresponding to the second optical waveguide. According to this manufacturing method, an optical waveguide circuit having a first optical waveguide and a second optical waveguide and having an optical coupling portion in which the first optical waveguide and the second optical waveguide are arranged close to each other is obtained. Can be.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. The present invention uses deposition by a plasma enhanced chemical vapor deposition apparatus. First, an outline of a plasma enhanced chemical vapor deposition apparatus (plasma CVD apparatus) used in an embodiment of the present invention will be described with reference to FIG. I do. This plasma CVD apparatus has a substrate stage 32 and an upper electrode 33 arranged in a chamber 31 in parallel. The upper electrode 33 has a large number of holes and also serves as a gas shower head, is grounded together with the chamber 31, and the substrate stage 32 also serves as a lower electrode, and is connected via a capacitor 34. 13.5
A 6 MHz high frequency oscillator 35 is connected. Also,
Tanks 36 and 37, gas introduction pipes 38 to 40, flow controllers 41 to 44, and valves 45 to 54 are provided.
Tetraethoxysilane (TEOS), triethoxysilane (TRIES), oxygen (O2), carbon fluoride (C2F)
6), and nitrogen (N2) as an inert gas can be introduced into the chamber 31 at a desired constant flow rate. The chamber 31 is controlled by a turbo molecular pump 61, a rotary pump 62, and valves 63 to 65.
The inside of the chamber 31 can be evacuated to a pressure of 1 × 10 ⁻³ Pa. Further, the inside of the chamber 31 is further reduced by a pressure gauge 66, a pressure controller 67, a butterfly valve 68, a valve 69, a mechanical booster pump 70, and a rotary pump 71. Can be controlled to a desired constant value. In this plasma CVD apparatus, the substrate such as the silicon wafer 1 placed on the substrate stage 32 can be heated up to 500 ° C. by a heater (not shown). A shower-like gas onto the surface of the
By applying a high frequency of 13.56 MHz between the second electrode 2 and the upper electrode 33, a self-bias is applied to the substrate, a plasma sheath is formed on the substrate side, and a film can be formed.

Next, a first embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to the process chart of FIG. Here, this embodiment relates to a method of manufacturing a Y-branch circuit, in which one branch optical waveguide is connected to a trunk optical waveguide, and the other branch optical waveguide is arranged close to the trunk optical waveguide. This is to manufacture a Y-branch circuit having a structure connected to the optical coupling waveguide. 1 to 3, the silicon wafer 1
And the thickness of the lower cladding layer 2 is reduced.

First, a quartz film serving as a lower cladding layer 2 is deposited on a silicon wafer 1 using the plasma enhanced chemical vapor deposition apparatus shown in FIG. 4 (see FIG. 1A). In this lower cladding layer deposition step, first, the cleaned silicon wafer 1 is placed on a substrate stage 32 in a chamber 31 of a plasma enhanced chemical vapor deposition apparatus. Next, the silicon wafer 1 is heated until the temperature reaches 400 ° C. In this state, the inside of the chamber 31 is evacuated to a pressure of 1 Pa by the rotary pump 62, and then evacuated to a pressure of 1 × 10 ⁻³ Pa by the turbo molecular pump 61. Next, TRIES
Or 12 sccm of TEOS and 400 sccc of oxygen
m and C2F6 are introduced into the chamber 31 from the upper electrode 33 at respective flow rates of 10 sccm. Here, TRIE
S or TEOS is vaporized at a temperature of 80 ° C. in advance. C2F6 is doped for the purpose of forming a clad for a non-doped core so that the refractive index of the clad is about 0.3% smaller than the refractive index of the core. C2F6 also serves as a chamber cleaning function for removing a film deposited in the chamber 31, and oxygen serves also as a cleaning function for fluorine-based organic substances generated in the chamber 31. It is. Next, the pressure in the chamber 31 is maintained at 30 Pa, and
The high frequency of 56 MHz is applied to the upper electrode 33 and the substrate stage 32.
A power density of 1.6 W / cm 2 is applied between them. as a result,
Plasma is generated in the chamber 31 and a film thickness of about 25 μm and a refractive index of 1.452 are formed on the silicon wafer 1 in 3 hours and 30 minutes.
A quartz film serving as the lower cladding layer 2 is deposited. After film formation,
Stop applying high frequency. The cleaning of the silicon wafer 1 is performed first by mixing sulfuric acid and hydrogen peroxide at a temperature of 8: 1.
This is performed by washing with a solution at 5 ° C. for 5 minutes, followed by washing with pure water, then washing with a hydrofluoric acid solution diluted to 1% with pure water for 20 seconds, and then washing with pure water. Can be.

Next, using the plasma enhanced chemical vapor deposition apparatus shown in FIG. 4, a quartz film serving as a core layer (first core layer) 3 is successively deposited following the lower clad layer 2 (FIG. 4). 1
(B)). Here, the temperature of the silicon wafer 1 on which the lower clad layer 2 has already been deposited is heated to 400 ° C. In this first core layer deposition step, the inside of the chamber 31 is first evacuated to a pressure of 1 Pa by the rotary pump 62. I do. Subsequently, the pressure is 1 × by the turbo molecular pump 61.
Exhaust to 10 ^-3 Pa. Next, TRIES or TE
OS is introduced into the chamber 31 from the upper electrode 33 at a flow rate of 12 sccm and oxygen at 400 sccm.
The pressure in the chamber 31 is maintained at 30 Pa, and 13.56.
By applying a high frequency of MHz between the upper electrode 33 and the substrate stage 32 at a power density of 1.6 W / cm ² ,
A thickness of about 8 μm on the lower cladding layer 2 and a refractive index of 1.4.
A quartz film serving as 56 first core layers 3 is deposited. After film formation,
The high-frequency discharge and the introduction of gas are stopped, and the chamber is evacuated to a pressure of 1 × 10 ⁻³ Pa using the rotary pump 62 and the turbo molecular pump 61 in this order. After exhaust, chamber 3
After introducing nitrogen into the atmosphere 1 to make it atmospheric pressure, the silicon wafer 1 is taken out.

Next, an etching resist 4 for processing the first core layer 3 is formed using a mask having a pattern corresponding to the trunk optical waveguide and one branch optical waveguide.
(C)). In this resist forming step, first, the first
A resist having a thickness of about 1.4 μm is applied to the silicon wafer 1 having the core layer 3 by spin coating. next,
After holding the silicon wafer 1 coated with the resist in a thermostat at a temperature of 90 ° C. for 10 minutes, the mask and the silicon wafer 1 are set on a reduction projection exposure machine using i-line. Next, the resist on the silicon wafer 1 is irradiated with i-line at a predetermined exposure amount. Next, by holding in a constant temperature bath at a temperature of 80 ° C. for 10 minutes after development, an etching resist 4 having a pattern corresponding to the main optical waveguide and one branch optical waveguide is formed on the silicon wafer 1.

Next, the first core layer 3 is etched using a reactive ion etching apparatus, and
Is formed (see FIG. 1D). In this core part forming step, first, the silicon wafer 1 on which the etching resist 4 is formed is placed in a chamber of a reactive ion etching apparatus. Next, the chamber is evacuated to a pressure of 1 Pa by a rotary pump, and then evacuated to a pressure of 1 × 10 −3 Pa by a turbo-molecular pump. next,
CHF3 is introduced into the chamber at a flow rate of 100 sccm. The pressure in the chamber is maintained at 2 Pa, and the frequency is 13.
A high frequency of 56 MHz is applied at a power density of 1 W / cm ² . As a result, the first core layer 3
Is etched, and after 40 minutes, high frequency discharge and CH
The introduction of F3 is stopped, and the chamber is evacuated to a pressure of 1 × 10 ⁻³ Pa using a rotary pump and a turbo molecular pump in this order. After evacuation, nitrogen is introduced into the chamber to atmospheric pressure, and then the silicon wafer 1 is taken out. Next, the resist is stripped off by an oxygen plasma asher method generally used, followed by washing with a solution of sulfuric acid and hydrogen peroxide mixed at a temperature of 85 ° C. in a ratio of 3: 1, followed by washing with pure water. By this step, the line width is 8 μm and the height is 8 μm.
The first core portion 5 having a length m is formed. Although the etching is performed using only the resist here, a multilayer resist structure in which a film of amorphous silicon, tungsten silicide, aluminum, chromium, or the like is formed under the resist and the core is etched using the film as a mask may be used. .

Next, using the plasma enhanced chemical vapor deposition apparatus shown in FIG. 4, a quartz film serving as an inter-core clad film 6 interposed between the first core portion 5 and a core portion formed in a later step. Is deposited (see FIG. 1E). This inter-core clad film deposition step is performed by the same method as the lower clad layer deposition step. That is, first, the silicon wafer 1 on which the core 5 is formed is placed in the chamber 31 of the plasma enhanced chemical vapor deposition apparatus, and heated until the temperature reaches 400 ° C. Next, a pressure of 1 Pa
Until the pressure is reduced to 1 by the turbo molecular pump 61.
Exhaust to 10-3 Pa. Then TRIES or T
EOS 12sccm, oxygen 400sccm, C2F6
Is introduced from the upper electrode 33 into the chamber 31 at a flow rate of 10 sccm, and the pressure in the chamber 31 is increased by 30 Pcm.
a and a high frequency of 13.56 MHz is applied to the upper electrode 33.
And a substrate stage 32 at a power density of 1.6 W / cm 2. As a result, plasma is generated in the chamber 31, and an inter-core clad film 6 having a thickness of about 0.5 μm and a refractive index of 1.452 is deposited on the flat surfaces of the first core portion 5 and the lower clad layer 2 in 5 minutes. I do. At this time, a quartz film is also deposited on the side wall of the first core portion 5, and the film thickness is about 0.2 μm at the thinnest portion.
m. After the deposition, the application of the high frequency is stopped.

Next, using the plasma enhanced chemical vapor deposition apparatus shown in FIG. 4, a quartz film to be a core layer (second core layer) 7 is continuously deposited following the inter-core clad film 6 (see FIG. 4). (See FIG. 2F). Here, the temperature of the silicon wafer 1 deposited up to the inter-core clad film 6 is heated to 400 ° C. In the second core layer deposition step, the inside of the chamber 31 is first evacuated to a pressure of 1 Pa by the rotary pump 62. Then, the pressure is set to 1 × 10 ⁻³ by the turbo molecular pump 61.
Exhaust to Pa. Next, TRIES or TEOS is introduced into the chamber 31 from the upper electrode 33 at a flow rate of 12 sccm and oxygen at 400 sccm, the pressure in the chamber 31 is maintained at 80 Pa, and a high frequency of 13.56 MHz is applied to the upper electrode 33 and the substrate. A power density of 0.5 W / cm ² is applied between the stages 32, and the second core layer 7 having a thickness of about 8 μm and a refractive index of 1.456 is formed on the inter-core cladding film 6 in 70 minutes.
Is deposited. After the deposition, the high-frequency discharge and the introduction of gas are stopped, and the pressure in the chamber 31 is reduced to 1 × 10 ⁻³ by using the rotary pump 62 and the turbo molecular pump 61 in this order.
Exhaust to Pa. After evacuation, nitrogen is introduced into the chamber to make it atmospheric pressure, and then the silicon wafer is taken out.

Next, the second core layer 7 is formed by using a mask having a pattern corresponding to the optical coupling waveguide and one branch optical waveguide.
An etching resist 8 for processing is formed (see FIG. 2G). This resist forming step is performed by the same method as the resist forming step in the first core layer. That is, first, the silicon wafer 1 having the second core layer 7
A resist having a thickness of about 1.4 μm is applied thereon using spin coating. Next, after holding the silicon wafer coated with the resist in a thermostat at a temperature of 90 ° C. for 10 minutes, the mask and the silicon wafer are set on a reduction projection exposure machine using i-line. Next, the resist on the silicon wafer 1 is irradiated with i-line at a predetermined exposure amount. Next, by holding for 10 minutes in a thermostat at a temperature of 80 ° C. after development,
An etching resist 8 having a pattern corresponding to the optical coupling waveguide and one branch optical waveguide is formed.

Next, the second core layer 7 is etched using a reactive ion etching apparatus to form a second core layer 9.
Is formed (see FIG. 2H). This second core part forming step is performed by the same method as the first core part forming step. That is, first, the silicon wafer 1 on which the etching resist 8 is formed is placed in the chamber of the reactive ion etching apparatus. Next, the chamber is evacuated to a pressure of 1 Pa by a rotary pump, and then evacuated to a pressure of 1 × 10 −3 Pa by a turbo-molecular pump. Next, CHF3 was introduced into the chamber at a flow rate of 100 sccm, the pressure in the chamber was maintained at 2 Pa, and a frequency of 1
A high frequency of 3.56 MHz is applied at a power density of 1 W / cm ² . As a result, the second core layer 7 is etched using the resist 8 as a mask. After 40 minutes, the high-frequency discharge and the introduction of CHF3 were stopped, and the pressure in the chamber was reduced to 1 × 10 ⁻³ Pa using a rotary pump and a turbo molecular pump in this order.
Exhaust until After evacuation, nitrogen is introduced into the chamber to make it atmospheric pressure, and then the silicon wafer is taken out. After that, the resist 8 is peeled off, and the substrate is subsequently washed with pure water. By this step, the second core portion 9 having a line width of 8 μm and a height of 8 μm
Is formed.

Next, a quartz layer serving as the upper cladding layer 10 is deposited using the plasma enhanced chemical vapor deposition apparatus shown in FIG. 4 so as to cover the core portions 5 and 9 (see FIG. 2J). .
This upper cladding layer deposition step is performed by the same method as the lower cladding layer deposition step. Upper cladding layer 10 having a film thickness of about 18 μm and a refractive index of 1.452 in a deposition time of 180 minutes.
Accumulates. After the deposition, high-frequency discharge and introduction of gas are stopped, and the chamber is evacuated to a pressure of 1 × 10 ⁻³ Pa. After evacuation, nitrogen is introduced into the chamber to make it atmospheric pressure, and then the silicon wafer is taken out. According to the steps shown in FIGS. 1 and 2 described above, as shown in FIG.
(See FIG. 3 (K)) in which the first core portion 5 and the second core portion 9 have different thicknesses near the branch portion. (See FIG. 3 (L)), a structure in which the first core portion 5 and the second core portion 9 are juxtaposed at the same distance from the branch portion (FIG. 3 (N)). ) Is manufactured.

As described above, according to this embodiment,
After the first core portion 5 is formed, the inter-core cladding film 7 is formed, and the second core portion 9 is formed. Therefore, the distance between the first core portion and the second core portion is equal to the inter-core cladding film. It is determined by the thickness, and it can be expected that the branch loss of the Y branch is reduced. Further, since the optical waveguide can be formed at a temperature of 500 ° C. or less, it can be expected that the distribution of impurities for controlling the refractive index becomes sharp. In addition, since the optical waveguide can be manufactured at a lower temperature than in the conventional case, stress can be reduced, birefringence can be reduced, and improvement in polarization characteristics can be expected.

Next, a second embodiment of the present invention will be described with reference to FIGS. Here, the present embodiment relates to a method of manufacturing a Y-branch circuit.
This is to manufacture a Y-branch circuit having a structure in which one branch optical waveguide is connected to a trunk optical waveguide and the other branch optical waveguide is abutted on a branch portion at one end. First, also in this embodiment, a structure including a silicon wafer 1, a lower cladding layer 2, a first core portion 5, and an inter-core cladding film 6 covering them is manufactured by the steps described with reference to FIG. (See FIG. 1E).

Next, the inter-core clad film on the first core portion 5 and the lower clad layer 2 is removed by anisotropically etching the inter-core clad film using a reactive ion etching apparatus. A structure having an inter-core clad film 16 on the side wall of the core portion 5 is manufactured (see FIG. 5A). In this anisotropic etching step, first, a silicon wafer 1 on which an inter-core clad film is deposited is installed in a chamber of a reactive ion etching apparatus, and then the chamber is evacuated by a rotary pump until the pressure in the chamber becomes 1 Pa. The pressure is evacuated to 1 × 10 ⁻³ Pa by a turbo molecular pump. Then, Ar and CHF3 introduced at a rate of 100 and 30sccm respectively in the chamber, to maintain the pressure in the chamber to 1 Pa, applying a high frequency of 13.56MHz at a power density of 1W / cm ^2. as a result,
The core-to-core clad film is anisotropically etched, and the layer on the flat surface other than the side wall of the core 5 is removed. Ten minutes after the etching time, the high-frequency discharge and introduction of Ar and CHF3 were stopped, and the chamber was evacuated to a pressure of 1 × 10 ⁻³ Pa using a rotary pump and a turbo molecular pump in that order. After evacuation, nitrogen was introduced into the chamber. After being introduced to atmospheric pressure, the silicon wafer 1 is taken out.

Next, a quartz film to be the second core layer 17 is deposited using the plasma enhanced chemical vapor deposition apparatus shown in FIG. 4 (see FIG. 5B). In the core layer deposition step, the silicon wafer 1 formed up to the inter-core
After heating to 00 ° C., it is performed by the same method as in the first core layer deposition step. In other words, the deposition is performed with a flow rate of TRIES or TEOS of 12 sccm, a flow rate of oxygen of 400 sccm, a pressure in the chamber of 30 Pa, and a high-frequency power density of 13.56 MHz of 1.6 W / cm ² . After a deposition time of 70 minutes, a quartz film serving as the second core layer 17 having a thickness of about 8 μm and a refractive index of 1.456 is deposited (see FIG. 5B).

Next, the second core layer 17 is etched back using a reactive ion etching apparatus (see FIG. 5C). In this etch-back step, first, the silicon wafer 1 on which the second core layer 17 is deposited is set in a chamber of the reactive ion etching apparatus, and the chamber is evacuated by a rotary pump until the pressure in the chamber becomes 1 Pa. The pressure is evacuated to 1 × 10 −3 Pa by a molecular pump. Next, Ar and CHF3 were respectively placed in the chamber for 1 hour.
The pressure is introduced at a flow rate of 00 and 30 sccm, the pressure in the chamber is maintained at 1 Pa, and a high frequency of 13.56 MHz is applied at a power density of 1 W / cm ² . After the etching time is 6 minutes, the second
The cladding layer 17 is removed by etching. Six minutes later, the high-frequency discharge and the introduction of Ar and CHF3 were stopped, and the chamber was evacuated to a pressure of 1 × 10 ⁻³ Pa using a rotary pump and a turbo-molecular pump in that order. After that, nitrogen was introduced into the chamber. After the pressure is increased, the silicon wafer 1 is taken out.

Next, an etching resist 18 for processing the second core layer 17 is formed using a mask having a pattern corresponding to the optical waveguide pattern of the Y branch circuit and covering the top of the inter-core cladding film 16 (FIG. 5 (D)). This resist forming step is performed by a method similar to the step shown in FIG. That is, the coating is performed by applying a resist having a thickness of about 1.4 μm by spin coating, exposing by a reduction projection exposure machine using i-line, and then developing.

Next, the second core layer 17 is etched using a reactive ion etching apparatus, and the core portion 19 is etched.
Is formed (see FIG. 6E). This second core portion forming step is performed by the same method as the first core portion forming step shown in FIG. That is, the flow rate of CHF3 is 100 sccm, the pressure in the chamber is 2 Pa, the power density of a high frequency of 13.56 MHz is 1 W / cm ² , and the etching time is 40 minutes.

Next, using the plasma enhanced chemical vapor deposition apparatus shown in FIG. 4, a quartz layer serving as the upper cladding layer 20 is deposited so as to cover the core portions 5 and 9 (see FIG. 2 (J)). .
This upper cladding layer deposition step is performed by the same method as the upper cladding layer deposition step. In a deposition time of 180 minutes, an upper clad having a thickness of about 18 μm and a refractive index of 1.452 is deposited (see FIG. 6F). 6A and 6B show cross-sectional structures at various positions. FIG. 6F is a cross-sectional view taken along the line BB ′ of the branch root, FIG. 6G is a cross-sectional view taken along the line AA ′ of the trunk optical waveguide, and FIG. (H) shows a CC ′ cross section at a location away from the branch portion. As described above, according to the second embodiment, the same effects as those of the first embodiment can be expected, and the distances between the first core portion and the second core portion from the surface of the silicon substrate are made equal. Therefore, it can be expected that bonding with the optical fiber can be easily performed.

In the above-described second embodiment, a Y-branch circuit having a structure in which one end of one branch optical waveguide is abutted with a branch root is manufactured, but is similar to the second embodiment. According to the above process, a directional coupler, a Mach-Zehnder interferometer, or a Y-branch circuit having an optical coupling unit as in the first embodiment can be manufactured. That is, first, a structure having a first core portion corresponding to one optical waveguide such as a directional coupler and an inter-core cladding film having a thickness corresponding to a waveguide interval between the optical coupling portions on a side wall of the first core portion is provided. Then, a second core layer deposition step (see FIG. 5B), an etch-back step (see FIG. 5C), and both light guides such as a directional coupler are formed. Through a step of etching the second core layer using an etching mask having a pattern corresponding to the wave path and covering the inter-core clad film (see FIGS. 5D and 5E), the directional coupler is formed. Etc. can be manufactured.

In the above embodiment, quartz is used as the material of the optical waveguide, but the same effect can be expected with other materials, and plasma CVD is used for depositing the clad film and the core film. However, similar effects can be expected by using other film deposition methods, for example, normal pressure CVD, electron beam evaporation, sputtering, or flame deposition. In the first and second embodiments, a silicon substrate is used. However, a similar effect can be expected even when a glass plate is used for the substrate.

[0029]

As described above, according to the present invention, after the first core portion is formed, the inter-core cladding film is formed, and the second core portion is formed. The distance between the core and the second core part is determined by the thickness of the clad between the cores, and it can be expected that the branch loss of the Y branch is reduced, and the distance between the cores in the optical coupling part is arbitrarily narrow. With the advantages that can be.

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram showing a first embodiment of the present invention.

FIG. 2 is a manufacturing process diagram showing a first embodiment of the present invention.

FIG. 3 is an explanatory diagram of a Y-branch circuit obtained according to the first embodiment of the present invention.

FIG. 4 shows a plasma CV used in the first embodiment of the present invention.
Illustration of D device

FIG. 5 is a manufacturing process diagram showing a second embodiment of the present invention.

FIG. 6 is a manufacturing process diagram showing a second embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon wafer 2 Lower clad layer 3 1st core layer 4 Etching resist 5 1st core part 6 Inter-core clad film 7 2nd core layer 8 Etching resist 9 2nd core part 10 Upper clad layer

Claims (3)

[Claims] 1. A first optical waveguide comprising a trunk optical waveguide and one branch optical waveguide of a Y-branch connected thereto, an optical coupling waveguide disposed close to the trunk optical waveguide, and an optical coupling waveguide connected thereto. And the other branch optical waveguide of the Y branch
A method of manufacturing an optical waveguide circuit having an optical waveguide, comprising: depositing a first core layer on a substrate having a lower cladding layer on a surface thereof; and etching and removing unnecessary portions of the first core layer. Forming a first core portion having a pattern corresponding to the optical waveguide; and then forming a first core portion having a thickness corresponding to a distance between the trunk optical waveguide and the optical coupling waveguide so as to cover the first core portion. Depositing an inter-core cladding film, subsequently depositing a second core layer, and then forming an etching mask having a pattern corresponding to the second optical waveguide on the second core layer, Etching the unnecessary portion of the core layer using the etching mask to form a second core portion having a pattern corresponding to the second optical waveguide. . 2. A first optical waveguide composed of a trunk optical waveguide and one of the Y-branch optical waveguides connected thereto, and the other branch optical waveguide of the Y-branch, one end of which is formed of the first waveguide. An optical waveguide circuit having a second optical waveguide having a shape abutted and connected to a side wall, wherein a first core layer is deposited on a substrate having a lower cladding layer on a surface, and thereafter, the first core layer is formed. Forming a first core portion having a pattern corresponding to the first optical waveguide by etching away unnecessary portions of the first core portion; and then depositing a thin inter-core cladding film so as to cover the first core portion. Removing the inter-core cladding film on the side walls of the first core portion and removing the inter-core cladding film on the first core portion and the lower cladding layer by performing anisotropic etching. Next, deposit the second core layer. Stacking and subsequently performing an etch-back process to etch away the second core layer until the height is substantially equal to the height of the first core portion. Next, the first optical waveguide and the second An etching mask having a pattern corresponding to the optical waveguide and covering the top of the inter-core clad film on the side wall of the first core portion is formed. Subsequently, the unnecessary etching of the second core layer is performed using the etching mask. Forming a second core portion having a pattern corresponding to the second optical waveguide by removing a portion by etching. 3. Manufacture of an optical waveguide circuit having a first optical waveguide and a second optical waveguide, and further including an optical coupling portion in which the first optical waveguide and the second optical waveguide are arranged close to each other. In the method, a first core layer is deposited on a substrate having a lower cladding layer on a surface, and then unnecessary portions of the first core layer are etched away to form a first core portion having a pattern corresponding to the first optical waveguide. And then depositing an inter-core cladding film having a thickness corresponding to the distance between the first optical waveguide and the second optical waveguide in the optical coupling portion so as to cover the first core portion. Next, depositing a second core layer, and subsequently performing an etch-back process, thereby etching and removing the second core layer until the height of the second core layer becomes substantially equal to the height of the first core portion. A pair of the first optical waveguide and the second optical waveguide. Forming an etching mask having a pattern that covers the inter-core cladding film, and then using the etching mask to remove unnecessary portions of the second core layer by etching, so as to correspond to the second optical waveguide. Forming a second core portion having a patterned pattern as described above.