JP2001215937A - Video signal processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the increase of scale and cost of a video signal processor for allowing videos which are expressed by video signals of plural standards to be displayed on the liquid crystal display device. SOLUTION: In the video signal processor 30 allowing video signals of respective standards of NTSC(national television system committee) and VGA(video graphics array) (digital R, G, B signals, a horizontal(H) synchronizing signal and a vertical(V) synchronizing signal) to be displayed on a VGA-compatible liquid crystal panel 6, video signals of the respective standards are inputted to the signal input terminal IN of a graphic IC 34 in an alternative way and a microcomputer 40 measures cycles of respective synchronizing signals of the standard of a video signal to be inputted to the terminal IN to judge the standard of the video signal and, also, allows a fetching clock having a frequency corresponding to the judged standard to be outputted from a clock generator 42 to the clock terminal of the IC 34. Moreover, the IC 34 generates a VGA video signal from the video signal fetched into the inside of the processor in synchronization with the fetching clock based on the judged result in the computer 42 to output the video signal to the panel 6. Thus, the number of terminals of the IC 34 is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing device for displaying video represented by video signals of a plurality of standards on the same liquid crystal display device.

[0002]

2. Description of the Related Art At present, in computer-related devices such as personal computers, liquid crystal display devices (hereinafter, also referred to as liquid crystal panels) of various standards compatible with digital video signals have become widespread as display devices. There is a demand to display video signals of different standards. Further, it is considered essential to be able to display an image from a television or a camera on the screen of a personal computer in order to increase the added value of a product.

[0005] Displaying a video signal specifically means displaying a video represented by the video signal. Further, in the present specification, the video signal is a digital video signal composed of a video data signal of a plurality of bits representing video and color, a horizontal synchronization signal, and a vertical synchronization signal.

That is, VGA (1 dot: 25.175 MHz), SV
GA (1 dot: 40.000 MHz), XGA (1 dot: 65.000 MHz), SXGA (details are undefined), UXGA (details are undefined), etc., and analog type NTSC, PAL, SECAM, etc. However, there is a demand for displaying such a plurality of standardized video signals on the same liquid crystal panel.

[0005] When an attempt is made to display video signals of a plurality of standards on the same liquid crystal panel, it is of course impossible to display video signals of a frequency higher than the corresponding frequency of the liquid crystal panel.
Although the frequency of the liquid crystal panel is the same as the highest frequency of the displayable video signal, for video signals lower than the corresponding frequency of the liquid crystal panel, scan conversion is performed based on the frequency of the liquid crystal panel (when the liquid crystal panel The format is converted to a displayable video signal) and output to the liquid crystal panel.

Here, since a signal processing circuit for performing video processing such as scan conversion usually has a very large circuit scale, an LSI called a graphic IC is generally used.
Is formed as Conventionally, in order to display video signals of a plurality of standards on the same liquid crystal panel, as shown in FIG. 2, a plurality of external devices (two in this example) each outputting video signals of different standards are used. A) board-type video having a graphic IC 8 mounted between liquid crystal panels 6 corresponding to video signals of a specific standard (that is, a liquid crystal panel for inputting video signals of a specific standard and displaying video) 6; The signal processing device 10 is disposed, and the video signal processing device 10
Performs signal processing such as scan conversion on a video signal selectively output from one of the external devices 2 and 4, and supplies a video signal of a specific standard which can be displayed on the liquid crystal panel 6 to the liquid crystal panel 6. Output to the external devices 2 and 4
Are displayed on the liquid crystal panel 6.

More specifically, first, the video signal processing device 10 illustrated in FIG. 2 includes an NTSC video signal (NTSC video signal) and a VGA video signal (VGA
Video signal) is displayed on a liquid crystal panel 6 corresponding to the VGA standard. In this example, an NTSC video signal digitized from a first external device (hereinafter referred to as an NTSC output device) 2 A signal is output from a second external device (hereinafter referred to as a VGA output device) 4 to a VGA
A video signal is output. The NTSC output device 2 decodes an analog television signal (NTSC signal), converts it into a digital NTSC video signal, and outputs it.

In this example, a video data signal among video signals input / output by the video signal processing device 10 is:
Each is an RGB digital signal (hereinafter, collectively referred to as an RGB signal) set to 8 bits. Furthermore, in this example, it is assumed that the capture clock for capturing the VGA video signal into the graphic IC 8 is not output from the video output source (that is, the external device side).

A conventional video signal processing device 1 illustrated in FIG.
0, the graphic IC 8 mounted thereon has an NTSC video signal (NT
A set of 26 signal input terminals IN1 to which RGB signals, horizontal synchronization (H synchronization) signals, and vertical synchronization (V synchronization) signals of the SC standard are input, and a VGA video signal (VGA standard) from the VGA output device 4. RGB signal, horizontal synchronization (H synchronization)
Signal and a vertical synchronization (V synchronization) signal are input 26
A set of signal input terminals IN2, a clock input terminal CK1 for receiving an NTSC capture clock CLK1 for capturing an NTSC video signal therein, and a VGA capture clock CLK2 for capturing a VGA video signal therein
And a clock input terminal CK2 to which is input.

Note that the NTSC capture clock CLK1 is
This is a clock signal of a frequency that can sample the NTSC standard RGB signal by one dot at a time. Similarly, the VGA capture clock CLK2 is a VGA standard R signal.
This is a clock signal having a frequency capable of sampling the GB signal for each dot. Therefore, the frequencies of the capture clocks CLK1 and CLK2 are different from each other, and the VGA capture clock CLK2 has a higher frequency than the NTSC capture clock CLK1.

Then, inside the graphic IC 8,
Image processing unit 12 serving as a center for performing image processing
And a horizontal synchronizing signal and a vertical synchronizing signal of the NTSC video signal input to the signal input terminal IN1, and the NTSC capture clock CLK input to the clock input terminal CK1.
A synchronous signal capturing unit 14-1 (in detail, sampling and outputting to the video processing unit 12)
The video capturing section 16 captures an RGB signal (video data signal) of the NTSC video signal input to the signal input terminal IN1 in synchronization with the NTSC capture clock CLK1.
-1 and the horizontal synchronizing signal and the vertical synchronizing signal of the VGA video signal input to the signal input terminal IN2, and the VGA capture clock CLK input to the clock input terminal CK2.
And a synchronizing signal fetching unit 14-2 that synchronizes with the signal input terminal IN2 and the R signal of the VGA video signal input to the signal input terminal IN2.
A video capturing section 16-2 for capturing a GB signal (video data signal) in synchronization with the VGA capture clock CLK2;
Memory 1 capable of storing at least one screen of video data
8 and a clock generator 20 that generates a clock CLK3 having the same frequency as the corresponding frequency of the liquid crystal panel 6 (in this example, a clock corresponding to the VGA standard) CLK3 and supplies the clock CLK3 to the video processor 12. .

Incidentally, the memory 18 may be provided outside the graphic IC 8 in some cases. Also, the clock generator 2
0 is generated when the video signal (in this example, an NTSC video signal) having a lower frequency than the VGA video signal is scan-converted and displayed on the liquid crystal panel 6, and the frequency is the VGA capture clock. CLK
Same as 2.

Further, the video signal processing device 10 has a clock input terminal CK1 of the graphic IC 8 which is to be inputted to the clock input terminal CK1.
A clock generator 22 for generating a TSC capture clock CLK1, and a clock input terminal CK of the graphic IC 8
2 is provided with a clock generator 24 that generates a VGA capture clock CLK2 to be input to the VGA 2.

Each of the clock generators 22 and 24 has
The main components are a frequency-variable type local oscillation circuit and a PLL circuit that controls the oscillation frequency of the local oscillation circuit. The clock generator 22 generates an NTSC capture clock CLK1 that is at least phase-synchronized with the horizontal synchronization signal, out of the horizontal synchronization signal and the vertical synchronization signal output from the NTSC output device 2, and
To the clock input terminal CK1. Similarly, the clock generator 24 generates a VGA capture clock CLK2 that is phase-synchronized with at least the horizontal synchronization signal, out of the horizontal synchronization signal and the vertical synchronization signal output from the VGA output device 4, and generates a clock for the graphic IC 8. Input terminal CK2
Output to

In such a conventional video signal processing apparatus 10, when an NTSC video signal is output from the NTSC output device 2 (that is, when the NTSC video signal is displayed on the liquid crystal panel 6), the clock generator 22 is used. To the clock input terminal CK1 of the graphic IC 8 from the NTS
The C capture clock CLK1 is supplied.

In the graphic IC 8,
The NTSC video signal from the NTSC output device 2 input to the signal input terminal IN1 is transmitted to the NTSC capture clock C by the synchronization signal capture unit 14-1 and the video capture unit 16-1.
The fetched NTSC video signal is scanned and converted into a VGA standard video signal by the video processing unit 12 in synchronization with the LK1.
Output to

The scan conversion process is well known because the format such as the dot clock, line frequency, and frame frequency of the video signal is adjusted to the format of the liquid crystal panel 6. The outline of the process is as follows. The processing unit 12 detects the occurrence of the horizontal synchronizing signal and the vertical synchronizing signal based on the signal from the synchronizing signal acquisition unit 14-1, and uses the time when each of the synchronizing signals is detected as a reference and
The video capture unit 1 is synchronized with the capture clock CLK1 for SC.
The video data from 6-1 is sequentially stored in the memory 18.
In parallel with this, the video processing unit 12
8 is sequentially read out in synchronization with the VGA-compatible clock CLK3 from the clock generator 20 and output to the liquid crystal panel 6 as a VGA standard video data signal. The processing unit 12 generates a horizontal synchronizing signal and a vertical synchronizing signal whose time relationship with the video data signal to the liquid crystal panel 6 conforms to the VGA standard, and also outputs these synchronizing signals to the liquid crystal panel 6. Further, the video processing unit 12 outputs the VGA-compliant clock CLK3 from the clock generation unit 20 to the liquid crystal panel 6 as the operation clock CLKP of the liquid crystal panel 6.

On the other hand, in the video signal processing apparatus 10, when a VGA video signal is output from the VGA output device 4 (ie, when the VGA video signal is displayed on the liquid crystal panel 6), the clock generator 24 The VGA capture clock CLK2 is supplied to the clock input terminal CK2 of the IC8.

In the graphic IC 8,
The VGA video signal from the VGA output device 4 input to the signal input terminal IN2 is supplied to the VGA capture clock CLK2 by the synchronization signal capture unit 14-2 and the video capture unit 16-2.
The VGA which is taken in in synchronization with
The video signal is output from the video processing unit 12 to the liquid crystal panel 6.

In this case, the video processing unit 12 is a VGA
The video signal from the output device 4 is output to the liquid crystal panel 6 without scan conversion (standard conversion), and the VGA capture clock CLK2 from the clock generator 24 is output.
To the liquid crystal panel 6 and the operation clock C of the liquid crystal panel 6
Output as LKP.

For example, when image processing other than scan conversion, such as display position control processing for changing the display position of an image on the liquid crystal panel 6 and enlargement / reduction display processing, is not performed, the image processing section 12 acquires the synchronization signal. Each signal from the unit 14-2 and the video capturing unit 16-2 is output to the liquid crystal panel 6 in the standard format as it is in synchronization with the VGA capturing clock CLK2.

For example, when performing the display position control, the video processing unit 12 synchronizes the video data from the video capture unit 16-2 with the VGA capture clock CLK2 and stores the video data in the memory 18.
, The temporal relationship between the video data and the synchronizing signal is temporarily cut off, and the video data stored in the memory 18 is read from the VGA capture clock CLK2 from an arbitrary timing with reference to the time when the synchronizing signal is generated. The display position of the image on the liquid crystal panel 6 is changed by reading out the data and outputting it to the liquid crystal panel 6 in synchronization with the display.

[0023]

In the conventional video signal processing apparatus 10, the graphic IC 8 as a signal processing means converts the video signal for each standard of the video signal expected to be input. A signal input terminal for inputting and a clock input terminal for inputting a fetch clock are required, and the number of terminals is problematic.

For example, in the example of FIG. 2, 26 signal input terminals (terminals for inputting 8-bit RGB signal, horizontal synchronizing signal, and vertical synchronizing signal respectively) and 1
Clock input terminals and two sets are required, for a total of 54
(= (26 + 1) × 2) input terminals are required.

When the configuration shown in FIG. 2 is expanded to display, for example, VGA, SVGA, XGA, and NTSC standard video signals on the same liquid crystal panel, a signal input terminal is used. And four clock input terminals are required, and a total of 108 (= (26 + 1) × 4) input terminals are required.

The RGB signal has 16 bits,
If the number becomes large, such as 32 bits, the number of input terminals will further increase. As described above, in the conventional video signal processing device 10, the number of input terminals of the graphic IC 8 becomes very large. If the number of terminals exceeds the limit determined by the IC package and the chip size, the chip size of the IC to be adopted is more controlled by the number of terminals than the truly required number of gates, and the chip usage rate decreases. This leads to higher costs. That is,
The chip size exceeds the economic size, resulting in an increase in cost.

Further, in the conventional video signal processing apparatus 10, a clock generator (22, 24 in FIG. 2) for generating a capture clock to be supplied to the graphic IC 8.
This is necessary for each standard of the video signal, and as a result, the size of the apparatus is increased and the cost is increased.

The present invention has been made in view of such a problem, and in a video signal processing device for displaying a video represented by a video signal of a plurality of standards on the same liquid crystal display device, the size and cost of the device are increased. The purpose is to control.

[0029]

Means for Solving the Problems and Effects of the Invention The video signal processing apparatus of the present invention according to the first aspect of the present invention, which has been made in order to achieve the above object, has a predetermined configuration similar to the above-mentioned conventional apparatus. A video signal consisting of a video data signal, a horizontal synchronization signal, and a vertical synchronization signal conforming to one of a plurality of standards is input from an external device, and a video represented by the video signal is converted to a video signal of a specific standard. It is for displaying on a liquid crystal display device which displays an image upon input, and has a signal processing means as a central part of the image signal processing.

Here, the signal processing means comprises: a set of signal input terminals to which a video signal conforming to any one of the plurality of standards is selectively inputted from an external device; Has another clock input terminal, and captures a video signal input to the signal input terminal in synchronization with a capture clock input to the clock input terminal.

In the video signal processing device according to the present invention,
The variable clock output means generates a clock having a frequency designated by the control signal, and outputs the clock to the clock input terminal of the signal processing means as the capture clock. Further, the standard determining means determines which of the plurality of standards the video signal input from the external device to the signal input terminal of the signal processing means, and notifies the signal processing means of the determination result. And outputting the control signal to the variable clock output means so that a capture clock having a frequency capable of capturing the video signal of the determined standard by the signal processing means is output from the variable clock output means. .

Further, the signal processing means generates the video signal of the specific standard from the video signal taken in synchronization with the capture clock output from the variable clock generation means based on the determination result by the standard determination means, and By outputting to a display device, the liquid crystal display device displays an image represented by a video signal from an external device.

More specifically, if the standard of the video signal determined by the standard determining unit is not a specific standard corresponding to the liquid crystal display device, the signal processing unit performs a process on the video signal fetched from the external device. At least, a standard conversion process (scan conversion) for converting the video signal of the standard determined by the standard determination unit into a video signal of a specific standard is performed, and the video signal of the specific standard generated in the process is displayed on a liquid crystal display. Output to the device.

As one of the video signals of a plurality of standards selectively input to the signal input terminal of the signal processing means, a video signal of a specific standard originally supported by the liquid crystal display device is assumed. When the standard of the video signal determined by the standard determination unit is the specific standard, the signal processing unit performs the processing based on the video signal of the specific standard captured from the external device.
A video signal of the same standard (specific standard) is generated and output to a liquid crystal display device. Specifically, a display position control that outputs the same signal as a video signal captured from an external device to a liquid crystal display device or changes a video display position on a liquid crystal display device with respect to a video signal captured from an external device, for example. Video processing other than processing for standard conversion, such as processing and enlargement / reduction display processing, is performed, and the processed video signal is output to the liquid crystal display device.

According to such a video signal processing apparatus of the present invention, the signal processing means receives a signal input terminal for inputting a video signal and a clock input terminal for inputting a capture clock. It is not necessary to provide a video input signal for each standard, and only one signal input terminal and one clock input terminal are required. This is because the signal processing means commonly uses the signal input terminal and the clock input terminal for one system in each standard.

Therefore, when the signal processing means is formed into an IC, the number of terminals (the total number of signal input terminals and clock input terminals) can be greatly reduced. Therefore, it is possible to avoid that the chip size of the IC is more controlled by the number of terminals than the number of gates, and as a result, it is possible to suppress the chip size and cost of the IC. Further, since the number of terminals is reduced, the package size of the IC as the signal processing means can be reduced, and the size of the video signal processing device can be suppressed.

Furthermore, the number of terminals that must be provided in the device can be reduced. Moreover, according to the video signal processing device of the present invention, only one variable clock output means is required to supply the capture clock to the signal processing means, and it is not necessary to provide each means for each standard of the video signal. It is possible to further suppress an increase in the size of the device.

As described above, according to the video signal processing device of the present invention, it is possible to suppress an increase in size and cost of the device. Next, in the video signal processing device according to the second aspect, in the video signal processing device according to the first aspect, the standard determination unit is configured to output the video signal from the video signal input from the external device to the signal input terminal of the signal processing unit. The configuration is such that the periods of the horizontal synchronizing signal and the vertical synchronizing signal are each measured, and the standard of the video signal from the external device is determined.

That is, since the combination of each cycle of the horizontal synchronizing signal and the vertical synchronizing signal is different for each standard of the video signal, the standard judging means determines the standard by the combination of each cycle of the horizontal synchronizing signal and the vertical synchronizing signal. Is determined. According to the video signal processing device of the second aspect, the standard of the video signal from the external device can be set without separately connecting a signal line for determining the standard of the video signal to the video signal processing device. This is very advantageous because it can be determined and the number of terminals that must be provided in the device can be further reduced.

[0040]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A video signal processing apparatus according to an embodiment to which the present invention is applied will be described below with reference to FIG. In FIG. 1, the same components and signals as those shown in FIG. 2 are denoted by the same reference numerals.

As shown in FIG. 1, the video signal processing device 30 of the present embodiment has the same configuration as the conventional device 10 shown in FIG.
NTSC standard video signal (NT
SC video signal) or a VGA standard video signal (VGA video signal), the liquid crystal panel 6 corresponding to the VGA standard.
In the present embodiment, one external device 32 connected to the device 30 selectively outputs one of the digitized NTSC video signal and the VGA video signal. That is, the external device 32 includes a device that outputs a digital NTSC video signal and a device that outputs a VGA video signal, and a switch provided in the external device 32 outputs the output of each device. , Which is selectively switched and output to the outside. Also in the present embodiment, the video data signals among the video signals input and output by the video signal processing device 30 are digital RGB signals each set to 8 bits.

In the video signal processing apparatus 30 of the present embodiment shown in FIG.
The NTSC standard or VGA from the external device 32
A set of 26 signal input terminals IN to which standard video signals (RGB signal, horizontal synchronization (H synchronization) signal, and vertical synchronization (V synchronization) signal) are commonly input, and an NTSC video signal for internal capture Capture clock CLK1 for NTSC
And a clock input terminal CK to which any one of a VGA capture signal CLK2 for capturing a VGA video signal therein is input.

As described above, the capture clock CLK1 for NTSC is a clock signal having a frequency capable of sampling the RGB signal of the NTSC standard for each dot, and the capture clock CLK2 for VGA is VGA. This is a clock signal of a frequency that can sample a standard RGB signal for each dot. The latter CLK2 has a higher frequency than the former CLK1.

In the graphic IC 34, a video processing unit 3 serving as a center for performing video processing is provided.
6 and a horizontal synchronizing signal and a vertical synchronizing signal of the video signals input to the signal input terminal IN,
A synchronous signal capturing unit 14 that captures in synchronization with the capture clock (CLK1 or CLK2) input to the video signal (specifically, samples and outputs the sampled image to the video processing unit 36), and a video signal input to the signal input terminal IN Out of the capture clock (CLK1 or CL)
K2), a video capture unit 16 that captures video data of at least one screen, a clock 18 having the same frequency as the corresponding frequency of the liquid crystal panel 6 (here, a frequency corresponding to the VGA standard). And a clock generation unit 20 for generating a VGA-compatible clock CLK3 and supplying the generated clock to the video processing unit 36.

The memory 18 has a graphic IC 34
May be provided outside. Also in the present embodiment, the clock CLK generated by the clock generator 20 is used.
Reference numeral 3 is used when a video signal having a lower frequency than the VGA video signal (here, an NTSC video signal) is scan-converted and displayed on the liquid crystal panel 6, and the frequency is VG.
This is the same as the A capture clock CLK2.

On the other hand, the video signal processing device 30 of the present embodiment
A microcomputer (microcomputer) 40 connected to the graphic IC 34 via the bus 38 and a clock generator 42 whose output clock frequency can be controlled by a serial signal from the microcomputer 40 are provided. The generator 42 has a signal line S for serial communication.
And the microcomputer 40. The clock output terminal of the clock generator 42 is
It is connected to the clock input terminal CK of C34.

Here, the microcomputer 40 has a graphic I
The respective cycles of the horizontal synchronization signal and the vertical synchronization signal of the video signal input to the signal input terminal IN of C34 are measured by a timer function or the like, and are output from the external device 32 based on a combination of the measured cycles. The video signal standard (in this embodiment, NTSC or VGA) is determined.

Then, the microcomputer 40 controls the graphic I
Along with notifying the C34 of the result of the standard determination via the bus 38, the C34 is also instructed on the content of the video processing to be performed. Further, the microcomputer 40 supplies a control signal to the clock generator 42 through the signal line S, so that the clock generator 42
Is controlled so that a fetched clock having a frequency conforming to the standard determined in the above procedure is input to the clock input terminal CK.

That is, when the microcomputer 40 determines that the standard of the video signal from the external device 32 is the NTSC standard, the microcomputer 40 outputs the NTSC fetched clock CLK1 (the one-dot RGB signal of the NTSC standard) from the clock generator 42. If the standard of the video signal from the external device 32 is determined to be the VGA standard, the clock generator 42 outputs the VGA capture clock CLK2. (A clock having a frequency capable of sampling the RGB signal of the VGA standard for each dot).

The clock generator 42 is mainly composed of a local oscillator circuit of a variable frequency type and a PLL circuit for controlling the oscillation frequency of the local oscillator circuit, and is input to a signal input terminal IN of the graphic IC 34. A clock (CLK1 or CLK2) having a frequency synchronized with at least the horizontal synchronizing signal of the horizontal synchronizing signal and the vertical synchronizing signal and having a frequency specified by the microcomputer 40,
Output to the clock input terminal CK of the graphic IC 34.

In the video signal processing device 30 according to the present embodiment, when the NTSC video signal is output from the external device 32 (that is, when the NTSC video signal is displayed on the liquid crystal panel 6), the graphic IC 34 The microcomputer 40 determines that the standard of the video signal input to the signal input terminal IN is the NTSC standard, and supplies the NTSC capture clock CLK1 from the clock generator 42 to the clock input terminal CK of the graphic IC 34. .

Then, in the graphic IC 34, the NTSC video signal input to the signal input terminal IN is converted into N by the synchronization signal capturing unit 14 and the video capturing unit 16.
The captured NTSC video signal is scan-converted into a VGA standard video signal by the video processing unit 36 and output to the liquid crystal panel 6 in synchronization with the TSC capture clock CLK1.

That is, in this case, the video processing unit 36 knows from the notification from the microcomputer 40 that the video signal from the external device 32 is an NTSC video signal. And
The video processing unit 36 converts the video signals captured by the synchronization signal capturing unit 14 and the video capturing unit 16 into at least a standard conversion process (scan) for converting an NTSC video signal into a VGA video signal. Conversion process), and outputs the VGA standard video signal generated in the process to the liquid crystal panel 6.

The outline of the standard conversion process will be described. The video processing unit 36 detects the occurrence of the horizontal synchronization signal and the vertical synchronization signal based on the signal from the synchronization signal acquisition unit 14, and detects each of the synchronization signals. Based on the time of detection and NTS
In synchronization with the C capture clock CLK1, the video capture unit 16
Are sequentially stored in the memory 18, and in parallel with this, the video data for one screen stored in the memory 18 is sequentially read out in synchronization with the VGA corresponding clock CLK 3 from the clock generator 20. To the LCD panel 6
It is output as a video data signal of the GA standard. Further, the video processing unit 36 generates a horizontal synchronizing signal and a vertical synchronizing signal whose time relationship with the video data signal to the liquid crystal panel 6 conforms to the VGA standard. Output. In addition, the video processing unit 36
VGA-compatible clock CLK3 from the clock generator 20
To the liquid crystal panel 6 and the operation clock C of the liquid crystal panel 6
Output as LKP.

On the other hand, the video signal processing device 30 of the present embodiment
In the case where a VGA video signal is output from the external device 32 (that is, when the VGA video signal is displayed on the liquid crystal panel 6), the standard of the video signal input to the signal input terminal IN of the graphic IC 34 is Is determined to be the VGA standard by the
To the clock input terminal CK of the graphic IC 34, the VGA capture clock CLK2 is supplied.

In the graphic IC 34, the VGA video signal input to the signal input terminal IN is
A VGA is generated by the synchronization signal capturing unit 14 and the video capturing unit 16.
Is taken in synchronizing with the use taking clock CLK2,
A VGA video signal having basically the same content as the captured VGA video signal is output from the video processing unit 36 to the liquid crystal panel 6.

That is, in this case, the video processing unit 36 knows from the notification from the microcomputer 40 that the video signal from the external device 32 is a VGA video signal. Then, the video processing unit 36 includes the synchronization signal capturing unit 14 and the video capturing unit 1.
The VGA video signal fetched by the VGA 6 is not subjected to scan conversion (standard conversion), but a video signal of the same standard (VGA standard) is generated from the VGA video signal and output to the liquid crystal panel 6.

For example, when image processing other than scan conversion, such as display position control processing for changing the display position of an image on the liquid crystal panel 6 or enlargement / reduction display processing, is not performed, the image processing section 36 acquires the synchronization signal. The signals from the unit 14 and the video capturing unit 16 are converted to a VGA capturing clock CLK.
2 and output to the liquid crystal panel 6 in the standard format as it is. Further, for example, the video processing unit 36
When the display position control is performed according to a command from the VGA capture clock C, the video data from the video capture unit 16 is
The data is sequentially stored in the memory 18 in synchronization with the LK2, and the video data for one screen stored in the memory 18 is read out from a predetermined timing based on the generation of the synchronization signal in synchronization with the VGA capture clock CLK2. By outputting to the liquid crystal panel 6, the display position of the image on the liquid crystal panel 6 is changed.

When displaying the VGA video signal from the external device 32 on the liquid crystal panel 6, the video processing unit 36 receives the VGA capture clock CLK2 from the clock generator 42.
To the liquid crystal panel 6 and the operation clock C of the liquid crystal panel 6
Output as LKP. This is because the VGA-compatible clock CLK3 from the internal clock generator 20 is supplied to the liquid crystal panel 6.
, The VGA capture clock CLK generated by the clock generator 42 in phase with the synchronization signal.
This is because the image display accuracy on the liquid crystal panel 6 is better when 2 is supplied.

On the other hand, in this embodiment, the graphic IC
34 corresponds to a signal processing unit, the clock generator 42 corresponds to a variable clock output unit, and the microcomputer 40 corresponds to a standard determination unit. According to the video signal processing device 30 of the present embodiment as described above, the graphic IC 34
System signal input terminal IN and clock input terminal CK
Can be commonly used in each standard, so the signal input terminal IN
And the clock input terminal CK need not be provided for each standard of the video signal that is assumed to be input. That is, the signal input terminal IN and the clock input terminal CK need only be for one system, and the total number of these terminals is not 54 as in the conventional device 10 of FIG. 2, but only 27 (= 26 + 1).

For this reason, the number of terminals of the graphic IC 34 can be greatly reduced, and the chip size of the IC 34 can be prevented from being controlled by the number of terminals rather than the number of gates. Size and cost can be reduced. Further, since the number of terminals is reduced, the package size of the graphic IC 34 can be reduced, and the size of the video signal processing device 30 can be suppressed.

Further, the number of terminals that must be provided in the video signal processing device 30 can be reduced. Moreover, according to the video signal processing device 30 of the present embodiment, the means for supplying the capture clock to the graphic IC 34 is only one clock generator 42 of a variable frequency type. Since it is not necessary to provide each signal for each standard, it is possible to further suppress an increase in the size of the device.

Further, in the video signal processing device 30 of the present embodiment, the microcomputer 40 measures each cycle of the horizontal synchronization signal and the vertical synchronization signal from the external device 32, respectively, and outputs the video signal from the external device 32. Since the standard is determined, it is possible to determine the standard of the video signal from the external device 32 without separately connecting a signal line for determining the standard of the video signal to the device 30. 3
The number of terminals that must be provided at 0 can be further reduced.

In the video signal processing device 30 of the above embodiment, the VGA-compatible clock CLK used to display the NTSC video signal on the liquid crystal panel 6 is used.
3 is generated by the clock generator 20 in the graphic IC 34. In this case,
34 internal clocks (basic clocks for operation)
If the frequency of the VGA-compatible clock CLK3 to be generated is set to be a multiple, it is possible to generate the VGA-compatible clock CLK3 by dividing the internal clock without separately providing a clock transmission source such as a crystal. It is.

In the above-described embodiment, the same external device 32 has been described as selectively outputting the NTSC video signal and the VGA video signal. An external device that outputs a video signal and an external device that outputs a VGA video signal may be alternatively connected. This is the same for an extended example described later.

On the other hand, the video signal processing device 30 shown in FIG.
Is to display either the NTSC video signal or the VGA video signal from the external device on the liquid crystal panel 6 corresponding to the VGA standard. However, even if the type of the video signal standard to be displayed is increased, the same applies. Can be configured.

The extended example will be specifically described. For example, VGA, SVGA, XGA, and NTSC
Video signal of each standard of X
When displaying on a liquid crystal panel compatible with the GA standard,
The following may be performed.

First, the clock generation unit 20 in the graphic IC 34 has an XG of a frequency corresponding to the XGA standard.
An A-compatible clock (a clock having a frequency capable of sampling the RGB signal of the XGA standard for each dot and usable as the operation clock CLKP of the liquid crystal panel) is generated.

The microcomputer 40 determines that the standard of the video signal from the external device is VG according to the same procedure as described above.
A, SVGA, XGA, or NTSC is determined, and a capture clock of a frequency corresponding to the determined standard (ie, a clock of a frequency capable of sampling the RGB signal of the determined standard by one dot at a time) ) Is output from the clock generator 42 to the graphic IC 34, and the determination result is notified to the graphic IC 34.

If the video signal standard determined by the microcomputer 40 is not the XGA standard supported by the liquid crystal panel, the video processing unit 36 of the graphic IC 34 Intake unit 16
The video signal of the standard determined by the microcomputer 40 is converted to the video signal of the XGA standard by using the capture clock from the clock generator 42 and the XGA-compatible clock from the clock generator 20 for the video signal captured by the And performs a scan conversion process for converting the video signal into a video signal, and outputs an XGA standard video signal generated in the process to a liquid crystal panel. In this case, the video processing unit 36 outputs the XGA-compatible clock from the clock generation unit 20 to the liquid crystal panel 6 as the operation clock CLKP.

On the other hand, when the video signal standard determined by the microcomputer 40 is the XGA standard, the video processing unit 36 of the graphic IC 34 is captured by the synchronization signal capturing unit 14 and the video capturing unit 16. An XGA video signal is generated from the XGA video signal without scan conversion (standard conversion), and is output to a liquid crystal panel. Also, in this case,
The video processing unit 36 outputs the capture clock (the capture clock for XGA) from the clock generator 42 to the liquid crystal panel as the operation clock CLKP.

With this configuration, the total number of signal input terminals IN and clock input terminals CK of the graphic IC 34 is only 27 (= 26 + 1). As mentioned above, although one Embodiment of this invention was described, it cannot be overemphasized that this invention can take various forms.

For example, in the above-described embodiment, each of the RGB signals is described as having 8 bits, but the number of bits is not limited to 8 bits. And
In the configuration described above, the number of bits of the RGB signal is 16 bits,
The greater the number, such as 32 bits, the greater the effect.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a video signal processing device according to an embodiment.

FIG. 2 is a block diagram illustrating a configuration of a conventional video signal processing device.

[Explanation of symbols]

6 liquid crystal panel, 32 external equipment, 30 video signal processing device, 34 graphic IC, IN signal input terminal,
CK: Clock input terminal, 14: Synchronous signal capturing unit, 16
... video capture unit, 18 ... memory, 20 ... clock generation unit,
36 image processing unit, 38 bus, 40 microcomputer, 42
… Clock generator, CLK1… NTSC capture clock, CLK2 VGA capture clock, CLK3 VG
A-compatible clock, S: signal line for serial communication

Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat II (reference) H04N 5/46 F term (reference) 5C006 AA02 AA03 AA11 AA22 AB05 AC24 AF01 AF23 AF45 AF47 AF72 BB11 BC03 BC11 BC16 BF02 BF15 FA08 5C025 AA30 BA01 BA13 BA20 BA28 CA02 CB05 DA05 DA08 5C080 AA10 BB05 CC03 DD21 EE25 EE26 FF09 GG02 GG09 GG12 JJ02 KK02 5C082 AA02 AA39 BA12 BC19 BD09 CA84 DA51 MM06

Claims (2)

[Claims] 1. A video signal comprising a video data signal, a horizontal synchronizing signal, and a vertical synchronizing signal conforming to any one of a plurality of predetermined standards is input from an external device and represented by the video signal. A video signal processing apparatus for displaying a video on a liquid crystal display device that displays a video by inputting a video signal of a specific standard, wherein a set of signal input terminals to which a video signal from the external device is input is provided. Signal processing means for capturing a video signal input to the signal input terminal in synchronization with a capture clock input to a clock input terminal different from the signal input terminal; and a frequency designated by the control signal. And a variable clock output means for generating the clock as described above and outputting the clock to the clock input terminal of the signal processing means as the capture clock. It is determined which of the plurality of standards is the standard of the video signal input to the signal input terminal of the signal processing unit, and the determination result is notified to the signal processing unit, and the determined standard is A capture clock having a frequency capable of capturing the video signal by the signal processing unit is output from the variable clock output unit,
Standard determining means for outputting the control signal to the variable clock output means. The signal processing means further comprises: the standard determining means for determining the standard from a video signal captured in synchronization with a captured clock output by the variable clock generating means. Generating a video signal of the specific standard based on the determination result by the means and outputting the video signal to the liquid crystal display device, thereby displaying an image represented by a video signal from the external device on the liquid crystal display device. Video signal processing device. 2. The video signal processing device according to claim 1, wherein the standard determination unit includes a horizontal synchronization signal and a vertical synchronization among video signals input from the external device to a signal input terminal of the signal processing unit. A video signal processing device, wherein each of the signal periods is measured to determine a standard of a video signal from the external device.