JP2001210760A - Chip size semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a chip size semiconductor device which never causes cracks, wire disconnection, etc., due to heat or moisture absorption when a chip size semiconductor device insulation resin layer is used as a sealing resin layer, and has a high reliability and a low cost. SOLUTION: In a chip size package comprising insulation resin layers 4, 7, extension wirings 5, metal posts 6, and outer connecting terminals 8 on a semiconductor element 2, the outer connecting terminals serve as a stress relaxing mechanism and the insulation resin layers are heat-resistive insulation resin layers also serving as sealing resin layers.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip-size semiconductor device, and more particularly, to a chip-size semiconductor device in which a sealing resin layer is omitted.

[0002]

2. Description of the Related Art Semiconductors used in portable terminal devices such as thin notebook personal computers, mobile phones, and mobile devices are required to be small, thin, light, and densely packed. In recent years, the development of a chip size package (hereinafter, referred to as a CSP) which is equivalent to or slightly larger than the above has been actively performed.

Various forms have been proposed for this CSP, and an example of the structure is shown in FIG. CSP shown in FIG.
Are the electrode portions (4) exposed on the surface of the semiconductor circuit (42).
Except for 3), there is a first insulating resin layer (44), and an extended wiring (45) is formed which is electrically connected to and pulled out from the electrode. A metal post (46) is formed on the extension wiring, and a second insulating resin layer (47) is formed so that the upper surface of the metal post is exposed. And
The main part of the semiconductor circuit is sealed with epoxy resin or the like (4
9) After the resin sealing, a solder ball (48) is provided on an exposed portion on the metal post to form a semiconductor device. The connection between the semiconductor device and an external connection terminal of a substrate (for example, a printed wiring board) is made via the solder ball (48).

Here, when the thickness of the semiconductor device is reduced as much as possible by using both the second insulating resin layer and the sealing resin in consideration of the manufacturing cost of the semiconductor device, the semiconductor device suffers from thermal stress and moisture absorption. Problems such as cracks and disconnections are likely to occur. This is because the thermal expansion coefficients of the mounting board and the semiconductor element are different by two orders of magnitude, so stress is concentrated on the solder ball corresponding to the connection part, and cracks occur on the insulating resin layer or the interface between the metal post and the insulating resin layer. In addition, if water is adsorbed on the wiring, corrosion of the wiring is caused, and cracks and disconnections occur.

In order to ensure the reliability without causing such a problem, the second insulating resin layer is formed to a thickness of, for example, 100 μm.
Formed as thick as possible, and the height of the metal post is also 100μ
m. That is, by increasing the height of the metal posts, the stress applied to the semiconductor device due to the difference in the thermal expansion coefficient between the mounting substrate and the semiconductor element is reduced.

However, a semiconductor device having such a configuration causes a new problem. In other words, in forming metal posts, it is common to use a plating method. However, forming a metal post having a height of about 100 μm by a plating method increases the manufacturing cost of a semiconductor device, Since it is difficult to control the thickness of the inside, the production yield is reduced.

In addition, when photosensitive polyimide or the like is used as the second insulating resin layer, for example, 100 μm is used.
m, the solvent contained in the original polyimide may remain in the insulating resin layer and reduce the reliability.Also, forming an expensive photosensitive polyimide as thick as 100 μm increases the manufacturing cost. It is not preferable because it is raised.

As a second insulating resin layer, a non-solvent thermosetting resin is laminated on a semiconductor wafer in place of the photosensitive polyimide, and mechanically polished to expose a surface of a metal post having a height of 100 μm. Further, (or) a method of exposing the metal post surface by making a minute via hole with a laser may be employed. However, laser processing must be said to be a process that is too redundant for processing thousands or tens of thousands of metal posts formed on a wafer, and such a process causes extra cost and yield reduction. Was something.

[0009]

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-mentioned problem. When the second insulating resin layer of a chip-size semiconductor device also serves as a sealing resin layer, heat is generated. It is an object of the present invention to provide an inexpensive chip-size semiconductor device which is free from cracks due to mechanical stress, cracks due to moisture absorption, disconnection, etc., has high reliability, and has a reduced manufacturing cost.

[0010]

SUMMARY OF THE INVENTION The present invention provides a chip size package having at least a first insulating resin layer, an extension wiring, a metal post, a second insulating resin layer, and a plurality of external connection terminals on a semiconductor element. In the above, the external connection terminal is an external connection terminal having a stress relaxation mechanism, the second insulating resin layer is a heat-resistant insulating resin layer also serving as a sealing resin layer provided using a photosensitive resin, The water absorption is 0.3%
Hereinafter, a chip size semiconductor device having a thickness of 10 μm or more.

Further, the present invention provides the chip size type semiconductor device according to the above invention, wherein the heat resistance of the second insulating resin layer is 270 ° C. or more.

Further, the present invention provides the chip-size semiconductor device according to the above-mentioned invention, wherein the thickness of the first insulating resin layer is 5 to 10 μm.

Further, the present invention provides the chip-size semiconductor device according to the present invention, wherein the external connection terminal is an external connection terminal having a conductive material formed on the inner and outer surfaces of a hollow insulating holder. This is a chip size type semiconductor device.

[0014]

Embodiments of the present invention will be described below in detail. FIG. 1 is a sectional view of one embodiment of a chip size type semiconductor device according to the present invention. As shown in FIG. 1, in a chip size type semiconductor device, an electrode (3) is formed on a surface layer of a semiconductor element (2), and a first insulating resin layer (4) is formed so as to open this electrode. Is formed. This first insulating resin layer (4) can also be used as a surface protection film of the semiconductor element (2). The main characteristics of the first insulating resin layer include extremely low levels of alkali impurities (particularly Na) which cause the wiring to deteriorate, and breakage of the wiring or extension wiring of the semiconductor element due to moisture absorption and deterioration. Therefore, it is important that the water absorption is small.

In the present invention, the first insulating resin layer has a water absorption of 0.3% or less and an alkali impurity concentration of 5 pp.
m or less. Examples of the resin satisfying these conditions include polyimide, polyamide, polyamideimide, polyetherimide, silicon, and polystyrene. In addition, when mounting using solder balls or mounting by solder reflow is considered, 2
In order to secure sufficient reliability, heat resistance of 270 ° C. or more, preferably 270 ° C. to 300 ° C. is required.
The heat resistance of ° C is required for the insulating resin layer.

In addition, the thickness of the first insulating resin layer is set such that ions are not incident on the surface of the semiconductor element in the formation of the batter because a metal film to be an extension wiring is generally formed in the next step. Things are desirable. Also,
It is necessary to completely prevent an electrical short circuit between the extension wiring and the lower wiring formed on the first insulating resin layer. That is,
The thickness of the first insulating resin layer is preferably about 5 to 10 μm.

On the electrode (3), TiN / C provided on the first insulating resin layer (4) which is electrically connected and drawn out.
An extension wiring (5) made of u and a metal post (6) by Cu plating disposed on the extension are formed. Exposing the upper part of this metal post (6)
A second insulating resin layer (7) is formed. This second insulating resin layer (7) is a heat-resistant resin and has a thickness of 50 μm.
The following are preferred. At this time, it is preferable that the edge of the metal post is covered with the second insulating resin layer. (FIG. 2 (g) described later)

As shown in FIG. 1, in the present invention, the second
The insulating resin layer (7) also serves as a sealing resin layer.
The main characteristics of the second insulating resin layer are the same as those of the first insulating resin layer, but when the semiconductor device is mounted,
It is necessary to protect the semiconductor element from the atmosphere. A result of a humidity test (humidity: 45 ° C., humidity: 95%) of a semiconductor device in which the thickness of the second insulating resin layer was changed using two types of insulating resins A having different water absorption rates. Are shown in Table 1.

[0019]

[Table 1]

As shown in Table 1, the moisture resistance to the extension wiring differs depending on the water absorption and the layer thickness. According to the above results,
The water absorption is 0.3% or less, and the thickness of the second insulating resin layer is 15 μm.
m or more. If the water absorption is 0.3% or less, 1
The improvement of the moisture resistance was observed from 0 μm, and it was shown that the same result was obtained when resin sealing was performed at a thickness of 15 μm or more.

The second insulating resin layer also needs to protect against α-rays in addition to moisture resistance. It is known that the α-rays affect, for example, an extension wiring and a wiring formed in a semiconductor element and cause noise, but there is no problem if the α-ray is 30 μm or more. However, since it is desirable that the thickness is as thin as possible in terms of manufacturing cost, the thickness of the second insulating resin layer is preferably 30 μm to 40 μm.

Further, in addition to the above-mentioned main characteristics, the second insulating resin layer needs to be able to be patterned by a photolithography method and to have thermal resistance to withstand solder reflow. Generally, solder reflow requires a temperature of 150 ° C. to 250 ° C. locally, so that heat resistance of 270 ° C. or more, preferably 27 ° C.
Desirably, it is a resin having a heat resistance of 0 ° C. to 300 ° C. Examples of the resin satisfying these conditions include polyimide, polyamide, polyamideimide, polyetherimide, silicon, and polystyrene. The photosensitive resin used for forming the second insulating resin layer is a photosensitive resin having heat resistance by mixing a photosensitive agent, a thermosetting agent, and the like with these resins. Specifically, for example, CRC-8300, 8100 manufactured by Sumitomo Bakelite Co., Ltd.
A photosensitive resin such as (trade name) is preferable.

The external connection terminal (8) shown in FIG. 1 has a hollow holding member in order to have a stress relaxation mechanism. Since the hollow holding member has a flexible structure, even if the mounting substrate connected to the external connection terminal repeats a considerable amount of thermal expansion and contraction, the generated stress can be absorbed and the stress can be reduced. This can prevent the occurrence of cracks in the insulating resin layer, the occurrence of cracks at the interface between the external connection terminal and the insulating resin layer, the interface between the metal post and the insulating resin layer, or the occurrence of cracks and disconnections in the extension wiring.

Further, it is desirable that the hollow portion of the holding member is opened to the external atmosphere so that air in the external atmosphere can freely enter and exit the hollow portion. This is because when a resin is used as the material of the holding body, the resin easily absorbs moisture,
Resin containing water is easily degraded due to hydrolysis.However, if the hollow part of the holder is opened to the external atmosphere and the gas in the external atmosphere can freely enter and leave the hollow part. In addition, the moisture contained in the holder is released to the external atmosphere, so that deterioration of the resin can be prevented. In addition, if the hollow portion of the holding body is open to the outside atmosphere, when heated during mounting, the water vapor in the holding body that has evaporated and the expanded air are released to the outside atmosphere, and the holding body is ruptured. Can be prevented. Furthermore, even if heat is applied to the semiconductor device after mounting, the moisture in the holder is released to the external atmosphere, so that deterioration and rupture of the holder can be prevented.

The electrical connection between the external connection terminals and the mounting board is made by a conductive material formed on the surface of the holder.
The conductive material is formed on at least the outer surface of the holder for making an electrical connection. In the examples of FIGS. 3A and 3B, an adhesive layer is formed on the surface of the holding member prior to disposing the conductive material in order to improve the adhesion between the holding member and the conductive material. ing. The external connection terminal (8) shown in FIGS. 3A and 3B is, for example, a eutectic solder (32) as a conductive material on the inner and outer surfaces of a hollow holder (31) using thermoplastic polyimide as a resin. ).

CSP, BGA (Ball Grid A
(Rray) etc., when an electrical connection with the outside is made,
It is common to perform thermocompression mounting using solder, a low melting point alloy, an anisotropic conductive film, or the like. For this reason, it is preferable that the material of the holder constituting the external connection terminal is engineered plastic having heat resistance. Here, engineer plastic means that the heat resistance is 1000 ° C. or more, the strength is 49 MPa or more,
It refers to plastic having a flexural modulus of 2.4 GPa or more.

As those satisfying the above conditions, polyimide, polyamide imide, polyether imide, thermoplastic polyimide, polyamide, polyacetal, polybutylene terephthalate, polyethylene terephthalate, polystyrene, syndiotactic polystyrene, polyphenylene sulfide, polyether ketone, liquid crystal polymer , Polyether nitrile, fluororesin, polycarbonate, modified polyphenylene ether, polysulfone,
Examples include resins such as polyethersulfone, polydivinylbenzene, amorphous polyolefin, and polyarylate. Further, it may be a polymer alloy of the above engineering plastic.

Next, the semiconductor device provided with the external connection terminals is fixed and electrically connected to the outside (for example, a mounting board) via the external connection terminals. A conductive material is provided. For this reason, the conductive material must be fixed to the outside by crimping or thermocompression, and at the same time be capable of electrical connection. Examples of the conductive material satisfying such conditions include: 1) a dispersion of fine particles of graphite, carbon or metal, 2) a simple substance of gold, silver, copper, aluminum, or nickel, or an alloy containing two or more kinds of the metals. A low melting point alloy containing tin or lead as a main component is mentioned, and it is desirable to select from the above 1) to 3).

Examples of the low melting point alloy include those using metals such as mercury, gallium, and indium. However, from the viewpoint of manufacturing cost, a solder alloy containing tin or lead as a main component is used. preferable. As the solder alloy, a eutectic solder or a high melting point solder with an increased ratio of lead can be applied, and if necessary, bismuth, cadmium, antimony, zinc, manganese, indium, tin, silver, etc. may be added. . Conventionally, the height of the metal post has been increased for the purpose of relaxing thermal stress, and a thick resin has been formed under the metal post. However, if an external connection terminal having this stress relaxation mechanism is used, these measures are not particularly necessary. .

FIGS. 2A to 2H are cross-sectional views showing a method for manufacturing such a semiconductor device. FIG.
(B) to (h) are enlarged views of a part of FIG. First, as shown in FIGS. 2A and 2B, an aluminum electrode (13) is formed on a surface of a semiconductor element (12) formed in a grid pattern on a wafer (11). (1
0) is a scribe line for separating the semiconductor element (12) from the wafer (11) in the final step.

As shown in FIG. 2C, the semiconductor device (1
A negative photosensitive polyimide serving as a first insulating resin layer (14) is coated and formed to a thickness of about 10 μm on the surface of the wafer (11) on which 2) is multi-faced. 10 on a hot plate
After pre-baking at 0 ° C. for 3 minutes, mask exposure is performed so that the aluminum electrode (13) is opened, and development and heat treatment (about 400 ° C., 1 hour) are performed to obtain a first insulating resin layer (14). When forming the first insulating resin layer (14), not only the opening of the aluminum electrode (13) but also, for example, the first insulating resin layer (14) on the scribe line (10).
It is also desirable to remove This is the wafer (1
Not only the stress relaxation effect (warpage reduction) given to 1) but also the meaning of reducing dust at the time of scribing.

Next, as shown in FIG. 2D, TiN and Cu are continuously formed by sputtering as a metal thin film for an extension wiring. TiN is a diffusion prevention layer of Cu and has a thickness of about 200 nm. Cu is about 0.5 in consideration of disconnection.
About 5 μm is appropriate. Next, a plating mask (not shown) is formed by photolithography in order to form the metal post (16) on the extension of the extension wiring by Cu plating. The diameter of the metal post (16) is about 100-50
The height is about 0 μm and the height is about 10 to 30 μm.

The plating mask is obtained by applying a photosensitive resist having a plating solution resistance to a thickness of about 30 μm and performing exposure, development and heat treatment. Next, Cu plating is applied to the opening portion of the plating mask, and the plating mask is peeled off. As shown in FIG.
To form

Next, as shown in FIG. 2 (f), the metal thin film is patterned by photolithography and etched to obtain an extension wiring (15). First, a normal positive type resist is applied and formed, prebaked, then exposed, developed,
After the heat treatment, an extension wiring is obtained by wet etching with an acid. Dry etching may be used instead of wet etching. Here, after forming the metal thin film for the extension wiring, the metal post is formed, and then the wiring is formed. However, the order is not particularly problematic. However, in this case, when the metal post (16) is formed by electrolytic plating, since the extension wiring (15) is formed, a power supply wiring for electrolytic plating is required, and the layout becomes complicated. Also, the height of the metal posts tends to vary.

Next, as shown in FIG. 2G, a second insulating resin layer (17) is formed so that the upper portions of the metal posts are exposed. First, a photosensitive resin to be a second insulating resin layer (17) is applied and formed, prebaked, then exposed,
Develop and heat treat. The thickness is about 30 μm. At this time, the metal post (16) is exposed,
The edge of the metal post (16) is covered with a second insulating resin (17) as shown in FIG. As a result, for example, it is possible to withstand an impact generated when the chip is peeled off due to a mounting error, and the reliability is increased. Next, as shown in FIG. 2 (h), a hollow holder serving as an external electrode terminal is fixed on the metal post (16) with an adhesive such as a flux, and reflowed to form an external electrode terminal (18).
And

[0036]

According to the present invention, there is provided a chip size package having at least a first insulating resin layer, an extension wiring, a metal post, a second insulating resin layer, and a plurality of external connection terminals on a semiconductor element. The terminal is an external connection terminal having a stress relaxation mechanism, the second insulating resin layer is a heat-resistant insulating resin layer also serving as a sealing resin layer provided using a photosensitive resin, and has a water absorption rate of 0.3% or less, thickness 1
Since the thickness is 0 μm or more, when the second insulating resin layer of the chip-size semiconductor device also functions as the sealing resin layer, cracks due to thermal stress and cracks caused by moisture absorption,
An inexpensive chip-size semiconductor device with no disconnection or the like, high reliability, and reduced manufacturing cost is provided.

Further, according to the present invention, since the external connection terminal is an external connection terminal in which a conductive material is formed on the inner and outer surfaces of a hollow insulating holder, the second insulating resin of the chip size type semiconductor device is provided. Inexpensive chip-size semiconductor with high reliability and reduced manufacturing cost, free of cracks due to thermal stress, cracks and disconnections caused by moisture absorption when the layer also functions as a sealing resin layer Device.

[Brief description of the drawings]

FIG. 1 is a sectional view of one embodiment of a chip size type semiconductor device according to the present invention.

FIGS. 2A to 2H are explanatory views showing a method for manufacturing a semiconductor device in a cross section.

FIGS. 3A and 3B are explanatory diagrams of external connection terminals.

FIG. 4 is an explanatory diagram of a structural example of a chip size package (CSP).

[Explanation of symbols]

 2, 12: semiconductor element 3: electrode 4, 14, 44: first insulating resin layer 5, 15, 45: extension wiring 6, 46: metal post 7, 17, 47: second insulating resin layer 8: outside Connection terminal 10 scribe line 11 wafer 13 aluminum electrode 16 metal post 18 external electrode terminal 31 holder 32 eutectic solder 42 semiconductor circuit 43 electrode part 48 solder ball 49 resin sealing

Continued on the front page F-term (reference) 4M109 AA02 BA04 CA05 DA08 DA10 DB16 DB17 EA08 EA10 EC01 EC03 EC04 ED03 ED04 5F061 AA02 BA04 CA05 CB13 DE03

Claims (4)

[Claims] In a chip-size package having at least a first insulating resin layer, an extension wiring, a metal post, a second insulating resin layer, and a plurality of external connection terminals on a semiconductor element, the external connection terminals are alleviated by stress. An external connection terminal having a mechanism, wherein the second insulating resin layer is a heat-resistant insulating resin layer also serving as a sealing resin layer provided using a photosensitive resin, and has a water absorption of 0.3%. Hereinafter, a chip-size semiconductor device having a thickness of 10 μm or more. 2. The heat resistance of the second insulating resin layer is 270 ° C.
2. The chip-size semiconductor device according to claim 1, wherein: 3. The method according to claim 1, wherein said first insulating resin layer has a thickness of 5 to 10 μm.
3. The chip-size semiconductor device according to claim 1, wherein m is m. 4. The external connection terminal according to claim 1, wherein the external connection terminal is an external connection terminal in which a conductive material is formed on the inner and outer surfaces of a hollow insulating holder. 3
A chip-size semiconductor device as described in the above.