JP2001203218A - 半導体デバイスのトレンチの集積度を増大する方法 - Google Patents

半導体デバイスのトレンチの集積度を増大する方法

Info

Publication number
JP2001203218A
JP2001203218A JP2000357218A JP2000357218A JP2001203218A JP 2001203218 A JP2001203218 A JP 2001203218A JP 2000357218 A JP2000357218 A JP 2000357218A JP 2000357218 A JP2000357218 A JP 2000357218A JP 2001203218 A JP2001203218 A JP 2001203218A
Authority
JP
Japan
Prior art keywords
trench
layer
trenches
width
mesa
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000357218A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001203218A5 (enExample
Inventor
K Madson Gordon
ケイ、マドソン ゴードン
Sharp Joel
ジョエル、シャープ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Publication of JP2001203218A publication Critical patent/JP2001203218A/ja
Publication of JP2001203218A5 publication Critical patent/JP2001203218A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3247—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/83125—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having shared source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/837—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising vertical IGFETs
    • H10D84/839—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising vertical IGFETs comprising VDMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2000357218A 1999-11-24 2000-11-24 半導体デバイスのトレンチの集積度を増大する方法 Pending JP2001203218A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/447,933 US6291310B1 (en) 1999-11-24 1999-11-24 Method of increasing trench density for semiconductor
US447933 1999-11-24

Publications (2)

Publication Number Publication Date
JP2001203218A true JP2001203218A (ja) 2001-07-27
JP2001203218A5 JP2001203218A5 (enExample) 2007-09-13

Family

ID=23778336

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000357218A Pending JP2001203218A (ja) 1999-11-24 2000-11-24 半導体デバイスのトレンチの集積度を増大する方法

Country Status (3)

Country Link
US (2) US6291310B1 (enExample)
JP (1) JP2001203218A (enExample)
TW (1) TW465023B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6406982B2 (en) * 2000-06-05 2002-06-18 Denso Corporation Method of improving epitaxially-filled trench by smoothing trench prior to filling
JP2002231945A (ja) * 2001-02-06 2002-08-16 Denso Corp 半導体装置の製造方法
US6800899B2 (en) * 2001-08-30 2004-10-05 Micron Technology, Inc. Vertical transistors, electrical devices containing a vertical transistor, and computer systems containing a vertical transistor
JP4123961B2 (ja) * 2002-03-26 2008-07-23 富士電機デバイステクノロジー株式会社 半導体装置の製造方法
US20050106794A1 (en) * 2002-03-26 2005-05-19 Fuji Electric Holdings Co., Ltd. Method of manufacturing a semiconductor device
US6740571B2 (en) * 2002-07-25 2004-05-25 Mosel Vitelic, Inc. Method of etching a dielectric material in the presence of polysilicon
JP2004111747A (ja) * 2002-09-19 2004-04-08 Tokyo Electron Ltd 半導体基板の処理方法及び半導体素子
US6872606B2 (en) * 2003-04-03 2005-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with raised segment
US6911367B2 (en) * 2003-04-18 2005-06-28 Micron Technology, Inc. Methods of forming semiconductive materials having flattened surfaces; methods of forming isolation regions; and methods of forming elevated source/drain regions
KR100471001B1 (ko) * 2003-07-02 2005-03-14 삼성전자주식회사 리세스형 트랜지스터 및 그의 제조방법
US7381656B2 (en) * 2004-03-23 2008-06-03 Nxp B.V. Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method
US7402863B2 (en) * 2004-06-21 2008-07-22 International Rectifier Corporation Trench FET with reduced mesa width and source contact inside active trench
KR100689211B1 (ko) * 2004-12-11 2007-03-08 경북대학교 산학협력단 안장형 엠오에스 소자
US7553740B2 (en) * 2005-05-26 2009-06-30 Fairchild Semiconductor Corporation Structure and method for forming a minimum pitch trench-gate FET with heavy body region
US7829941B2 (en) * 2006-01-24 2010-11-09 Alpha & Omega Semiconductor, Ltd. Configuration and method to form MOSFET devices with low resistance silicide gate and mesa contact regions
EP2277050B2 (en) 2008-04-16 2022-09-28 Momenta Pharmaceuticals, Inc. Analysis of amino acid copolymer compositions
EP2414384B2 (en) * 2009-04-03 2023-05-03 Momenta Pharmaceuticals, Inc. Control of copolymer compositions
KR20100111162A (ko) * 2009-04-06 2010-10-14 삼성전자주식회사 리세스 채널 모스 트랜지스터를 갖는 반도체소자 제조방법
KR101651941B1 (ko) * 2010-02-16 2016-08-30 삼성전자주식회사 리세스 채널을 포함하는 반도체 소자의 제조방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05315620A (ja) * 1992-05-08 1993-11-26 Rohm Co Ltd 半導体装置およびその製造法
JPH09260653A (ja) * 1996-03-22 1997-10-03 Toshiba Corp 半導体装置の製造方法
JPH1131815A (ja) * 1997-07-11 1999-02-02 Mitsubishi Electric Corp トレンチ構造を有する半導体装置及びその製造方法
JPH1174514A (ja) * 1997-08-28 1999-03-16 Hitachi Ltd 半導体装置の製造方法
JPH11274425A (ja) * 1998-03-24 1999-10-08 Toshiba Corp 半導体記憶装置およびその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5607511A (en) * 1992-02-21 1997-03-04 International Business Machines Corporation Method and apparatus for low temperature, low pressure chemical vapor deposition of epitaxial silicon layers
US5268311A (en) * 1988-09-01 1993-12-07 International Business Machines Corporation Method for forming a thin dielectric layer on a substrate
JP2891205B2 (ja) * 1996-10-21 1999-05-17 日本電気株式会社 半導体集積回路の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05315620A (ja) * 1992-05-08 1993-11-26 Rohm Co Ltd 半導体装置およびその製造法
JPH09260653A (ja) * 1996-03-22 1997-10-03 Toshiba Corp 半導体装置の製造方法
JPH1131815A (ja) * 1997-07-11 1999-02-02 Mitsubishi Electric Corp トレンチ構造を有する半導体装置及びその製造方法
JPH1174514A (ja) * 1997-08-28 1999-03-16 Hitachi Ltd 半導体装置の製造方法
JPH11274425A (ja) * 1998-03-24 1999-10-08 Toshiba Corp 半導体記憶装置およびその製造方法

Also Published As

Publication number Publication date
TW465023B (en) 2001-11-21
US6291310B1 (en) 2001-09-18
US20010034109A1 (en) 2001-10-25

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