JP2001203177A - Semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer, where the surface and the back can be easily distinguished with the naked eyes in the case of a semiconductor wafer whose both surfaces, the surface and the back, are subjected to mirror surface polishing. SOLUTION: In a semiconductor wafer, the surface and the back are subjected to mirror-finish polishing, and the outer peripheral surface is subjected to beveling work. Either of the surface side and the back side of the outer peripheral surface is subjected to tapered beveling work (oblique straight line beveling work).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer.

[0002]

2. Description of the Related Art In recent years, semiconductor wafers such as silicon wafers and GaAs wafers have been produced in large quantities as basic members of semiconductor devices.

Here, a GaAs wafer is manufactured through the following operation procedure.

First, a GaAs single crystal ingot is manufactured.

Next, the GaAs single crystal ingot is sliced by a slicing apparatus to cut out a thin disk-shaped sliced GaAs wafer.

When slicing this GaAs single crystal ingot, it is sliced in consideration of its crystal plane orientation and the like.

Next, the sliced GaAs wafer is provided with an orientation flat portion for indicating a crystal plane orientation on an outer peripheral portion thereof.

[0008] If necessary, an index flat portion showing front and back is provided on the outer periphery separated from the orientation flat portion by a predetermined angle.

A notch may be provided in place of the orientation flat or the index flat.

Next, the remaining outer peripheral portion of the sliced GaAs wafer provided with the orientation flat portion or the orientation flat portion and the index flat portion is shaped into a circular portion.

A slice GaAs having a notch is provided.
Similarly, in the case of a wafer, the remaining outer peripheral portion is shaped into a circular portion.

Next, the orientation flat portion, the index flat portion, the circumferential portion and the like of the sliced GaAs wafer thus shaped are chamfered.

The chamfering of the outer peripheral surface of the sliced GaAs wafer is performed in order to prevent the outer peripheral portion from being damaged even if subjected to severe handling in the subsequent steps.

FIG. 3 is an explanatory longitudinal sectional view showing a part of the outer peripheral portion of the semiconductor wafer of the first conventional example.

In FIG. 3, reference numeral 11 denotes a semiconductor wafer of the first conventional example, 12 denotes its front surface, 13 denotes its back surface, and 14 denotes a chamfer.

That is, the semiconductor wafer of the first conventional example is formed by chamfering the outer peripheral surface into a round shape.

FIG. 4 is an explanatory longitudinal sectional view showing a part of the outer peripheral portion of a semiconductor wafer according to a second conventional example.

In FIG. 4, reference numeral 21 denotes a semiconductor wafer of the second conventional example, 22 denotes its front surface, 23 denotes its back surface, and 24 denotes a chamfer.

That is, the semiconductor wafer of the second conventional example is formed by chamfering the outer peripheral surface thereof into a taper type.

Next, both surfaces of the sliced GaAs wafer thus chamfered are roughly polished.

Next, the sliced GaAs wafer roughly polished as described above is mirror-polished on the front surface or both the front surface and the rear surface to form a GaAs wafer.

Here, the mirror polishing of both the front surface and the back surface of the sliced GaAs wafer is performed when manufacturing a GaAs wafer requiring strict flatness.

Next, the mirror-polished GaAs is
The s wafer is washed with water and dried to obtain a GaAs wafer product.

The semiconductor device is manufactured through various steps such as baking a photoresist pattern on the mirror surface of the semiconductor wafer manufactured as described above.

In recent years, this photoresist pattern has been increasingly miniaturized.

For this reason, semiconductor wafers are required to have a high degree of flatness so that a miniaturized photoresist pattern can be printed on the surface thereof with high precision. Accordingly, in semiconductor devices, both the front and rear surfaces are mirror-finished. Polishing is coming.

[0027]

However, in a semiconductor wafer in which both the front and rear surfaces are mirror-polished, both surfaces are mirror-polished. Therefore, under normal illumination, the front and rear surfaces are distinguished by the naked eye. Cannot be identified.

The present invention has been made in view of such a point, and an object of the present invention is to solve the above-mentioned disadvantages of the prior art, and to provide a semiconductor wafer in which both front and rear surfaces are mirror-polished. Another object of the present invention is to provide a semiconductor wafer whose front surface and back surface can be easily identified with the naked eye.

[0029]

The gist of the present invention is to provide a semiconductor wafer in which the front and back surfaces are mirror-polished, and the outer peripheral surface is chamfered, and the outer peripheral surface or the outer peripheral surface is chamfered. A semiconductor wafer is characterized in that one of the back sides is a tapered chamfer (oblique linear chamfer).

Therefore, as a first example of the semiconductor wafer of the present invention, the outer peripheral surface has a round chamfering process (curved chamfering process) and the outer peripheral surface has a tapered chamfering process (oblique linear chamfering process). Mold chamfering).

As a first example of the semiconductor wafer of the present invention, the outer peripheral surface has a tapered chamfer (oblique linear chamfering) and the outer peripheral surface has a round chamfer (curved). Shape chamfering).

[0032]

Next, an embodiment of a semiconductor wafer according to the present invention will be described with reference to the drawings.

FIG. 1 is an explanatory longitudinal sectional view showing a part of an outer peripheral portion of a semiconductor wafer according to a first embodiment of the present invention.

In FIG. 1, 31 is a semiconductor wafer of the first embodiment of the present invention, 32 is its front surface, 33 is its back surface, and 34-1 is a rounded chamfered portion on the central outer peripheral surface.
4-2 is a rounded chamfered portion on the outer peripheral surface on the front side;
Reference numeral 3 denotes a tapered chamfered portion on the outer peripheral surface on the back side.

Incidentally, the chamfering of the semiconductor wafer according to the first embodiment of the present invention is carried out by first forming a rounded chamfered portion 34-1 on the central outer peripheral surface and a rounded chamfered portion 34-1 on the front side.
2 and round chamfering at the same time, and then taper chamfering on the back side, or round chamfering the entire outer periphery once, and then taper chamfering on the back side. .

That is, in the semiconductor wafer according to the first embodiment of the present invention, the central portion of the outer peripheral surface is a central outer peripheral surface round-shaped chamfered portion 34-1 and the outer peripheral surface is closer to the front outer peripheral surface round shape. A chamfered portion 34-2 is formed by further chamfering the rear surface of the outer peripheral surface into a tapered chamfered portion 34-3 on the rear surface.

As described above, in the semiconductor wafer according to the first embodiment of the present invention, the front side and the back side can be easily identified with the naked eye.

FIG. 2 is an explanatory longitudinal sectional view showing a part of the outer peripheral portion of a semiconductor wafer according to a second embodiment of the present invention.

In FIG. 2, reference numeral 41 denotes a semiconductor wafer according to the second embodiment of the present invention, 42 denotes its front surface, 43 denotes its back surface,
44-1 is a central outer peripheral surface round type chamfered portion,
2 is a tapered chamfered portion on the outer peripheral surface on the front side, and 44-3 is a round chamfered portion on the outer peripheral surface on the back side.

That is, in the semiconductor wafer according to the second embodiment of the present invention, the central portion of the outer peripheral surface is a central outer peripheral surface round-shaped chamfered portion 44-1 and the outer peripheral surface is tapered to the outer peripheral surface. A mold chamfered portion 44-2, and a back side of the outer peripheral surface is further rounded to a back side outer peripheral surface rounded chamfered portion 4
4-3 are chamfered.

The second embodiment of the present invention thus formed by chamfering.
In the semiconductor wafer of the embodiment, the front side and the back side can be easily distinguished by the naked eye.

[0042]

The semiconductor wafer of the present invention has a mirror-polished surface on both the front and back sides, but the front and back sides can be easily identified with the naked eye, and is industrially useful. is there.

[Brief description of the drawings]

FIG. 1 is an explanatory longitudinal sectional view showing a part of an outer peripheral portion of a semiconductor wafer according to a first embodiment of the present invention.

FIG. 2 is an explanatory longitudinal sectional view showing a part of an outer peripheral portion of a semiconductor wafer according to a second embodiment of the present invention.

FIG. 3 is an explanatory longitudinal sectional view showing a part of an outer peripheral portion of a semiconductor wafer of a first conventional example.

FIG. 4 is an explanatory longitudinal sectional view showing a part of an outer peripheral portion of a semiconductor wafer of a second conventional example.

[Explanation of symbols]

 REFERENCE SIGNS LIST 11 semiconductor wafer of first conventional example 12 front surface 13 back surface 14 chamfered portion 21 semiconductor wafer of second conventional example 22 front surface 23 back surface 24 chamfered portion 31 semiconductor wafer of first embodiment of present invention 32 front surface 33 back surface 34-1 Central outer peripheral surface round type chamfered portion 34-2 Front side outer peripheral surface round type chamfered portion 34-3 Back side outer peripheral surface taper type chamfered portion 41 Semiconductor wafer 42 of second embodiment of the present invention 42 Front surface 43 Back surface 44 -1 Central outer peripheral surface round type chamfered portion 44-2 Front side outer peripheral surface taper type chamfered portion 44-3 Back side outer peripheral surface round type chamfered portion

Claims (3)

[Claims] 1. A semiconductor wafer whose front and rear surfaces are mirror-polished and whose outer peripheral surface is chamfered, wherein one of the front surface and the rear surface of the outer peripheral surface is tapered. A semiconductor wafer characterized by being subjected to an oblique straight type chamfering process. 2. An outer peripheral surface having a round-shaped chamfering process (curved chamfering) and an outer peripheral surface having a tapered chamfering surface (oblique linear chamfering). 2. The semiconductor wafer according to claim 1, wherein: 3. An outer peripheral surface having a tapered chamfering surface (oblique straight-shaped chamfering) and an outer peripheral surface having a rounded chamfering surface (curved chamfering). 2. The semiconductor wafer according to claim 1, wherein: