JP2001196333A - Semiconductor wafer with off-angle - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer with a new off-angle for which the mask alignment work which is to be performed prior to the printing of a photoresist pattern on the specular surface of the wafer can be carried out with high accuracy at the time of printing the pattern and which does not cause such a defective part as a chipped part, chipped edge, etc., even when the wafer is cruelly treated at the time of manufacturing a semiconductor device by using the wafer. SOLUTION: The semiconductor wafer with off-angle the crystal plane of which is inclined from the (100)-plane by a prescribed angle is provided with a flat orientation flat section or index flat section in the direction parallel to the direction which is inclined from the (100)-plane by a prescribed angle.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor wafer with an off-angle. More specifically, the present invention relates to a semiconductor wafer having an off-angle, for example, a GaAs semiconductor single crystal wafer.

[0002]

2. Description of the Related Art Semiconductor wafers, for example, GaAs wafers,
Silicon wafers and the like are being mass-produced as basic members of semiconductor devices.

Generally, this type of semiconductor wafer is manufactured as follows.

First, a semiconductor single crystal ingot is manufactured.

Next, the semiconductor single crystal ingot is sliced in consideration of the crystal plane orientation to cut out a thin semiconductor single crystal slice wafer.

Next, both sides of the semiconductor single crystal slice wafer are roughly polished.

Next, the roughly polished semiconductor single crystal wafer is mirror-polished.

Finally, the mirror-polished semiconductor single crystal wafer is washed and dried to obtain a semiconductor wafer.

The semiconductor wafer thus obtained is a disk-shaped body having a small thickness, but it is impossible to distinguish the crystal orientation, the front and back, and the like of the semiconductor wafer as it is.

In view of this, the semiconductor wafer is provided with a display portion for indicating the crystal plane orientation, a display portion for distinguishing front and back, and the like at a part of the circumferential portion.

FIG. 4 is a plan view showing a semiconductor wafer of Conventional Example 1.

In FIG. 4, 1 is a semiconductor wafer, 2 is a circumferential portion, 3 is an orientation flat portion (hereinafter referred to as an OF portion), and 4 is an index flat portion (hereinafter referred to as an IF portion).

That is, the semiconductor wafer of Conventional Example 1 is provided with an OF section 3 for indicating the crystal orientation and an IF section 4 for distinguishing front and back on the outer periphery thereof. In other words, the semiconductor wafer of Conventional Example 1 has an outer periphery that is not completely circular, but includes a circumferential portion 2, an OF portion 3 having a flat surface, and an IF portion 4 having a flat surface. Here, the OF section 3 is provided as a flat section on a part of the outer periphery, and the IF section 4
Is provided as a flat portion having a slightly shorter length than the OF portion 3 at a position slightly offset from the OF portion 3 along the clockwise direction on the outer periphery thereof.

As described above, manufacturers of semiconductor wafers are provided with an OF section 3 and an IF section 4 for specifying the crystal plane orientation and the front and back sides of the produced semiconductor wafer.

On the other hand, semiconductor device manufacturers use the OF portion 3 as a reference position for mask alignment when printing a photoresist pattern when manufacturing a semiconductor device using the semiconductor wafer thus manufactured. Has become.

By the way, the O of the semiconductor wafer of the prior art 1 is
The F part 3, the IF part 4, and the circumferential part 2 are chamfered. This is to prevent the occurrence of cracks or chips in the working process when manufacturing a semiconductor device using the semiconductor wafer of Conventional Example 1 by chamfering these portions.

FIG. 5 shows the semiconductor wafer of Conventional Example 1 in which the circumferential portion is chamfered, and the circumferential portion of which is chamfered. 2 is an enlarged vertical sectional view when cut from the side to the OF section. FIG.

In FIG. 5, 2-1 is a circumferential portion of the chamfering process,
3 is an OF section.

As described above, the OF portion 3 is used as a reference position for mask alignment when printing a photoresist pattern. In this mask alignment, the OF section 3 on the flat surface and the reference point (or line) displayed on the mask are aligned using a microscope (magnification: about 50 to 200 times). At this time, since the OF section 3 is chamfered, when viewed with a high-power microscope, the shape of the flat surface is blurred. As a result, the OF section 3 and the reference points (or lines) displayed on the mask are blurred. It is difficult to make precise alignment.

In recent years, a photoresist pattern to be printed on a mirror surface of a semiconductor wafer tends to be miniaturized year by year. For this reason, mask alignment has been required to be more precise.

The semiconductor wafer of Conventional Example 2 has been put to practical use as a semiconductor wafer capable of such high precision mask alignment.

FIG. 6 is a plan view of a semiconductor wafer of the second conventional example. FIG. 7 is a partially omitted enlarged longitudinal sectional view of the semiconductor wafer of Conventional Example 2 cut from the circumferential portion to the OF portion.

In FIG. 6, 21 is a semiconductor wafer, 22 is a circumferential portion, 23 is an OF portion, and 24 is an IF portion.

That is, the semiconductor wafer of Conventional Example 2 uses a semiconductor wafer having a (100) plane JUST (does not tilt the plane direction) and has an OF section 23 and an IF section 24 on its outer periphery. Moreover, the OF portion 23 is formed by cleavage without chamfering.

As described above, the semiconductor wafer of Conventional Example 2 is
Since the F portion 23 is cleaved, the OF portion 23
It is easy to precisely match the reference point (or line) displayed on the mask with a high-power microscope.

On the other hand, in recent years, the crystal plane orientation has been changed to (10
Semiconductor wafers with an off-angle, which are inclined at an arbitrary angle from the 0) plane, have also been widely used.

FIG. 8 is a plan view showing a semiconductor wafer with an off-angle according to the third conventional example.
FIG. 9 is a partially enlarged sectional view of a semiconductor wafer with an off-angle of Conventional Example 3.

In FIG. 8, reference numeral 31 denotes a semiconductor wafer with an off-angle of Conventional Example 3, 32 denotes a circumferential portion, 33 denotes an OF portion,
Reference numeral 4 denotes an IF unit.

That is, the semiconductor wafer with an off-angle according to Conventional Example 3 has an outer periphery composed of a circumferential portion 32, an OF portion 33, and an IF portion 34.
The portions 34 or these are formed by cleavage without chamfering.

[0030]

However, the use of a semiconductor wafer with an off-angle whose crystal plane orientation is inclined at an arbitrary angle from the (100) plane and the OF portion is cleaved has the following problems. Practical application was difficult.

Here, problems of practical use of an off-angled GaAs wafer in which the crystal plane orientation is inclined by 15 ° from the (100) plane toward the (011) plane as the off-angled semiconductor wafer are listed.

(1) The crystal plane is shifted from the (100) plane to the (01) plane.
1) When trying to cleave an OF portion of a GaAs wafer inclined at 15 ° in the plane direction, its cross section is inclined from the wafer surface as shown in FIG.

FIG. 3 is an explanatory front view showing how a GaAs slice wafer with an off-angle is cut out from a GaAs semiconductor single crystal ingot.

In FIG. 3, reference numeral 40 denotes a GaAs semiconductor single crystal ingot manufactured by the boat method.

That is, when the OF portion is to be cleaved in this way, its cross section becomes a surface inclined from the wafer surface.
It is difficult to perform the cleavage work, which tends to cause defects such as cleavage bending and generation of steps. As a result, a semiconductor wafer with an off-angle in which the OF portion is cleaved has extremely poor quality, yield, and productivity.

(2) Even if the OF portion can be finished to a normal cleavage plane, this off-angled semiconductor wafer will have an appearance such as an edge chip or the like in the OF portion during subsequent processing (polishing) or the like. There is a drawback that defects easily occur.

As described above, when a semiconductor wafer with an off-angle having an edge chip in the OF portion is mask-aligned, the reference is blurred due to the edge chip when the semiconductor wafer enters the field of view of the microscope. As a result, accurate mask alignment cannot be performed. Will be.

(3) In the semiconductor wafer with an off-angle in which the OF portion is finished as a cleavage plane, the section of the OF portion becomes an acute-angled surface. If the section of the OF section 3 has a sharp angle, an edge chip or the like is likely to be generated during a process of manufacturing a semiconductor device, which causes a problem that a semiconductor wafer with an off-angle frequently cracks.

The present invention has been made in view of such a point, and an object of the present invention is to solve the above-mentioned drawbacks of the prior art and to print a photoresist pattern on a mirror surface of a semiconductor wafer having an off-angle. The mask alignment work performed in advance can be performed with high precision, and when manufacturing semiconductor devices using the semiconductor wafer with the off-angle, even if the wafer is subjected to severe handling during the manufacturing process, It is an object of the present invention to provide a novel semiconductor wafer with an off-angle which does not generate a defective portion such as a chipping defect or an edge chip defect.

[0040]

SUMMARY OF THE INVENTION The gist of the present invention is to provide a semiconductor wafer with an off-angle in which the crystal plane orientation is inclined at an arbitrary angle from the (100) plane. Orientation to (10
0) A semiconductor wafer with an off-angle, which is provided with a flat OF section or IF section in a direction parallel to a direction inclined at an arbitrary angle from the plane.

In the present invention, the OF section or the IF section
It is preferable that the substrate is cleaved.

The procedure for manufacturing a semiconductor wafer with an off-angle according to the present invention is as follows.
0) A semiconductor wafer with an off-angle inclined at an arbitrary angle with respect to the plane is prepared, and then the prepared semiconductor wafer with an off-angle is formed with a flat portion in a direction parallel to the inclination direction to form an OF portion or an IF portion. Formed and then its OF
The part or the IF part or both of them are cleaved and finished to obtain a semiconductor wafer with an off-angle of the present invention.

The thus obtained semiconductor wafer with an off-angle according to the present invention has a reference surface of an OF portion or an IF portion which is a cleavage-finished surface, so that the mask alignment operation can be performed with high precision and easily. .

When an off-angle is provided, the plane perpendicular to the tilting direction has an angle corresponding to the angle at which the flat part of the wafer surface is tilted, but the cleavage plane in the parallel direction is perpendicular to the wafer surface. Therefore, the semiconductor wafer with an off-angle of the present invention does not cause a trouble such as generation of an edge chip or the like during a process of manufacturing a semiconductor device.

[0045]

Next, an embodiment of a semiconductor wafer with an off-angle according to the present invention will be described. (One Example of Manufacturing Method of First Embodiment of Wafer with Off Angle of the Present Invention)
First, an example of a method for manufacturing a semiconductor wafer with an off-angle according to the first embodiment of the present invention will be described.

First, a GaAs semiconductor single crystal ingot is manufactured by a boat method.

Next, the GaAs semiconductor single crystal ingot is sliced at a plane inclined by 15 ° in the direction of the (011) plane from the (100) plane of the crystal plane to obtain a GaAs slice wafer with an off-angle as shown in FIG. And cut it out.

Next, the cut GaAs slice wafer with the off-angle is spontaneously cleaved on a cleavage plane (110) parallel to the direction of the off-angle.

Next, this off-angled GaAs
The cleavage plane of the sliced wafer is defined as an IF portion, and a straight portion OF is formed on the outer peripheral surface shifted 90 ° counterclockwise from the surface of the IF portion.
Part is formed, and the other outer peripheral part is shaped into a circle.

Next, the front and back surfaces of the off-angled GaAs slice wafer thus shaped are roughly polished.

Next, the front and back surfaces of the rough-polished GaAs slice wafer with an off-angle are mirror-polished.

Finally, the mirror-polished GaAs slice wafer with an off-angle is washed and dried to obtain a GaAs wafer with an off-angle.

FIG. 1 is a plan view showing a first embodiment of the semiconductor wafer with an off-angle of the present invention thus obtained.

In FIG. 1, reference numeral 41 denotes a semiconductor wafer with an off-angle according to the first embodiment of the present invention; 42, a circular portion; and 43, an OF.
Reference numeral 44 denotes an IF unit.

(First Embodiment of Semiconductor Wafer with Off-Angle of the Present Invention)
In the first embodiment of the As slice wafer, the O
Since the semiconductor device is manufactured using the off-angled GaAs wafer according to the first embodiment because of having the F portion 43 and the IF portion 44, even if the semiconductor device is subjected to severe handling during the manufacturing process, chipping defects or the like are not caused. Defective portions such as edge chip defects do not occur.

In the semiconductor wafer of Conventional Example 2 described above, the reference plane for mask alignment when a photoresist pattern is printed is an OF plane, and its crystal plane orientation is (0 / −).
(1 / -1) plane.

On the other hand, in the semiconductor wafer with an off-angle according to the first embodiment of the present invention, the reference plane for mask alignment at the time of printing the photoresist pattern is the cleaved IF section 44 plane, and the crystal plane orientation is (0). / -1 / 1) plane. At this time, the crystal plane orientation of the semiconductor wafer with the off-angle according to the first embodiment of the present invention is a plane perpendicular to the wafer surface. Therefore, when manufacturing a semiconductor wafer with an off-angle according to an embodiment of the present invention, cleavage bending defects, edge chip defects, and the like do not occur during the manufacturing process, thereby significantly improving quality, yield, and productivity. Can be enhanced.

Further, it is possible to greatly improve the mask alignment accuracy when printing a photoresist pattern using the off-angled semiconductor wafer according to the first embodiment of the present invention, and to generate a defect portion such as a crack during a semiconductor device manufacturing process. Can be effectively reduced.

In the present invention, the positional relationship between the OF and the IF can be changed as shown in FIG. 2, but the positional relationship between the direction inclined at an arbitrary angle from the (100) plane and the flat surface is basically universal. is there.

FIG. 2 is a plan view showing such a GaAs slice wafer with an off-angle according to the second embodiment of the present invention.

In FIG. 2, reference numeral 51 denotes a semiconductor wafer with an off-angle according to the second embodiment of the present invention; 52, a circular portion; 53, an OF portion; and 54, an IF portion.

That is, GaAs with an off-angle of the present invention
In the second embodiment of the sliced wafer, the wafer is cleaved as shown in (b) and finally shaped as shown in (a).

When a semiconductor device is manufactured using the semiconductor wafer with an off-angle manufactured in the present invention, the mask pattern to be used is rotated by 90 degrees.

[0064]

The semiconductor wafer with an off-angle of the present invention has the following excellent effects.

(1) The yield and productivity during wafer processing have been drastically improved, and it has become possible to deal with mass-produced wafers.

(2) When a semiconductor device is manufactured by using the semiconductor wafer with an off-angle of the present invention, the mask alignment accuracy in printing the photoresist pattern can be greatly improved, whereby the semiconductor device can be manufactured. Quality, reliability, yield, productivity, etc. can be significantly improved.

(3) Further, fine processing can be performed more than before, thereby improving the concentration of semiconductor chips.

[Brief description of the drawings]

FIG. 1 is a first view of a semiconductor wafer with an off-angle according to the present invention.
It is the top view which showed the Example.

FIG. 2 is a second view of a semiconductor wafer with an off-angle according to the present invention;
It is the top view which showed the Example.

FIG. 3 is an explanatory front view showing a state in which a GaAs slice wafer with an off-angle is cut out from a GaAs semiconductor single crystal ingot.

FIG. 4 is a plan view showing a semiconductor wafer of Conventional Example 1.

FIG. 5 is an enlarged vertical cross-sectional view of the semiconductor wafer of Conventional Example 1 in which the circumferential portion is chamfered, when the semiconductor wafer is cut from the chamfered circumferential portion to the OF portion.

FIG. 6 shows a plan view of a semiconductor wafer of Conventional Example 2.

FIG. 7 shows a semiconductor wafer of Conventional Example 2 which is OF
FIG. 2 is an enlarged vertical sectional view partially cut away when cut across a portion.

FIG. 8 is a plan view showing a semiconductor wafer with an off-angle of Conventional Example 3.

FIG. 9 is a partially enlarged cross-sectional view of a semiconductor wafer with an off-angle according to Conventional Example 3.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Conventional example 1 Semiconductor wafer 2 Circumferential part 2-1 Chamfering peripheral part 3 Orientation flat part 4 Index flat part 21 Conventional example 2 Semiconductor wafer 22 Circular part 23 Orientation flat part 24 Index flat part 31 Conventional example 3 off Semiconductor wafer with angle 32 Circumferential part 33 Orientation flat part 34 Index flat part 40 GaAs semiconductor single crystal ingot 41 Semiconductor wafer with one off angle 42 Circular part 43 Orientation flat part 44 Index flat part 51 Semiconductor with two off angle according to the present invention Wafer 52 Circular part 53 Orientation flat part 54 Index flat part

Claims (2)

[Claims] An off-angle semiconductor wafer having a crystal plane orientation inclined at an arbitrary angle from a (100) plane,
The off-angled semiconductor wafer is provided with an orientation flat portion or an index flat portion which is flat in a direction parallel to a direction inclined at an arbitrary angle from the (100) plane with respect to the (100) plane. Semiconductor wafer. 2. The semiconductor wafer with an off-angle according to claim 1, wherein the orientation flat portion or the index flat portion is cleaved.