JP2002052448A - Semiconductor wafer and its machining method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer and its machining method for preventing damages to the wafer, including chipping and cracking, in the treatment process of the wafer without lowering the precision of crystal-orientation discrimination or alignment of the wafer due to orientation flatness. SOLUTION: The semiconductor wafer 10 is cleaved to form a cleaved face 12 on its outer periphery. At least one of a surface side angle portion and a reverse side angle portion where the cleaved face 12 crosses the surface and reverse sides of the semiconductor wafer 10 is chamfered while leaving a portion of the cleaved face 12 corresponding to a preset thickness.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor wafer and a method for processing the same, and more particularly, to a semiconductor wafer provided with an orientation flat and a method for processing the same.

[0002]

2. Description of the Related Art In some cases, an orientation flat (orientation flat) is formed on the outer periphery of a semiconductor wafer (hereinafter, referred to as "wafer") in order to determine the crystal orientation and align the crystal orientation. Such an orientation flat is formed by grinding the outer periphery of the wafer,
Alternatively, it is formed using the cleavage plane of the crystal.

However, if the cleavage plane of the wafer is used as is in an orientation flat without any processing for discrimination and alignment of crystal orientation, the cleavage plane of the wafer is formed at right angles to the front and back surfaces of the wafer during the wafer processing process. In addition, there is a problem that the wafer is liable to be chipped, that is, chipping is apt to occur, and the chipping (chip) tends to break the wafer, increasing the defective rate of the wafer and lowering the yield.

In order to prevent such a problem from occurring, there is known a method of grinding the entire circumference of a wafer including a cleavage plane of the wafer.

[0005]

However, the method of grinding the entire circumference of the wafer including the cleavage plane of the wafer is a method of simultaneously grinding the entire circumference of the wafer including the cleavage plane.
Depending on the state of the grinding machine and the skill of the operator, there is a problem in that the accuracy of discrimination of the crystal orientation of the wafer and the alignment of the wafer by the orientation flat are deteriorated compared to the case where the cleavage plane is not processed and the orientation flat is used as it is. .

When a wafer is used for a semiconductor laser or the like, the cleavage surface is used as the resonance surface because the resonance surface needs to have a good flatness. Chamfering methods cannot be used for such applications.

[0007] Accordingly, the present invention has been made in view of the above-described conventional problems, and does not reduce the accuracy of discrimination of the crystal orientation of the wafer by the orientation flat and the accuracy of the alignment without causing chipping or cracking during the wafer processing process. An object of the present invention is to provide a semiconductor wafer and a method for processing the same, which can prevent damage to the wafer.

[0008]

Means for Solving the Problems The inventors of the present invention have conducted intensive studies to solve the above-mentioned problems, and as a result, after cleaving the wafer, a part of the cleaved surface of the wafer has a predetermined thickness. By chamfering at least one of the front side corner and the back side corner where the cleavage plane of the wafer is perpendicular to the front and back surfaces of the wafer, and forming an orientation flat on the outer periphery of the wafer, the crystal of the wafer by the orientation flat is formed. Completed the present invention by finding that it is possible to prevent wafer damage such as chipping and cracking during the wafer processing process and reduce the wafer defect rate without reducing the accuracy of orientation discrimination and alignment. I came to.

That is, the semiconductor wafer according to the present invention comprises:
At least one of a front side corner and a back side corner, which is a portion where a cleavage plane formed on the outer periphery of the semiconductor wafer and the front and back surfaces of the semiconductor wafer intersect, a part of the cleavage plane remains by a predetermined thickness. It is characterized by being chamfered. In this semiconductor wafer, it is preferable that chamfering is performed on at least one of the front side corner and the back side corner. It is preferable that the predetermined thickness left on the cleavage plane of the semiconductor wafer is １ ／ to 9/10 of the thickness of the semiconductor wafer.

In the method for processing a semiconductor wafer according to the present invention, the semiconductor wafer is cleaved to form a cleaved surface on an outer periphery thereof, and a front side corner portion where the cleaved surface intersects the front and back surfaces of the semiconductor wafer. And at least one of the back side corners is chamfered so that a part of the cleavage plane remains by a predetermined thickness. In this method of processing a semiconductor wafer, it is preferable to perform chamfering over the entire length of at least one of the front side corner and the back side corner. In the method for processing a semiconductor wafer, it is preferable that the predetermined thickness left on the cleavage plane is 乃至 to 9/10 of the thickness of the semiconductor wafer.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In a preferred embodiment of a method for processing a semiconductor wafer according to the present invention, a semiconductor wafer is cleaved to form a cleavage plane on the outer periphery thereof, and a portion where the cleavage plane intersects the front and back surfaces of the semiconductor wafer. Is chamfered by a chamfering device so that a part of the cleavage plane remains by a predetermined thickness. The predetermined thickness left on the cleavage plane is 1 to the thickness of the semiconductor wafer.
/ 2 to 9/10 is preferable. This is because if the thickness is less than 1/2, the accuracy of the discrimination of the crystal orientation and the alignment are reduced, and if the thickness is more than 9/10, the defective rate due to chipping or cracking increases.

By chamfering such that a part of the cleavage plane remains by the above-mentioned thickness, the accuracy of discrimination of the crystal orientation of the wafer by the orientation flat and the alignment accuracy can be reduced during the processing of the wafer. It is possible to prevent damage to the wafer such as chipping and cracking, and to reduce the defect rate of the wafer.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor wafer and a method for processing the same according to the present invention will be described in detail based on embodiments. In the following examples and comparative examples, a GaAs wafer was used as an example of a semiconductor wafer.

EXAMPLE A GaAs single crystal is sliced and processed to form a circular Ga having a diameter of 3 inches and a thickness of 550 μm, as shown in FIGS. 1 (a) and 1 (b).
Fifty As wafers 10 were produced. Next, these wafers 10 are cleaved along the alternate long and short dash lines in FIG. 2A to form cleavage planes 12 on the outer periphery of the wafer 10 as shown in FIGS. 2A and 2B. Thus, an orientation flat was formed. Then, FIG. 3A and FIG.
As shown in (b), the corners of the orientation flat were chamfered using a chamfering machine to form chamfered portions 14. In this chamfering process, as shown in FIG. 4, a jig having an angle of 22 degrees between the surface of the wafer 10 and the chamfered portion 14 is used to reduce the thickness of the cleaved surface 12 to a thickness of 3 degrees.
Chamfering was performed so as to leave only 00 μm.

The wafer 10 thus chamfered was subjected to processes such as pasting, primary polishing, finish polishing, peeling, cleaning, and inspection, and chipping of the orientation flat and cracking of the wafer were examined.
No damage such as chipping or cracking was observed. Also,
It has been found that the chamfering of the corners of the orientation flat as in the present embodiment can reduce the defect rate of the wafer to 0.5%.

When the deviation from the crystal orientation of the orientation flat was measured by the X-ray diffraction method, the average was 0.6 seconds and the standard deviation was 7.1 seconds for 50 parameters.

In this embodiment, both the front side corner and the back side corner where the cleavage plane 12 of the wafer 10 is perpendicular to the front and back surfaces of the wafer 10 are chamfered, but only one of these corners is chamfered. May be chamfered.

Comparative Example 1 After forming an orientation flat on the outer periphery of a wafer by the same method as in the example, the same process as in the example is performed on the wafer that is not chamfered to prevent chipping of the orientation flat and cracking of the wafer. Inspection revealed that about 3% of the orientation flat was damaged (chipping, cracking).

[Comparative Example 2] A GaAs single crystal that had been previously subjected to orientation flat grinding was sliced and processed, and then ground and chamfered over the entire circumference of the wafer including the orientation flat portion. The same process as in the embodiment is performed on the wafer machined in this manner,
Examination of the orientation flat for chipping and wafer cracking revealed that the orientation flat was not damaged (chipping or cracking). However, when the deviation from the crystal orientation of the orientation flat was measured by the X-ray diffraction method, an average of 27 seconds was obtained with 50 parameters.
The standard deviation was 3 minutes and 35 seconds.

[0020]

As described above, according to the present invention, after the wafer is cleaved, the cleaved surface of the wafer is in contact with the front and back surfaces of the wafer so that a part of the cleaved surface of the wafer remains by a predetermined thickness. By chamfering at least one of the front-side corner and the back-side corner forming a right angle to form an orientation flat on the outer periphery of the wafer, the accuracy of the discrimination of the crystal orientation and alignment of the wafer by the orientation flat is reduced. In addition, it is possible to prevent the wafer from being damaged such as chipping or cracking during the processing of the wafer, and to reduce the defect rate of the wafer.

[Brief description of the drawings]

FIGS. 1A and 1B are diagrams illustrating steps in a semiconductor wafer processing method according to an embodiment of the present invention. FIGS. 1A and 1B are a plan view and a thickness direction of a semiconductor wafer obtained by slicing, respectively. It is the expanded sectional view.

FIGS. 2A and 2B are views for explaining steps in an embodiment of a method for processing a semiconductor wafer according to the present invention, wherein FIGS. FIG.

FIGS. 3A and 3B are diagrams illustrating steps in a semiconductor wafer processing method according to an embodiment of the present invention, wherein FIGS. 3A and 3B are a plan view and a cross-sectional view enlarged in a thickness direction of the semiconductor wafer after chamfering, respectively. FIGS. FIG.

FIG. 4 is a diagram schematically showing a chamfered portion of a cleavage plane in an embodiment of the semiconductor wafer processing method according to the present invention.

[Description of Signs] 10 semiconductor wafer 12 cleavage plane 14 chamfer

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yoshikuni Matsuzaki 1-8-2 Marunouchi, Chiyoda-ku, Tokyo F-term in Dowa Mining Co., Ltd. 3C049 AA02 CA02 CA05 CB01

Claims (6)

[Claims] At least one of a front side corner and a back side corner, which is a portion where a cleavage plane formed on the outer periphery of a semiconductor wafer and the front and back surfaces of the semiconductor wafer intersect, has a part of the cleavage plane predetermined. A semiconductor wafer characterized by being chamfered so as to remain by the thickness of the semiconductor wafer. 2. The semiconductor wafer according to claim 1, wherein at least one of the front side corner and the back side corner is chamfered over the entire length. 3. The semiconductor wafer according to claim 1, wherein the predetermined thickness is １ ／ to 9/10 of a thickness of the semiconductor wafer. 4. A semiconductor wafer is cleaved to form a cleaved surface on the outer periphery thereof, and at least one of a front side corner and a back side corner which is a portion where the cleaved surface intersects the front and back surfaces of the semiconductor wafer. A method for processing a semiconductor wafer, wherein chamfering is performed so that a part of the cleavage plane remains by a predetermined thickness. 5. The method of processing a semiconductor wafer according to claim 4, wherein chamfering is performed over at least one entire length of the front side corner and the back side corner. 6. The processing of a semiconductor wafer according to claim 4, wherein the predetermined thickness is 1/2 to 9/10 of the thickness of the semiconductor wafer. Method.