JP2001338899A - Method for manufacturing semiconductor wafer and semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer having a very small region of a peripheral sag or not having the peripheral sag at all. SOLUTION: A method for manufacturing the semiconductor wafer comprises the steps of slicing a semiconductor ingot to wafers, at least chamfering the wafer, flattening the wafer, primarily polishing the wafer and finish polishing the wafer in such a manner that a diameter of the wafer before the primary polishing is larger than that of a product wafer. The method further comprises the steps of radially contracting and chamfering the wafer by removing a peripheral part of the wafer up to the diameter of the product before the finish polishing. The ingot is preferred to have a diameter larger by 2 mm than that of the product. In the method, the ingot having a diameter larger by 2 mm than that of the product is sliced, a diameter of the wafer before the primary polishing is larger by 1 mm or more than that of the product, and a surface of the wafer before the radially contracting and the chamfering of the wafer is coated with a protective film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor wafer and a method for manufacturing the same, and more particularly, to a method for manufacturing a semiconductor wafer having almost no peripheral sag.

[0002]

2. Description of the Related Art As a general method for manufacturing a mirror surface wafer used as a raw wafer for manufacturing a semiconductor device, first, a semiconductor ingot is grown by a Czochralski method or the like, and a wafer obtained by slicing the semiconductor ingot is obtained. It is known that a mirror surface wafer is formed by sequentially performing processes such as chamfering, flattening (lapping or surface grinding), etching, and surface polishing.

FIG. 3 is a flow chart showing a process of manufacturing a conventional general mirror surface wafer. A semiconductor single crystal grown slightly thicker than a desired product diameter is cylindrically ground to obtain a cylindrical ingot. This is sliced into a wafer, subjected to rough chamfering, lapping and etching, and then the chamfered portion is mirror-chamfered. Further, at least one principal surface of the wafer can be mirror-finished by a two-step or three-step surface polishing step to obtain a mirror-finished wafer.

When a semiconductor device is manufactured by forming a circuit on the surface of a mirror-finished wafer obtained through such a process, it is desirable to obtain as many devices as possible from a single wafer. In particular, it is required that the shape be as flat as possible near the outer peripheral end. In other words, according to the current standard, high flattening may be performed in a region excluding a certain region (for example, 3 mm in outer periphery) from the outer peripheral end of the wafer. A wafer having a high flatness is being demanded.

The polishing of the surface in the process of manufacturing the mirror-finished wafer is usually performed in two or three steps as described above. That is, after the primary polishing is performed with a polishing allowance of about several μm to several tens of μm to make the surface more flat and mirror-finished, the secondary polishing is performed as necessary, and further, the final polishing is performed with a slight polishing allowance. By doing so, a mirror-finished wafer can be obtained.

In general, when polishing, a wafer is attached to a carrier plate (mount plate) made of glass or ceramic via wax or the like, or the wafer is evacuated to a holding plate provided with a large number of through holes. The wafer is held by suction and pressed against the surface plate on which the polishing cloth is stuck while rotating the wafer relatively, and the slurry is supplied between the polishing cloth and the wafer to perform polishing.

[0007] The flatness of a wafer manufactured by the above-described process is substantially determined by the primary polishing. FIG.
1 schematically shows a cross section of a peripheral portion of a wafer after primary polishing. During the primary polishing, the peripheral portion of the wafer 1 is excessively polished as compared with the central portion, and so-called peripheral sagging 4 occurs in the peripheral portion near the chamfered portion 3 on the polishing surface 2 side.
This peripheral sag 4 occurs in a region about 5 mm from the outer peripheral end of the wafer regardless of the product diameter, and the thickness of the wafer is 0.1 to 0 in a region about 2 mm from the outer peripheral end of the wafer as compared with the central part of the wafer. In many cases, the thickness is reduced by about 2 μm. Such peripheral sagging deteriorates rapidly as approaching the outer peripheral end, and particularly worsens from about 2 mm from the outer peripheral end, and particularly drops sharply from about 1 mm.

In recent years, extremely high flatness has been demanded in the production of high-precision devices. For example, a portion which is about 0.1 to 0.2 μm lower than the central portion of the wafer cannot be used. And the area is desired to be as small as possible. For example, it is desired that the area of the sagging outside the standard is set to 3 mm from the outer peripheral end in the normal standard, 2 mm in recent years, and preferably 1 mm or less.

The cause of the peripheral sagging is that the peripheral portion touches a newer abrasive than the central portion of the wafer, or the wafer is polished in a state where the wafer sinks into the polishing cloth due to the compression elasticity of the polishing cloth. Therefore, the polishing pressure in the peripheral portion due to the compression elasticity of the polishing cloth is high. Due to these various factors, during the primary polishing, the peripheral portion is excessively polished from the central portion of the wafer, and peripheral sag occurs.

[0010] As a method of suppressing the peripheral sag, when a wafer is vacuum-adsorbed by a holding plate to perform single wafer polishing, for example, a retainer ring protruding from the holding surface by the thickness of the wafer from the holding surface to the outer periphery of the holding plate. A method has been proposed in which excessive polishing is suppressed by providing a jig referred to as a reference, or using a holding plate having a smaller diameter than the wafer to float the peripheral portion of the wafer. Further, a method in which a retainer ring and a small-diameter holding plate are combined has been proposed as in Japanese Patent Application Laid-Open No. 8-257893.

[0011]

However, the peripheral sag generated by the primary polishing strongly depends on the compression elasticity of the polishing cloth used for polishing, and even if the improved holding plate is used, the peripheral sagging occurs. It was virtually impossible to prevent them completely. In particular, it is very difficult to make the peripheral sag area within 2 mm from the outer peripheral edge required in recent years, and it has not been possible to manufacture a wafer with the peripheral sag suppressed to within 1 mm.

Although there are various standards for the flatness of a mirror-finished wafer, such as those evaluated on the entire surface of the wafer or on local divisions, when the flatness is evaluated with the worst value of the measured values, If peripheral sagging occurs, there is a problem that the entire wafer is regarded as defective.

The present invention has been made in view of the above problems, and has as its main object to provide a semiconductor wafer having a very small peripheral sag area or no peripheral sag.

[0014]

According to the present invention, a semiconductor ingot is sliced into a wafer, and the wafer is subjected to at least chamfering, flattening, primary polishing, and finish polishing. In the method for manufacturing a semiconductor wafer by means of the method, the diameter of the wafer before the primary polishing is made larger than the product diameter, and after the primary polishing of the wafer, the reduced diameter chamfering to remove the peripheral portion of the wafer to the product diameter before the final polishing. There is provided a method for manufacturing a semiconductor wafer, wherein the method is performed.

After the primary polishing is performed on a wafer larger than the product diameter as described above, a diameter reduction chamfering process for removing a peripheral portion of the wafer to the product diameter is performed to reduce a peripheral sag area generated by the primary polishing. Alternatively, it can be completely removed. Further, by performing at least finish polishing after performing the diameter-reduced chamfering process, a semiconductor wafer having excellent flatness and excellent surface characteristics even in the peripheral portion of the wafer can be obtained.

In this case, the diameter of the wafer before the primary polishing is
It is preferable that the diameter is at least 1 mm larger than the product diameter (claim 2). If the diameter of the wafer before the primary polishing is larger than the desired product diameter by 1 mm or more, after the primary polishing,
The diameter can be reduced by at least 0.5 mm from the outer peripheral end of the wafer, and particularly the region near the outermost periphery where the drop is sharp can be completely removed.

As described above, the method for making the diameter of the wafer before the primary polishing larger than the product diameter can be adjusted by the semiconductor ingot before slicing. Specifically, the diameter of the semiconductor ingot is It is preferably larger than the diameter by at least 2 mm (claim 3). A wafer obtained by slicing such a thick ingot is also 2 m longer than the product diameter.
m or more, but the diameter of the wafer is usually reduced by about 1 mm in the chamfering process after slicing.
mm or more. Therefore,
To further increase the wafer diameter before primary polishing,
The diameter of the ingot to be sliced may be further increased.

The diameter reducing chamfering process according to the present invention preferably includes a removing chamfering step for substantially removing the peripheral portion of the wafer and a mirror chamfering step for polishing the chamfered surface after the removal chamfering. ). The diameter of the wafer after the primary polishing is not substantially different from the diameter of the wafer before the polishing, and is larger than the product diameter in the present invention. Therefore, if the peripheral part of the wafer is first roughly removed to obtain a substantially product diameter and standard shape, and then the chamfered surface is mirror-polished, the diameter can be reduced efficiently and the processing damage caused by the removal chamfering can be achieved. And the generation of particles from the chamfered portion can be effectively prevented.

Further, in the present invention, it is preferable to perform secondary polishing after primary polishing, before or after diameter reduction chamfering processing. By performing the secondary polishing after the primary polishing as described above, the final polishing is performed and the polishing is performed in three stages, so that a mirror-finished wafer having excellent surface characteristics can be finally obtained. In particular, since there is a possibility that minute scratches (scratch) may be generated on the surface due to the reduced diameter chamfering process, the secondary polishing and the final polishing are sequentially performed after the reduced diameter chamfering process, so that a mirror surface wafer having excellent surface characteristics is surely obtained. be able to.

In the present invention, it is preferable that at least the polished surface of the wafer is coated with a protective film before the diameter reducing chamfering, and the protective film is removed after the diameter reducing chamfering. As described above, the surface of the primary polished wafer may be slightly scratched by the reduced diameter chamfering process. Therefore, it is necessary to coat a protective film on at least the polished surface of the wafer before the reduced diameter chamfering process. Thus, generation of surface scratches can be prevented.

Further, according to the present invention, there is provided a semiconductor wafer manufactured by the above method (claim 7). The semiconductor wafer manufactured according to the present invention has a very small peripheral sag area and maintains flatness near the outer peripheral edge. Therefore, if this is used as a raw material wafer for producing a semiconductor device, a circuit can be formed up to the vicinity of the outer peripheral end portion, and more devices can be produced from one wafer.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described more specifically with reference to the drawings, but the present invention is not limited thereto. FIG. 1 is a flowchart showing an example of a process for manufacturing a semiconductor wafer according to the present invention.

First, a semiconductor single crystal grown from a raw material melt such as silicon by a Czochralski method (CZ method) or a floating zone melting method (FZ method) is formed into a cylindrical ingot by cylindrical grinding. In the present invention, an ingot having a diameter larger than that of a conventional ingot is manufactured (A).

In the case of the conventional wafer manufacturing process as shown in FIG. 3, the ingot diameter after cylindrical grinding is the final product in consideration of the chamfered portion due to rough chamfering after slicing and the portion removed by etching or the like. Usually, the wafer is manufactured so as to be about 1 mm larger than the diameter of the mirror-finished wafer. However, in the present invention, in addition to the chamfering after slicing, the wafer is also reduced in diameter after chamfering after primary polishing. Then, cylindrical grinding is performed so as to form a thicker ingot.

That is, it is necessary that the diameter of the ingot after the cylindrical grinding is larger than the diameter of the wafer of the final product by at least the chamfer after slicing and the diameter reduction by the chamfering after the primary polishing. Specifically, the diameter of the ingot is preferably larger than the diameter of the mirror-finished wafer (product diameter) by 2 mm or more. 2m from product diameter
If the ingot is thicker than m, even if the diameter of the wafer is reduced by about 1 mm in the chamfering process after slicing, the diameter can be reduced by at least 1 mm in the reduced diameter chamfering process after the primary polishing. Of these, a suddenly dropped portion near the outermost periphery can be reliably removed.

In this case, when it is desired to further increase the diameter of the wafer before the primary polishing and to increase the removal amount of the peripheral portion of the wafer, a larger diameter cylindrical ingot can be manufactured by adjusting a margin for cylindrical grinding of the ingot. I just need. If the diameter is not enough by adjusting the allowance for cylindrical grinding,
The diameter of the semiconductor ingot originally grown by the CZ method or the FZ method may be increased.

Next, the produced large-diameter ingot is sliced into a wafer (B), and the obtained wafer is subjected to rough chamfering (C) and flattening (D) such as lapping and surface grinding. Here, a case where wrapping is performed will be described. These processes are not particularly limited, and can be performed in the same manner as in the related art.
Any method may be used as long as it is a commonly used method. Usually, after lapping, etching is performed in order to remove processing strains and the like on the wafer surface.

After roughening, lapping and etching the wafer, primary polishing is performed (E). In the primary polishing, as in the prior art, a batch type in which a plurality of wafers are attached to a plate of glass or the like via wax or the like and polished, or a wafer is vacuum-adsorbed to a holding plate provided with a plurality of through-holes.
Any of a single-wafer polishing method for polishing each sheet and the like can be performed. The polishing allowance in the primary polishing is usually about several μm to about several tens of μm, but the polishing allowance in the peripheral portion of the wafer is larger than that in the central portion due to various reasons such as a difference in polishing pressure as described above. Therefore, peripheral sag occurs.

FIG. 2 shows the change in the shape of the peripheral portion of the wafer measured by the present inventor after the primary polishing was 10 mm from the outer peripheral edge.
3 is a graph shown with reference to the position of. According to this graph, it can be seen that the drop starts around 5 mm inward from the outer peripheral end, and that the peripheral sag occurs, and that the drop becomes steeper toward the outer peripheral end. Note that a region of about 0.5 mm from the outer peripheral end is a chamfer.

In the present invention, after the wafer having a diameter larger than the product diameter is primarily polished, a reduced diameter chamfering process for removing the peripheral portion of the wafer having the peripheral sag to the product diameter is performed (F). By such a reduced diameter chamfering process, it is possible to remove a peripheral sag generated in a peripheral portion of the wafer. As a method of removing the peripheral portion of the wafer to the product diameter, a conventional ordinary chamfering device can be used.

For example, assuming that the diameter of the wafer before the primary polishing is 1 mm larger than the diameter of the product, the diameter is 0.1 mm from the outer peripheral end.
The inside of 5 mm, that is, the chamfered portion is removed by a chamfering device, and the diameter is reduced to a product diameter. In this case, a removal chamfering step of substantially removing a peripheral portion of the wafer;
It is preferable to perform the processing separately in a mirror chamfering step of polishing the chamfered surface after the removal chamfering. In other words, if the peripheral part of the wafer is roughly chamfered to have a shape of approximately product diameter and standard, and then the chamfered surface is mirror-polished, the diameter can be reduced efficiently and the processing damage caused by the removal chamfering And the generation of particles from the chamfered portion can be effectively prevented. The mirror chamfering can be performed by etching in addition to a method of polishing with a polishing cloth while supplying a polishing slurry. Further, after the removal chamfering, etching for distortion removal may be performed, and further, mirror chamfering using a polishing cloth may be performed.

The reduced diameter chamfered wafer has a desired product diameter, and the peripheral sag is substantially reduced by the amount removed. For example, in the above-described example, the peripheral sag is reduced by an area of about 0.5 mm over the entire periphery as compared with the conventional wafer having the product diameter at the time before the primary polishing, so that the peripheral sag changes particularly sharply. It is possible to obtain a wafer having no part. As a result, FIG.
When 1mm diameter reduction chamfering is performed on the wafer, the outer circumference is 2m
According to the standard excluding m, the amount of improvement of the peripheral sag is about 0.3.
There is also 04 μm. Further, although not shown in FIG. 2, at a position 1 mm from the outer peripheral end, the thickness is smaller by about 0.7 μm than at the center of the wafer. Therefore, in the standard excluding the outer circumference of 1 mm, which will be required in the future, even if the diameter is reduced to 1 mm, the amount of improvement of the peripheral sag is remarkably improved to 0.4 to 0.5 μm. As the standard becomes stricter in this way, the effect of reducing the diameter of the chamfer is obtained.

The peripheral sag is usually 5 m from the outer peripheral end.
Although it occurs around the inside of m, as can be observed in FIG. 2, it often drops suddenly from around 2 mm inside from the outer peripheral end. Therefore, in order to further increase the amount of diameter-reduced chamfering, for example, primary polishing is performed as a wafer 3 mm larger than the product diameter, and then the peripheral portion of the wafer including the chamfered portion is removed by 1.5 mm, and then the chamfered by 0.5 mm width. By forming the portion, it is possible to reliably remove the 2 mm-wide peripheral sagging that has sharply dropped after the primary polishing. In addition, if only the peripheral portion where the drop is particularly severe is removed in this way, there is an advantage that the material is not wasted, and a mirror-surface wafer with little peripheral sag can be manufactured at low cost.

Further, if the diameter of the wafer before the primary polishing is set to be 9 mm larger than the product diameter, 4.5 mm of the peripheral portion can be substantially removed by the diameter reduction chamfering processing to obtain the product diameter. Since the chamfered portion is formed up to 0.5 mm from the outer peripheral end of the removed wafer, the wafer surface excluding the chamfered portion can be a flat wafer without any peripheral sag.

As described above, in the present invention, the diameter of the wafer before the primary polishing is set to be larger than the product diameter, for example, from 1 mm to 9 mm, and the wafer is reduced in diameter and chamfered, so that the wafer has little or no peripheral sag. It can be. Since the range in which the peripheral sag occurs due to the difference in the primary polishing conditions is slightly different, the diameter of the wafer before the primary polishing is not limited to the above range, and may be appropriately adjusted according to the required product standard. do it.

As described above, the conventional chamfering apparatus can be used for the reduced diameter chamfering process. However, when the wafer is held, the polished surface may be chucked to cause minute scratches. Since there is a possibility that scratches may occur on the surface that has been primarily polished by the generated grinding swarf or polishing swarf, etc., coat the protective film on at least the polished surface of the wafer before diameter reduction chamfering, and after the diameter reduction chamfering It is preferable to remove the protective film. The material of the protective film is not particularly limited as long as it can be uniformly coated on the wafer surface, functions as a protective film, and can be easily removed after the chamfering process. For example, a resin such as wax or polyvinyl butyral (PVB), an adhesive sheet used as masking, or the like can be used. These resins and sheets can be easily removed by washing, heating, peeling, or the like after the chamfering with the reduced diameter.

After the diameter-reduced chamfering, a finish polishing is performed to obtain a mirror-finished wafer, but a secondary polishing may be performed before the finish polishing (G). The secondary polishing is performed for the purpose of improving the surface roughness and removing polishing scratches and damage, and the polishing allowance is 1 μm.
Hereinafter, the process is performed at most several μm or less. The secondary polishing can be performed before the diameter-reduced chamfering.However, the polishing surface of the wafer may be damaged during the diameter-reduced chamfering process. Surface flaws can be reliably removed.

After the secondary polishing is performed as required as described above, the final polishing is performed (H). In the final polishing, there is almost no polishing allowance, but haze can be removed to complete a mirror-finished wafer.

The mirror surface wafer manufactured as described above is
Having a desired product diameter and excellent flatness over the entire wafer surface, especially near the outermost periphery, there is no peripheral sag that suddenly falls into the flatness measurement area, significantly improving the yield rate of the wafer. be able to. In addition, by using such a wafer, a circuit can be formed on the entire surface, and the productivity of semiconductor devices can be improved. Further, in the method according to the present invention, the apparatus used in the conventional mirror-surface wafer manufacturing process can be used as it is, and there is no need to add another apparatus, so that a mirror-surface wafer having excellent surface characteristics can be easily manufactured at low cost. Can be manufactured.

The present invention is not limited to the above embodiment. The above embodiment is merely an example, and has substantially the same configuration as the technical idea described in the claims of the present invention, and has the same function and effect,
Anything is included in the technical scope of the present invention.

For example, the wafer manufacturing process according to the present invention described in the above embodiment is merely an example, and it goes without saying that cleaning can be appropriately performed between each process. Also, as in the conventional manufacturing process, some of the processes can be replaced, omitted, or added. For example, replacement of rough chamfering and lapping, omission of secondary polishing, addition of a heat treatment step after lapping, or etching before primary polishing can also be performed. Also, surface grinding or the like can be performed instead of lapping. Needless to say, the present invention can be applied to both single-side polishing and double-side polishing.

There is no limitation on the material and size of the wafer in practicing the present invention, and it is possible to manufacture semiconductor wafers of silicon, GaAs, GaP, InP and the like having a diameter currently manufactured, as well as in the future. The present invention can be applied to a very large wafer.

[0043]

As described above, in the present invention, an ingot manufactured so that the diameter of the wafer before the primary polishing is larger than the product diameter is sliced into a wafer, and after the primary polishing of the wafer, the wafer is reduced to the product diameter. By performing the diameter-reduced chamfering process to remove the peripheral portion, a mirror-polished wafer with little peripheral droop or no peripheral droop can be manufactured. Such a mirror-finished wafer has a desired product diameter and is excellent in flatness over the entire surface, particularly near the outer peripheral end, so that a circuit can be formed on the entire surface and the productivity of semiconductor devices is improved. Can be done.

[Brief description of the drawings]

FIG. 1 is a flowchart showing an example of a process for manufacturing a mirror-finished wafer according to the present invention.

FIG. 2 is a graph showing a shape change of a peripheral portion of a wafer measured after primary polishing.

FIG. 3 is a flowchart showing an example of a process for manufacturing a conventional mirror-finished wafer.

FIG. 4 is a schematic partial sectional view showing a peripheral portion of a wafer after primary polishing.

[Explanation of symbols]

1 ... wafer, 2 ... polished surface, 3 ... chamfered part, 4 ...
Surrounding dripping.

Claims (7)

[Claims] 1. A method for producing a semiconductor wafer by slicing a semiconductor ingot into a wafer and subjecting the wafer to at least chamfering, flattening, primary polishing, and finish polishing, wherein a diameter of the wafer before the primary polishing is provided. A diameter smaller than the product diameter, and performing a diameter reduction chamfering process to remove a peripheral portion of the wafer to the product diameter after the primary polishing and before the final polishing. 2. The wafer according to claim 1, wherein the diameter of the wafer before the primary polishing is larger than the diameter of the product by 1 mm or more.
3. The method for producing a semiconductor wafer according to item 1. 3. The method for manufacturing a semiconductor wafer according to claim 1, wherein the diameter of the semiconductor ingot is larger than the product diameter by 2 mm or more. 4. The reduced diameter chamfering process includes a removal chamfering step for substantially removing a peripheral portion of the wafer and a mirror chamfering step for polishing a chamfered surface after the removal chamfering. A method for manufacturing a semiconductor wafer according to claim 3. 5. The method for manufacturing a semiconductor wafer according to claim 1, wherein a secondary polishing is performed after the primary polishing and before or after the diameter reduction chamfering process. 6. A protective film is coated on at least the polished surface of the wafer before the diameter reducing chamfering process,
6. The method for manufacturing a semiconductor wafer according to claim 1, wherein the protection film is removed after the diameter reduction chamfering. 7. A semiconductor wafer manufactured by the method according to claim 1. Description: