JP2001168114A - Semiconductor suction collet and die bond device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To confirm the relative positional relation of a semiconductor chip with a collet from the outside in a state that the collet is covered with a semiconductor chip. SOLUTION: This semiconductor suction collet is provided with a tapered part constituted of plural tapered faces forming a suction space for sucking a semiconductor chip from an opening, an air passage for depressurizing the suction space, and a notched windows formed at the corner of the suction space of the notches of the two adjacent taper faces through which the upper and both side faces of the upper corner of the semiconductor chip corner are exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor adsorption collet and a die bonding apparatus, and more particularly, to an improvement of a semiconductor adsorption collet for vacuum-adsorbing and transferring a semiconductor element.
Further, the present invention relates to a die bonding apparatus using the semiconductor adsorption collet.

[0002]

2. Description of the Related Art FIG. 12 is a perspective view showing a shape of a bonding collet used in a conventional automatic die bonding apparatus (automatic die bonder). In the figure, 1 is a collet, 50, 51, 52, and 53 are tapered surfaces, and a tapered portion is formed by two sets of opposed tapered surfaces. Reference numeral 7 denotes an air passage provided in the axial direction near the center of the apex of the truncated pyramid space formed by the tapered portion.

The collet 1 is for transferring semiconductor chips (pellets) obtained by dicing a semiconductor wafer, and the inside of the collet 1 is depressurized from the air passage 7 by using a decompression means, so that each taper is formed. The semiconductor chip can be vacuum-sucked while performing positioning by the surface.

FIG. 13 is a perspective view showing a state where the collet 1 sucks the semiconductor chip 2. As shown in FIG. The die bonding apparatus includes a pre-alignment (pre-centering) means for positioning the semiconductor chip 2 with an approximate accuracy.
The semiconductor chip to be transferred is previously aligned on a pre-alignment table (pre-centering table). From above the semiconductor chip 2, the collet 1 with the opening downward is lowered and sucked. That is, the collet 1 is moved so as to cover the semiconductor chip 2, and the semiconductor chip 1 is sucked.

At this time, positioning is performed by contact between the upper corners of the semiconductor chip 2 (ie, the four ridges formed by the upper surface and the side surfaces) and the inner surface of the tapered portion of the collet 1. The mechanical principle is that the vertical force of the collet 1 is converted into the force of sliding the semiconductor chip 2 in the XY plane direction by the tapered surfaces 50, 51, 52, and 53, and finally the four tapered surfaces. The surface and the upper four corners of the semiconductor chip 2 are in contact with each other. Therefore, the relative position of the semiconductor chip 2 with respect to the collet 1 is determined at the position where the four line contact portions have good mechanical balance, and X
Accurate positioning can be performed with respect to the −Y direction position and the θ rotation direction on the XY plane.

[0006] When the positioning is completed, the collet 1 moves up, the semiconductor chip 2 is transferred to the bonding table, and transferred and mounted on a mounting member such as a substrate on the bonding table. Here, if the collet 1 starts the ascending operation before the positioning is completed, high-precision die-bonding cannot be obtained. For this reason, the collet 1 is raised after a predetermined positioning time, that is, a time from the start of the suction of the semiconductor chip 1 to the stabilization of the mechanical balance has elapsed.

[0007]

In the conventional automatic die bonding apparatus, the relative positional relationship between the semiconductor chip 2 and the collet 1 cannot be confirmed from the outside while the collet 1 covers the semiconductor chip 2. It was difficult to adjust these relative positions. Depending on the degree of the deviation of the relative position, the semiconductor chip 2 is transferred in an inclined state, and there has been a problem that high-precision die bonding cannot be performed.

The positioning time by the collet 1 is
It may be affected by the deviation of the relative position. For this reason, when it is difficult to adjust the relative position, it is also difficult to adjust the waiting time for positioning by the collet 1, and there is a problem that high-precision die bonding cannot be performed.

Furthermore, the corners (ie, four ridges formed by two adjacent side surfaces) of the semiconductor chip 2 after dicing are brittle, so that the semiconductor chip 2 comes into contact with the collet 1 and the sliding resistance when sliding in the lateral direction. At the four corners formed by the tapered portions 4 and 5 of the bonding tool 1,
There is a problem that the corners of the semiconductor element 2 are liable to be broken such as chip and crack.

[0010] Here, Japanese Utility Model Application No. 1-55604 (Japanese Utility Model Application Laid-Open No. 2-14631) discloses a bonding collet for the purpose of improving the positioning accuracy of a semiconductor chip and preventing the corner thereof from being damaged. is there. In this bonding collet, the pyramid portion is constituted by a first tapered surface, a support surface parallel to the upper surface of the semiconductor chip, and a second tapered surface in that order from the outside, and a square of the first tapered surface is cut out. It is configured.

The bonding collet is for bringing an unused area irrelevant to the integrated circuit of the semiconductor chip into contact with the support surface to improve the horizontal accuracy at the time of positioning, and the cutout portion has a first tapered surface. Is formed only in
Therefore, with the collet covering the semiconductor chip,
The position of the semiconductor chip cannot be confirmed. Also,
Since the bonding collet comes into contact with the corner of the semiconductor chip, the corner of the semiconductor chip, particularly the upper corner of the corner (that is, the top of the upper end of the corner formed by the three adjacent side surfaces and upper surface)
There was a problem such as breakage.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor adsorption collet which facilitates adjustment of a die bonding apparatus and the like. , The alignment adjustment of the semiconductor chip by pre-alignment means,
Another object is to realize a die bonding apparatus that facilitates adjustment of positioning time and the like.

It is another object of the present invention to provide a semiconductor adsorption collet or die bonding apparatus that prevents or reduces damage to a semiconductor chip. In particular, an object of the present invention is to provide a semiconductor suction collet or the like that prevents damage to the upper end of a semiconductor chip corner.

It is another object of the present invention to provide a die bonding apparatus capable of performing high-precision, high-quality die bonding.

[0015]

According to the present invention, there is provided a semiconductor suction collet comprising a plurality of tapered surfaces forming a suction space for sucking a semiconductor chip through an opening;
An air passage for reducing the pressure of the suction space, and a cutout window formed at the corner of the suction space by the cutout of two adjacent tapered surfaces to expose the upper surface and both side surfaces forming the upper corner of the semiconductor chip corner. It is comprised including. With such a configuration, the three surfaces forming the upper corners of the corners of the semiconductor chip, that is, the two adjacent side surfaces and the upper surface, can be confirmed from the outside, and the corners of the semiconductor device that has been sucked are tapered. Can be transferred without contacting

Further, in the semiconductor adsorption collet according to the present invention, at least one tapered surface constituting the tapered portion is formed as a convex surface having a convex portion in a width direction, and the contact width between the tapered surface and the semiconductor chip is reduced. It is configured to be smaller than the width of the upper corner of the chip.

Further, the tapered portion is composed of two sets of opposing tapered surfaces, and the opposing upper corners of the semiconductor chip to be sucked are brought into linear contact with one set of tapered surfaces, and another set of tapered surfaces is set in the sucking direction. The semiconductor chip is attracted by bringing the other upper corner of the semiconductor chip into point contact with each ridge line.

In the semiconductor adsorption collet according to the present invention, notches are formed at both ends of each tapered surface constituting the tapered portion, and notches having different widths are formed at both ends of at least one tapered surface. .

Further, the semiconductor adsorption collet according to the present invention is configured such that the tapered surface formed as a convex surface has a different taper angle from another tapered surface.

Further, in the semiconductor suction collet according to the present invention, the tapered portion has a first divided main body having at least one tapered surface, another second divided main body having the tapered surface, 1. An airtight member which is interposed between the second tapered portions to maintain the airtightness of the suction space.

Further, a die bonding apparatus according to the present invention includes a pre-alignment means for pre-aligning a semiconductor chip on a pre-alignment table, and the above-mentioned semiconductor suction collet for sucking and transferring the pre-aligned semiconductor chip. With such a configuration, pre-alignment adjustment and the like are facilitated, and highly accurate die bond mounting can be performed.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a view showing an example of a semiconductor suction collet according to the present invention, and shows a front view, a plan view, and a side view when the suction opening is set to the front. In the figure, 1 is a collet, 3 is a notch, 4
Is a cutout window. 50 to 53 are four tapered surfaces forming a tapered portion. Opposing tapered surfaces 5
0 and 51 position the semiconductor chip in the Y direction,
The opposing tapered surfaces 52 and 53 position the semiconductor chip in the X direction.

The collet 1 has a pyramidal suction space (concave portion) formed by a tapered portion, and the semiconductor chip can be sucked from the suction opening by decompression from the air passage 7 formed at the deepest portion. it can. In this embodiment, a cross section parallel to the suction opening is rectangular, and the side thereof becomes shorter, and the suction space ending in a line will be described as an example. The shape of the non-insertion region of the semiconductor chip is not important, and the suction space may be a pyramid, a truncated pyramid, or another shape.

The cutout windows 4 are provided at the corners of the collet (the corners of the suction space) on the suction opening side, and are four viewing windows from which the inside of the suction space can be checked from the outside. Here, the tapered walls forming the tapered surfaces 50 to 53 are:
A cutout window 4 is provided at a corner portion of the collet (that is, an interconnected portion of each tapered surface) by cutting off a predetermined width at both ends connected to each other.
By setting the notch width to be less than the maximum thickness of these tapered walls, the notch window 4 is formed in the suction opening and its peripheral portion where the thickness of the tapered wall is smaller than the notch width.
Can be formed.

FIG. 2 shows that the collet 1 is a semiconductor chip 2
FIG. 3 is a perspective view showing a state when suction is performed. That is,
The drawing shows a state in which the collet 1 is lowered onto the semiconductor chip 2 pre-aligned in advance on the pre-alignment table of the die bonding apparatus and is sucked so as to cover the semiconductor chip 2 from the suction opening.

In this figure, since the notch window 4 is provided at a position higher than the suction position of the semiconductor chip, the corner of the semiconductor chip which is being sucked or is being sucked is cut through the notch window. It can be observed from outside. At this time, a total of three surfaces, that is, the upper surface and the two side surfaces forming the upper corner (the top portion which is the upper end of the corner) of the corner of the semiconductor chip can be observed. In other words, two sides of the upper corner can be observed together with the corner of the semiconductor chip. Also,
The corners (especially the upper corners) of the brittle semiconductor chip 2 can be attracted to the collet 1 without making contact with the inner surface of the collet 1.

Normally, in the die bonding apparatus, the position where the bonding collet 1 descends on the pre-alignment table is fixed, and the position where the semiconductor chip 2 is pre-aligned by the pre-alignment means is adjusted by mechanical adjustment or data input of the centering amount. Can be changed. Therefore, if the position of the semiconductor chip 2 can be confirmed with the collet 1 covered, the pre-alignment position of the semiconductor chip 2 can be easily adjusted, and the pre-alignment position can be accurately adjusted by repeatedly performing fine adjustment. .

Further, by improving the pre-alignment accuracy, the sliding amount of the semiconductor chip 2 due to the contact with the tapered surface during the suction can be reduced.
For this reason, the improvement in the positioning accuracy of the semiconductor chip 2 with respect to the collet 1 after the suction is not limited to the mere improvement in the pre-alignment accuracy, but a higher precision relative positioning can be realized.

Further, since the semiconductor chip 2 can be confirmed with the collet 1 covered, it is easy to adjust the time until the mechanical balance is stabilized, ie, the positioning time. Furthermore, since the positioning time can be shortened by reducing the slide amount at the time of suction,
The positioning accuracy can be improved, or the throughput of the bonding apparatus can be improved.

In this embodiment, an example of a die bonding collet used in a die bonding apparatus has been described.
The present invention can be applied to an apparatus for transferring semiconductor chips by vacuum suction and is not limited to a bonding collet in a die bonding apparatus.

Embodiment 2 In the first embodiment, the case where all the tapered surfaces are formed as flat surfaces has been described, but in the second embodiment, the case where some of the tapered surfaces are not formed as flat surfaces will be described.

FIG. 3 is a view showing another example of the semiconductor adsorption collet according to the present invention. Opposing tapered surfaces 52,
53 is formed as a convex surface having a ridge line in the suction direction by two planes intersecting at a predetermined angle near the center in the width direction. The positioning of the semiconductor chip 2 in the X direction is performed by a point contact (including a fine line contact) at the intersection of the ridge line in the suction direction and the side (upper corner) of the semiconductor chip.

Since the tapered surfaces 52 and 53 are not formed as flat surfaces, the distance between the opposing tapered surfaces is not constant in the width direction of the tapered surface, and only a part of the tapered surface contacts the semiconductor chip for positioning and positioning. Perform the transfer. That is, the contact width between the tapered surfaces 52 and 53 of the semiconductor chip is smaller than the width of the side of the semiconductor chip facing the tapered surfaces 52 and 53. This is effective in reducing the incidence of damage to the semiconductor chip due to contact (particularly, damage at the upper corner side).

The other pair of tapered surfaces 50 and 51 are formed as flat surfaces as in the first embodiment, and the distance between the tapered surfaces is substantially constant in the width direction of the tapered surfaces. In other words, the width of the semiconductor chip is tapered 50, 5
1, and the positioning can be performed with a wide contact line width. Thereby, the tapered surfaces 50, 5
1 can perform not only the positioning in the Y direction but also the θ direction, so that the four tapered surfaces can be used to position the semiconductor chip 1 in the XY direction and in the θ rotation direction on the XY plane. it can. In this case, positioning in the θ rotation direction is performed by the wider taper surfaces 50 and 51, that is, the narrower taper surfaces 52 and 5 are used.
It is desirable that 3 be a convex surface.

In this embodiment, the tapered surface 5
Although the case where 2 and 53 are convex surfaces formed by two planes has been described, the semiconductor adsorption collet according to the present invention is not limited to this. That is, it is sufficient that the tapered surface has a convex portion and the contact width with the semiconductor chip 1 is smaller than the width of the tapered surface. For example, R may be formed on the tapered surface to form a curved surface having smooth convex portions in the width direction. The shape change of each tapered surface in the depth direction (suction direction) of the suction space is important in the present invention, and the inclination of each tapered surface may change in the depth direction.

In this embodiment, the case where the pair of opposing tapered surfaces are both convex has been described.
If at least one of the two tapered surfaces is formed as a convex surface, the above-described effect can be obtained at least for one side of the semiconductor chip.

Further, in the present embodiment, an example has been described in which a ridge is present near the center in the width direction of the tapered surface, but the present invention is not limited to such a case. By adjusting the position of the ridge line, the same effect as that of the third embodiment described below can be obtained.

Embodiment 3 Third Embodiment In a third embodiment, a description will be given of a collet having a different cutout width of a tapered surface used for transferring a semiconductor chip having a restricted contactable range.

FIG. 4 is a view showing an example of a semiconductor chip 2 transferred by a semiconductor suction collet, and shows a semiconductor chip having a light receiving portion used in a contact image sensor or the like. In the figure, reference numeral 20 denotes an outline of the semiconductor chip after dicing, reference numeral 21 denotes a guard ring of a pattern on the semiconductor chip, and reference numeral 22 denotes a linearly arranged light receiving portion.

By arranging such semiconductor chips 2 linearly in the same direction as the arrangement of the light receiving sections 22 and mounting them on a substrate, an image sensor comprising a large number of light receiving sections can be constructed. In this case, it is necessary to reduce the pitch between the light receiving sections 22 on the adjacent semiconductor chips 2,
The light receiving portions 22 located at both ends of the semiconductor chip 2 are laid out close to the dicing line (that is, the outline 20 after dicing).

The scribe line between the outline 20 of the semiconductor chip and the guard ring 21 is an unused area irrelevant to the integrated circuit of the semiconductor chip. For the above-mentioned reason, the non-use area is extremely narrow near the light receiving section 22 at both ends of the semiconductor chip 2, and when the collet 1 is brought into contact with such a section, breakage such as chipping occurs. It is highly likely that the operation of the semiconductor chip 2 will be adversely affected. Conversely, the scribe line is wide in a portion where the light receiving portion 22 is not arranged, and even if breakage such as chipping due to contact of the collet 1 does not cause a problem in operation of the semiconductor element including the light receiving portion.

FIG. 5 is a diagram showing an example of a semiconductor adsorption collet suitable for transferring such a semiconductor chip. The notch width at one end (the lower side in the figure) of the tapered surfaces 52, 53 is the same as the notch width at both ends of the taper surfaces 50, 51, but the notch width at the other end (the upper side in the figure) is It is larger than the notch width.

If the portion having the large notch width is made to correspond to the narrow portion of the scribe line of the semiconductor chip, the tapered surfaces 52 and 53 are formed in the wide portion of the scribe line, that is, the portion where the light receiving element 22 is not laid out. Only contact can be made. Thus, the positioning, suction and transfer of the semiconductor chip by the collet 1 can be performed without bringing the tapered surfaces 50 to 53 into contact with the narrow portion of the scribe line.

In the present embodiment, a collet for transferring a semiconductor chip for an image sensor having a light receiving section has been described as an example, but the present invention is not limited to this. For example, the semiconductor adsorption collet according to the present invention can be applied to the transfer of a semiconductor chip having a limited contactable area or a semiconductor chip having different damages caused by a contact point.

Further, the case where the notch width at one end of the tapered surfaces 52 and 53 is made larger than that at the other end has been described, but the present invention is not limited to this. That is,
Instead of making all the cutouts (eight pieces) of the entire tapered surface equal in width, the cutout width of a part (one or more) is appropriately increased or decreased, so that the tapered surface of the semiconductor chip is reduced. The effect of the present invention of adjusting the contact position to an appropriate position is obtained.

For example, by increasing the notch widths at both ends of the tapered surfaces 52 and 53, it is possible to make contact near the center of the side of the semiconductor chip 2. Further, one of the tapered surfaces 50 and 51 and the tapered portions 52 and 5
A wide cutout may be provided on any one of the surfaces 3. However, the wide cutout may be provided only in one of the tapered portions, and the other cutout may be formed in the XY direction.
This is desirable in that accurate positioning can be performed in the θ rotation direction on a plane.

Embodiment 4 In the fourth embodiment, a semiconductor adsorption collet having a different taper angle for each of the opposing tapered surfaces will be described.

FIGS. 6 to 8 are image sectional views for explaining the mechanical relationship when the collet 1 contacts the semiconductor chip and the semiconductor chip is positioned. 1 in the figure
Is a collet, 2 is a semiconductor chip, 6 is a pre-alignment table of, for example, a die bonding apparatus, and φa and φb are angles between the axial center line of the collet 1 and the tapered surface.
Fd is the force of the bonding tool descending from above, Fs is the force of the collet 1 contacting the semiconductor chip 2 and trying to slide the semiconductor chip 2 in the lateral direction, Fp
Indicates a force applied to the semiconductor chip 2 in the downward direction at this time.

As shown in FIG. 6, when a downward force Fd is applied to the collet 1, a force Fs for sliding the semiconductor chip 2 in the lateral direction is generated. Then, the force Fs in the sliding direction is canceled when the semiconductor chip 2 comes into contact with both opposing tapered surfaces, so that the opposing taper angles φa are equalized as shown in FIG.

FIG. 8 shows the angle φa of FIG. 7 as the taper angle.
FIG. 9 is a diagram showing a case where an angle φb smaller than the above is adopted. By reducing the taper angle, the pressing force Fp can be reduced, and the force Fs in the sliding direction can be increased.

FIG. 9 is a diagram showing an example of a semiconductor adsorption collet according to the present invention. Φx in the drawing is a taper angle between the axial center line of the collet 1 and the tapered surfaces 52 and 53;
φy is the axial center line of the collet 1 and the tapered surface 50,
51, and the taper angle φx is larger than φy.

That is, in this collet, the taper angle φx of the tapered surfaces 52 and 53 is smaller than the taper angle φy of the tapered surfaces 50 and 51 in the collet of FIG. It was done.

As described above, the narrower tapered surface 5
2, 53 are convex surfaces, and wider taper portions 50, 5
In the case of performing the positioning in the θ rotation direction by 1, the positioning by the tapered surfaces 50 and 51 is relatively stable because the positioning is performed by a long range of line contact.
Since the positioning by 53 is performed by point contact or minute width contact, it tends to be relatively unstable.

For this reason, the tapered surfaces 52 and 53 having a narrow width are used.
To reduce the taper angle of the X axis, and the positioning force F in the X direction
By making s greater than the force Fs for positioning in the Y direction, the influence of point contact or minute width contact can be adjusted by the taper angle, and the positioning balance in the sliding direction can be improved.

In the present embodiment, an example in which the narrow tapered surface is formed as a convex surface has been described, but the present invention is not limited to this. In the case of a rectangular semiconductor chip, the positioning on the short side tends to be relatively unstable. Therefore, a similar effect can be obtained by reducing the taper angle on the short side.

Further, the present invention is not limited to the case where the semiconductor chip is rectangular. For example, even when the bottom shape is substantially square, there is a priority in the direction in which the semiconductor chip is positioned, and the force for positioning in that direction can be reduced. It can also be greater than the positioning force in another direction.

Embodiment 5 In the fifth embodiment, a structure of a collet that can be disassembled for maintenance will be described.

FIG. 10 is a perspective view showing another example of the semiconductor adsorption collet according to the present invention according to the present invention. In the figure, 11 and 12 are divided main body parts, 13 is an airtight packing, 14
Is an assembly screw. This collet has substantially the same outer shape and outer size as the collet shown in FIG. 1, but has a split structure. That is,
The divided main body parts 11 and 12 are
4 to form a collet.

FIG. 11 is an exploded view showing the components of the collet by disassembling the collet. Split body 1
Reference numeral 1 denotes a component having one tapered surface for positioning a semiconductor chip, and the divided main body 12 is a component including three tapered surfaces. Reference numeral 7 denotes an air passage for vacuum-sucking the semiconductor chip. Packing 13 is divided body 1
When packing 1 and 12 are combined, it is a packing for maintaining airtightness other than the suction opening, the cutout window and the air passage 7, and is divided into two parts so as not to block the air passage 7.

Normally, since the pyramid collet is positioned by bringing the tapered portion into contact with the semiconductor chip, the tapered portion is worn or damaged when used repeatedly. As a result, when the semiconductor chip is mounted on the product in such a state, for example, the positioning of the semiconductor chip by the tapered portion is not performed smoothly, the mounting accuracy is adversely affected.

A worn or scratched tapered portion can be regenerated by polishing. However, since the polishing is not easy due to the structure in which the tapered surfaces face each other, the collet with the scratch is conventionally discarded. I was

By making at least one tapered surface of the collet a structure that can be detached from another tapered surface, that is, a structure that can be disassembled, it becomes easy to grind the tapered surface. For this reason, it is possible to generate a collet whose tapered surface is worn or whose tapered surface is damaged. Further, since the tapered surface can always be in an ideal state, the mounting accuracy of die bonding can be improved. Further, the same collet can be used for a long time, which is economical.

In the present embodiment, an example in which the collet is divided into one tapered surface and three tapered surfaces has been described. However, for example, the collet may be divided into two tapered surfaces.

[0064]

According to the semiconductor suction collet of the present invention, by providing the cutout window, the three surfaces forming the upper corner of the semiconductor chip corner that has been sucked can be confirmed from the outside, and the positioning of the semiconductor chip can be performed. Accuracy can be improved. In addition, the semiconductor device can be transported without bringing the corners of the semiconductor element into contact with the tapered surface, so that damage to the semiconductor chip can be reduced.

Further, since the die bonding apparatus according to the present invention includes the semiconductor suction collet having the cutout window, it is possible to easily adjust the pre-alignment and the like, and to improve the accuracy and the yield of the die bonding.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a semiconductor adsorption collet according to the present invention (Embodiment 1).

FIG. 2 is a perspective view showing a state when the collet shown in FIG. 1 sucks a semiconductor chip.

FIG. 3 is a view showing another example of the semiconductor adsorption collet according to the present invention (Embodiment 2).

FIG. 4 is a view showing an example of a semiconductor chip transferred by a semiconductor suction collet (Embodiment 3).

FIG. 5 is a view showing an example of a semiconductor suction collet suitable for transferring the semiconductor chip shown in FIG. 4;

FIG. 6 is an image sectional view for describing a mechanical relationship when a collet contacts a semiconductor chip and the semiconductor chip is positioned (Embodiment 4).

FIG. 7 is an image sectional view for explaining a mechanical relationship following FIG. 6;

FIG. 8 is an image sectional view for explaining a mechanical relationship following FIG. 7;

FIG. 9 is a view showing an example of a semiconductor adsorption collet according to the present invention.

FIG. 10 is a perspective view showing another example of the semiconductor adsorption collet according to the present invention (Embodiment 5).

FIG. 11 is an exploded view showing each part constituting the collet shown in FIG. 10;

FIG. 12 is a perspective view showing a shape of a bonding collet used in a conventional automatic die bonding apparatus (automatic die bonder).

13 is a perspective view showing a state where the bonding collet shown in FIG. 12 sucks a semiconductor chip.

[Explanation of symbols]

1: Semiconductor adsorption collets 11, 12: Split main body 13: Airtight packing 14: Assembly screw 2: Semiconductor chip 20: Outline 21: Guard ring 22: Light receiving part 3: Notch 4: Notch window 50, 51: Tapered portions for Y direction positioning 52, 53: Tapered portions for X direction positioning 6: Pre-alignment table 7: Ventilation path φx: Tapered angle for X direction positioning φy: Tapered angle for Y direction positioning φa, φb: Opposite 1 Fd: Force to lower the bonding tool Fs: Force to slide the semiconductor chip in the lateral direction Fp: Force to press down the semiconductor chip

Claims (7)

[Claims] 1. A suction device comprising: a tapered portion having a plurality of tapered surfaces forming a suction space for sucking a semiconductor chip from an opening; an air passage for depressurizing the suction space; and a notch between two adjacent tapered surfaces. A semiconductor adsorption collet provided at a corner of a space and having a notch window exposing an upper surface and both side surfaces constituting an upper corner of a semiconductor chip corner. 2. At least one of said tapered portions
2. The semiconductor adsorption collet according to claim 1, wherein the two tapered surfaces are formed as convex surfaces having convex portions in a width direction, and a contact width between the tapered surface and the semiconductor chip is smaller than a width of the upper corner portion of the semiconductor chip. 3. The tapered portion comprises two sets of opposing tapered surfaces, and the opposing upper corners of the semiconductor chip to be attracted are brought into line contact with one set of tapered surfaces, and another one is formed.
2. The semiconductor suction collet according to claim 1, wherein the tapered surfaces of the set are formed as convex surfaces having ridges in the suction direction, and the other upper corner of the semiconductor chip is brought into point contact with each ridge to suck the semiconductor chip. 4. The semiconductor adsorption device according to claim 1, wherein notches are formed at both ends of each tapered surface constituting said tapered portion, and notches having different widths are formed at both ends of at least one tapered surface. Collet. 5. The semiconductor adsorption collet according to claim 2, wherein a tapered surface formed as a convex surface has a different taper angle from another tapered surface. 6. The tapered portion has a first divided main body having at least one tapered surface, another second divided main body having the tapered surface, and first and second tapered pieces. The semiconductor adsorption collet according to any one of claims 1 to 5, comprising an airtight member interposed therebetween to maintain the airtightness of the suction space. 7. A pre-alignment means for pre-aligning a semiconductor chip on a pre-alignment table,
A die bonding apparatus provided with the semiconductor suction collet according to any one of claims 1 to 6, which sucks and transfers the pre-aligned semiconductor chip.