JP2001118987A - Power semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the heat resistant stress characteristics of a power semiconductor module. SOLUTION: In a power semiconductor module, a plurality of power semiconductor elements 1a and 1b are jointed to one insulating substrate 4, and the insulating substrate 4 is jointed/laminated to a base plate 7. A groove 11 for dividing the insulating substrate 4 into plural substrates is formed in the insulating substrate 4. At least one power semiconductor element (1a or 1b) is arranged in the insulating substrate 4, divided by the groove 11. Even if the thermal stress of a junction part with the enlargement of the junction area of the insulating substrate and the base plate becomes large with the junction of the plural power semiconductor elements to one insulating substrate for reducing assembly man-hours and the trouble of parts management, the insulating substrate is cracked and the insulating substrate is separated at the part of the groove or a through hole string before a crack occurs in the junction part or a jointed member is peeled through thermal stress. Thus, a junction area per insulating substrate becomes small and thermal stress becomes small. Thus, the occurrence of the crack and peeling can be prevented, the heat radiation characteristic of the power semiconductor element is maintained, and heat destruction can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power semiconductor module in which a power semiconductor is bonded to an insulating substrate, and the insulating substrate is further bonded to a base plate for lamination. More particularly, the present invention relates to a module having improved thermal stress characteristics.

[0002]

2. Description of the Related Art Power transistors, IGBTs, MOs
2. Description of the Related Art There is known a power semiconductor module (hereinafter, referred to as a power module) in which a power semiconductor element such as an SFET is bonded to an insulating substrate such as a ceramic, and the insulating substrate is further bonded to a base plate and laminated. In some power modules, a plurality of types and / or a plurality of power semiconductor elements are bonded on a single insulating substrate, and the insulating substrate is further bonded to a base plate and laminated.

FIG. 8 shows a structure of a conventional power semiconductor module in which two power semiconductor elements are bonded to one insulating substrate, and the insulating substrate is further bonded to a base plate and laminated. 2 is a top view, and FIG. 2B is a cross-sectional view along line A-A in FIG. In addition, in FIG.
And illustration of the bonding wire 9 are omitted. The two power semiconductor elements 1 are joined by using a joining material 2 such as solder to the upper surface side of an insulating substrate 4 having conductive films 3 and 5 such as copper and aluminum adhered to both surfaces. The insulating substrate 4 has high heat dissipation, high insulation,
A material having a low linear expansion coefficient, for example, a ceramic such as alumina AlN is used. Further, the insulating substrate 4 is joined to the base plate 7 using a joining material 6 such as solder.

The two power semiconductor elements 1 are connected in parallel in order to reduce the load per element, and are connected to the bus bar 8 by bonding wires 9 respectively. In addition, by joining a plurality of types and / or a plurality of power semiconductor elements to one insulating substrate and further joining and laminating the insulating substrate to a base plate, it is possible to reduce the number of parts of the device, Manufacturing man-hours and parts management man-hours can be reduced.

The heat generated from the two power semiconductor elements 1 is transmitted to the bonding material 2, the conductive film 3, the insulating substrate 4, the conductive film 5, the bonding material 6, and the base plate 7 in this order, and from the base plate 7 to the radiator ( (Not shown) or heat is radiated through a housing (not shown).

[0006]

However, in the above-described conventional power module, since the linear expansion coefficients of the insulating substrate 4 and the base plate 7 are different, the stress due to the heat generated by the power semiconductor element 1 is reduced by the insulating substrate 4 and the base plate. There is a possibility that cracks 10 may enter the bonding material 6 as shown in FIGS. 9 (a) and 9 (b).
If a crack 10 enters the bonding material 6 between the insulating substrate 4 and the base plate 7, the thermal resistance of the bonding material 6 increases, so that the heat of the power semiconductor element 1 is not sufficiently transmitted to the base plate 7, and the power semiconductor element 1 The power semiconductor element 1 may not sufficiently dissipate heat, causing the power semiconductor element 1 to exceed its heat-resistant temperature, deteriorating its performance, and possibly damaging the power semiconductor element 1.

Further, in order to reduce the man-hour for manufacturing the device and the man-hour for managing the parts, it is desirable to stack a plurality of types and / or a plurality of power semiconductor elements on one insulating substrate. And the area of the base plate increases accordingly. As the area of the joint between the insulating substrate and the base plate increases,
Since the thermal stress applied to the bonding material between the insulating substrate and the base plate increases, the more the power semiconductor elements are stacked on one insulating substrate, the more the bonding material between the insulating substrate and the base plate is cracked. It will be easier.

An object of the present invention is to improve the heat stress characteristics of a power semiconductor module in which a plurality of power semiconductor elements are bonded to one insulating substrate, and the insulating substrate is further bonded to a base plate to be laminated. I do.

[0009]

The first and second aspects of the present invention will be described with reference to FIG. 2 showing a first embodiment of the invention. (1) The first aspect of the present invention Power semiconductor device 1
a, 1b are bonded to one insulating substrate 4, and further applied to a power semiconductor module in which the insulating substrate 4 is bonded to a base plate 7 and laminated, and the groove 11 for dividing the insulating substrate 4 into a plurality of pieces is insulated. At least one power semiconductor element (1a, 1b) is formed on the substrate 4 and is arranged for each insulating substrate (4) divided by the groove 11. (2) The power semiconductor module according to claim 2, wherein the groove 11
When the thermal stress lower than the thermal stress absorption limit of the joint 6 between the insulating substrate 4 and the base plate 7 is applied to the joint 6, the insulating substrate 4 is
It should be a thickness that can be divided by the part. The third and fourth aspects of the present invention will be described with reference to FIG. 7 showing the sixth embodiment of the present invention. (3) The third aspect of the present invention provides a plurality of power semiconductor elements 1
a, 1b are joined to one insulating substrate 4, and the insulating substrate 4 is joined to a base plate 7 to be applied to a laminated power semiconductor module, and a through hole 12 for dividing the insulating substrate 4 into a plurality of sheets is formed. At least one power semiconductor element (1a, 1b) is formed on the insulating substrate 4 at a predetermined interval and is arranged for each insulating substrate (4) divided by the row of the through holes 12. (4) In the power semiconductor module according to the fourth aspect, the hole diameter and the installation interval of the through hole 12 are set such that a thermal stress lower than the thermal stress absorption limit value of the joint 6 between the insulating substrate 4 and the base plate 7 is reduced. 6, the insulating substrate 4 has a hole diameter and an installation interval at which the insulating substrate 4 is divided by the row of the through holes 12. (5) The power semiconductor module according to the fifth aspect of the present invention will be described with reference to FIG. 5 showing a fifth embodiment of the invention. The elements 1a and 1b are arranged apart from each other. (6) The power semiconductor module according to the sixth aspect will be described with reference to FIG. 5 showing a fourth embodiment of the invention. The power semiconductor elements 1a and 1b are not arranged at target positions.

In the section of the means for solving the above-mentioned problem, a diagram of one embodiment is used for easy understanding of the description, but the present invention is not limited to this embodiment. .

[0011]

(1) According to the invention of claims 1 to 4,
As multiple power semiconductor elements are joined to a single insulating substrate to reduce assembly man-hours and save time in parts management, the thermal stress at the joint increases due to the increase in the joint area between the insulating substrate and the base plate. Even before the crack occurs at the joint due to the thermal stress or the peeling occurs at the member to be joined, the insulating substrate is broken at the groove or the row of through holes and the insulating substrate is separated. As a result, the bonding area per insulating substrate is reduced, the thermal stress is reduced, cracks and peeling can be prevented, and the heat radiation characteristics of the power semiconductor element can be maintained to prevent thermal breakdown. (2) According to the fifth aspect of the present invention, in addition to the above-described effects of the first to fourth aspects, when the insulating substrate is broken and separated at the groove or through-hole row portion, the impact is hardly transmitted to the power semiconductor element. Therefore, it is possible to prevent the power semiconductor element from being damaged when the insulating substrate is divided, and to improve reliability. (3) According to the invention of claim 6, in addition to the above effects of claims 1 to 4, when a thermal stress close to the absorption limit is applied to the joint between the insulating substrate and the base plate, grooves or through-hole rows are formed. The plurality of insulating substrates divided by the above-described method cause alternate warpage, so that the insulating substrate is easily broken, and thermal stress can be quickly and reliably absorbed.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment in which the present invention is applied to a power converter of an inverter shown in FIG. 1 will be described. The present invention is not limited to the power conversion unit of the inverter, but can be applied to other power semiconductor devices such as a converter and a power amplifier.

In FIG. 1, the power converter of the inverter includes six IGBTs (T1 to T6) and six diodes (D1 to D6), and converts DC powers P and N into three-phase AC powers U, V, Convert to W Although this embodiment shows an example in which an IGBT is used for a power semiconductor element, the present invention is not limited to an IGBT, and a power transistor, a MOSF
The present invention can be applied to all power semiconductor devices such as ET, thyristor, and diode.

<< First Embodiment of the Invention >> FIG. 2 shows the structure of a power semiconductor module (power module) according to a first embodiment. FIG. 2A is a top view, and FIG. It is BB sectional drawing in (a). FIG. 2 (b)
Then, the bus bars 8a, 8b and the bonding wires 9a,
Illustration of 9b is omitted. This power module connects two low-power IGBTs in parallel to form one high-power I
This is a power module functioning as a GBT. To configure the power converter of the inverter shown in FIG. 1, the power module of the IGBT shown in FIG.
And a power module (not shown) of diodes (D1 to D6) are required. Note that diodes (D1 to D1)
The power module of D6) is an IGBT (T1 to T6)
Only the power semiconductor element of the power module is replaced with a diode, and the description is omitted.

In the first embodiment, two power semiconductor elements (IGBTs) 1a and 1b are provided with Cu and Al on both surfaces.
Surface bonding is performed on the upper surface side of the insulating substrate 4 to which the conductive films 3a, 3b, 5a, and 5b such as are adhered using bonding materials 2a and 2b such as solder. The bonding members 2a and 2b have a function of transmitting heat generated in the power semiconductor elements 1a and 1b to the insulating substrate 4,
It has a function of absorbing and relaxing thermal stress generated between the power semiconductor elements 1a, 1b and the insulating substrate 4 due to the difference in linear expansion characteristics between the power semiconductor elements 1a, 1b and the insulating substrate 4. . On the insulating substrate 4, the power semiconductor elements 1a, 1b
On the other hand, a material having high heat dissipation, high insulation, and low coefficient of linear expansion, for example, a ceramic substrate such as AlN or Al ₂ O ₃ can be used. Further, the bonding materials 2a and 2b are not limited to solder, and may be any material as long as the melting point is higher than the maximum temperature during operation of the power semiconductor elements 1a and 1b.

Further, the insulating substrate 4 is surface-bonded to the base plate 7 using a bonding material 6 such as solder or brazing material. The bonding material 6 has a function of transmitting heat generated in the power semiconductor elements 1 a and 1 b from the insulating substrate 4 to the base plate 7, and a difference in linear expansion characteristics between the insulating substrate 4 and the base plate 7. It has a function of absorbing and relaxing thermal stress generated between itself and the base plate 7. Base plate 7
Has a high heat dissipation and a low coefficient of linear expansion, such as C
u, Al, Al-SiC, Cu-Mo, etc. can be used. In addition, the emitters on the upper surface side and the collectors on the lower surface side of the power semiconductor elements (IGBTs) 1a and 1b are connected to bus bars 8a and 8b such as Cu and Al via bonding wires 9a to 9d such as Cu and Al, respectively. I do.

Power semiconductor elements 1a, 1b and insulating substrate 4
Is relatively small, the thermal stress generated in the bonding materials 2a, 2b between the power semiconductor elements 1a, 1b and the insulating substrate 4 is limited to the bonding materials 2a, 2b in a normal use environment.
Not so large that cracks occur. However, there is a large difference in linear expansion coefficient between the insulating substrate 4 and the base plate 7 and a large difference in linear expansion characteristics because a radiator (not shown) or a housing (not shown) is attached to the base plate 7. In addition, the thermal stress generated in the joining material 6 between the two members 4 and 7 increases, and there is a possibility that the thermal stress exceeds the thermal stress absorption limit of the joining material 6 and cracks occur.

There are two types of thermal stress generated in the bonding material 6 between the insulating substrate 4 and the base plate 7. The first thermal stress is a residual thermal stress generated when the insulating substrate 4 and the base plate 7 are joined with the joining material 6 such as solder. When members having different linear expansion coefficients such as the insulating substrate 4 and the base plate 7 are joined, when the temperature is raised, both members 4
7 shows an elongation based on a specific coefficient of linear expansion, but when the temperature is lowered after reaching the melting point of the joining material 6 (for example, 183 ° C. or less for 63Sn-37Pb eutectic solder), both members 4 and 7 are soldered. Therefore, the two members 4 and 7 cannot be contracted according to their respective coefficients of linear expansion. This non-shrinkable state becomes residual thermal stress and is applied to the bonding material 6 between the insulating substrate 4 and the base plate 7.

The second thermal stress generated in the bonding material 6 between the insulating substrate 4 and the base plate 7 is a thermal stress generated by a temperature cycle of a use environment. This usage environment includes the ambient temperature, the operating conditions of the inverter power converter, and the like.

The thermal stress generated in the bonding material 6 between the insulating substrate 4 and the base plate 7
b, it joins the bonding material 6 and the base plate 7. At this time, it is known that the portion where the thermal stress concentrates differs depending on the type of the joining material 6. When solder is used for the joining material 6, the thermal stress concentrates on the joining material 6, and the Al- When a brazing material such as Si is used, thermal stress concentrates on the insulating substrate 4. Further, the thermal stress is proportional to the size of the bonding area, and the larger the bonding area, the larger the thermal stress is generated. Each member 4, 5
a, 5b, 6, and 7 all have the property of absorbing and relaxing a certain amount of thermal stress. However, when thermal stress exceeding the absorption limit of thermal stress or near the absorption limit is repeatedly applied, peeling occurs. Occurs.

When cracks occur in the bonding material 6 or peeling of the members 4, 5a, 5b, 6, 7 occurs due to thermal stress generated in the bonding material 6 between the insulating substrate 4 and the base plate 7, the power The thermal resistance of the heat flow path from the semiconductor elements 1a, 1b to the base plate 7 increases, and the heat dissipation of the power semiconductor elements 1a, 1b may be insufficient, resulting in damage.

Therefore, in the first embodiment, two insulating substrates 4 are separated so that the insulating substrate 4 is cracked and separated by a thermal stress lower than the thermal stress absorption limit of the bonding material 6 between the insulating substrate 4 and the base plate 7. Power semiconductor elements (IGBT) 1a, 1b
A groove 11 is provided in the insulating substrate 4 between the two as shown in FIG. The cross section of the groove 11 is substantially V-shaped as shown in FIG. 2B, and the depth of the groove 11, that is, the thickness of the insulating substrate 4 at the deepest part of the groove 11 is between the insulating substrate 4 and the base plate 7. When a thermal stress lower than the thermal stress absorption limit value of the bonding material 6 is applied to the bonding material 6, the insulating substrate 4 cracks at the groove 11 and
The thickness is set to a depth at which thermal stress exceeding the limit value is not applied to the bonding material 6, that is, the thickness.

When solder is used for the joining material 6 between the insulating substrate 4 and the base plate 7, the joining material 6
Before cracking or peeling occurs, thermal stress is applied to the groove 11 provided in the insulating substrate 4 to cause cracking. This allows
Since the insulating substrate 4 is separated into two and the area of the joint between the insulating substrate 4 and the base plate 7 is reduced, the thermal stress applied to the bonding material 6 is reduced, and the occurrence of cracks in the bonding material 6 can be prevented. And members 4, 5a, 5b, 6,
7 can be prevented from peeling off.

When a brazing material is used as the bonding material 6 between the insulating substrate 4 and the base plate 7, the insulating substrate 4 is the weakest part against thermal stress as described above,
Thermal stress concentrates on a thin portion (weakly rigid portion) of the substrate, and the insulating substrate 4 is cracked. Thereby, the insulating substrate 4 is separated into two pieces, the bonding area between the insulating substrate 4 and the base plate 7 is reduced, and the thermal stress applied to the bonding material 6 is reduced, so that cracks in the bonding material 6 can be prevented. , Members 4, 5a,
5b, 6 and 7 can be prevented from peeling off.

As described above, according to the first embodiment,
Two power semiconductor elements 1a and 1b are connected to one insulating substrate 4.
When the insulating substrate 4 is further joined to the base plate 7 and laminated, the groove 1 for dividing the insulating substrate 4 into two
1 is provided on the insulating substrate 4, and the power semiconductor elements (1 a, 1
Since b) is arranged, even if the thermal stress of the bonding material 6 increases due to an increase in the bonding area between the insulating substrate 4 and the base plate 7, cracks occur in the bonding material 6 due to the thermal stress, and the bonding members 4, 5a, 5b , 6, 7 before the separation occurs.
The insulating substrate 4 is broken at the portion 1 and the insulating substrate 4 is separated.
As a result, the bonding area per insulating substrate is reduced, the thermal stress is reduced, cracks and peeling can be prevented, and the heat radiation characteristics of the power semiconductor elements 1a and 1b can be maintained to prevent thermal breakdown. .

When assembling the power module, the two power semiconductor elements 1a and 1b are joined to one insulating substrate 4, and the insulating substrate 4 is further joined to one base plate to form one power module. Since the two power semiconductor elements 1a and 1b are joined to separate insulating substrates and a base plate, respectively, the power module can be reduced in size as compared with assembling the two power modules. In addition, the man-hours for assembling the power module and managing the parts can be reduced. Furthermore, two low-power semiconductor elements 1a and 1b are laminated on one insulating substrate 4 and one base plate 7 to assemble a power module. Therefore, one high-power semiconductor element is mounted on the insulating substrate and the base plate. As compared with stacking and assembling the power module, the load per power semiconductor element can be easily reduced, and the life and reliability of the power semiconductor element can be increased.

The sectional shape of the groove 11 is not limited to the V-shape, but may be, for example, a substantially U-shape. The groove 11 is formed by subjecting a fired ceramic plate to ultrasonic processing, blade processing including diamond, or the like. Alternatively, the grooves 11 may be provided at the time of the ceramic green sheet, and then fired.

In the first embodiment, the grooves 11
Along the conductive films 3a, 3b, 5a on both surfaces of the insulating substrate 4
5b is stripped off, and the conductive films 3 on both surfaces of the insulating substrate 4 are removed.
a, 3b, 5a, and 5b are connected to respective power semiconductor elements (IGB
T) Divide by 1a and 1b. Conductive films 3a, 3b, 5
a, 5b, each power semiconductor element (I
GBT) Collectors and bus bars 8 on the lower surface side of 1a, 1b
The connection with the wiring b is made by bonding wires 9c and 9d from the divided conductive films 3a and 3b to the bus bar 8b. By removing the conductive films 3a, 3b, 5a, and 5b on both surfaces of the insulating substrate 4 along the groove 11 when a thermal stress close to the absorption limit is applied to the bonding material 6 between the insulating substrate 4 and the base plate 7, The insulating substrate 4 has the groove 11
It is easy to separate by breaking at the portion, and the thermal stress can be quickly absorbed.

Normally, the conductive films 3a, 3b, 5a, 5
Since b is made of a soft and easily stretchable material such as copper or aluminum, the conductive films 3a, 3b, 5a, 5b
The conductive films 3a, 3a are formed on both surfaces of the insulating substrate 4 as in the conventional power semiconductor module shown in FIG.
Even if b, 5a, and 5b are attached, it does not hinder the insulating substrate 4 from breaking at the groove 11 due to thermal stress.
Therefore, it is not always necessary to remove the conductive films 3a, 3b, 5a, and 5b on both surfaces of the insulating substrate 4 along the groove 11 in a strip shape.
a and 5b may be left attached. However, in this case, the depth of the groove 11, that is, the thickness of the insulating substrate 4 at the deepest part of the groove 11 is set to an optimum value according to the material of the conductive films 3a, 3b, 5a, and 5b. Before the thermal stress applied to the bonding material 6 between the base plates 7 reaches the absorption limit value of the bonding material 6, the insulating substrate 4 must be surely broken at the groove 11 to absorb the thermal stress.

<< Second Embodiment of the Invention >> FIG. 3 shows the structure of a power semiconductor module (power module) according to a second embodiment. FIG. 3A is a top view, and FIG. It is CC sectional drawing in (a). FIG. 3 (b)
Then, the bus bars 8a and 8b and the bonding wires 9a to
Illustration of 9c is omitted. This power module connects three low-power IGBTs in parallel to form one high-power I
This is a power module functioning as a GBT. In order to configure the power converter of the inverter shown in FIG. 1, the power module of the IGBT shown in FIG.
And a power module (not shown) of diodes (D1 to D6) are required. Note that diodes (D1 to D1)
The description of the power module D6) is omitted.

In the second embodiment, three low-power semiconductor elements (IGBTs) 1a to 1c are connected in parallel, so that the number of semiconductor elements per semiconductor element is smaller than that of the first embodiment. Can be further reduced, but the area of the insulating substrate 4 increases with an increase in the number of semiconductor elements, and the thermal stress applied to the bonding agent 6 between the insulating substrate 4 and the base plate 7 also increases. Therefore, the three power semiconductor elements 1a, 1b, and 1c are separated so that the insulating substrate 4 is broken and separated by a thermal stress lower than the thermal stress absorption limit of the bonding material 6 between the insulating substrate 4 and the base plate 7. As shown in FIG. 3, two grooves 11a and 11b
Is provided. The cross section of these grooves 11a and 11b is shown in FIG.
, And the depth of the grooves 11a and 11b, that is, the thickness of the insulating substrate 4 at the deepest portion of the grooves 11a and 11b is equal to the bonding material 6 between the insulating substrate 4 and the base plate 7.
When a thermal stress lower than the thermal stress absorption limit value is applied to the bonding material 6, the insulating substrate 4 cracks at the grooves 11 a and 11 b to prevent the bonding material 6 from being subjected to a thermal stress exceeding the limit value. Now, let's make it thick.

By arranging the grooves 11a and 11b so that the three divided insulating substrates 4 have the same area, the thermal stress applied to each divided insulating substrate 4 becomes substantially equal, and Bonding material 6 between substrate 4 and base plate 7
Can be further improved with respect to thermal stress.

In the second embodiment, as the three power semiconductor elements 1a, 1b, and 1c are joined to the insulating substrate 4, bonding wires 9a to 9c are provided for each of the power semiconductor elements 1a to 1c. Bus bars 8a, 8 by 9f
Connect to b. The conductive films on both sides of the insulating substrate 4 are also 3
a, 3b, 3c, 5a, 5b, and 5c. Otherwise, the structure is the same as that of the first embodiment described above,
Description is omitted.

<< Third Embodiment of the Invention >> FIG.
It is a top view which shows the structure of the power semiconductor module (power module) of Embodiment of this invention. The cross-sectional structure of this power module is the same as the structure shown in FIG. This power module has a low power I
One set of a power semiconductor element in which the GBT 1a and the small power diode 1b are connected in anti-parallel and one set of a power semiconductor element in which the small power IGBT 1c and the small power diode 1d are connected in anti-parallel are connected in parallel. Is a power module that constitutes a parallel body of a large power IGBT and a large power diode, and corresponds to an IGBT and a diode for a half phase of the inverter power converter shown in FIG. Therefore, in order to configure the power converter of the inverter shown in FIG. 1, the power module of the IGBT and the diode shown in FIG.
Required.

In the third embodiment, two sets of low power semiconductor elements 1a, 1b and 1c, 1d are connected in parallel, so that the semiconductor element 1 Although the load per group can be reduced, the area of the insulating substrate 4 increases due to the increase in the types and the number of semiconductor elements. Therefore, two sets of power semiconductor elements 1a, 1b and 1c, 1d are so arranged that the insulating substrate 4 is broken and separated by a thermal stress lower than the thermal stress absorption limit of the bonding material 6 between the insulating substrate 4 and the base plate 7. A groove 11 is provided in the insulating substrate 4 between the two as shown in FIG. This groove 1
1 has a substantially V-shaped cross section, and the depth of the groove 11, that is, the thickness of the insulating substrate 4 at the deepest portion of the groove 11 is determined by the thermal stress absorption limit of the bonding material 6 between the insulating substrate 4 and the base plate 7. When the thermal stress lower than the value is applied to the bonding material 6, the insulating substrate 4 is cracked at the groove 11, and the depth and the thickness are set so that the thermal stress exceeding the limit value is not applied to the bonding material 6.

By arranging the grooves 11 so that the areas of the two divided insulating substrates 4 are the same, the thermal stress applied to each divided insulating substrate 4 becomes substantially equal, and The reliability of the bonding material 6 between the substrate and the base plate 7 with respect to thermal stress can be further improved.

Further, three grooves are formed so as to divide the insulating substrate 4 into four, and the power semiconductor elements 1a to 1d are
One insulating substrate may be arranged for each insulating substrate divided by the groove.

<< Fourth Embodiment of the Invention >> FIG.
It is a top view which shows the structure of the power semiconductor module (power module) of Embodiment of this invention. The cross-sectional structure of this power module is the same as the structure shown in FIG. This power module has a high power I
This is a power module in which the GBT 1a and the high power IGBT 1b are connected in anti-parallel, and one phase IGBT (T1 + T2) or (T3 + T4) in the U, V, and W layers shown in FIG.
Or (T5 + T6). Therefore, in order to configure the inverter power converter shown in FIG.
Requires three IGBT power modules and a diode (D1 to D6) power module (not shown). The description of the diode power module is omitted.

In the fourth embodiment, two semiconductor elements (IGBTs) 1a and 1b are connected in antiparallel to form a power module of a semiconductor element (IGBT) for one phase of an inverter. , Semiconductor device (IGBT)
As compared with the case where a power module is formed for each of 1a and 1b, the area of the insulating substrate 4 is increased by increasing the number of semiconductor elements. Therefore, the insulation between the two power semiconductor elements 1a and 1b is separated so that the insulation substrate 4 is broken and separated by a thermal stress lower than the thermal stress absorption limit of the bonding material 6 between the insulating substrate 4 and the base plate 7. As shown in FIG.
1 is provided. The groove 11 has a substantially V-shaped cross section.
The depth of the groove 11, that is, the thickness of the insulating substrate 4 at the deepest portion of the groove 11 is such that a thermal stress lower than the thermal stress absorption limit of the bonding material 6 between the insulating substrate 4 and the base plate 7 is applied to the bonding material 6. When the insulating substrate 4 is applied, the insulating substrate 4 has a depth and a thickness so as to prevent the insulating material 4 from being cracked at the groove 11 and to apply a thermal stress exceeding the limit value to the bonding material 6.

The fourth embodiment has the following effects in addition to the above-described effects of the first embodiment. In the inverter power conversion unit, usually, 1 is connected in series.
Power semiconductor elements for the phases, for example, T1 and T shown in FIG.
2, or T3 and T4 or T5 and T6 do not conduct simultaneously. Therefore, by combining two power semiconductor elements for one phase into one power module, the heat dissipation structure can be shared and the entire inverter power conversion unit can be reduced in size.

Further, in the fourth embodiment, the two power semiconductor elements 1a and 1b are not arranged symmetrically with respect to the groove 11 but are shifted from each other. As a result, when thermal stress close to the absorption limit is applied to the bonding material 6 between the insulating substrate 4 and the base plate 7, the two insulating substrates 4 divided by the grooves 11 are alternately warped, and 4 are easily broken, and the thermal stress can be quickly and reliably absorbed.

By arranging the grooves 11 so that the areas of the two divided insulating substrates 4 are the same, the thermal stress applied to each divided insulating substrate 4 becomes substantially equal, and The reliability of the bonding material 6 between the substrate and the base plate 7 with respect to thermal stress can be further improved.

<< Fifth Embodiment of the Invention >> FIG. 6 is a top view showing the structure of a power semiconductor module (power module) according to a fifth embodiment. The cross-sectional structure of this power module is the same as the structure shown in FIG. In this power module, the power semiconductor elements 1a and 1b of the power module according to the first embodiment shown in FIG. 2 are arranged on the insulating substrate 4 away from the groove 11. Except that the power semiconductor elements 1a and 1b are arranged apart from the groove 11, the configuration is the same as that of the first embodiment shown in FIG. 2, and the description of the other parts is omitted.

According to the fifth embodiment, in addition to the effects of the first embodiment, the power semiconductor device 1
By increasing the distance between a and 1b and the groove 11, when the insulating substrate 4 is broken and separated by the groove 11, the impact is less likely to be transmitted to the power semiconductor elements 1a and 1b. 1a and 1b can be prevented from being damaged, and the reliability can be improved.

<< Sixth Embodiment of the Invention >> FIG. 7 shows a structure of a power semiconductor module (power module) according to a sixth embodiment, wherein FIG. 7A is a top view, and FIG. It is DD sectional drawing in (a). FIG. 7 (b)
Here, illustration of the bus bar 8a and the bonding wires 9a and 9b is omitted. In this power module, through holes 12 having a predetermined diameter are provided at predetermined intervals in the insulating substrate 4 instead of the grooves 11 of the insulating substrate 4 of the power module according to the first embodiment shown in FIG. . The hole diameter of the through hole 12 and the installation interval are such that when a thermal stress lower than the thermal stress absorption limit value of the bonding material 6 between the insulating substrate 4 and the base plate 7 is applied to the bonding material 6, the insulating substrate 4 The hole diameter and the installation interval are set so that the joint material 6 is not cracked at the portion of the row and thermal stress exceeding the limit value is applied to the joining material 6. Except that the rows of through holes 12 are provided in the insulating substrate 4 instead of the grooves 11, the configuration is the same as that of the first embodiment shown in FIG. 2, and the description of the other parts is omitted.

According to the sixth embodiment, in addition to the above-described effects of the first embodiment, in addition to the management of the depth of the groove 11 when forming the groove 11 in the insulating substrate 4, that is, the formation of the groove 11 It is not necessary to control the thickness of the deepest substrate 4. When the grooves 11 are formed in a green sheet state, warpage after firing is a concern. However, in this embodiment in which the through holes 12 are provided, it is not necessary to consider warpage, and the manufacturing of the insulating substrate 4 is not required. The yield at the time can be improved.

In each of the above-described embodiments, a plurality of types and / or a plurality of power semiconductor elements may be arranged on each of the insulating substrates divided by the groove or the row of through holes.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a power converter of an inverter.

FIG. 2 is a diagram illustrating a structure of a power semiconductor module according to the first embodiment.

FIG. 3 is a diagram illustrating a structure of a power semiconductor module according to a second embodiment.

FIG. 4 is a diagram illustrating a structure of a power semiconductor module according to a third embodiment.

FIG. 5 is a diagram illustrating a structure of a power semiconductor module according to a fourth embodiment.

FIG. 6 is a diagram illustrating a structure of a power semiconductor module according to a fifth embodiment.

FIG. 7 is a diagram illustrating a structure of a power semiconductor module according to a sixth embodiment.

FIG. 8 is a diagram showing a structure of a conventional power semiconductor module.

FIG. 9 is a diagram for explaining a problem of a conventional power semiconductor module.

[Explanation of symbols]

 1a-1d Power semiconductor element 2a-2c Bonding material 3a-3c Conductive film 4 Insulating substrate 5a-5c Conductive film 6 Bonding material 7 Base plate 8a-8c Bus bar 9a-9f Bonding wire 11, 11a, 11b Groove 12 Through hole

Claims (6)

[Claims] 1. A power semiconductor module in which a plurality of power semiconductor elements are bonded to one insulating substrate, and the insulating substrate is bonded to a base plate and laminated, wherein the insulating substrate is divided into a plurality of substrates. A power semiconductor module, wherein a groove is formed in the insulating substrate, and at least one power semiconductor element is arranged for each insulating substrate divided by the groove. 2. The power semiconductor module according to claim 1, wherein the thickness of the insulating substrate at the deepest part of the groove is smaller than a thermal stress absorption limit value of a joint between the insulating substrate and the base plate. A power semiconductor module, characterized in that the insulating substrate has a thickness such that the insulating substrate breaks at the groove when a low thermal stress is applied to the joint. 3. A power semiconductor module in which a plurality of power semiconductor elements are bonded to one insulating substrate, and the insulating substrate is bonded to a base plate and laminated, wherein the insulating substrate is divided into a plurality of substrates. A power semiconductor module, wherein through holes are formed in the insulating substrate at predetermined intervals, and at least one power semiconductor element is arranged for each insulating substrate divided by the row of through holes. 4. The power semiconductor module according to claim 3, wherein a diameter of the through hole and an interval between the through holes are smaller than a thermal stress absorption limit value of a joint between the insulating substrate and the base plate. A power semiconductor module having a hole diameter and an installation interval at which the insulating substrate is divided at the through-hole row portion when is applied to the bonding portion. 5. The power semiconductor module according to claim 1, wherein said power semiconductor element is disposed apart from said groove or said row of through holes. module. 6. The power semiconductor module according to claim 1, wherein said power semiconductor element is not arranged at a position which is a line object with respect to said groove or said row of through holes. Characteristic power semiconductor module.