CN110957277A - Inverter power system and manufacturing method thereof - Google Patents
Inverter power system and manufacturing method thereof Download PDFInfo
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- CN110957277A CN110957277A CN201910771576.0A CN201910771576A CN110957277A CN 110957277 A CN110957277 A CN 110957277A CN 201910771576 A CN201910771576 A CN 201910771576A CN 110957277 A CN110957277 A CN 110957277A
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- inverter
- power system
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
- H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8134—Bonding interfaces of the bump connector
- H01L2224/81345—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8136—Bonding interfaces of the semiconductor or solid state body
- H01L2224/81365—Shape, e.g. interlocking features
Abstract
The invention provides an inverter power system and a manufacturing method thereof, wherein the inverter power system comprises a heat dissipation substrate, a ceramic substrate, a plurality of inverter chips, a plurality of conductive bridges and a plurality of leading-out terminals, a plurality of annular recesses are arranged on the ceramic substrate, each annular recess surrounds each inverter chip one by one when viewed from top, the ceramic substrate is welded on the heat dissipation substrate through a solder layer, and the solder layer at least partially fills the annular recesses. The invention can restrain the warping of the ceramic substrate and reduce the internal stress.
Description
Technical Field
The invention relates to the field of semiconductor device packaging, belongs to the H01L23/00 classification number, and particularly relates to an inverter power system and a manufacturing method thereof.
Background
In the conventional power inverter chip package, a conversion chip is often arranged on a DBC substrate, and then the DBC substrate is soldered on a heat dissipation substrate, which not only causes warpage of the DBC substrate, but also causes warpage of the heat dissipation substrate. In general, a conventional power conversion package includes an insulating substrate having a conductive pattern, the insulating substrate including an insulating layer, a first conductive pattern on an upper surface, and a second conductive pattern on a second surface, an inverter chip being soldered to the first conductive pattern by a solder layer, and finally being integrally molded with a resin. When the inverter chip (such as an IGBT, a MOSFET, or other power components) operates, a large amount of heat may first cause warpage of the insulating substrate, so that the inverter chip is peeled off from the solder layer, which is not favorable for the purpose of reliable packaging.
Disclosure of Invention
In order to solve the above problems, the present invention provides an inverter power system including a heat dissipation substrate, a ceramic substrate, a plurality of inverter chips, a plurality of conductive bridges, and a plurality of lead-out terminals, wherein:
the ceramic substrate is provided with a first surface and a second surface which are opposite, wherein a first copper layer is arranged on the first surface, a second copper layer is arranged on the second surface, a plurality of annular recesses are arranged on the second surface, and the annular recesses surround a plurality of annular areas; wherein, when viewed from above, each of the plurality of annular recesses surrounds each of the plurality of inverter chips one-to-one, and the first copper layer includes a plurality of soldering portions in each annular region, each of the plurality of soldering portions soldering one of the inverter chips;
the first copper layer further comprises a peripheral part arranged around the plurality of welding parts, the plurality of leading-out terminals are welded on the peripheral part, and the plurality of inverter chips and the plurality of inverters are electrically connected with the peripheral part through the plurality of conductive bridges;
the second surface is soldered on the heat dissipation substrate through a solder layer, wherein the solder layer at least partially fills the plurality of annular recesses.
According to an embodiment of the present invention, the top positions of the plurality of annular recesses have air gaps that are not filled with the solder layer.
According to the embodiment of the invention, the heat dissipation substrate further comprises a shell, wherein the shell is formed in the peripheral area on the heat dissipation substrate and encloses a cavity, and the cavity accommodates the ceramic substrate, the inverter chips, the conductive bridges and the leading-out terminals.
According to the embodiment of the present invention, further comprising a sealing resin which seals the cavity and causes the plurality of lead-out terminals to protrude.
According to an embodiment of the present invention, each of the plurality of soldering parts has a pad on one side thereof, the pad soldering the plurality of conductive bridges.
According to an embodiment of the present invention, the inverter chip includes an IGBT, a MOSFET, a bipolar transistor, and the like.
According to an embodiment of the present invention, the second surface corresponding to the peripheral portion is not provided with a second copper layer.
The invention also provides a manufacturing method of the inverter power system, which comprises the following steps:
(1) providing a ceramic substrate, wherein the ceramic substrate is provided with a first surface and a second surface which are opposite, a first copper layer is arranged on the first surface, and a second copper layer is arranged on the second surface; the first copper layer includes a discrete plurality of solder portions and a peripheral portion surrounding the plurality of solder portions;
(2) etching a plurality of annular depressions on the second surface, the plurality of annular depressions enclosing a plurality of annular regions; wherein, when viewed from above, each of the plurality of annular recesses surrounds each of the plurality of welding portions one-to-one;
(3) soldering the second surface onto a heat dissipation substrate through a solder layer, wherein the solder layer at least partially fills the plurality of annular recesses;
(4) welding a plurality of inverter chips to each of the plurality of welding portions, respectively;
(5) electrically connecting the plurality of inverter chips and the plurality of inverters with the peripheral portion using a plurality of conductive bridges, and soldering a plurality of lead-out terminals to the peripheral portion.
The invention has the following advantages: the invention realizes the buffering of stress by utilizing the plurality of annular depressions, is different from the prior art which utilizes the lower radiating holes of the chip to radiate and relieve the stress, and can ensure the reliability and stability of a power system in the environment with high power and higher temperature; preferably, an air gap is left in the annular recess, which can be used as a buffer compression part to further prevent excessive stress. In addition, the annular groove can increase the bonding force between the heat dissipation substrate and the ceramic substrate and prevent the heat dissipation substrate and the ceramic substrate from being peeled off; and the arrangement of the copper layer of the ceramic substrate realizes stress balance, and specifically comprises a wrapping arrangement of a peripheral part and a welding part, wherein the welding part is a heating part at the center.
Drawings
FIG. 1 is a cross-sectional view of an inverter power system of the present invention;
fig. 2 is a top view of the inverter power system of the present invention.
Detailed Description
The present invention is directed to an inverter power system for preventing warpage and avoiding chip damage, and its basic concept is to form an annular recess on an insulating substrate and fill solder with an air gap structure to achieve the above-mentioned functions, and specific embodiments will be described below.
Referring to fig. 1 and 2, the power conversion circuit device of the present invention includes:
the heat dissipation substrate 1 is a metal plate, a ceramic plate or the like, the lower surface of the heat dissipation substrate 1 can be welded or riveted with a radiator, and the radiator can be a fin-shaped radiator, a micropore radiator, an air-cooled radiator or the like. Preferably, the heat dissipation substrate 1 is a metal plate made of copper.
And the shell 8 is arranged on the heat dissipation substrate 1, the shell 8 is an injection molding shell and surrounds a built-in cavity, and the built-in cavity is used for sealing the inverter chip.
A copper clad substrate (DBC) soldered on the heat dissipating substrate 1 and located inside the case 8; the copper-clad substrate comprises a ceramic substrate 2, and a first copper layer and a second copper layer 3 which are positioned on the upper surface and the lower surface of the ceramic substrate. And a plurality of annular recesses 19 are provided on the lower surface, the plurality of annular recesses 19 enclosing a plurality of annular regions. The annular recess 19 may be formed using laser grooving, etching, machining methods.
The plurality of inverter chips 6 and 7 are soldered to the upper surface of the copper-clad substrate. Wherein each of the plurality of annular recesses 19 surrounds each of the plurality of inverter chips 6, 7 one by one in a plan view, and the first copper layer includes a plurality of soldering portions 14, 15 in each annular region, each of the plurality of soldering portions 14, 15 soldering one of the inverter chips 6, 7. The inverter chip is selected from an IGBT, a MOSFET, a bipolar transistor and the like. The annular recess 19 surrounds each of the plurality of inverter chips 6 and 7, so that the heat generation center is isolated, the island-shaped welding portion area is extremely small, and warping is not likely to occur.
The copper-clad substrate is welded on the heat dissipation substrate 1 through a second copper layer 3, the welding material is solder, and a solder layer 5 is formed between the copper-clad substrate and the heat dissipation substrate 1. The solder layer 5 at least partially fills the annular recess 19 so that the ceramic substrate 2 breaks at the connection of the annular recess 19 and is able to balance certain stresses and improve heat dissipation.
At the topmost part of the annular recess 19 there is a certain air gap 12, which air gap 12 can be realized by setting the width of the annular recess 19 smaller, and the width of the annular recess 19 can be 0.1-1 mm. An air gap 12 is left in the annular recess and may act as a buffer compression to further prevent overstressing.
The first copper layer further includes a peripheral portion 4 provided around the plurality of soldering portions 14, 15, a plurality of lead-out terminals 9 are soldered to the peripheral portion 4, and the plurality of inverter chips 6, 7 and the plurality of inverters 6, 7 and the peripheral portion 4 are electrically connected through the plurality of conductive bridges 10. The conductive bridge 10 may be a metal sheet, an elastic connecting member, or a conductive strip.
And a sealing resin layer 11 for sealing the cavity surrounded by the case, wherein the plurality of inverter chips 6 and 7 are isolated from each other by the sealing resin layer 11.
As can be seen from the top view, each of the plurality of soldering portions 14, 15 has a soldering pad 18 on one side thereof, the soldering pad 18 being used for soldering the plurality of conductive bridges 10. A partition 16 is arranged between the peripheral part 4 and the welding parts 14 and 15, in order to balance stress, the heating part is concentrated at the positions of the welding parts 14 and 15, and the peripheral part 4 surrounds the welding parts 14 and 15; in addition, the second copper layer 3 is not disposed on the second surface corresponding to the peripheral portion 4 based on different metal layer densities, so that the metal layer densities can be utilized to balance the stress of the entire ceramic substrate 2.
The invention also provides a manufacturing method of the inverter power system, which comprises the following steps:
(1) providing a ceramic substrate, wherein the ceramic substrate is provided with a first surface and a second surface which are opposite, a first copper layer is arranged on the first surface, and a second copper layer is arranged on the second surface; the first copper layer includes a discrete plurality of solder portions and a peripheral portion surrounding the plurality of solder portions;
(2) etching a plurality of annular depressions on the second surface, the plurality of annular depressions enclosing a plurality of annular regions; wherein, when viewed from above, each of the plurality of annular recesses surrounds each of the plurality of welding portions one-to-one;
(3) soldering the second surface onto a heat dissipation substrate through a solder layer, wherein the solder layer at least partially fills the plurality of annular recesses;
(4) welding a plurality of inverter chips to each of the plurality of welding portions, respectively;
(5) electrically connecting the plurality of inverter chips and the plurality of inverters with the peripheral portion using a plurality of conductive bridges, and soldering a plurality of lead-out terminals to the peripheral portion.
The invention realizes the buffering of stress by utilizing the plurality of annular depressions, is different from the prior art which utilizes the lower radiating holes of the chip to radiate and relieve the stress, and can ensure the reliability and stability of a power system in the environment with high power and higher temperature; preferably, an air gap is left in the annular recess, which can be used as a buffer compression part to further prevent excessive stress. In addition, the annular groove can increase the bonding force between the heat dissipation substrate and the ceramic substrate and prevent the heat dissipation substrate and the ceramic substrate from being peeled off; and the arrangement of the copper layer of the ceramic substrate realizes stress balance, and specifically comprises a wrapping arrangement of a peripheral part and a welding part, wherein the welding part is a heating part at the center.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.
Claims (8)
1. An inverter power system, it includes heat dissipation base plate, ceramic substrate, a plurality of inverter chip, a plurality of conductive bridge and a plurality of leading-out terminal, its characterized in that:
the ceramic substrate is provided with a first surface and a second surface which are opposite, wherein a first copper layer is arranged on the first surface, a second copper layer is arranged on the second surface, a plurality of annular recesses are arranged on the second surface, and the annular recesses surround a plurality of annular areas; wherein, when viewed from above, each of the plurality of annular recesses surrounds each of the plurality of inverter chips one-to-one, and the first copper layer includes a plurality of soldering portions in each annular region, each of the plurality of soldering portions soldering one of the inverter chips;
the first copper layer further comprises a peripheral part arranged around the plurality of welding parts, the plurality of leading-out terminals are welded on the peripheral part, and the plurality of inverter chips and the plurality of inverters are electrically connected with the peripheral part through the plurality of conductive bridges;
the second surface is soldered on the heat dissipation substrate through a solder layer, wherein the solder layer at least partially fills the plurality of annular recesses.
2. The inverter power system according to claim 1, characterized in that: the top positions of the plurality of annular recesses have air gaps that are not filled by the solder layer.
3. The inverter power system according to claim 1 or 2, characterized in that: the heat dissipation substrate comprises a heat dissipation substrate and is characterized by further comprising a shell, wherein the shell is formed in the peripheral area of the heat dissipation substrate and encloses a cavity, and the cavity contains the ceramic substrate, the inverter chips, the conductive bridges and the leading-out terminals.
4. The inverter power system according to claim 1 or 2, characterized in that: and a sealing resin sealing the cavity and making the plurality of leading-out terminals protrude.
5. The inverter power system according to claim 1 or 2, characterized in that: each of the plurality of soldering portions has a pad on one side thereof, the pad soldering the plurality of conductive bridges.
6. The inverter power system according to claim 1, characterized in that: the inverter chip comprises an IGBT, an MOSFET, a bipolar transistor and the like.
7. The inverter power system according to claim 1, characterized in that: and a second copper layer is not arranged on the second surface corresponding to the peripheral part.
8. A method of manufacturing an inverter power system, comprising the steps of:
(1) providing a ceramic substrate, wherein the ceramic substrate is provided with a first surface and a second surface which are opposite, a first copper layer is arranged on the first surface, and a second copper layer is arranged on the second surface; the first copper layer includes a discrete plurality of solder portions and a peripheral portion surrounding the plurality of solder portions;
(2) etching a plurality of annular depressions on the second surface, the plurality of annular depressions enclosing a plurality of annular regions;
wherein, when viewed from above, each of the plurality of annular recesses surrounds each of the plurality of welding portions one-to-one;
(3) soldering the second surface onto a heat dissipation substrate through a solder layer, wherein the solder layer at least partially fills the plurality of annular recesses;
(4) welding a plurality of inverter chips to each of the plurality of welding portions, respectively;
(5) electrically connecting the plurality of inverter chips and the plurality of inverters with the peripheral portion using a plurality of conductive bridges, and soldering a plurality of lead-out terminals to the peripheral portion.
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| CN201910771576.0A CN110957277B (en) | 2019-08-20 | 2019-08-20 | Inverter power system and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910771576.0A CN110957277B (en) | 2019-08-20 | 2019-08-20 | Inverter power system and manufacturing method thereof |
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| CN110957277A true CN110957277A (en) | 2020-04-03 |
| CN110957277B CN110957277B (en) | 2021-02-12 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001118987A (en) * | 1999-10-20 | 2001-04-27 | Nissan Motor Co Ltd | Power semiconductor module |
| JP2003031718A (en) * | 2001-07-11 | 2003-01-31 | Mitsubishi Electric Corp | Power semiconductor device |
| CN1574303A (en) * | 2003-06-05 | 2005-02-02 | 三洋电机株式会社 | Semiconductor device |
| CN106486426A (en) * | 2015-08-26 | 2017-03-08 | 比亚迪股份有限公司 | Metal-ceramic plate for welding chip and the thereon method of welding chip |
| CN107534040A (en) * | 2015-04-27 | 2018-01-02 | 奥斯兰姆奥普托半导体有限责任公司 | Arrangement of optoelectronic components and the method for manufacturing a large amount of arrangement of optoelectronic components |
-
2019
- 2019-08-20 CN CN201910771576.0A patent/CN110957277B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001118987A (en) * | 1999-10-20 | 2001-04-27 | Nissan Motor Co Ltd | Power semiconductor module |
| JP2003031718A (en) * | 2001-07-11 | 2003-01-31 | Mitsubishi Electric Corp | Power semiconductor device |
| CN1574303A (en) * | 2003-06-05 | 2005-02-02 | 三洋电机株式会社 | Semiconductor device |
| CN107534040A (en) * | 2015-04-27 | 2018-01-02 | 奥斯兰姆奥普托半导体有限责任公司 | Arrangement of optoelectronic components and the method for manufacturing a large amount of arrangement of optoelectronic components |
| CN106486426A (en) * | 2015-08-26 | 2017-03-08 | 比亚迪股份有限公司 | Metal-ceramic plate for welding chip and the thereon method of welding chip |
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Inventor after: Zhu Jiantao Inventor after: Yang Wenhui Inventor after: Guo Zhenpeng Inventor after: Yang Zhenzhou Inventor before: Yang Zhenzhou |
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Effective date of registration: 20210126 Address after: 1703a17, Dongfang Science and technology building, 16 Keyuan Road, science and Technology Park community, Yuehai street, Nanshan District, Shenzhen City, Guangdong Province Applicant after: Zhongteng microgrid (Shenzhen) Technology Co.,Ltd. Address before: Room 604-1, block B, Jiaheng building, 1825 Hualong Road, Licheng District, Jinan City, Shandong Province Applicant before: Ji Nannan knows Information technology Co.,Ltd. |
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