JP2001118921A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device, and to form a thermally-oxidized film on a silicon substrate without generating deposits. SOLUTION: A trench 1a is formed on a silicon substrate in a plasma etching process. Then acid removal is performed and a high-temperature oxide film 4 is removed through wet etching, when a void part 2a is formed between a silicon nitride film 3 and the silicon substrate 1. After that, a liner film 5 is formed by plasma CVD method, when the liner film 5 comes into the void part 2a. The liner film 5 comprises an oxide film, such as non-silicate glass(NSG) film of a tetraethylorthosilicate(TEOS) or a high-temperature oxide(HTO) film, with its film thickness being, for example, 300-500 Å. Then, under thermal oxidation, oxygen atoms are allowed to reach the surface of silicon substrate 1 through the liner film 5, forming a thermally-oxidized film at a part of the silicon substrate 1, where the trench 1a is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device having a trench isolation structure, and more particularly to a method for manufacturing a semiconductor device capable of obtaining stable characteristics.

[0002]

2. Description of the Related Art As a method of element isolation in a manufacturing process of a semiconductor device, there are mainly a trench isolation and an isolation by selective oxidation. 8 and 9 are sectional views showing a method of manufacturing a semiconductor device employing a conventional trench isolation in the order of steps.

In a conventional manufacturing method, first, as shown in FIG. 8, a pad silicon oxide film 52 and a silicon nitride film 53 are sequentially formed on a flat silicon substrate 51.
After patterning the resist, a trench 51a is formed in the silicon substrate 51 by plasma etching. Then, the trench 51a of the silicon substrate 51
A thermal oxide film 51b is formed on the exposed surface. afterwards,
A liner film 55 is formed on the entire surface. Next, the trench 51a
Trench insulating film 56 of high density plasma oxide film
Embed

Thereafter, chemical mechanical polishing (CMP: Chem.
As shown in FIG. 9, the surface of the trench insulating film 56 is flattened and the height is adjusted to the height of the surface of the silicon substrate 51 by appropriately performing oxide film etching and nitride film etching. .

Then, a semiconductor device is completed by forming a gate oxide film and a gate electrode (not shown).

According to this conventional semiconductor device method, crystal defects occur on the surface of the silicon substrate 51 when the trench 51a is formed, but such crystal defects disappear due to the formation of the thermal oxide film 51. Further, since the liner film 55 functions as a buffer layer, the stress acting on the silicon substrate 51 from the dense insulating film of the trench 56 is reduced.

Such a conventional manufacturing method is disclosed in, for example, JP-A-8-46029 and JP-A-11-176924.
No., published in Japanese Unexamined Patent Publication No.

[0008]

However, in the above-mentioned conventional manufacturing method, as shown in FIG. 8, the silicon nitride film 5 is heated by forming the thermal oxide film 51b.
3 is raised, and a void 54 is formed between the silicon nitride film 53 and the pad silicon oxide film 52. After that, several times of oxide film etching are performed,
In this oxide film etching, since the etching proceeds isotropically, as shown in FIG. 9, the void 54 a is expanded to the trench insulating film 56 and the concave portion 57 called a divot is formed.
Is formed in the trench 51a. If such a concave portion 57 exists in the trench 51a, there is a problem that the channel length becomes substantially longer than the design value, and the characteristics fluctuate.

FIG. 10 is a graph showing the bump characteristics of a transistor, with the horizontal axis representing the gate voltage and the vertical axis representing the drain current. In FIG. 10, a broken line indicates a design characteristic, and a solid line indicates a characteristic in which a divot exists. As shown in FIG. 10, when a divot is present, that portion is turned on first, resulting in a characteristic having a two-step threshold voltage.

FIG. 11A is a schematic diagram showing a designed semiconductor device, and FIG. 11B is a schematic diagram showing a semiconductor device manufactured by a conventional method. In FIGS. 11A and 11B, a gate oxide film and the like are omitted for convenience.

As shown in FIG. 11A, a trench insulating film 62 is formed on the surface of a silicon substrate 61, a gate electrode 63 is formed thereon, and the channel length becomes an arrow AA. A transistor is to be manufactured. However, according to the conventional manufacturing method, since the divot 64 is formed as shown in FIG. 11B, the channel length of the manufactured transistor is indicated by an arrow BB. As described above, it is difficult to manufacture a transistor having a designed channel length by the conventional manufacturing method.

In addition, since the shape of the divot is not constant, the degree of deviation of the characteristics varies each time the divot is manufactured.
For this reason, it is extremely difficult to design in consideration of the characteristic deviation due to the divot in advance.

The present invention has been made in view of the above problems, and has as its object to provide a method of manufacturing a semiconductor device capable of forming a thermal oxide film on a silicon substrate without generating a divot. .

[0014]

According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: forming a trench on a surface of a semiconductor substrate; and forming an oxide film through which oxygen atoms can pass on the inner surface of the trench. And thermally oxidizing a region of the semiconductor substrate facing the trench through the oxide film.

In the present invention, an oxide film through which oxygen atoms can pass is formed on the inner surface of the trench, and then the region of the semiconductor substrate facing the trench is thermally oxidized through the oxide film. Even if a silicon nitride film is formed, the silicon nitride film does not rise during thermal oxidation. As a result, no divot is formed by the subsequent oxide film etching. Therefore, stable characteristics can be obtained.

The step of forming the oxide film may be a step of forming a non-silicate glass film of tetra-ethyl-ortho-silicate or a high-temperature oxide film by a chemical vapor deposition method.

The method may further include a step of burying an insulating film in the trench after the thermal oxidation. In this case, the step of burying the insulating film may be performed by a chemical vapor deposition method using tetraethyl ortho silicate non-volatile. A step of embedding a silicate glass film or a high-temperature oxide film in the trench, or a step of embedding a plasma oxide film in the trench;

Further, the step of forming the oxide film includes the step of embedding a non-silicate glass film of tetra-ethyl-ortho-silicate at high temperature or an oxide film in the trench by a chemical vapor deposition method, or a step of forming a plasma oxide film. It may be a step of filling the trench.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor device according to an embodiment of the present invention will be specifically described below with reference to the accompanying drawings. 1 to 6 are sectional views showing a method of manufacturing a semiconductor device according to a first embodiment of the present invention in the order of steps.

In the first embodiment, a pad silicon oxide film 2 is first formed on a silicon substrate 1 as shown in FIG.
To form Subsequently, a silicon nitride film 3 is formed on the pad silicon oxide film 2. Further, a high temperature oxide film 4 is formed on the silicon nitride film 3. After patterning the resist formed thereon, the high-temperature oxide film 4,
The silicon nitride film 3 and the pad silicon oxide film 2 are plasma-etched to form openings in regions where trench isolation is performed. At this time, the surface of the silicon substrate 1 is also slightly etched.

Next, after the corners of the silicon substrate 1 are rounded by the Branson process, as shown in FIG. 2, a trench 1a is formed in the silicon substrate 1 by a plasma etching process. Next, the deposits and the like generated during the etching are removed by acid stripping and wet etching of the oxide film. At this time, as shown in FIG. 2, the pad silicon oxide film 2 is also slightly etched, so that a void 2a is formed between the silicon nitride film 3 and the silicon substrate 1.

Thereafter, acid cleaning is performed, and as shown in FIG. 3, a liner film 5 is formed by a plasma CVD (chemical vapor deposition) method. At this time, the liner film 5 enters the gap 2a. The liner film 5 is made of, for example, Tetra Ethyl Ortho-Silica (TEOS).
te) Non-silicate glass (NSG: Non Silica)
te Glass) film or high temperature oxidation (HTO)
Oxide) film and the like.
00 to 500 °.

Next, by carrying out acid cleaning and thermal oxidation, oxygen atoms reach the surface of the silicon substrate 1 through the liner film 5, and as shown in FIG.
Thermal oxide film 1b is formed in the portion where trench 1a is formed.

Next, as shown in FIG.
A trench insulating film 6 made of a high-density plasma oxide film is embedded therein. After that, planarization is performed by chemical mechanical polishing (CMP), and then the height of the trench insulating film 6 is reduced by wet etching. Subsequently, as shown in FIG. 6, the silicon nitride film 3 and the pad silicon oxide film 2 are sequentially removed.

Thereafter, a semiconductor device is completed by forming a gate oxide film and a gate electrode (not shown).

As described above, in the first embodiment, since the surface of the trench 1a of the silicon substrate 1 is thermally oxidized via the liner film 5 after the liner film 5 is formed, when the thermal oxide film 1b is formed, Since the silicon nitride film 3 is surrounded by the liner film 5, even if the silicon nitride film 3 receives heat, it does not rise. Therefore, as shown in FIG. 6, even after the trench insulating film 6 is planarized, no divot exists. For this reason, it is possible to obtain device characteristics such as a transistor as designed.

In the first embodiment, a high density plasma oxide film is used as the trench insulating film 6, but a CVD oxide film formed by a CVD method may be used. As the CVD oxide film, for example, TEOS-NS
A G film or an HTO film can be used.

Next, a second embodiment of the present invention will be described. In the second embodiment, a trench insulating film is formed simultaneously with the formation of the liner film. FIG. 7 is a sectional view showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention.
In the second embodiment shown in FIG. 7, the same components as those in the first embodiment shown in FIGS. 1 to 6 are denoted by the same reference numerals, and detailed description thereof will be omitted.

In the second embodiment, the steps up to the formation of the liner film are performed in the same manner as in the first embodiment. Thereafter, as shown in FIG. 7, a trench insulating film 7 is buried in the trench 1a by the CVD method. That is, the liner film and the trench insulating film are collectively formed.

Next, by performing thermal oxidation, oxygen atoms are allowed to reach the surface of the silicon substrate 1 through the trench insulating film 7, and a thermal oxide film (not shown) is formed on the portion of the silicon substrate 1 where the trench 1a is formed. Form.

Subsequently, planarization is performed by chemical mechanical polishing (CMP), and then the height of the trench insulating film 7 is reduced by wet etching. Next, the silicon nitride film 3 and the pad silicon oxide film 2 are sequentially removed.

Thereafter, a gate oxide film and a gate electrode (not shown) are formed to complete the semiconductor device.

In the second embodiment, as in the first embodiment, the formation of the divot can be prevented. For this reason, it is possible to obtain device characteristics such as a transistor as designed. In addition, when forming a thermal oxide film, although the time required for oxidation is long because the thickness of the oxide film covering the region is large, the liner film and the trench insulating film are formed collectively, so that the number of steps is small. Can be reduced.

In the second embodiment, as the trench insulating film 7, for example, a TEOS-NSG film or an HTO
A membrane or the like can be used.

[0035]

As described in detail above, according to the present invention,
An oxide film through which oxygen atoms can pass is formed on the inner surface of the trench, and then the region of the semiconductor substrate facing the trench is thermally oxidized through the oxide film. Therefore, even if a silicon nitride film is formed before these steps, In addition, it is possible to prevent the silicon nitride film from rising during thermal oxidation. This allows
The formation of a divot in the subsequent oxide film etching can be prevented. Therefore, a transistor or the like having stable characteristics can be manufactured.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to a first example of the present invention.

FIG. 2 is a view showing the first embodiment of the present invention, and is a cross-sectional view showing a step subsequent to the step shown in FIG. 1;

FIG. 3 is a view showing the first embodiment of the present invention, and is a cross-sectional view showing a step subsequent to the step shown in FIG. 2;

FIG. 4 is a view showing the first embodiment of the present invention, and is a cross-sectional view showing a step subsequent to the step shown in FIG. 3;

FIG. 5 is a view showing the first embodiment of the present invention, and is a cross-sectional view showing a step subsequent to the step shown in FIG. 4;

6 is a view showing the first embodiment of the present invention, and is a cross-sectional view showing a step subsequent to the step shown in FIG. 5. FIG.

FIG. 7 is a sectional view illustrating a method for manufacturing a semiconductor device according to a second example of the present invention.

FIG. 8 is a cross-sectional view showing a method for manufacturing a semiconductor device employing a conventional trench isolation.

FIG. 9 is a cross-sectional view showing a step subsequent to the step shown in FIG. 8, similarly showing the conventional manufacturing method.

FIG. 10 is a graph showing the bump characteristics of a transistor.

11A is a schematic diagram illustrating a designed semiconductor device, and FIG. 11B is a schematic diagram illustrating a semiconductor device manufactured by a conventional method.

[Explanation of symbols]

 1, 51, 61; Silicon substrate 1a, 51a; Trench 1b, 51b; Thermal oxide film 2, 52; Pad silicon oxide film 2a, 54; Void portion 3, 53; Silicon nitride film 4: High temperature oxide film 5, 55; Liner film 6, 7, 56, 62; Trench insulating film 57; Recess 63; Gate electrode 64; Divot

Claims (7)

[Claims] A step of forming a trench on a surface of the semiconductor substrate, a step of forming an oxide film through which oxygen atoms can pass on an inner surface of the trench, and facing the trench of the semiconductor substrate through the oxide film. And a step of thermally oxidizing the region. 2. The method according to claim 1, wherein the step of forming the oxide film is a step of forming a non-silicate glass film of tetra-ethyl-ortho-silicate or a high-temperature oxide film by a chemical vapor deposition method. Item 2. A method for manufacturing a semiconductor device according to item 1. 3. The method according to claim 1, further comprising the step of burying an insulating film in the trench. 4. The step of burying the insulating film is a step of burying a non-silicate glass film of tetra-ethyl-ortho-silicate or a high-temperature oxide film in the trench by a chemical vapor deposition method. The method for manufacturing a semiconductor device according to claim 3. 5. The method according to claim 3, wherein the step of burying the insulating film is a step of burying a plasma oxide film in the trench. 6. The step of forming the oxide film is a step of burying a non-silicate glass film of tetra-ethyl-ortho-silicate or a high-temperature oxide film in the trench by a chemical vapor deposition method. The method of manufacturing a semiconductor device according to claim 1. 7. The method according to claim 1, wherein the step of forming the oxide film is a step of burying a plasma oxide film in the trench.