JP2001093908A - Semiconductor device and manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which has a small element area and can suppress damages caused by wire bonding, and a method for manufactur ing the device. SOLUTION: In a semiconductor device, an n+-type drain diffusion areas 4 which is formed as an impurity diffusion layer is formed in the n-type silicon layer (silicon active layer) of an SOI substrate constituted by forming the silicon layer 3 on a single-crystal silicon substrate 1 through a silicon oxide insulating layer 2. The surface-side part of the portion overlapping the diffusion area 4 of a drain electrode 7 constituting metallic wiring becomes a drain pad 17 serving as a bonding pad. An impact relieving section 9 composed of a silicon oxide film is provided between the drain pad 17 and the diffusion area 4 so as to relieve the impact given to the diffusion area 4 at the time of performing wire bonding. The impact relieving section 9 is formed on the portion overlapping the drain pad 17 of the diffusion area 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, there has been an increasing need for semiconductor switches as switch elements for turning on / off high frequency signals. Analog switches and semiconductor relays are known as such semiconductor switches. A semiconductor relay is turned on by a light emitting element such as a light emitting diode, a light receiving element such as a photodiode, and the output of the light receiving element.
A semiconductor switch element to be turned off (semiconductor switch element for an output contact) is incorporated in a package. In semiconductor switches used to turn on and off high-frequency signals,
It is required that the resistance at the time of ON is small, the current-voltage characteristic is linear (that is, there is no offset), the output capacitance at the time of OFF is small, and the high-frequency cutoff characteristics are good.

As a semiconductor switch element used for an output contact of a semiconductor relay, a lateral double-diffused MOSFET (hereinafter referred to as an SOI-L) using an SOI structure is used.
DMOS).

In the SOI-LDMOS, as shown in FIG. 5, an n-type silicon layer (silicon active layer) 3 is formed on one surface of a single crystal silicon substrate 1 via an insulating layer 2 made of a silicon oxide film. It has an SOI structure.

In this SOI-LDMOS, an n ⁺ -type drain diffusion region 4 and a p-type well diffusion region 11 are formed in an n-type silicon layer 3 at a distance. The p-type well diffusion region 11 extends from the main surface of the n-type silicon layer 3 to the insulating layer 2.
Formed to a depth that reaches. Here, the p-type well diffusion region 11 is formed at a predetermined distance (drift distance) from the n ⁺ -type drain diffusion region 4 so as to maintain a predetermined breakdown voltage. The p-type well diffusion region 1
1 is formed in a donut shape surrounding the n ⁺ -type drain diffusion region 4 all around.

On the main surface side of the p-type well diffusion region 11, an n ^{+ -type} source diffusion region 12 is formed. Furthermore, on the main surface side of the p-type well diffusion region 11, a region between the n-type silicon layer 3 and the n ^{+ -type} source diffusion region 12 is provided with a gate insulating film 14 made of a thermal oxide film via polysilicon or the like. Is formed. A source electrode 8 made of a metal material such as aluminum is formed so as to extend over the p-type well diffusion region 11 and the n ^{+ -type} source diffusion region 12. Further, a drain electrode 7 made of a metal material such as aluminum is formed on the n ^{+ type} drain diffusion region 4.

In the above-described SOI-LDMOS, if the voltage applied to the gate electrode 13 is controlled, the on / off of the current flowing between the drain electrode 7 and the source electrode 8 can be controlled. That is, by applying a voltage between the gate electrode 13 and the source electrode 8 so that the gate electrode 13 has a high potential, a channel is formed immediately below the gate insulating film 14 in the p-type well diffusion region 11 and the channel is formed. A current flows between the n ⁺ -type drain diffusion region 4 and the n ^{+ -type} source diffusion region 12 to be turned on. At this time,
Since the pn junction does not intervene in the current path, the current-voltage characteristic becomes linear in a minute current region (that is, there is no offset). In addition, LDMOS not using the SOI structure (hereinafter, referred to as LDMOS)
In the SOI-LDMOS described above, the bottom surface of the p-type well diffusion region 11 is formed in the insulating layer 2 in the SOI-LDMOS. Since it is formed to a depth that reaches the point (in short, the bottom surface of the p-type well diffusion region 11 is in contact with the insulating layer 2), the output capacitance at off-time can be significantly reduced as compared with the bulk-LDMOS.

By the way, in the SOI-LDMOS,
As shown in FIG. 6, a drain pad (bonding pad) 17 composed of a part of the drain electrode 7 is formed with an n ⁺ -type drain diffusion in order to minimize the element area and the output capacitance at the time of off. Region 4 and drain electrode 7
Is formed above the contact portion. Here, the surface of the end portion of the n ⁺ -type drain diffusion region 4 is covered with a thermal oxide film 5, and a silicon oxide film 6 is formed on the thermal oxide film 5. A drain electrode 7 made of a metal material such as aluminum is formed so as to fill a contact hole 16 formed in an insulating layer made of the following. The surface of the drain electrode 7 other than the drain pad 17 is protected by a passivation film 18.

[0009]

However, the above-mentioned SO
In I-LDMOS, the drain pad 17 is in contact
Since it is formed above the part,
The impact of the silicon layer (n ⁺Drain diffusion region 4 and
Propagation to the n-type silicon layer 3) is easy and the silicon layer
It is easy to receive images, and this damage becomes a crack
Or may adversely affect device reliability.
Was. In particular, when the n-type silicon layer 3 is a thin film (for example,
Such a thin film SOI substrate of about 1 μm)
There was a problem that images easily occurred.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a semiconductor device having a small element area and capable of suppressing occurrence of damage due to wire bonding, and a method of manufacturing the same. is there.

[0011]

According to a first aspect of the present invention, a metal wiring is provided on a surface side of an impurity diffusion layer formed on a silicon active layer on a main surface side of an SOI substrate. A semiconductor device in which a part of the surface of the metal wiring overlapping with the impurity diffusion layer is a bonding pad, and the impact on the impurity diffusion layer during wire bonding between the bonding pad and the impurity diffusion layer is reduced. It is characterized in that a shock absorbing portion for relaxing is provided, and a part of the surface side of the metal wiring overlapping with the impurity diffusion layer becomes a bonding pad, so that the element area can be reduced. In addition, a shock absorbing portion is provided between the bonding pad and the impurity diffusion layer to reduce the impact on the impurity diffusion layer during wire bonding. , It is possible to mitigate the impact on the impurity diffusion layers of wire bonding, can be trusted is improved to suppress the occurrence of damage due to wire bonding.

According to a second aspect of the present invention, in the first aspect of the present invention, the shock absorbing portion is made of a silicon oxide film formed on a portion of the impurity diffusion layer overlapping the bonding pad.

According to a third aspect of the present invention, in the first aspect of the present invention, the shock absorbing portion is made of a thermal oxide film and a silicon oxide film stacked on a portion of the impurity diffusion layer overlapping the bonding pad. The impact at the time of bonding can be reduced as compared with the second aspect of the present invention.

According to a fourth aspect of the present invention, in the first aspect of the present invention, the impact reducing portion is made of a silicon nitride film formed on a portion of the impurity diffusion layer overlapping the bonding pad, so that the impact during wire bonding is reduced. Can be alleviated as compared with the second aspect of the present invention.

According to a fifth aspect of the present invention, in the first aspect of the present invention, the shock absorbing portion is made of a thermal oxide film and a silicon nitride film laminated on a portion of the impurity diffusion layer which overlaps the bonding pad. The impact at the time of bonding can be reduced as compared with the invention of claim 4.

The invention according to claim 6 is a step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, a step of opening a window at a predetermined portion of the thermal oxide film, and forming an impurity diffusion layer through the window. Forming a silicon oxide film over the entire surface of the silicon active layer after forming the impurity diffusion layer; and forming a silicon oxide film on the portion of the impurity diffusion layer overlapping a region where a bonding pad is to be formed and the thermal oxidation. Forming a contact hole by etching away the silicon oxide film while leaving the film, and forming a shock absorbing portion made of the silicon oxide film on a portion overlapping a region where a bonding pad is to be formed; Forming a metal wiring on the surface side of the layer, and forming a passivation film on the entire surface side of the impurity diffusion layer; Etching a portion of the passivation film that overlaps the shock absorbing portion to form a bonding pad consisting of a part of the surface side of the metal wiring. Because a relief part can be formed,
It is possible to manufacture a semiconductor device having a small element area and capable of suppressing the occurrence of damage due to wire bonding without adding a special process.

According to a seventh aspect of the present invention, a step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, and a step of forming a predetermined portion of the thermal oxide film such that at least a portion overlapping a region where a bonding pad is to be formed remains. Forming a window through the window, forming an impurity diffusion layer through the window, forming a silicon oxide film on the entire surface of the silicon active layer after forming the impurity diffusion layer, Forming a contact hole by etching away the portion on the thermal oxide film while leaving a portion on the thermal oxide film, and forming an impact relaxation portion composed of the thermal oxide film and the silicon oxide film on a portion overlapping with a region where a bonding pad is to be formed. Forming a metal wiring on the surface side of the impurity diffusion layer; forming a passivation film on the entire surface side of the impurity diffusion layer. Forming a bonding pad consisting of a part of the surface side of the metal wiring by etching and removing a portion of the passivation film that overlaps the shock absorbing portion. Since a shock absorbing portion can be formed when forming the semiconductor device, it is possible to manufacture a semiconductor device having a small element area and capable of suppressing occurrence of damage due to wire bonding without adding a special step.

The invention according to claim 8 is a step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, a step of opening a window at a predetermined portion of the thermal oxide film, and forming an impurity diffusion layer through the window. Forming a silicon nitride film on the entire surface of the silicon active layer after forming the impurity diffusion layer; and forming a silicon oxide film on a portion of the impurity diffusion layer overlapping a region where a bonding pad is to be formed and the thermal oxidation. Forming a contact hole by etching and removing the silicon nitride film while leaving the film on the film, and forming a shock absorbing portion made of the silicon nitride film on a portion overlapping a region where a bonding pad is to be formed; Forming a metal wiring so that the contact hole is buried in the surface side of the layer; and forming an entire surface on the surface side of the impurity diffusion layer. Forming a passivation film, and removing a portion of the passivation film that overlaps with the shock absorbing portion by etching to form a bonding pad composed of a part of the surface side of the metal wiring. Since a shock absorbing portion can be formed when forming a contact hole, it is possible to manufacture a semiconductor device having a small element area and capable of suppressing occurrence of damage due to wire bonding without adding a special step. it can.

In a ninth aspect of the present invention, a step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, and a step of forming a predetermined portion of the thermal oxide film such that at least a portion overlapping a bonding pad formation region remains. Forming a window through the window, forming an impurity diffusion layer through the window, forming a silicon nitride film on the entire surface of the silicon active layer after forming the impurity diffusion layer, Forming a contact hole by etching away the portion on the thermal oxide film while leaving a portion on the thermal oxide film, and forming a shock absorbing portion composed of the thermal oxide film and the silicon nitride film on a portion overlapping a region where a bonding pad is to be formed Forming a metal wiring such that the contact hole is buried in the surface side of the impurity diffusion layer. Forming a passivation film on the entire surface of the diffusion layer; and etching away a portion of the passivation film that overlaps the shock absorbing portion to form a bonding pad formed of a part of the surface of the metal wiring. And a shock absorbing portion can be formed when forming a contact hole. Therefore, the element area is small and the occurrence of damage due to wire bonding can be suppressed without adding a special process. Semiconductor device can be manufactured.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment 1) The basic configuration of this embodiment is substantially the same as the conventional configuration shown in FIGS. 5 and 6, and as shown in FIG. It is characterized in that an impact damping portion 9 made of a silicon oxide film is provided between the n ⁺ -type drain diffusion region 4 serving as an impurity diffusion layer and an impact on the n ⁺ -type drain diffusion region 4 during wire bonding. is there. Here, the shock absorbing portion 9 is formed on a portion overlapping the drain pad 17 in the n ^{+ type} drain diffusion region 4. In other words, the shock absorbing portion 9 is formed immediately below the drain pad 17. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

Thus, the semiconductor device (SO
In the case of (I-LDMOS), a part of the surface of the drain electrode 7 serving as the metal wiring, which overlaps with the n ⁺ -type drain diffusion region 4, becomes the drain pad 17, so that the element area can be reduced. Drain pad 1
Since the shock absorbing unit 9 for alleviating the impact on the n ⁺ -type drain diffusion region 4 at the time of wire bonding between the 7 and n ⁺ -type drain diffusion region 4 is provided, the n ⁺ -type drain diffusion during wire bonding The impact on the region 4 can be reduced, the occurrence of damage due to wire bonding can be suppressed, and the reliability is improved.

In the present embodiment, the shock absorbing portion 9 is formed of a silicon oxide film, but may be formed of a silicon nitride film instead of the silicon oxide film. Here, since the silicon nitride film has a higher hardness than the silicon oxide film, the impact on the n ⁺ -type drain diffusion region 4 during wire bonding can be further reduced.

Hereinafter, a method of manufacturing the SOI-LDMOS of this embodiment will be described. However, since it is substantially the same as the known method of manufacturing the SOI-LDMOS shown in FIGS.
A method of forming the shock absorbing portion 9, the drain pad 17, and the vicinity thereof will be described with reference to FIG.

First, an n-type silicon layer 3 of an SOI substrate having an n-type silicon layer (silicon active layer) 3 on a single-crystal silicon substrate 1 via an insulating layer 2 made of a silicon oxide film
A thermal oxide film 5 is formed on the surface of the substrate, a window 5a is opened in a predetermined portion of the thermal oxide film 5 by using photolithography technology and etching technology, and then the thermal oxide film 5 is used as a mask (that is, the window By forming an n ⁺ -type drain diffusion region 4 by implanting and diffusing an n-type impurity such as phosphorus (through 5a), the structure shown in FIG. 2A is obtained.

Next, a silicon oxide film 6 is formed on the entire surface on the front side of the n-type silicon layer 3 by using a normal pressure CVD apparatus or the like.
Photoresist layer 27 using photolithography technology
Is formed on a portion overlapping the thermal oxide film 5 and the region where the drain pad is to be formed (the region where the bonding pad is to be formed), whereby the structure shown in FIG. 2B is obtained.

Next, after etching the silicon oxide film 6 using the photoresist layer 27 as a mask, the photoresist layer 27 is removed to obtain the structure shown in FIG. 2C. Here, the photoresist layer 2
By etching and removing silicon oxide film 6 using mask 7 as a mask, contact hole 16 is formed, and impact mitigation portion 9 made of silicon oxide film 6 (6b) is formed on a portion overlapping the region where the drain pad is to be formed. Will be. When the shock absorbing portion 9 is made of a silicon nitride film, the above-described silicon oxide film 6 is
Instead of using a D apparatus or the like, a silicon nitride film may be formed using a normal pressure CVD apparatus or the like.

After removing the photoresist layer 27,
A metal film made of a metal material such as an aluminum-silicon alloy is formed on the entire front surface of the n-type silicon layer 3 (n ⁺ -type drain diffusion region 4) by a sputtering method or the like so that the contact holes 16 are buried. An unnecessary portion of the metal film is removed by using a photolithography technique and an etching technique to form a drain electrode 7 which is a metal wiring made of the metal film. Thereafter, the n-type silicon layer 3 (the n ⁺ -type drain diffusion region) is formed. 4) A passivation film 18 is formed on the entire surface on the front side by a normal pressure CVD apparatus or the like, and a portion of the passivation film 18 overlapping with the shock absorbing portion 9 is removed by etching using a photolithography technique and an etching technique. As a result, the drain pad 1 composed of a part of the surface side of the drain electrode 7
7 is formed, and the structure shown in FIG. 2D is obtained.

Thus, according to the above-described manufacturing method, the shock absorbing portion 9 can be formed simultaneously with the formation of the contact hole 16 (in short, the contact hole 1 can be formed).
6 can be formed only by changing the mask pattern for forming the shock absorbing portion 6), so that no special process is required for forming the shock relaxing portion 9, the element area is small, and the wire bonding is performed. Semiconductor device (SOI-LDMOS) capable of suppressing the occurrence of damage due to the above.

The site is basic configuration of (Embodiment 2) A semiconductor device of this embodiment be substantially the same as that in Embodiment 1, as shown in FIG. 3, which overlap the drain pad 17 in the n ⁺ -type drain diffusion region 4 It is characterized in that the shock absorbing portion 9 is constituted by the thermal oxide film 5 and the silicon oxide film 6 laminated thereon. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

Thus, the semiconductor device (SO
In the case of I-LDMOS, as in the first embodiment, a part of the surface of the drain electrode 7 serving as the metal wiring, which overlaps with the n ⁺ -type drain diffusion region 4, becomes the drain pad 17, so that the element area is reduced. Can do it, and
Since the shock absorbing portion 9 for reducing the impact on the n ⁺ -type drain diffusion region 4 during wire bonding is provided between the drain pad 17 and the n ⁺ -type drain diffusion region 4,
The impact on the n ⁺ -type drain diffusion region 4 during wire bonding can be reduced, and damage due to wire bonding can be suppressed, thereby improving reliability.

In the present embodiment, the shock absorbing portion 9 is constituted by the thermal oxide film 5 and the silicon oxide film 6 laminated on the portion of the n ⁺ -type drain diffusion region 4 overlapping the drain pad 17. Alternatively, the shock absorbing portion 9 may be constituted by a thermal oxide film and a silicon nitride film. Here, since the silicon nitride film has a higher hardness than the silicon oxide film, the impact on the n ⁺ -type drain diffusion region 4 during wire bonding can be further reduced.

Hereinafter, the method for manufacturing the SOI-LDMOS of the present embodiment will be described.
The method for forming the gate 7 and its vicinity will be described with reference to FIG.

First, an n-type silicon layer 3 of an SOI substrate having an n-type silicon layer (silicon active layer) 3 on a single-crystal silicon substrate 1 via an insulating layer 2 made of a silicon oxide film
A thermal oxide film 5 is formed on the surface of the substrate, a window 5a is opened in a predetermined portion of the thermal oxide film 5 by using photolithography technology and etching technology, and then the thermal oxide film 5 is used as a mask (that is, the window By forming an n ⁺ -type drain diffusion region 4 by injecting and diffusing an n-type impurity such as phosphorus (through 5a), the structure shown in FIG. 4A is obtained.
Note that, in the present embodiment, the thermal oxide film 5 (5b) is also left on the portion overlapping the drain pad formation region (bonding pad formation region).

Next, a silicon oxide film 6 is formed on the entire surface on the front side of the n-type silicon layer 3 using a normal pressure CVD apparatus or the like.
Photoresist layer 27 using photolithography technology
Is formed on a portion of the silicon oxide film 6 which overlaps the thermal oxide film 5, whereby the structure shown in FIG. 4B is obtained.

Next, after etching the silicon oxide film 6 using the photoresist layer 27 as a mask, the photoresist layer 27 is removed to obtain the structure shown in FIG. 4C. Here, the photoresist layer 2
The contact hole 16 is formed by etching and removing the silicon oxide film 6 using the mask 7 as a mask, and the thermal oxide film 5 (5b) and the silicon oxide film on the thermal oxide film 5b are formed on the portion overlapping the region where the drain pad is to be formed. 6
The impact relaxation portion 9 made of (6b) is formed. When the shock absorbing portion 9 is composed of a thermal oxide film and a silicon nitride film, instead of forming the silicon oxide film 6 using an atmospheric pressure CVD device or the like, a silicon nitride film is formed using an atmospheric pressure CVD device or the like. It may be formed by using.

After removing the photoresist layer 27,
A metal film made of a metal material such as an aluminum-silicon alloy is formed on the entire front surface of the n-type silicon layer 3 (n ⁺ -type drain diffusion region 4) by a sputtering method or the like so that the contact holes 16 are buried. An unnecessary portion of the metal film is removed by using a photolithography technique and an etching technique to form a drain electrode 7 which is a metal wiring made of the metal film. Thereafter, the n-type silicon layer 3 (the n ⁺ -type drain diffusion region) is formed. 4) A passivation film 18 is formed on the entire surface on the front side by a normal pressure CVD apparatus or the like, and a portion of the passivation film 18 overlapping with the shock absorbing portion 9 is removed by etching using a photolithography technique and an etching technique. As a result, the drain pad 1 composed of a part of the surface side of the drain electrode 7
7 is formed, and the structure shown in FIG. 4D is obtained.

Thus, according to the above-described manufacturing method, the shock absorbing portion 9 can be formed simultaneously with the formation of the contact hole 16 (in short, the contact hole 1 can be formed).
6 can be formed only by changing the mask pattern for forming the shock absorbing portion 6), so that no special process is required for forming the shock relaxing portion 9, the element area is small, and the wire bonding is performed. Semiconductor device (SOI-LDMOS) capable of suppressing the occurrence of damage due to the above.

[0038]

According to the first aspect of the present invention, a metal wiring is provided on a surface side of an impurity diffusion layer formed on a silicon active layer on a main surface side of an SOI substrate, and a portion of the metal wiring overlapping with the impurity diffusion layer is provided. A part of the front surface side is a semiconductor device which becomes a bonding pad, and has a shock absorbing portion provided between the bonding pad and the impurity diffusion layer for reducing an impact on the impurity diffusion layer at the time of wire bonding. There is a part of the metal wiring that overlaps with the impurity diffusion layer on the surface side, which becomes a bonding pad.
Since an element area can be reduced and an impact absorbing portion is provided between the bonding pad and the impurity diffusion layer to reduce the impact on the impurity diffusion layer during wire bonding, the impurity diffusion during wire bonding can be reduced. This has the effect of reducing the impact on the layer, suppressing the occurrence of damage due to wire bonding, and improving reliability.

According to a third aspect of the present invention, in the first aspect of the present invention, the shock absorbing portion is made of a thermal oxide film and a silicon oxide film laminated on a portion of the impurity diffusion layer overlapping the bonding pad. There is an effect that the impact at the time of bonding can be reduced as compared with the invention of claim 2.

According to a fourth aspect of the present invention, in the first aspect of the present invention, since the shock absorbing portion is formed of a silicon nitride film formed on a portion of the impurity diffusion layer overlapping the bonding pad, the impact during wire bonding is reduced. Can be alleviated as compared with the second aspect of the present invention.

According to a fifth aspect of the present invention, in the first aspect of the present invention, since the shock absorbing portion is made of a thermal oxide film and a silicon nitride film laminated on a portion of the impurity diffusion layer overlapping the bonding pad, a wire is formed. There is an effect that the impact at the time of bonding can be reduced as compared with the invention of claim 4.

According to a sixth aspect of the present invention, a step of forming a thermal oxide film on the surface of a silicon active layer of an SOI substrate, a step of opening a window at a predetermined portion of the thermal oxide film, and forming an impurity diffusion layer through the window Forming a silicon oxide film over the entire surface of the silicon active layer after forming the impurity diffusion layer; and forming a silicon oxide film on the portion of the impurity diffusion layer overlapping a region where a bonding pad is to be formed and the thermal oxidation. Forming a contact hole by etching away the silicon oxide film while leaving the film, and forming a shock absorbing portion made of the silicon oxide film on a portion overlapping a region where a bonding pad is to be formed; Forming a metal wiring on the surface side of the layer, and forming a passivation film on the entire surface side of the impurity diffusion layer; Etching and removing a portion of the passivation film that overlaps with the shock absorbing portion to form a bonding pad consisting of a part of the surface side of the metal wiring. Since it can be formed, there is an effect that a semiconductor device having a small element area and capable of suppressing occurrence of damage due to wire bonding can be manufactured without adding a special step.

The invention according to claim 7 is a step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, and a step of forming a predetermined portion of the thermal oxide film such that at least a portion overlapping a bonding pad formation region remains. Forming a window through the window, forming an impurity diffusion layer through the window, forming a silicon oxide film on the entire surface of the silicon active layer after forming the impurity diffusion layer, Forming a contact hole by etching away the portion on the thermal oxide film while leaving a portion on the thermal oxide film, and forming an impact relaxation portion composed of the thermal oxide film and the silicon oxide film on a portion overlapping with a region where a bonding pad is to be formed. Forming a metal wiring on the surface side of the impurity diffusion layer; forming a passivation film on the entire surface side of the impurity diffusion layer. Forming a bonding pad consisting of a part of the surface side of the metal wiring by etching and removing a portion of the passivation film that overlaps the shock absorbing portion, thereby forming a contact hole. Since the shock absorbing portion can be formed at this time, there is an effect that a semiconductor device having a small element area and capable of suppressing occurrence of damage due to wire bonding can be manufactured without adding a special process.

The invention according to claim 8 is a step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, a step of opening a window at a predetermined portion of the thermal oxide film, and forming an impurity diffusion layer through the window. Forming a silicon nitride film on the entire surface of the silicon active layer after forming the impurity diffusion layer; and forming a silicon oxide film on a portion of the impurity diffusion layer overlapping a region where a bonding pad is to be formed and the thermal oxidation. Forming a contact hole by etching and removing the silicon nitride film while leaving the film on the film, and forming a shock absorbing portion made of the silicon nitride film on a portion overlapping a region where a bonding pad is to be formed; Forming a metal wiring so that the contact hole is buried in the surface side of the layer; and forming an entire surface on the surface side of the impurity diffusion layer. Forming a passivation film; and etching the portion of the passivation film that overlaps the shock absorbing portion to form a bonding pad formed of a part of the surface side of the metal wiring. Since the shock absorbing portion can be formed when forming the semiconductor device, it is possible to manufacture a semiconductor device having a small element area and capable of suppressing occurrence of damage due to wire bonding without adding a special process. There is.

In a ninth aspect of the present invention, a step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, and a step of forming a predetermined portion of the thermal oxide film such that at least a portion overlapping a bonding pad formation region remains. Forming a window through the window, forming an impurity diffusion layer through the window, forming a silicon nitride film on the entire surface of the silicon active layer after forming the impurity diffusion layer, Forming a contact hole by etching away the portion on the thermal oxide film while leaving a portion on the thermal oxide film, and forming a shock absorbing portion composed of the thermal oxide film and the silicon nitride film on a portion overlapping a region where a bonding pad is to be formed Forming a metal wiring such that the contact hole is buried in the surface side of the impurity diffusion layer. Forming a passivation film on the entire surface of the diffusion layer; and etching away a portion of the passivation film that overlaps the shock absorbing portion to form a bonding pad formed of a part of the surface of the metal wiring. A semiconductor device that has a small element area and can suppress the occurrence of damage due to wire bonding without adding a special process. Can be produced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a main part showing a first embodiment.

FIG. 2 is a cross-sectional view of a main process for describing the manufacturing method.

FIG. 3 is a cross-sectional view of a main part showing a second embodiment.

FIG. 4 is a cross-sectional view of a main process for explaining the manufacturing method of the above.

FIG. 5 is a schematic sectional view showing a conventional example.

FIG. 6 is a sectional view of a main part of the above.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Single crystal silicon substrate 2 Insulating layer 3 N-type silicon layer 4 N ^{+ type} drain diffusion region 5 Thermal oxide film 6 Silicon oxide film 7 Drain electrode 9 Shock mitigation part 17 Drain pad 18 Passivation film

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F033 HH09 JJ01 JJ09 KK01 PP15 QQ58 QQ73 QQ76 RR04 RR05 SS12 SS25 SS27 VV07 VV15 XX17 5F044 EE04 EE06 EE11 EE21

Claims (9)

[Claims] A metal wiring is provided on a surface side of an impurity diffusion layer formed in a silicon active layer on a main surface side of an SOI substrate, and a part of the surface side of a portion of the metal wiring overlapping with the impurity diffusion layer is provided. 1. A semiconductor device serving as a bonding pad, wherein a shock absorbing portion is provided between the bonding pad and the impurity diffusion layer for reducing an impact on the impurity diffusion layer during wire bonding. 2. The semiconductor device according to claim 1, wherein said shock absorbing portion is made of a silicon oxide film formed on a portion of said impurity diffusion layer overlapping said bonding pad. 3. The semiconductor device according to claim 1, wherein said shock absorbing portion comprises a thermal oxide film and a silicon oxide film laminated on a portion of said impurity diffusion layer overlapping said bonding pad. 4. The semiconductor device according to claim 1, wherein said shock absorbing portion is formed of a silicon nitride film formed on a portion of said impurity diffusion layer overlapping said bonding pad. 5. The semiconductor device according to claim 1, wherein said shock absorbing portion comprises a thermal oxide film and a silicon nitride film laminated on a portion of said impurity diffusion layer overlapping said bonding pad. 6. A step of forming a thermal oxide film on a surface of a silicon active layer of an SOI substrate, a step of opening a window at a predetermined portion of the thermal oxide film, a step of forming an impurity diffusion layer through the window, Forming a silicon oxide film over the entire surface of the silicon active layer after forming the impurity diffusion layer, and leaving a portion of the impurity diffusion layer overlapping a region where a bonding pad is to be formed and the thermal oxide film. Forming a contact hole by etching and removing the silicon oxide film, and forming a shock absorbing portion made of the silicon oxide film on a portion overlapping a region where a bonding pad is to be formed; and Forming a metal wiring; forming a passivation film over the entire surface of the impurity diffusion layer; Forming a bonding pad consisting of a part of the surface of the metal wiring by removing a portion of the film that overlaps the shock absorbing portion by etching. 7. A step of forming a thermal oxide film on a surface of a silicon active layer of an SOI substrate, and a step of opening a window in a predetermined portion of the thermal oxide film so that at least a portion overlapping a bonding pad formation region remains. Forming an impurity diffusion layer through the window, forming an impurity diffusion layer, forming a silicon oxide film on the entire surface of the silicon active layer after forming the impurity diffusion layer, and forming the thermal oxidation layer of the silicon oxide film. Forming a contact hole by etching and removing a portion on the film, and forming a shock absorbing portion made of the thermal oxide film and the silicon oxide film on a portion overlapping a region where a bonding pad is to be formed; Forming a metal wiring on the surface side of the diffusion layer; and forming a passivation film over the entire surface side of the impurity diffusion layer. Etching the portion of the passivation film that overlaps the shock absorbing portion to form a bonding pad formed of a part of the surface side of the metal wiring. 8. A step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, a step of opening a window at a predetermined portion of the thermal oxide film, a step of forming an impurity diffusion layer through the window, Forming a silicon nitride film on the entire surface of the silicon active layer after forming the impurity diffusion layer, and leaving a portion of the impurity diffusion layer overlapping a region where a bonding pad is to be formed and the thermal oxide film. Forming a contact hole by etching away the silicon nitride film and forming a shock absorbing portion made of the silicon nitride film on a portion overlapping a region where a bonding pad is to be formed; Forming a metal wiring so that the contact hole is buried, and passivating the entire surface of the impurity diffusion layer on the surface side. Forming a film, and removing a portion of the passivation film that overlaps the shock absorbing portion by etching to form a bonding pad consisting of a part of the surface side of the metal wiring. A method for manufacturing a semiconductor device. 9. A step of forming a thermal oxide film on the surface of the silicon active layer of the SOI substrate, and a step of opening a window in a predetermined portion of the thermal oxide film so that at least a portion overlapping a bonding pad formation region remains. Forming an impurity diffusion layer through the window, forming a silicon nitride film on the entire surface of the silicon active layer after the formation of the impurity diffusion layer; Forming a contact hole by etching away leaving a portion on the film and forming a shock absorbing portion made of the thermal oxide film and the silicon nitride film on a portion overlapping a region where a bonding pad is to be formed;
Forming a metal wiring so that the contact hole is buried in the surface side of the impurity diffusion layer; forming a passivation film on the entire surface side of the impurity diffusion layer; Forming a bonding pad consisting of a part of the front surface side of the metal wiring by removing a portion overlapping the portion by etching.