JP2001086366A - Digital filter and processing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a digital filter capable of always providing a filter output with no distortion, even when invalid data exists in the neighborhood of the end part of image data. SOLUTION: This filter consists of an input terminal 101, a data-generating part 102, selectors 103 to 108, multiplication circuits 109 to 115, a coefficient- generating part 116, an adder 117 and an output terminal 118. A plurality of selectors 103 to 108, substituting other efficient data outputted from the part 102 for the invalid data when at least one piece of invalid data is outputted from the part 102, are provided in a stage preceding the circuits 109 to 115. Then, when the filter performs filtering processing on image data, an filter output without distortion can always be obtained, even when invalid data exists outside the end part of the image data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital filter and a processing method thereof, and more particularly, to a digital filter used for resolution conversion processing and filtering processing of an image and a processing method thereof.

[0002]

2. Description of the Related Art Conventionally, in a digital filter used for resolution conversion processing or image filtering processing of image data, invalid data other than image data is input to a filter near an end (upper / lower end or left / right end) of an image. This has raised the problem that the output from the filter is distorted. This is because the range of image data to be handled is finite.

[0003] In order to solve this problem, it has been proposed to perform processing as if extended data exists outside image data. There are several methods for processing the data to be expanded, of which methods called edge expansion and symmetric expansion are widely used.

Here, the end extension is a method of repeating the first and last data at both ends of the valid data.
For example, if 0 to 10 is valid data,
The extension processing is performed as follows. 0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 10,
Ten

[0005] Symmetric expansion means that a symmetrical copy of the first part of the valid data is added to the first part of the valid data, and a symmetrical copy of the last part of the valid data is added to the last part of the valid data. Is added.
For example, if 0 to 10 is valid data,
The extension processing is performed as follows. 3, 2, 1, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 9, 8, 7

As a digital filter for realizing these processing methods, for example, Japanese Patent Application Laid-Open No. 5-219
There is a “digital filter” disclosed in JP-A-413-413.

The digital filter of the first prior art includes a data generating means for simultaneously outputting a plurality of continuous lines from an input signal, a coefficient generating means for outputting the same number of weighting coefficients corresponding to each line, and a data generating means. The same number of multiplication circuits for multiplying the output data of the plurality of lines by the same number of weighting factors output from the coefficient generation means, an addition circuit for obtaining the sum of the multiplication results from each multiplication circuit, and a filtering process for the image data. When invalid data is input to at least one of the multiplication circuits, the weight coefficient of the multiplication circuit is changed to 0, and at least one of the other multiplication circuits is changed. It is provided.

FIG. 5 is a block diagram showing a schematic configuration in a case where the end portion is extended by the digital filter of the first conventional example. In FIG. 5, first, image data as an input signal from the input terminal 501 is supplied to the data generation unit 502. The data generating means 502 outputs seven consecutive lines of data D0 to D6 simultaneously,
Reference numeral 23 outputs seven predetermined weighting factors C0 to C6. Adder circuits 517, 518, 519, 520, 52
Reference numerals 1 and 522 generate values necessary for changing the weighting coefficients using the weighting coefficients C0 to C6 output from the coefficient generating means 523. Selectors 510, 511, 512, 5
13, 514, 515, and 516 select a weight coefficient.

Each data and each weighting factor obtained as described above are multiplied by multiplication circuits 503, 504, 505, 506,
The signals are supplied to 507, 508, and 509 and multiplied. The multiplication result from each multiplication circuit is added by an addition circuit 524 and output from an output terminal 525 as a filter output.

Here, the operation of the digital filter of the first conventional example will be described with reference to FIG. When the center tap reaches the upper end of the valid data, that is, when the center tap is line 5, lines 2 to 8 are output to D0 to D6, and among them D0 to D2, that is, lines 2 to 4 Is invalid data. Therefore, the selectors 510, 511, and 512 select the weight coefficient of all 0, and the selector 513 selects C0 + C1 + C2 + C
3, and the selectors 514, 515, and 516 select C4, C5, and C6, respectively.

Therefore, the filter output in this case is: D0 × 0 + D1 × 0 + D2 × 0 + D3 × (C0 + C1 +
C2 + C3) + D4 × C4 + D5 × C5 + D6 × C6 =
D3 × (C0 + C1 + C2 + C3) + D4 × C4 + D5
× C5 + D6 × C6.

This filter output corresponds to D3, that is, the data of line 5, which is the upper end of the image, is expanded by three lines, which is the number of invalid data lines.

For example, since invalid data is also included in the case where the center tap is line 6 and line 7, similarly, the operation of extending the data of line 5 at the upper end of the image by the number of invalid data lines is performed.

On the other hand, when the center tap is the line 18, the line 19, and the line 20, invalid data is included. Therefore, the data of the line 20 at the lower end of the image is extended by the number of invalid data lines. Operate.

Therefore, all the filter outputs from the start point to the end point of the filtering in the image data are processed without including the invalid data, thereby preventing the occurrence of unnecessary image distortion and the like.

FIG. 7 is a block diagram showing a schematic configuration in the case of performing symmetric expansion by the digital filter of the above-mentioned conventional example 1. 7, first, image data as an input signal from the input terminal 701 is supplied to the data generation unit 702. Data generator 702 supplied with image data
Simultaneously outputs seven consecutive lines of data from D0 to D6, and the coefficient generator 726 outputs seven predetermined weighting coefficients from C0 to C6. Adder circuits 717, 71
8, 719, 720, 721, 722, 723, 72
4 and 725 indicate values necessary for changing the weighting coefficients C0 to C6.
Are generated using the weighting factors up to. Selectors 710, 7
11, 712, 713, 714, 715, and 716 select a weight coefficient.

Each data and each weight coefficient obtained as described above are multiplied by multiplication circuits 703, 704, 705, 706,
The signals are supplied to 707, 708, and 709 to perform a multiplication process. The multiplication result from each multiplication circuit is added by an addition circuit 727 and output from an output terminal 728 as a filter output.

The operation of the digital filter will now be described with reference to FIG. If the center tap is line 5, the selectors 710, 711, 712 select a weighting factor of all 0, and the selector 713 selects C3,
The selector 714 selects C2 + C4, and the selector 715
Selects C1 + C5, and the selector 716 selects C0 + C6.

Therefore, the filter output in this case is: D0 × 0 + D1 × 0 + D2 × 0 + D3 × C3 + D4 ×
(C2 + C4) + D5 × (C1 + C5) + D6 × (C0
+ C6) = D3 × C3 + D4 × (C2 + C4) + D5 ×
(C1 + C5) + D6 × (C0 + C6).

This filter output is equivalent to the data D3, that is, the data of the line 5 at the upper end of the image, which is expanded so as to be vertically symmetrical by three lines, which is the number of invalid data lines, in the first part. Things.

For example, since invalid data is also included in the case where the center tap is line 6 and line 7, similarly, the first part of the valid data is similarly set to the number of invalid data lines centering on the data of the line 5 at the upper end of the image. It is processed as if it were stretched symmetrically up and down by the amount.

On the other hand, when the center tap near the lower end is the line 18, the line 19, and the line 20, invalid data is included. The last part is processed as if it were vertically symmetrically expanded by the number of invalid data lines.

Therefore, all the filter outputs from the start point to the end point of the filtering in the image data are processed without including invalid data, thereby preventing unnecessary image distortion or the like.

A second conventional example is disclosed in Japanese Patent Application Laid-Open No. 63-067 / 1988.
There is a "digital data correction device" disclosed in Japanese Patent Publication No. 036. In the second conventional example, data output from a plurality of interpolation filters is selected.

A third conventional example is disclosed in JP-A-01-241.
There is a “liquid crystal display device” disclosed in Japanese Patent No. 989. In the third conventional example, an object is to remove noise existing in valid data, and the pixel is replaced with a pixel at the same position one field before.

As a fourth conventional example, Japanese Patent Laid-Open Publication No.
There is an "image signal reproducing apparatus" disclosed in Japanese Patent No. 2946. In the fourth conventional example, missing data when decoding and reproducing image data encoded in a plurality of blocks is corrected.

As a conventional example 5, Japanese Patent Application Laid-Open No. 10-27
There is an “information signal processing apparatus and method” disclosed in Japanese Patent No. 1460. The fifth conventional example relates to processing at the time of transition between multiplexed information signals recorded on a digital video disk or the like.

Further, as a conventional example 6, Japanese Patent Application Laid-Open No. 11-0
There is an "image processing apparatus and an image processing method" disclosed in Japanese Patent No. 34427. In Conventional Example 6, the time for writing image data to a storage medium is reduced.

[0029]

However, in recent years,
In the technical field related to image processing, there are increasing opportunities to handle high-definition images such as HD-TV (high-definition television) and high-resolution display of personal computers. For example, filtering processing of a high-definition image requires filtering processing having sufficient characteristics. In the above-described conventional example 1, a seven-tap filter has been described. However, in order to obtain a filter having sufficient characteristics, a filter having a larger number of taps is required. When a circuit is included, there is a problem that as the number of taps increases, the scale of the circuit to be added increases.

In the digital filter of Conventional Example 1,
By changing the value of the weight coefficient and performing expansion processing of the end of the image, it is configured to prevent the occurrence of unnecessary image distortion and the like at the end of the image, but it is necessary to change the value of the weight coefficient. There is a problem that the hardware scale is increased by the necessity of the adder circuit.

Further, arithmetic circuits such as an adder circuit and a multiplier circuit used in a digital filter have a problem that an arithmetic error and an overflow occur. In general, it is known that if the operation format is a fixed-point operation, an overflow occurs in the addition circuit, and if the operation format is a floating-point operation, an operation error called a rounding error occurs in the addition circuit. Therefore, if the arithmetic format of the weight coefficient addition circuit is a fixed-point arithmetic, overflow is taken into account. If the arithmetic format is a floating-point arithmetic, rounding errors are taken into account. Required. As the operation word length of the operation circuit increases, the hardware scale further increases.

Further, as is apparent from the comparison between FIGS. 5 and 7 of the first conventional example, there is a disadvantage that the circuit configuration such as the number of inputs of the selectors and the number of addition circuits is changed by the decompression method.

According to the present invention, even when invalid data exists near the end of image data without using a complicated circuit configuration such as an arithmetic circuit which increases the hardware scale, It is an object of the present invention to provide a digital filter that performs resolution conversion processing and image filtering processing of image data that can always obtain a filter output without distortion.

[0034]

According to a first aspect of the present invention, there is provided a data generating means for simultaneously outputting a plurality of continuous data from an input signal, and a plurality of data output by the data generating means. Coefficient generating means for generating the same number of predetermined weighting factors as the number of data, a plurality of multiplying means for multiplying the plurality of data by the weighting coefficient, and an adding means for adding the multiplication results of the plurality of multiplying means. In the digital filter, when at least one invalid data is output from the data generating means between the data generating means and the multiplying means, the invalid data is replaced with another valid data output by the data generating means in place of the invalid data. It is characterized by having a recombination means.

According to a second aspect of the present invention, in the first aspect of the present invention, the rearrangement means is provided at least less than a plurality of data numbers (the number of taps).

According to a third aspect of the present invention, in the second aspect of the present invention, when the number of data (the number of taps) output from the data generating means is an odd number, the rearrangement means includes a tap located at the center. It is characterized by being provided in other than.

According to a fourth aspect of the present invention, in the second aspect of the invention, when the number of data (the number of taps) output from the data generating means is N even numbers, / 2) characterized in that the taps are provided other than the first tap.

According to a fifth aspect of the present invention, there is provided the data generating section,
In a digital filter processing method including a plurality of selectors, a plurality of multipliers, a coefficient generation unit, and an adder, data in which a data generation unit simultaneously outputs a plurality of continuous data from an input signal by a data generation unit A generating step, a re-arranging step of re-arranging invalid data included in the plurality of data output from the data generating unit by the plurality of selectors into another valid data output by the data generating unit, and outputting from the data generating unit by the coefficient generating unit A coefficient generating step of generating the same number of predetermined weighting coefficients as the plurality of pieces of data obtained, a multiplying step of multiplying the data rearranged by the selector by the plurality of multipliers and the weighting coefficient generated by the coefficient generating unit, An adding step of adding results multiplied by the plurality of multipliers by the multiplier.

According to a sixth aspect of the present invention, in the fifth aspect of the invention, the same number of multipliers as the plurality of data generated by the data generator are provided.

The invention according to claim 7 is the invention according to claim 5 or 6.
In the described invention, the plurality of selectors are at least a plurality of data numbers (tap numbers) output from the data generation unit.
It is characterized in that it is provided in a smaller number.

According to an eighth aspect of the present invention, in the seventh aspect, the plurality of selectors are located at the center when the number of data (the number of taps) output from the data generation unit is an odd number. It is characterized by being provided other than the tap.

According to a ninth aspect of the present invention, in the invention of the seventh aspect, when the plurality of data numbers (the number of taps) output from the data generation section is N even numbers, (N / 2) -1 It is characterized by being provided other than the first tap.

[0043]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a digital filter and a processing method thereof according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. 1 to 4 show an embodiment of a digital filter according to the present invention.

<First Embodiment> FIG. 1 shows a first embodiment of the present invention.
FIG. 3 is a block diagram illustrating a schematic configuration of a digital filter according to the embodiment. In FIG. 1, a digital filter according to a first embodiment of the present invention includes an input terminal 101, a data generation unit 102, selectors 103, 104, 105,
106, 107, 108, multiplication circuits 109, 110,
111, 112, 113, 114, and 115, a coefficient generator 116, an adder 117, and an output terminal 118.

As shown in FIG. 1, in the first embodiment of the present invention, the data generator 102 and each multiplication circuit 1
09, 110, 111, 112, 113, 114, 11
5, selectors 103, 104, 105, 106,
107 and 108 are provided.

The selectors 103, 104, 105, 1
When at least one invalid data is output from the data generation unit 102, the units 06, 107, and 108 execute an operation of replacing the invalid data with another valid data output from the data generation unit 102.

Therefore, even when invalid data is output from the data generation unit 102, an effect is obtained that the filter output is always distortion-free.

In FIG. 1, image data, which is an input signal from an input terminal 101, is supplied to a data generator 102, and the data generator 102 simultaneously outputs data of seven consecutive lines D0 to D6. .

The coefficient generation section 116 calculates the seven C0 to C6
Output two predetermined weighting factors. The selectors 103, 104, 105, 106, 107, and 108 are applied to the data of seven consecutive lines output from the data generator 102.
Performs data selection.

The selector 103 selects D0, D1, D2, and D
One of the four types of data is selected. The selector 104 selects one of the three types of data D1, D2, and D3. The selector 105 selects one of two types of data, D2 and D3. Selector 106
Selects one of two types of data, D3 and D4. The selector 107 selects one of the three types of data D3, D4, and D5. The selector 108 selects D3
, D4, D5, and D6.

The data and the weighting coefficients obtained as described above are multiplied by the multiplication circuits 109, 110, 111, and 11.
2, 113, 114, and 115 to be multiplied. The multiplication results from each of the multiplication circuits 109 to 115 are subjected to an addition process by the addition circuit 117 and output from the output terminal 118 as a filter output.

The data generator 102 and the coefficient generator 116 shown in the figure are well known to those skilled in the art, and do not limit the configuration, so that detailed configurations are omitted.

FIG. 2 is a diagram showing the operation of the digital filter according to the first embodiment of the present invention in the case where image data is subjected to filtering processing.
It is a figure which shows operation | movement of 5,106,107,108. In this operation, the output located in the middle of the outputs from the data generation unit 102, that is, the data output from D3 is referred to as a center tap.

Here, there are 26 lines of image data, of which 5 lines from line 0 to line 4 are invalid data at the top of the image, 16 lines from line 5 to line 20 are valid data, and lines 21 to 21 are valid data. It is assumed that five lines up to 25 are invalid data at the bottom of the image.

The starting point for filtering image data is
This is when the center tap reaches the upper end of the valid data, that is, when the center tap becomes line 5. In this case, D0 to D6 of the data generation unit 102 include the line 2
, The line 8 is output, of which D0 to D2, that is, the lines 2 to 4, are invalid data.
Therefore, all of the selectors 103, 104, 105
That is, the data of line 5 is selected. Also, D3 to D
6, ie, lines 5 to 8 are valid data. Therefore, the selector 106 selects D4, that is, line 6
, The selector 107 selects D5, that is, the data of the line 7, and the selector 108 selects D6, that is, the data of the line 8.

Accordingly, the filter output in this case is: D3 × C0 + D3 × C1 + D3 × C2 + D3 × C3 + D
4 × C4 + D5 × C5 + D6 × C6 = D3 × (C0 + C
1 + C2 + C3) + D4 × C4 + D5 × C5 + D6 × C
6

This filter output corresponds to D3, that is, the data of line 5, which is the upper end of the image data, is expanded by three lines, which is the number of invalid data lines.

When the center tap is at line 6,
The selectors 103 and 104 select D2, that is, the data of the line 5, and select the selectors 105, 106, 107 and
Reference numeral 8 selects the data of D2, D4, D5, and D6, that is, the data of line 5, line 7, line 8, and line 9, respectively.

Accordingly, the filter output in this case is: D2 × (C0 + C1 + C2) + D3 × C3 + D4 × C4
+ D5 × C5 + D6 × C6.

This filter output corresponds to D2, that is, the data of line 5, which is the upper end of the image data, is expanded by two lines, which is the number of invalid data lines.

Further, when the center tap is line 7, the selector 103 selects D1, ie, the data of line 5, and selects the selectors 104, 105, 106, 107,
108 selects data of D1, D2, D4, D5, and D6, that is, data of line 5, line 6, line 8, line 9, and line 10, respectively.

Accordingly, the filter output in this case is: D1 × (C0 + C1) + D2 × C2 + D3 × C3 + D4
× C4 + D5 × C5 + D6 × C6.

This filter output corresponds to D1, that is, the data of line 5, which is the upper end of the image data, is expanded by one line which is the number of invalid data lines.

When the center tap is line 8, that is, when all the data output from the data generation unit 102 are valid data, the selectors 103, 104, 10
5, 106, 107, and 108 are D0, D1, and D, respectively.
2, D4, D5 and D6, that is, lines 5, line 6, line 7, line 9, line 10, and line 11 are selected.

As a result, the filter output is: D0 × C0 + D1 × C1 + D2 × C2 + D3 × C3 + D
4 × C4 + D5 × C5 + D6 × C6.

When the center tap is from line 9 to line 17, the selectors 103, 104, 1
05, 106, 107, and 108 are D0, D1,
D2, D4, D5 and D6 are selected.

When the center tap is the line 18, the selectors 103, 104, 105, 106 and 107 are connected to D0, D1, D2, D4 and D5,
5, line 16, line 17, line 19, line 20
, And the selector 108 selects D5, that is, the data of the line 20.

Accordingly, the filter output in this case is: D0 × C0 + D1 × C1 + D2 × C2 + D3 × C3 + D
4 × C4 + D5 × (C5 + C6)

This filter output corresponds to D5, that is, the data of the line 20, which is the lower end of the image data, is expanded by one line which is the number of invalid data lines.

When the center tap is the line 19, the selectors 103, 104, 105, and 106
0, D1, D2, D4, ie, line 16, line 1
7, the data of the line 18 and the data of the line 20 are selected, and the selectors 107 and 108 select D4, that is, the data of the line 20.

Accordingly, the filter output in this case is: D0 × C0 + D1 × C1 + D2 × C2 + D3 × C3 + D
4 × (C4 + C5 + C6)

This filter output corresponds to D4, that is, the data of line 20, which is the lower end of the image data, is expanded by two lines, which is the number of invalid data lines.

When the center tap is the line 20, the selectors 103, 104, 105
0, D1, and D2, that is, the data of line 17, line 18, and line 19 are selected, and selectors 106, 107, and 1 are selected.
08 selects D3, that is, the data of the line 20.

Accordingly, the filter output in this case is: D0 × C0 + D1 × C1 + D2 × C2 + D3 × (C3 +
C4 + C5 + C6).

This filter output corresponds to D3, that is, the data of line 20, which is the lower end of the image data, is expanded by three lines, which is the number of invalid data lines.

<Second Embodiment> FIG. 3 shows a second embodiment of the present invention.
FIG. 3 is a block diagram illustrating a schematic configuration of a digital filter according to the embodiment. The digital filter according to the second embodiment of the present invention has the same basic configuration as that of the first embodiment described above, except that other valid data to be selected in place of invalid data is different from the above. I have.

In FIG. 3, image data, which is an input signal from an input terminal 301, is supplied to a data generation unit 302, and the data generation unit 302 simultaneously outputs seven consecutive lines of data D0 to D6. Coefficient generator 316
Outputs seven predetermined weighting factors C0 to C6.

The selectors 303, 304, and
305, 306, 307, 308 select data. The selector 303 selects one of four types of data D0, D2, D4, and D6. Selector 304
Selects one of three types of data, D1, D3, and D5. The selector 305 selects one of two types of data D2 and D4. The selector 306 selects D2
And one of two types of data D4. The selector 307 selects one of the three types of data D1, D3, and D5. The selector 308 selects one of the four types of data D0, D2, D4, and D6.

The data and weighting factors obtained as described above are multiplied by multiplication circuits 309, 310, 311 and 31.
2, 313, 314, and 315 and are subjected to multiplication processing. The multiplication results from the multiplication circuits 309 to 315 are added by the addition circuit 317 and output from the output terminal 318 as a filter output.

FIG. 4 illustrates an operation when a digital filter according to a second embodiment of the present invention performs filtering of image data.

When the center tap is line 5, D0 to D6 of the data generation unit 302 include lines 2 to 8
Are output, of which D0 to D2, that is, lines 2 to 4, are invalid data. Then, the selector 303 selects D6, that is, the data of the line 8, and
The selector 304 selects D5, that is, line 7, and the selector 305 selects D4, that is, line 6. D3 to D6, that is, lines 5 to 8 are valid data. Then, the selector 306 selects D4, that is, the data of the line 6, and the selector 307 selects D5.
That is, the data of line 7 is selected, and selector 308 is selected.
Selects D6, that is, data of line 8.

Accordingly, the filter output in this case is D6 × C0 + D5 × C1 + D4 × C2 + D3 × C3 + D
4 × C4 + D5 × C5 + D6 × C6 = D3 × C3 + D4
× (C2 + C4) + D5 × (C1 + C5) + D6 × (C
0 + C6).

This filter output is equivalent to the data D3, that is, the data of line 5, which is the upper end of the image, and is expanded vertically symmetrically by three lines, which is the number of invalid data lines, in the first part. .

Since the invalid data is also included when the center tap is line 6 and line 7, the data is similarly symmetrical in the first part centering on the data of line 5 which is the upper end of the image by the number of invalid data lines in the first part. Processed as if it were decompressed.

On the other hand, when the center tap near the lower end is line 18, line 19, and line 20, invalid data is also included. Processing is performed as if the data were vertically symmetrically expanded by the number of data lines.

As described above, in the above-described first embodiment of the present invention, the process of extending the end data of the valid data by the number of invalid data lines is performed instead of the invalid data. On the other hand, in the second embodiment of the present invention, processing is performed so as to be vertically symmetrical by the number of lines of invalid data. However, it is not necessary to change the number of inputs of each selector, and almost the circuit configuration is changed. It is not necessary.

As described above, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention.
For example, in the above embodiment, a case where a seven-tap digital filter is used has been described, but the number of taps is not particularly limited, and any number of taps may be used. In addition, according to the present invention, the effect increases as the number of taps increases.

Further, in the above embodiment, the filtering processing in the vertical direction such as the upper end and the lower end of the image data is performed. However, the filtering processing in the horizontal direction such as the left end and the right end of the image data and the two-dimensional filtering are performed. It can also be applied to processing.

[0089]

As is apparent from the above description, according to the digital filter of the present invention, when at least one invalid data is output from the data generating unit, the data is output from the data generating unit instead of the invalid data. A means for changing the data to another valid data is provided before the multiplication means.

Therefore, when filtering the image data with the digital filter according to the present invention, even if invalid data exists outside the end of the image data, a filter output without distortion can always be obtained. .

Further, according to the digital filter of the present invention, since a complicated circuit configuration such as an arithmetic circuit is not used in the selector for reassembling the invalid data in place of the invalid data described above, a hardware scale Hardly increases.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of a digital filter according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating an operation example of a digital filter according to the first embodiment of the present invention.

FIG. 3 is a block diagram illustrating a schematic configuration of a digital filter according to a second embodiment of the present invention.

FIG. 4 is a diagram illustrating an operation example of a digital filter according to a second embodiment of the present invention.

FIG. 5 is a block diagram showing a first configuration example of a conventional digital filter.

FIG. 6 is a diagram illustrating an operation example of the digital filter of FIG. 5;

FIG. 7 is a block diagram showing a first configuration example of a conventional digital filter.

FIG. 8 is a diagram showing an operation example of the digital filter of FIG. 7;

[Explanation of symbols]

 Reference Signs List 101 input terminal 102 data generator 103-108 selector 109-115 multiplier 116 coefficient generator 117 adder 118 output terminal

 ──────────────────────────────────────────────────の Continued on the front page F term (reference) 5B057 AA20 CE06 CH09 5C021 PA32 PA42 PA62 PA66 PA67 PA83 RA06 RB08 SA21 XB11 5C077 LL02 LL17 LL19 NP03 PP01 PQ30

Claims (9)

[Claims] 1. A data generating means for simultaneously outputting a plurality of continuous data from an input signal; a coefficient generating means for generating a predetermined number of weight coefficients equal to the number of the plurality of data outputted by the data generating means; A digital filter comprising: a plurality of multiplying means for multiplying the plurality of data by the weighting coefficient; and an adding means for adding a multiplication result of each of the plurality of multiplying means. A digital filter, comprising: when at least one invalid data is output from the data generating means, rearranging the valid data to another valid data output by the data generating means in place of the invalid data. . 2. The digital filter according to claim 1, wherein said rearrangement means is provided at least less than said plurality of data numbers (the number of taps). 3. The method according to claim 2, wherein the rearrangement unit is provided in addition to the center tap when the number of data (the number of taps) output from the data generation unit is an odd number. Item 3. The digital filter according to Item 2. 4. When the number of data (the number of taps) output from the data generation means is N even numbers, the rearrangement means is provided in addition to the (N / 2) -1st tap. 3. The digital filter according to claim 2, wherein: 5. A method of processing a digital filter comprising a data generator, a plurality of selectors, a plurality of multipliers, a coefficient generator, and an adder. A data generating step of simultaneously outputting a plurality of pieces of continuous data from the data generating section, and invalid data included in the plurality of pieces of data output from the data generating section by the plurality of selectors. And a coefficient generation step of generating the same number of predetermined weighting coefficients as the plurality of data output from the data generation unit by the coefficient generation unit; and the plurality of multipliers rearranged by the selector. A multiplication step of multiplying the data by the weight coefficient generated by the coefficient generation unit; and the plurality of multipliers by the adder Processing method for a digital filter, characterized in that it has a, an adding step for adding the result of the calculation. 6. The digital filter processing method according to claim 5, wherein the same number of multipliers as the plurality of data generated by the data generator are provided. 7. The digital filter according to claim 5, wherein the plurality of selectors are provided at least less than the number of the plurality of data (the number of taps) output from the data generation unit. Processing method. 8. The method according to claim 1, wherein the plurality of selectors are provided in addition to the center tap when the number of data (the number of taps) output from the data generation unit is an odd number. The method for processing a digital filter according to claim 7. 9. When the plurality of data (number of taps) output from the data generation unit is N even numbers, the plurality of selectors are provided in addition to the (N / 2) -1st tap. The method according to claim 7, wherein the processing is performed.