JP2001077414A - Group iii nitride semiconductor light-emitting diode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a short-circuit communication with a region directly under a p-type stage electrode by forming a p-type group III nitride semiconductor layer by vapor-phase growth before an n-type group III nitride semiconductor joint layer is formed by vapor-phase growth, and removing the n-type group III nitride semiconductor joint layer except for the protective region of a p-type stage electrode. SOLUTION: A p-type group III nitride semiconductor layer 12 is formed using vapor-phase growth. With the p-type group III nitride semiconductor layer 12 as a base material layer, an n-type group III nitride semiconductor layer 13 is laminated in the same film-forming environment. An n-type group III nitride semiconductor layer 13 provided being limited to a region below a region where a p-type stage electrode 14 is left, so that a p-n junction structure 12c comprising the p-type group III nitride semiconductor layer 12 and n-type group III nitride semiconductor layer 13 is left in a region limited to below the p-type stage electrode 14. The p-n junction structure 12c prevents the element current supplied through the p-type stage electrode 14 from entering a luminous layer in short-circuit manner.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a group III nitride semiconductor light emitting device, and more particularly, to a high light emission intensity having a low resistivity p-type group III nitride semiconductor layer in an as-grown state. And a group III nitride semiconductor light emitting device.

[0002]

2. Description of the Related Art A conventional III-nitride semiconductor light emitting device such as a light emitting diode (LED) or a laser diode (LD) has a light emitting layer and a barrier (cladding) sandwiching the light emitting layer.
Junction type double hetero (DH) composed of layers
A light emitting unit having a structure is provided. The group III nitride semiconductor crystal layer refers to a general formula Al _X Ga _Y In _Z N (0 ≦ X, Y, Z) containing nitrogen (element symbol: N) as a group V constituent element.
≦ 1, X + Y + Z = 1) is a crystal layer made of a group III-V compound semiconductor. The general formula Al _X G
_{a Y In Z N 1-Q} M Q (0 ≦ X, Y, Z ≦ 1, X + Y + Z =
1, the symbol M is a Group V element other than nitrogen, and 0 ≦ Q <
It is a crystal layer composed of a III-V compound semiconductor represented by 1). For example, a pn junction composed of a clad layer made of n-type and p-type aluminum gallium nitride (Al _x Ga _{1 -x} N: 0 ≦ X ≦ 1) and an indium-containing group III nitride semiconductor layer A light emitting portion having a type DH structure is known (Jpn. J. Appl. Phys.,
Vol. 34, Part 2, no. 10B (199
5), see pages L1332 to L1335). In the light emitting layer,
Gallium nitride with a forbidden band width at room temperature that is convenient for emitting short-wavelength visible light such as the blue band and the green band from the ultraviolet band.
It is generally composed of indium (Ga _X In _1-X N: 0 ≦ X ≦ 1) (see Japanese Patent Publication No. 55-3834).

A p-type light emitting portion having a pn junction type DH structure has a p-type structure.
Form and n-type group III nitride semiconductor crystal layers are usually formed by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), halogen (halogen).
The film is formed by a vapor deposition (VPE) method such as a hydride method or a hydride method. Low-resistance p-type III constituting a light-emitting portion having a pn junction type DH structure
The group nitride semiconductor layer is formed, for example, by vapor-phase growing a growth layer to which a group II p-type impurity such as magnesium (element symbol: Mg) or zinc (element symbol: Zn) is added by MOCVD. It is formed again by means of performing a heat treatment at a temperature of 400 ° C. or higher (see Japanese Patent No. 2836685). In performing a heat treatment for electrically activating the p-type impurity to lower the resistance, Ga _x Al _1-x is formed on the surface of the group III nitride semiconductor layer doped with the p-type impurity.
N (0 ≦ X ≦ 1), AlN, Si ₃ N ₄ , or SiO ₂
(Japanese Patent No. 2540791 and Japanese Patent No. 2790235) is also disclosed which is performed after the formation of a surface protective layer (cap layer) made of. Also, as-grown
There is also known a method of forming a low-resistance p-type conductive layer by a technique of irradiating a group III nitride semiconductor layer doped with Mg, which has a high resistance in the state, with an electron beam in a vacuum environment (Japanese Patent Publication No. Hei 6-1994). 9258 and Japanese Patent No. 2500319).

A conventional group III nitride semiconductor light emitting device having a light emitting portion having a pn junction type DH structure is as-grown.
The p-type ohmic (O) is formed on the p-type group III nitride semiconductor layer, which has been reduced in resistance by the heat treatment means from the high-resistance layer in the state.
hmic) electrodes are provided in direct contact with each other. In the structure heat-treated with the surface protective layer as described above, the p-type II exposed by removing the protective layer over the entire area after the heat treatment.
A p-type ohmic electrode is disposed on the surface of the group I nitrided semiconductor layer (see the above-mentioned Patent Nos. 2540791 and 2790235). In an LED of a system in which light is emitted to the outside by transmitting through the p-type group III nitride semiconductor layer, the ohmic electrode laid on the surface of the p-type group III nitride semiconductor layer has a light-transmitting property. It is composed of a metal thin film or a transparent oxide. There is a conventional example in which a translucent metal thin film electrode is formed of nickel (element symbol: Ni) or nickel oxide (NiO) (Japanese Patent No. 2916).
No. 424). Further, a conventional technique using zinc oxide (ZnO) as a transparent oxide electrode is known (see US Pat. No. 5,889,295). Further, a pedestal electrode for connection for supplying an element operating current is made of gold (element symbol: Au) or the like, and is provided in electrical contact with the ohmic electrode (Japanese Patent Laid-Open No. 7-1995).
106633).

[0005]

A light-emitting portion having a pn junction type DH structure and a low-resistance p-type group III nitride semiconductor layer resulting in good ohmic contact are difficult to obtain in an as-grown state. As described above, the formation of the group III nitride semiconductor layer is complicated because a post-process such as heat treatment is required again after the vapor phase growth. In addition, since the means for lowering resistance by electron beam irradiation needs to irradiate an electron beam under a relatively low acceleration voltage of 3 kV (kV) to 30 kV (see Japanese Patent Publication No. 6-9258 and Japanese Patent No. 2500319). I) doped with a p-type impurity with a limited depth from the surface where the electron beam can penetrate and reach.
It has been pointed out that the p-type impurity cannot be uniformly activated in the depth direction of the group II nitride semiconductor layer (see Japanese Patent No. 2836685). That is, there is a disadvantage that it is difficult to obtain a low-resistance group III nitride semiconductor layer having a uniform resistivity in the depth direction from the layer surface.

A low resistance III in an as-grown state does not require a post-process for lowering the resistance such as annealing.
If a group III nitride semiconductor layer can be obtained, the pn junction type I
A group II nitride semiconductor light emitting device can be provided. As described above, the magnitude of the resistance of the group III nitride semiconductor layer doped with the p-type impurity depends on the concentration of the hydrogen impurity contained in the layer. One effective means for obtaining a low-resistance p-type group III nitride semiconductor crystal layer is to use a crystal layer from a growth environment when growing a group III nitride semiconductor crystal layer doped with a p-type impurity in a vapor phase. The object is to reduce the concentration of hydrogen (hydrogen atoms) in advance in advance. Already, an aluminum phosphide / gallium / indium mixed crystal ((Al _X G
a _1-X ) _0.5 In _0.5 P: III-V such as 0 ≦ X ≦ 1)
The group III compound semiconductor crystal layer was doped with Zn by MOCVD (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P
An n-type or p-type gallium arsenide (GaAs) crystal layer is stacked on the layer to form a p-type Al
A method for suppressing intrusion of hydrogen into the inside of a GaInP layer is known (J. Crystal Growth., 1).
18 (1992), pp. 425-429).

In the conventional electrode arrangement in which a p-type ohmic electrode and a p-type pedestal electrode for supplying a device operating current are directly provided on the p-type group III nitride semiconductor layer, the device operating current is short-circuited. The problem that the inconvenience of intensively and intensively flowing into the region directly below the pedestal electrode cannot be avoided. For this reason, for example, the device operating current cannot be sufficiently diffused in a plane substantially over the entire light-emitting surface through the light-transmitting metal thin-film electrode, and the light-emitting surface is extended to increase the high-output I
At present, it is difficult to obtain a group II nitride semiconductor light emitting device.

The present invention has been made in view of the above-mentioned problems of the prior art, and has a low resistance p-type II in an as-grown state.
It provides a technical means for providing a group I nitride semiconductor layer, and provides a p-type I which has a low resistance in an as-grown state.
High light emission including a group II nitride semiconductor layer and having a function of preventing short-circuit flow to a region immediately below a p-type pedestal electrode, which is configured using a junction structure related to the group III nitride semiconductor layer. It is an object of the present invention to provide an output group III nitride semiconductor light emitting device.

[0009]

Means for Solving the Problems The present inventors have made intensive studies to solve the above-mentioned problems, and as a result, have reached the present invention.
That is, the present invention relates to [1] a group III nitride semiconductor light emitting device having a pn junction type light emitting portion, in which a p-type ohmic electrode and a p-type pedestal electrode are arranged on a p-type group III nitride semiconductor layer. , A p-type group III nitride semiconductor layer is formed by vapor phase growth and then n-type III
Forming a group III nitride semiconductor junction layer, removing the n-type group III nitride semiconductor junction layer except for a projection region of the p-type pedestal electrode, and forming a p-type ohmic electrode with a p-type group III nitride semiconductor layer; a group III nitride semiconductor light-emitting device formed in contact with an n-type group III nitride semiconductor bonding layer and a p-type pedestal electrode; [2] an n-type group III nitride semiconductor bonding layer comprising 800 P-type II in contact with and above ℃
The group III nitride semiconductor light-emitting device according to [1], wherein the film is formed at a temperature in a range of ± 100 ° C. with respect to the growth temperature of the group I nitride semiconductor layer, [3] n-type group III. The product of the electron concentration (unit: cm ⁻³ ) and the layer thickness (unit: cm) of the nitride semiconductor bonding layer is 5 × 10 ^{10 to} 1.5 ×
The group III nitride semiconductor light-emitting device according to [1] or [2], which is within a range of 10 ¹⁵ cm ^-2 .
[4] The n-type group III nitride semiconductor bonding layer is made of Al _X Ga _Y In _Z N (0 ≦ X, Y, Z ≦ 1, X + Y) doped with silicon.
+ Z = 1), the group III nitride semiconductor light-emitting device according to any one of [1] to [3],
[5] The light emitting layer is formed of a group III nitride semiconductor layer having a multi-phase structure including a main phase and a subordinate layer having a different indium concentration from the main phase [1] to [1]. The group III nitride semiconductor light-emitting device according to any one of [4] and [6] the p-type group III nitride semiconductor layer in contact with the n-type group III nitride semiconductor bonding layer has a resistivity (specific resistance). p-type or less 10 [Omega · cm the Al _X Ga _Y In _Z N
(0 ≦ X, Y, Z ≦ 1, X + Y + Z = 1) III according to any one of [1] to [5],
And a group III nitride semiconductor light emitting device.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram illustrating a first embodiment according to the first aspect of the present invention.
FIG. 2 is a schematic cross-sectional view showing a laminated structure 1 of a group III nitride semiconductor crystal layer. The light emitting unit 1A is, for example, a buffer layer 9 on a crystal substrate 8.
N-type lower cladding layer 10 made of n-type group III nitride semiconductor, light emitting layer 11, and p-type II
The p-type cladding layer 12 is made of a group I nitride semiconductor. The features of the laminated structure in this embodiment are as follows:
The p-type group III nitride semiconductor layer 12 has one main surface 12
At a, for example, it is bonded to the light emitting layer 11 made of an n-type group III nitride semiconductor, and is bonded to the n-type group III nitride semiconductor crystal layer 13 at another main surface 12b. It is in. The light-emitting layer 11 forming a junction on one main surface of the p-type group III nitride semiconductor layer 12 may be composed of a single layer, and may have a single quantum well (abbreviation: SQW) or multiple quantum well structure (MQW) structure is acceptable. The layer that forms a junction with the p-type group III nitride semiconductor layer 12 is disposed, for example, between the light-emitting layer 11 and the p-type group III nitride semiconductor layer 12, for example, the light-emitting layer 1
An n-type “intermediate layer” for causing a change in the band configuration inside 1 may be used (Japanese Patent Laid-Open No. 11-1682).
No. 40).

Another feature of the first embodiment is that the p-type group III nitride semiconductor layer 12 and its one surface 1
A p-type pedestal electrode 14 is formed on a pn junction region 12c composed of an n-type group III nitride semiconductor layer 13 and a n-type group III nitride semiconductor layer 13 left in a part of the region.
Is located.

The above p-type group III nitride semiconductor layer 12
Is a vapor phase growth layer that exhibits p-type conduction in an as-grown state using a group III nitride semiconductor layer doped with a p-type impurity as a material. The as-grown p-type group III nitride semiconductor layer having a low resistivity has completed the vapor phase growth of the group III nitride semiconductor layer 12 doped with a p-type impurity as shown in the laminated structure 1 of FIG. Later, the same structure is used as the underlayer, and the n-type group-III nitride semiconductor layer 13 is laminated “in the same film formation environment” in the same film formation environment. The n-type group III nitride semiconductor bonding layer 13 formed using the group III nitride semiconductor layer 12 doped with a p-type impurity as a base layer invades the base layer 12 from a film forming environment. In the cooling process after the completion of the formation of the stacked structure 1, the semiconductor device has an effect of capturing hydrogen impurities penetrating into the underlayer 12. Therefore, when the n-type group III nitride semiconductor layer 13 is joined to the group III nitride semiconductor layer 12 doped with the p-type impurity and cooled, the group III nitride semiconductor layer 12 doped with the p-type impurity is cooled. Is suppressed and the concentration of hydrogen impurities in the same layer 12 can be maintained at a low concentration.
A low resistance group III nitride semiconductor layer can be formed with the ground.

In the first embodiment, the n-type group III nitride semiconductor layer 13 is provided to prevent intrusion of hydrogen.
Is not uniformly left over substantially the entire surface of the p-type III-V compound semiconductor layer 12 in manufacturing the light emitting device. As shown in FIG. 1, the p-type pedestal electrode 14 is left only in a region below the region where the p-type pedestal electrode 14 is laid, and only the region below the p-type pedestal electrode 14 is left in contact with the p-type group III nitride semiconductor 12. Composed of the doped n-type group III nitride semiconductor layer 13
The n-junction structure 12c is left. Inhibits intrusion of hydrogen impurities, and provides low resistance p-type II in the as-grown state.
The planar shape of the region in which the n-type group III nitride semiconductor layer 13 exhibiting the action of providing the group I nitride semiconductor layer 12 is substantially similar to the bottom shape of the p-type pedestal electrode 14 provided above the same layer It is desirable to do. For example, when providing a p-type pedestal electrode having a circular bottom shape, the planar shape of the region where the n-type group III nitride semiconductor layer remains is also substantially circular. Further, it is desirable that the center of the bottom surface shape of p-type pedestal electrode 14 and the center of the shape of the region in which n-type group III nitride semiconductor layer 13 remains are substantially matched.

In order to leave the n-type group III nitride semiconductor layer 13 only on a specific region on the p-type group III nitride semiconductor layer 12, patterning using a known photolithography technique (photolithography method) ), Means for removing unnecessary n-type group III nitride semiconductor layers by a plasma etching method or the like. Laminated structure 1 of FIG.
Represents an n-type III-nitride semiconductor layer 13 covering the entire surface of the p-type III-nitride semiconductor layer 12 during vapor phase growth.
Is changed to methane (CH ₄ ) / argon (Ar) / hydrogen (H ₂ ) in a region other than the region where the p-type pedestal electrode 14 is arranged.
The state after removing by the system plasma etching method and leaving it only in the region where the p-type pedestal electrode 14 is arranged is shown.

The pn provided below the p-type pedestal electrode 14
The junction structure has a function of preventing the element operating current supplied via the pedestal electrode 14 from flowing into the light emitting layer 11 in a short-circuit manner. In particular, when the bottom of the p-type pedestal electrode 14 formed on the pn junction and in contact with the n-type III-nitride semiconductor layer 13 is made of a material that is non-ohmic to the n-type III-nitride semiconductor 13 The operating current can be more preferentially diffused to the p-type ohmic electrode 15. Materials that easily form a non-ohmic contact with the n-type group III nitride semiconductor include, for example, a gold-zinc (Au-Zn) alloy and a gold-zinc alloy.
There are alloys containing a Group II element such as beryllium alloy (Au-Be). Further, there are oxide materials such as indium tin oxide (abbreviation: ITO), ZnO, and magnesium oxide (MgO).

With reference to FIG. 1, the conventional I
If the ohmic electrode 15 is provided substantially over the entire surface of the p-type group III nitride semiconductor layer 12 by being electrically connected to the pedestal electrode 14 like a group II nitride semiconductor light emitting element, the p-type pedestal electrode 14 Element operating current supplied from
The light can be diffused to almost the entire surface of the light emitting layer 11 through the ohmic electrode 15, and the effect of expanding the light emitting area is exhibited. The p-type ohmic electrode 15 is provided in contact with the p-type III-nitride semiconductor layer 12 whose surface is exposed from which the n-type III-nitride semiconductor 13 has been removed. p-type ohmic electrode 15
Can be composed of, for example, Ni or its oxide, palladium (element symbol: Pd) or its oxide, or the like. Further, it can also be composed of a multilayer structure film in which a transparent oxide film is laminated on these metallic thin films. An LED of a system in which light emitted from the light emitting layer 11 is extracted to the outside through the p-type group III nitride semiconductor layer 13 is provided.
5 has a thickness of about 70
It is recommended to stay below about 50 nanometers (unit: nm) in order to obtain a transmission of between% and about 80% or more.

In the second embodiment according to the second aspect of the present invention, the n-type group III nitride semiconductor layer 13 provided on the surface of the p-type impurity-doped group III nitride semiconductor layer 12 is provided. , 800 ° C. or higher and at a temperature within a range of ± 100 ° C. with respect to the growth temperature of the p-type group III nitride semiconductor layer,
2 consists of a vapor phase growth layer deposited "continuously". “Continuous” film formation means that the p-type impurity-doped layer 1
After the vapor phase growth of No. 2 is completed, the temperature of the group 12 nitride semiconductor layer is generally increased to about 1000 ° C. or more without lowering the temperature of the same layer 12 from 600 ° C. to 700 ° C., for example. This means that the gas is grown continuously and temporally at substantially the same growth temperature as that of the p-type impurity-doped group III nitride semiconductor layer 12 without cooling to the temperature of ° C.

The concentration of hydrogen impurities taken into the group III nitride semiconductor layers 12 and 13 generally increases as the film formation temperature decreases. At high temperatures, hydrogen impurities once in the crystal layer,
Even if it is taken in, sufficient thermal energy to deviate from the inside of the crystal is provided, but at low temperatures, sufficient energy to deviate is not provided, and thus the residual energy remains in the crystal layers 12 and 13. It is envisaged. When forming the n-type group III nitride semiconductor layer 13 subsequent to the p-type impurity-doped group III nitride semiconductor layer 12, the film forming temperature is set to 800
When the temperature is lower than 0 ° C., the concentration of hydrogen impurities remaining in the n-type group III nitride semiconductor layer 13 is usually about 1 × 10 ¹⁹ atoms /
The density significantly increases beyond cm ³ , and the excessive diffusion of hydrogen impurities hinders a reduction in the resistance of the p-type impurity-doped group III nitride semiconductor layer 13. Therefore, n-type II
The film formation temperature of the group I nitride semiconductor layer 13 is preferably set to 800 ° C. or higher.

The n-type group III nitride semiconductor layer 13 formed within a range of ± 100 ° C. with respect to the growth temperature of the p-type impurity-doped group III nitride semiconductor layer 12 has an as-gr
It advantageously acts to provide the p-type group III nitride semiconductor layer 12 in the down state. p-type group III nitride semiconductor layer 1
When the n-type group III nitride semiconductor layer 13 is formed at a temperature limited to ± 100 ° C. with reference to the growth temperature of No. 2, the hydrogen impurity concentration of the n-type group III nitride It can be substantially the same as that of the group III nitride semiconductor layer 12. Thus, the difference in the concentration of hydrogen impurities in the crystal layers 12 and 13 is used as power to make the n-type III
Diffusion and intrusion of hydrogen impurities from the group III nitride semiconductor layer 13 into the p-type impurity-doped group III nitride semiconductor layer 12 can be suppressed. Therefore, the p-type impurity doping III
The group nitride semiconductor layer 12 can be efficiently converted to a low-resistance p-type group III nitride semiconductor layer. For example, M
Mg-doped G deposited at 1050 ° C by OCVD method
The concentration of hydrogen impurities in the aN layer depends on the Si-doped G
With the configuration in which the aN layer is bonded, about 1 × 10
It is reduced to ¹⁸ cm ^-3 or less. The concentration of hydrogen impurities in the group III nitride semiconductor layer is determined by secondary ion mass spectrometry (abbreviation:
(SIMS) or the like.

Furthermore, if the carrier (electron) concentration (cm ⁻³ ) and the layer thickness (cm) of the n-type group III nitride semiconductor layer 13 are appropriately adjusted, the group III nitride semiconductor layer doped with a p-type impurity can be adjusted. 12 can be more efficiently prevented from entering the hydrogen impurities. An effective means for better suppressing the intrusion of hydrogen impurities is to reduce the layer thickness of the n-type group III nitride semiconductor layer 13 having a high carrier concentration, and to increase the layer thickness if the carrier concentration is low. Is to do. That is, the product value of the carrier (electron) concentration value and the layer thickness value is set within a specified range. The preferable range is, that is, at least 5 × 10 ¹⁰ cm ⁻² and 1.5 as described in claim 4 of the present invention.
× 10 ¹⁶ cm ^-2 or less. By containing the product within this range, the intrusion of hydrogen impurities into the p-type impurity-doped group III nitride semiconductor layer 12 can be effectively prevented because hydrogen impurities such as hydrogen ions (H ⁺ : protons) Group III nitride semiconductor layers 12 and 13 due to bonding with electrons
Are converted to volatile components such as H ₂ which easily deviate from
It is considered that volatilization from within 13 is also a factor. In the n-type group III nitride semiconductor layer 13 that gives a product smaller than the preferred range described above, the concentration of electrons existing in a unit area is small, so that hydrogen impurities cannot be sufficiently converted to volatile components, and As a result, the concentration of hydrogen impurities penetrating into the p-type impurity-doped group III compound semiconductor layer 12 cannot be effectively reduced. On the other hand, if the electron concentration existing in the unit area beyond the above range is increased, the p-type impurity doped I
Diffusion of electrons into the group II compound semiconductor layer 12 occurs,
This hinders obtaining the p-type group III nitride semiconductor layer 12 having a low resistance. The preferred carrier (electron) concentration is 5 × 10
It is not less than ¹⁵ cm ^{-3 and not} more than 1 × 10 ¹⁹ cm ^-3 .

The preferable range of the thickness of the n-type group III nitride semiconductor layer 13 is 5 nm (= 5 × 10 ⁻⁷ c).
m) and not more than 5 μm (= 5 × 10 ⁻⁴ cm). Further, the preferable range of the layer thickness is 10 nm or more and 1.5 μm or less. Therefore, in the third embodiment according to the third aspect of the present invention, the n-type group III nitride semiconductor layer 1 bonded to the p-type impurity-doped group III nitride semiconductor layer 12 is used.
3 is determined by the carrier (electron) concentration (cm ⁻³ ) and the layer thickness (c).
m) is 1.5 × 10 ^{16 when} the multiplied value of 5) is 5 × 10 ¹⁰ cm ⁻² or more.
It is composed of a vapor phase growth layer of cm ⁻² or less. The carrier concentration is determined by the ordinary capacity (C) -voltage (V) (so-called CV method).
It can be measured by a method or the like.

Referring to the laminated structure 1 shown in FIG.
The n-type group III nitride semiconductor 13 which functions to provide a low-resistance p-type group III nitride semiconductor layer 12 in an as-grown state is formed of silicon (element symbol: S
i), selenium (element symbol: Se) and sulfur (element symbol:
A film can be formed by doping an n-type impurity such as S). The n-type group III nitride semiconductor layer 13 can be formed by undoping, but in order to stably obtain the n-type group III nitride semiconductor layer 13 having a substantially constant carrier (electron) concentration, the above-described donor is used. It is advisable to dope impurities. In particular, Si is composed of selenium or tellurium (element symbol: T
As compared to group VI elements such as e), thermal diffusion is less likely to occur in the group III nitride semiconductor layer 13. Therefore, by bonding to the group III nitride semiconductor layer 12 doped with a p-type impurity,
Assuming that the silicon-doped group III nitride semiconductor layer 13 is subsequently laminated, silicon as a dopant diffuses into the group III nitride semiconductor layer 12 doped with a p-type impurity,
The probability of intrusion is reduced. That is, when silicon is used as the n-type dopant, the degree of electrical compensation of the activated p-type impurity (acceptor) is reduced, and as-g
It is more convenient to obtain the p-type group III nitride semiconductor layer 12 with a low resistance. Therefore, claim 4 of the present invention
In the fourth embodiment according to the invention, the n-type group III nitride semiconductor layer 13 which is joined to the group III nitride semiconductor layer 12 doped with the p-type impurity is made of a silicon-doped group III nitride semiconductor. Is particularly preferred. In particular, the n-type group III nitride semiconductor layer has a high doping efficiency of Si and an excellent control of the doping concentration, and is an n-type aluminum gallium indium nitride (Al _x Ga _{y).
In Z N: 0 ≦ X,} Y, can preferably consist of Z ≦ 1, X + Y + Z = 1).

According to a fifth embodiment of the present invention, there is provided a multi-phase structure comprising a plurality of phases having different indium (In) compositions.
-Phase), the n-type III-nitride semiconductor layer on the indium-containing III-nitride semiconductor light-emitting layer
A laminated structure is formed in which the group nitride compound layers are joined. It has already been clarified by the present inventor that a light emitting layer having a multiphase structure is superior in obtaining high-intensity light emission (see US Pat. No. 5,886,367).
Therefore, the light emitting layer is composed of an indium-containing group III nitride semiconductor layer having a multiphase structure, and a
n-type I as a hydrogen impurity intrusion prevention layer for forming a p-type group III nitride semiconductor layer with s-grown and low resistance
A group III nitride semiconductor light emitting device having excellent light emission intensity can be formed from the configuration in which the group II nitride semiconductor layer is covered.

The multi-phase structure light emitting layer generally means a volume
Matrix phase that occupies the majority
And a subordinate phase (su) scattered and subordinate to the main phase
b-phase) and indium-containing II
It is a group I nitride semiconductor layer. For example, GaI having a multi-phase structure
In the nN crystal layer, the main phase is more indium than the subordinate phase
It is usual to make the composition ratio small. Therefore, the subject phase is the dependent phase.
In general, the forbidden band width is set to be larger than the forbidden band width. As an example
For example, Ga having an indium concentration of about 5% is used. _0.95In
_0.05N main phase and average indium concentration of 1
Ga to be 6% _0.84In_0.16Consists of N dependent phases
There is a multi-phase GaInN layer to be formed. Also, mainly GaN
G which is a body phase and has an average indium composition ratio of 10%
a_0.90In_0.10Multiphase with microcrystalline body consisting of N as a dependent phase
There is an example of a structure GaInN light emitting layer. Indium composition
Whether or not it has a multiphase structure is determined, for example, by a transmission electron microscope.
According to the cross-sectional TEM technique using a mirror (abbreviation: TEM),
Investigate the distribution of indium concentration inside the light emitting layer
Known.

According to a sixth embodiment of the present invention, the resistivity at room temperature formed in an as-grown state by cooling while keeping the n-type bonding layer laminated as described above. (Specific resistance) 10 ohm-cm (unit: Ω-cm) or less p-type Al _X Ga _{Y
In Z N (0 ≦ X,} Y, Z ≦ 1, X + Y + Z = 1) and by utilizing as a p-type Group III nitride semiconductor layer having a low resistance II
A group I nitride semiconductor light emitting device is formed. For example, p-type I
P forming a pn junction type DH structure from a group II nitride semiconductor layer
In the case of forming a shaped cladding layer, in order to obtain a barrier effect of confining carriers in the light emitting layer, a band gap larger than the light emitting layer, particularly larger than the main phase in the multi-phase structure light emitting layer. It is made of a group III nitride semiconductor having a band width. Considering that the main phase may be composed of GaN in the light emitting layer having the multiphase structure as described above, p
Form III nitride semiconductor layer is _{Al X Ga Y In Z N 1} -Q M Q
(0 ≦ X, Y, Z ≦ 1, X + Y + Z = 1, the symbol M is a Group V element other than nitrogen, and 0 ≦ Q <1) rather than Al _X G
_{a Y In Z N (0 ≦} X, Y, Z ≦ 1, X + Y + Z = 1) can be conveniently constructed from. In Al _X Ga _Y In _Z N, Al _{X
Ga Y In Z N 1-Q} M Q easy high band gap can be obtained as compared to a light-emitting layer for example, 0.3 electron volts (unit: eV) of about cladding layer or the like is easily with a barrier difference It can be configured and convenient.

Low resistivity p-type Al _X Ga _Y In _Z N (0 ≦ X, Y, Z ≦ 1, X +
The means necessary to obtain (Y + Z = 1) in the as-grown state are as follows. First, as described in the present invention, the Al _x Ga _Y In _Z N layer doped with a p-type impurity is vapor-phase grown, The cooling consists in bonding the n-type group III nitride semiconductor layer grown "continuously" to the layer. By bonding an n-type group III nitride semiconductor layer doped with Si and having a product value of a carrier concentration value and a layer thickness value within the above-described preferable range, a p-type Al _x having a low resistance can be more efficiently formed. Ga _Y In _Z
An N layer can be obtained.

It is important that the cooling after forming the n-type group III nitride semiconductor layer is performed in an atmosphere containing a nitrogen-containing compound such as a nitrogen source used for vapor phase growth. For example, in the case where ammonia (NH ₃ ) is used for growing the group III nitride semiconductor layer, it is preferable to cool in an atmosphere containing ammonia. Dimethyl hydrazine of an asymmetric molecular structure type
(adine). Nitrogen-containing compounds and nitrogen (N ₂ ) constituting the atmosphere during cooling are hardly suitable. Since the dissociation energy of nitrogen is relatively large at about 225 kcal / mole (kcal / mole) (Barlow, “Physical Chemistry (above)” (Tokyo Kagaku Dojin Co., Ltd., issued May 1, 1972, No. 1) 9th edition), 175
１７ 178), it is not easily dissociated into nitrogen atoms, and therefore, deterioration of the surface state of the group III nitride semiconductor layer due to sublimation and generation of a large amount of nitrogen vacancies cannot be avoided. Cooling in an atmosphere containing a nitrogen-containing compound with a smaller dissociation energy than nitrogen prevents generation of nitrogen vacancies during cooling and deterioration of the surface state due to sublimation of the n-type group III nitride semiconductor layer it can.

It is said that the nitrogen vacancy functions as a donor (see Japanese Patent Application Laid-Open No. 54-71589). According to the cooling means for suppressing the generation of nitrogen vacancies, p
Concentration of the donor nitrogen vacancies diffusing into the impurity-doped group III nitride semiconductor layer is reduced, and as-gr
There is an effect that the p-type group III nitride semiconductor layer can be more easily provided in the down state. It is preferable to cool in an atmosphere containing a nitrogen-containing compound until the temperature is lowered to at least 800 ° C. In a temperature range lower than 800 ° C., sublimation of the group III nitride semiconductor does not occur so remarkably, so that the surface state is not impaired even if cooling is not performed in a nitrogen-containing atmosphere, and a large amount of nitrogen No voids are generated.

The resistivity of the p-type group III nitride semiconductor layer is:
After cooling, the n-type group III nitride semiconductor is removed, and a step (stepwise) etching method is also used.
It can be measured by the effect measurement method. For the purpose of measuring the resistivity of the p-type group III nitride semiconductor layer, if the p-type group III compound semiconductor layer is deposited on a high-resistance body, the carrier can be measured using a normal Hall effect measurement method. The resistivity including the (hole) concentration and Hall mobility can be measured.

The lower the resistivity of the p-type group III nitride semiconductor layer in the as-grown state, the better. For example, an as-grown p-type group III nitride semiconductor layer having a low resistivity of about 1 Ω · cm can also be used as a p-type contact layer for laying a p-type ohmic electrode. In particular, in order to obtain a low resistivity p-type group III nitride semiconductor layer of several Ω · cm in the as-grown state, the concentration of the p-type impurity in the p-type impurity-doped group III nitride semiconductor layer as a material is About 1 × 1
It is advisable to store it at about 1 × 10 ¹⁹ cm ^-3 when it is 0 ¹⁸ cm ^-3 or more. In particular, the p-type impurity is magnesium (M
g), the concentration of Mg atoms in the layer is about 2
Good results can be obtained by ^setting the range of × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁸ cm ⁻³ .

[0031]

(Embodiment 1) In this embodiment, a blue light emitting diode (LED) 2 is formed from a laminated structure 20a composed of a group III nitride semiconductor layer laminated on an n-type silicon single crystal substrate.
The present invention will be described in detail with an example of configuring 0. FIG.
1 is a schematic cross-sectional view of an LED 20 according to the present embodiment.

The laminated structure 20a is made of phosphorus (element symbol:
P) a polycrystalline, n-type first buffer layer 202a mainly composed of zinc blende-type cubic boron phosphide (BP), which is sequentially laminated on a doped n-type silicon single crystal substrate 201; An n-type buffer layer 202 composed of an n-type second buffer layer 202b mainly composed of cubic BP formed at a higher temperature than the buffer layer 202a, a lower cladding layer 203 composed of silicon-doped n-type gallium nitride (GaN), The main phase S is n-type GaN, and a gallium nitride-indium mixed crystal (Ga _0.9 In _0.1 N) having an average indium composition ratio of 0.1 is a sub phase T.
N-type light-emitting layer 204 having a multi-phase structure, an intermediate layer 205 made of Mg-doped high-resistance Al _0.9 Ga _0.1 N, an upper cladding layer 206 also serving as a contact layer made of Mg-doped p-type GaN, and a Si-doped n-type GaN layer 207.

First and second buffer layers 202a, 202b
Is an MO that uses triethyl boron ((C ₂ H ₅ ) ₃ B) as a boron (B) source and phosphine (PH ₃ ) as a phosphorus (P) source.
The film was formed by the CVD method. The polycrystalline first buffer layer 202a is formed at 440 ° C., and the monocrystalline second buffer layer 202b is
After the formation of the first buffer layer 202a was completed, the temperature of the substrate 201 was increased to 1100 ° C. in an atmosphere containing phosphine to form a film. Each of the epitaxial constituent layers 202 to 207 is formed of a trimethyl gallium ((CH ₃ ) ₃ Ga) / trimethyl aluminum ((CH ₃ ) ₃ Al) / trimethyl indium ((CH ₃ ) ₃ In) / ammonia (NH ₃ ) -based reduced pressure. It was grown by the MO-VPE method. About 10 ppm by volume of disilane (Si ₂ H ₆ ) as a silicon doping source
A silane-hydrogen mixed gas containing at a concentration of? Mg
Bis-cyclopentadienyl Mg
Using _{(bis- (C 5 H 5)} 2 Mg). The doping amount of Mg into the Mg-doped GaN layer 206 is about 4 × 10
^It was set to ¹⁸ cm ^-3 .

The temperature for forming the light emitting layer 204 having a multiphase structure is 89.
0 ° C., and the other group III nitride semiconductor growth layers 203, 2
The film formation temperature of 05 to 207 was 1050 ° C. Light emitting layer 2
After completion of the film formation of the intermediate layer 20,
5, p-type cladding layer 206 and Si-doped GaN layer 2
The film was heated at a rate of about 150 ° C. per minute to 1050 ° C. which is a film forming temperature of 07 in an ammonia gas flow. p-type cladding layer 2
After completing the film formation of No. 06, the p-type cladding layer 206 was subsequently formed at the same temperature. Si-doped n-type GaN layer 207
After the formation of the p-type cladding layer 206 was completed, the film was formed “continuously” without changing the film formation temperature. With the Si-doped n-type GaN layer 207 still joined to the p-type cladding layer 206, the temperature of the laminated structure 20a is raised to 1050 ° C.
To 950 ° C. at a rate of about 50 ° C. per minute in an atmosphere containing NH ₃ . Furthermore, in an atmosphere containing ammonia,
The temperature was lowered to 00 ° C at a rate of about 15 ° C per minute. The temperature was lowered from 400 ° C. to a temperature near room temperature by natural cooling in a N ₂ -H ₂ mixed atmosphere. By adopting the above-mentioned heating and cooling rates, the indium composition, the outer shape, and the size of the dependent phase T constituting the light emitting layer 204 having the multiphase structure are made uniform.

The thickness (d) of the first buffer layer 202a is about 2
It was set to 0 nm. The thickness of the second buffer layer 202b is about 3 μm
And the carrier concentration (n) is about 2 × 10¹⁸cm^-3age
Was. The lower cladding layer 203 has d = 0.5 μm and n =
2 × 10¹⁸cm^-3And The light emitting layer 204 has d = 0.1 μm
m, n = 3 × 10¹⁸cm^-3And Of the middle layer 205
Carrier concentration is about 1 × 10¹⁷cm^-3Below and the layer thickness
(D) was about 10 nm. The p-type cladding layer 206 is d
= 0.15 μm, and the carrier concentration (p) is as-g
About 4 × 10 in the row state¹⁷cm^-3showed that. General S
According to the IMS analysis, the water in the Mg-doped GaN layer 206
The concentration of elemental atoms (protons) is about 6 × 10¹⁷cm ^-3And quantification
Was done. As-grown Mg-doped GaN layer 206
-Doped n-type GaN layer 207 contributed to forming p-type
Is d = 0.1 μm and n = 2 × 10 ¹⁸cm^-3age
Was.

After cooling, the laminated structure 20a is taken out of the MOCVD growth furnace, and the outermost Si-doped n-type GaN layer 2 is formed.
07 except for some regions, the p-type cladding layer 206 is formed by a general patterning technique and plasma etching means.
Removed from the surface. Si-doped n-type GaN layer 207
Is left on the p-type cladding layer 206 limited to the region where the p-type pedestal electrode 210 is to be formed, and the pn junction 20 is located immediately below the region where the p-type pedestal electrode 210 is to be formed.
6c was formed. The planar shape of the region where the Si-doped n-type GaN layer 207 is left on the p-type cladding layer 206 is p
The diameter similar to the bottom shape of the base electrode 210 is about 150μ.
m (circular area: about 7.1 × 10 ^-4 c
m ² ).

Next, a general electron beam (beam) is applied to the surface of the p-type cladding layer 206 including the surface of the Si-doped n-type GaN layer 207 left only in the region where the p-type pedestal electrode 210 is to be formed. A Ni thin film 208 was deposited by a vapor deposition method. The layer thickness of the nickel thin film 208 was about 13 nm. Then, by a general high-frequency sputtering method,
An ITO film 209 which is transparent and exhibits n-type conductivity was applied to substantially the entire surface of the Ni thin film 208. The pressure at the time of sputtering the ITO film is about 1 × 10 ⁻³ Torr,
The applied high frequency power was about 130 W. ITO layer 20
The layer thickness of No. 9 was about 0.5 μm. The resistivity of the film 209 was about 1 × 10 ⁻³ Ω · cm. The above Ni thin film 208
A p-type ohmic electrode 211 was composed of the ITO film and the ITO film 209.

Above the pn junction region between the Si-doped n-type GaN layer 207 and the p-type cladding layer 206, the Ni
P-type pedestal electrode 2 through thin film 208 and ITO film 209
10 were provided. The center of the planar shape of the p-type pedestal electrode 210 and the center of the shape of the pn junction region were made substantially coincident. Lower layer portion 210 of p-type pedestal electrode 210 in contact with ITO film 209
-1 was made of titanium (Ti), and the upper layer 210-2 was made of a multilayer electrode made of aluminum (Al). IT
The bottom shape of the p-type pedestal electrode 210 in contact with the O layer 209 is
A circular shape having a diameter of about 130 μm (a bottom area of about 6.2
× 10 ^-4 cm ² ). Since the n-type ohmic electrode 212 uses an n-type conductive Si single crystal for the substrate 201, the n-type ohmic electrode 212 is formed by coating an Al film on the entire back surface of the Si substrate 201. The layer thickness of the n-type ohmic electrode 212 was about 1.2 μm.

Next, the chip was divided into chips each having a side of about 300 μm, and individual LEDs 20 were formed. p-type pedestal electrode 21
When a voltage of about 3.3 V was applied between the 0 and n-type ohmic electrodes 212 and a forward current of 20 milliamperes (mA) was passed, a substantially uniform strength was obtained from almost the entire surface of the transparent conductive ITO layer 208. Blue light was emitted. The emission wavelength measured by the spectrometer was about 450 nm. The half width of the light emission spectrum was about 29 nm, and light emission having excellent monochromaticity was obtained. The light emission intensity in a chip state reached about 24 microwatts (μW).

(Embodiment 2) In this embodiment, an example is shown in which a blue LED 30 is constituted by a laminated structure 30a composed of a group III nitride semiconductor layer laminated on a sapphire substrate.
The present invention will be described in detail. FIG. 3 shows the LE according to this embodiment.
It is a cross section of D30.

The laminated structure 30a for the LED 30 is
(0001) Sapphire (α-Al ₂ O ₃ single crystal) substrate 3
01, the GaN low-temperature buffer layer 302, the n-type cladding layer 303 made of Si-doped n-type gallium nitride (GaN), the main phase S is n-type Ga _0.95 In _0.05 N, and the average indium composition ratio is 0.15. N-type light emitting layer 304 having a multiphase structure having gallium nitride / indium mixed crystal (Ga _0.85 In _0.15 N) as a dependent phase T, Mg-doped p-type Al _0.15 Ga _0.85 N
P-type cladding layer 305 made of Mg, p-type GaN doped with Mg
Contact layer 306 and Si-doped n-type GaN layer 30
7.

Group III nitride compound semiconductor layers 302 to 307
Is a trimethylgallium / trimethylaluminum / cyclopentadienylindium / ammonia-based atmospheric pressure MO
-Grown by VPE method. A silicon-hydrogen mixed gas containing disilane at a concentration of about 10 ppm by volume was used as a silicon doping source. Mg doping sources include:
Bis-cyclopentadienyl Mg was utilized. The doping amount of Mg into the Mg-doped GaN layer 306 is 6 × 10
¹⁸ cm ^-3 . The polycrystalline buffer layer 302 was formed at 430 ° C. The deposition temperature of the light emitting layer 304 having a multiphase structure is 880 ° C.
And the other group III nitride semiconductor growth layers 303 and 305
The film formation temperature of ３０307 was 1030 ° C.

After the formation of the p-type contact layer 306 was completed, the Si-doped n-type GaN layer 307 was grown “continuously” without changing the deposition temperature. p-type contact layer 3
After completion of the film formation of the Si-doped n-type GaN layer 307 by bonding at 06, the temperature was lowered to 800 ° C. at a rate of about 15 ° C. per minute in an ammonia stream. The temperature was lowered from 800 ° C. to a temperature near room temperature by natural cooling in a hydrogen atmosphere. By this temperature lowering operation, the indium composition, outer shape, and size of the dependent phase T constituting the light emitting layer 304 having the multi-phase structure were made uniform.

The thickness (d) of the buffer layer 302 is about 15 nm.
did. The n-type cladding layer 303 has d = 2.5 μm,
Carrier concentration (n) = 3 × 10¹⁸cm^-3And Light emitting layer 3
04, d = 0.1 μm, carrier concentration (n) = 6 ×
10¹⁷cm^-3And The p-type cladding layer 305 has d = 0.
03 μm, carrier concentration (p) = 7 × 10¹⁶cm ^-3
And The p-type contact layer 306 is d = 0.1 μm
Was. On the p-type contact layer 306, a Si-doped n-type G
Since the aN layer 307 was provided by bonding, the same layer 306
The resistance becomes low in the s-grown state and its carrier concentration
(P) is 3 × 10¹⁷cm^-3It became. p-type contact
The concentration of hydrogen atoms in the layer 306 is about 8 × 10¹⁷cm^-3In
Was.

After the formation of the laminated structure 30a was completed, it was cooled to room temperature and taken out of the MOCVD growth furnace. After that, the Si-doped n-type GaN layer 307 as the outermost layer was removed from the surface of the p-type contact layer 306 by a general patterning technique and plasma etching means except for a part of the region. The Si-doped n-type GaN layer 307 is
10 was left on the p-type contact layer 306 limited to the region where the p-type pedestal electrode 310 was to be formed, and the pn junction 306c was formed immediately below the region where the p-type pedestal electrode 310 was to be formed.
The Si-doped n-type GaN layer 307 is
The planar shape of the region left on top is the p-type pedestal electrode 310.
A rectangular shape having a long side similar to the bottom shape of about 280 μm and a short side about 110 μm (plan area: about 3.1 × 1)
0 ^-4 cm ² ).

Next, a general electron beam (beam) is applied to the surface of the p-type contact layer 306 including the surface of the Si-doped n-type GaN layer 307 left only in the region where the p-type pedestal electrode 310 is to be formed. NiO thin film 308 by vapor deposition
At about 250 ° C. The layer thickness of the NiO thin film 308 was about 18 nm. A wavelength 450 of a nickel oxide film (thickness = 17 nm) separately formed on a glass substrate under the same conditions.
The transmittance for the blue band light of nm was about 82%.
On the NiO thin film 308, a transparent and n-type conductive ITO film 3 is formed by a general high frequency sputtering method.
09 was deposited on almost the entire surface of the NiO thin film 308. ITO
The pressure during sputtering of the film was about 1 × 10 ⁻³ Torr, and the applied high frequency power was about 150 W. The thickness of the ITO layer 309 was about 0.3 μm. The resistivity of the film 309 was about 8 × 10 ⁻⁴ Ω · cm. From the NiO thin film 308 and the ITO film 309 described above, the p-type ohmic electrode 31 is formed.
1 was constructed.

On the region where the Si-doped n-type GaN layer 307 is left and the p-type contact layer 306 and the pn junction 306c are formed, a p-type pedestal electrode 310 is provided.
The p-type pedestal electrode 310 has a rectangular shape having a long side of about 280 μm and a short side of about 110 μm in the same shape as the pn junction region, and a center of the plane shape of the pn junction region. Were arranged so as to substantially coincide with the center. p
Lower part 3 of the base electrode 310 in contact with the ITO layer 309
10-1 is titanium (Ti), and the upper layer 310-2 is A
u. The thickness of the lower Ti film 310-1 is about 250 n.
m. The thickness of the upper Au film 310-2 is about 0.8 μm.
m. The n-type ohmic electrode 312 is formed by forming the Si-doped n-type GaN layer 307, the p-type contact layer 306, the p-type cladding layer 305, and the light emitting layer 304 having a multi-phase structure in the region where the formation is to be performed. Methane (C
N-type cladding layer 3 sequentially removed and exposed by a plasma etching method using a mixed gas of H ₄ ) / hydrogen (H ₂ )
No. 03 on the surface layer. n-type ohmic electrode 312
Was made of Al, and its layer thickness was about 1.2 μm.
The planar shape of the n-type ohmic electrode 312 has a long side of about 28
It was a rectangular shape having a length of 0 μm and a short side of about 110 μm.
The p-type and n-type electrodes 310 and 312 were arranged substantially parallel to each other at positions facing each other.

Next, each LED 30 was divided into chips each having a side of about 350 μm. p
When a current of 20 mA flows in the forward direction between the n-type and n-type ohmic electrodes 310 and 312, the p-type pedestal electrode 310
In this case, blue-green light was emitted with almost uniform intensity from almost the entire outer peripheral area. The emission wavelength measured by the spectrometer was about 460 nm. The half width of the emission spectrum was about 30 nm. Light emission is forward voltage ($ 20m
A) averaged 3.2 V. The light emission intensity in the chip state reached about 18 μW, resulting in a high-power LED.

[0049]

According to the first aspect of the present invention, a p-type pedestal electrode for supplying a drive current of a group III nitride semiconductor light emitting device comprises: a p-type group III nitride semiconductor layer; Is provided on a pn junction region composed of an n-type group III nitride compound semiconductor layer provided to form a low-resistance p-type layer in an as-grown state. This is effective in blocking, and the device operating current can be efficiently distributed to a region from which light can be extracted to the outside, so that a group III nitride semiconductor light emitting device with high light emission output can be provided.

According to the invention described in claim 2 of the present invention,
N-type III to be "continuously" vapor-grown and bonded on a III-type nitride semiconductor layer doped with p-type impurities
Since the film formation temperature of the group III nitride semiconductor layer is specified in a suitable range, hydrogen impurities invading into the group III nitride semiconductor layer from the vapor phase growth environment are efficiently captured.
A p-type group III nitride semiconductor layer having a low resistance in a grown state is provided, and a p-type II capable of planarly diffusing an operating current is provided.
Since a group I nitride semiconductor layer is provided, a group III nitride semiconductor light emitting device having excellent in-plane uniformity of emission intensity can be provided.

In particular, according to the third aspect of the present invention, the product value of the carrier (electron) concentration and the layer thickness of the n-type group III nitride semiconductor bonding layer is stored in a suitable range. As a result, a p-type group III nitride semiconductor layer having low resistance in an as-grown state is provided, and a group III nitride semiconductor light emitting device having a low forward voltage and high light emission output is provided. There is.

According to the invention of claim 4 of the present invention, the n-type group III nitride semiconductor layer is composed of an n-type layer doped with silicon, particularly, Al _x Ga _y In _Z N. Therefore, the p-type impurity-doped I
It is possible to provide an n-type group III nitride semiconductor layer that can more efficiently prevent the incorporation of hydrogen impurities into the group II nitride semiconductor layer, and therefore, includes an as-grown, low-resistance p-type group III nitride semiconductor layer. Therefore, since excellent current spreading properties are exhibited, a group III nitride semiconductor light emitting device having high emission intensity can be easily provided.

According to the invention described in claim 5 of the present invention,
An as-grown, low-resistance p-type group III nitride semiconductor layer on a light emitting part including, as a light emitting layer, an indium-containing group III nitride semiconductor layer having a multiphase structure having a different indium concentration resulting in high intensity light emission. Is arranged, there is an effect that a group III nitride semiconductor light emitting device having a high light emission output is provided.

According to the invention described in claim 6 of the present invention,
Since a group III nitride semiconductor light emitting device is formed from a low resistance p-type group III nitride semiconductor layer that exhibits p-type conduction in as-grown and has a resistivity of 10 Ω · cm or less, A group III nitride semiconductor light emitting device having a high light emission output can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view of a group III nitride semiconductor LED for describing an embodiment of the present invention.

FIG. 2 is a schematic sectional view of the LED described in Example 1.

FIG. 3 is a schematic sectional view of the LED described in Example 2.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Laminated structure concerning this invention 1A pn junction type light-emitting part 8 Single crystal substrate 9 Buffer layer 10 n-type lower clad layer 11 light-emitting layer 12 p-type upper clad layer 12a One principal surface of p-type clad layer 12b p-type clad layer Other main surface 12c pn junction 13 n-type group III nitride semiconductor layer 14 p-type pedestal electrode 15 p-type ohmic electrode 16 n-type ohmic electrode 20 LED 20a laminated structure 30 LED 30a laminated structure 201 Si single crystal substrate 202 Buffer layer 202a first buffer layer constituting layer 202b second buffer layer constituting layer 203 n-type GaN lower cladding layer 204 multi-phase structure light emitting layer 205 AlGaN intermediate layer 206 p-type GaN upper cladding layer 206c pn junction 207 n-type III Group nitride semiconductor layer 208 nickel (Ni) thin film 209 indium oxide / tin oxide (IT ) Layer 210 p-type pedestal electrode 210-1 pedestal electrode lower layer part 210-2 pedestal electrode upper layer part 211 p-type ohmic electrode 212 n-type ohmic electrode 301 sapphire substrate 302 GaN buffer layer 303 n-type GaN cladding layer 304 multi-phase structure light emitting layer 305 p-type AlGaN cladding layer 306 p-type GaN contact layer 306 c pn junction 307 n-type group III nitride semiconductor layer 308 nickel oxide (NiO) thin film 309 multilayer structure transparent oxide layer 310 p-type pedestal electrode 310-1 pedestal electrode Lower layer part 310-2 Pedestal electrode upper layer part 311 p-type ohmic electrode 312 n-type ohmic electrode

[Procedure amendment]

[Submission date] September 25, 2000 (2009.2)
5)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0002

[Correction method] Change

[Correction contents]

[0002]

2. Description of the Related Art A conventional III-nitride semiconductor light emitting device such as a light emitting diode (LED) or a laser diode (LD) has a light emitting layer and a barrier (cladding) sandwiching the light emitting layer.
Junction type double hetero (DH) composed of layers
A light emitting unit having a structure is provided. The group III nitride semiconductor crystal layer refers to a general formula Al _X Ga _Y In _Z N (0 ≦ X, Y, Z) containing nitrogen (element symbol: N) as a group V constituent element.
≦ 1, X + Y + Z = 1) is a crystal layer made of a group III-V compound semiconductor. The general formula Al _X G
_{a Y In Z N 1-Q} M Q (0 ≦ X, Y, Z ≦ 1, X + Y + Z =
1, the symbol M is a Group V element other than nitrogen, and 0 ≦ Q <
It is a crystal layer composed of a III-V compound semiconductor represented by 1). For example, a pn junction composed of a clad layer made of n-type and p-type aluminum gallium nitride (Al _x Ga _{1 -x} N: 0 ≦ X ≦ 1) and an indium-containing group III nitride semiconductor layer A light emitting portion having a type DH structure is known (Jpn. J. Appl. Phys.,
Vol. 34, Part 2, no. 10B (199
5), see pages L1332 to L1335). The light-emitting layer has a forbidden band width at room temperature, which is convenient for emitting short-wavelength visible light such as an ultraviolet band to a blue band or a green band at room temperature (Ga _X In _{1 -X} N: 0 ≦ X ≦ 1). (See Japanese Patent Publication No. 55-3834).

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0006

[Correction method] Change

[Correction contents]

A low resistance III in an as-grown state does not require a post-process for lowering the resistance such as annealing.
If a group III nitride semiconductor layer can be obtained, the pn junction type I
A group II nitride semiconductor light emitting device can be provided . The magnitude of the resistance of the group III nitride semiconductor layer doped with the p -type impurity depends on the concentration of the hydrogen impurity contained in the layer. One effective means for obtaining a low-resistance p-type group III nitride semiconductor crystal layer is III-type doped with p-type impurities.
An object of the present invention is to reduce the concentration of hydrogen (hydrogen atoms) in a crystal layer from a growth environment before growing a group III nitride semiconductor crystal layer in a vapor phase. Already, a mixed crystal of aluminum-gallium-indium phosphide ((Al _X Ga _{1 -X} ) _0.5 In _0.5
For a III-V compound semiconductor crystal layer such as P = 0 ≦ X ≦ 1), an n-type or p-type layer is formed on a Zn-doped (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P layer by MOCVD.
A method of suppressing the intrusion of hydrogen into the p-type AlGaInP layer during vapor phase growth has been known as a layered structure in which p-type gallium arsenide (GaAs) crystal layers are overlaid (J. C.).
crystal Growth. , 118 (1992),
425-429).

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0027

[Correction method] Change

[Correction contents]

Next, what is important is an n-type III-nitride semi-conductor.
Nitrogen used for cooling after vapor deposition of the conductor layer
In an atmosphere containing nitrogen-containing compounds such as
is there. For example, the growth of a group III nitride semiconductor
Near (NH_Three) Is used, the atmosphere containing ammonia
It is desirable to cool in an atmosphere. Asymmetric molecular structure
Type of dimethylhydrazine
(adine). When cooling
Nitrogen-containing compounds that make up the atmospheredo itNitrogen (N _Two) Is good
It is hard to be suitable. The dissociation energy of nitrogen is about 225 km
Calorie / mole (kcal / mole)
(Barlow, “Physical Chemistry (above)” (Tokyo)
Gakudojin, published May 1, 1972, 1st edition, 9th print), 1
75-178), does not readily dissociate into nitrogen atoms,
For this reason, the surface condition of the group III nitride semiconductor layer due to sublimation
stateInferiorConversion,And the generation of a large amount of nitrogen vacancies cannot be avoided.
Nitrogen-containing compounds with smaller dissociation energy than nitrogen
By cooling in an atmosphere containing
For generation of elementary vacancies and sublimation of n-type group III nitride semiconductor layer
Deterioration of the resulting surface state can be prevented.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0034

[Correction method] Change

[Correction contents]

The temperature for forming the light emitting layer 204 having a multiphase structure is 89.
0 ° C., and the other group III nitride semiconductor growth layers 203, 2
The film formation temperature of 05 to 207 was 1050 ° C. Light emitting layer 2
After completion of the film formation of the intermediate layer 20,
5, p-type cladding layer 206 and Si-doped GaN layer 2
The film was heated at a rate of about 150 ° C. per minute to 1050 ° C. which is a film forming temperature of 07 in an ammonia gas flow . S i-doped n-type G
After the formation of the p-type cladding layer 206 was completed, the aN layer 207 was formed “continuously” without changing the film formation temperature. S
With the i-doped n-type GaN layer 207 still bonded to the p-type cladding layer 206, the temperature of the laminated structure 20a is increased from 1050 ° C. to 950 ° C. at a rate of about 50 ° C./min.
_The temperature dropped in an atmosphere containing ₃ . Further, the temperature was lowered to 400 ° C. at a rate of about 15 ° C./min in an atmosphere containing ammonia.
The temperature was lowered from 400 ° C. to a temperature near room temperature by natural cooling in a N ₂ -H ₂ mixed atmosphere. By adopting the above-mentioned heating and cooling rates, the indium composition, the outer shape, and the size of the dependent phase T constituting the light emitting layer 204 having the multiphase structure are made uniform.

Claims (6)

[Claims] 1. A group III nitride semiconductor light emitting device having a pn junction type light emitting portion, wherein a p type ohmic electrode and a p type pedestal electrode are arranged on a p type group III nitride semiconductor layer. After forming a Group III nitride semiconductor layer by vapor phase growth, an n-type Group III nitride semiconductor bonding layer is formed by vapor phase growth, and the n-type Group III nitride semiconductor bonding layer serves as a p-type pedestal electrode. The p-type ohmic electrode is removed except for the projection region, and a p-type ohmic electrode
A group III nitride semiconductor light-emitting device formed in contact with a group III nitride semiconductor junction layer and a p-type pedestal electrode. 2. An n-type group III nitride semiconductor bonding layer comprising:
2. The group III nitride according to claim 1, wherein the group III nitride is formed at a temperature of 0 ° C. or higher and within a range of ± 100 ° C. with respect to a growth temperature of the contacting p-type group III nitride semiconductor layer. Semiconductor light emitting device. 3. The product of the electron concentration (unit: cm ⁻³ ) and the layer thickness (unit: cm) of the n-type group III nitride semiconductor bonding layer is 5 × 10 ^{10 to} 1.5 × 10 ^15. 3. The group III nitride semiconductor light-emitting device according to claim 1, wherein the range is cm ⁻² . Wherein the n-type Group III nitride semiconductor junction layer, Al _X Ga was added silicon _{Y In Z N (0 ≦ X} , Y, Z ≦ 1,
X + Y + Z = 1).
The group III nitride semiconductor light emitting device according to any one of the above. 5. A multiphase II having a light emitting layer comprising a main phase and a subordinate layer having a different indium concentration from the main phase.
The group III nitride semiconductor light emitting device according to any one of claims 1 to 4, wherein the group III nitride semiconductor light emitting device is formed of a group I nitride semiconductor layer. 6. A p-type group III nitride semiconductor layer in contact with an n-type group III nitride semiconductor junction layer has a resistivity (specific resistance) of 1
P-type Al _X Ga _Y In _Z N (0 ≦
X, Y, Z ≦ 1, X + Y + Z = 1), wherein the group III nitride semiconductor light emitting device according to any one of claims 1 to 5, wherein