WO2004070846A1 - Semiconductor device, production method thereof and light-emitting device - Google Patents

Semiconductor device, production method thereof and light-emitting device Download PDF

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Publication number
WO2004070846A1
WO2004070846A1 PCT/JP2004/001296 JP2004001296W WO2004070846A1 WO 2004070846 A1 WO2004070846 A1 WO 2004070846A1 JP 2004001296 W JP2004001296 W JP 2004001296W WO 2004070846 A1 WO2004070846 A1 WO 2004070846A1
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boron
layer
crystal
monophosphide
based mixed
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PCT/JP2004/001296
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French (fr)
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Takashi Udagawa
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Showa Denko K. K.
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Priority claimed from JP2003032344A external-priority patent/JP3939257B2/en
Application filed by Showa Denko K. K. filed Critical Showa Denko K. K.
Priority to EP04708877A priority Critical patent/EP1593162A4/en
Publication of WO2004070846A1 publication Critical patent/WO2004070846A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02461—Phosphides
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02543—Phosphides
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/452—Ohmic electrodes on AIII-BV compounds
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/32308—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm

Definitions

  • the present invention relates to a technique for fabricating a semiconductor device, such as a semiconductor light-emitting device, through the employment of a boron monophosphide (BP) or a boron monophosphide-based mixed-crystal layer serving as an electrode contact layer.
  • a semiconductor device such as a semiconductor light-emitting device
  • BP boron monophosphide
  • boron monophosphide-based mixed-crystal layer serving as an electrode contact layer.
  • a light-emitting diode abbreviated as LED
  • a laser diode abbreviated as LD
  • Group III nitride semiconductor see, for example, Isamu Akasaki, "Group III Nitride
  • a wurtzite gallium indium nitride mixed-crystal (compositional formula: Ga x In 1 . 3C N: 0 ⁇ x ⁇ 1) layer is used for forming a light-emitting layer (see, for example, Japanese Patent Publication No. 55-3834).
  • Aluminum gallium nitride (Al ⁇ Ga ⁇ j .N: 0 ⁇ x ⁇ 1) having a wider band gap is used for forming a cladding barrier layer with respect to the Ga x In 1 . x N (0 ⁇ x ⁇ 1) light-emitting layer (see the aforementioned Isamu Akasaki, "Group ill Nitride
  • a semiconductor light-emitting device can be fabricated by employing, instead of a Group III nitride semiconductor, boron monophosphide (chemical formula: BP) having a wide band gap serving as a barrier layer (see Japanese Patent Application No. 2001-158282).
  • boron monophosphide chemical formula: BP
  • Boron phosphide tends to provide a p-type conductive layer because boron phosphide has a degenerated valence band structure which differs from that of the above wurtzite Group III nitride semiconductor (see, for example, Japanese Patent Application Laid-Open ⁇ kokai ) No. 2-288388).
  • a p-type boron phosphide layer has been employed as a contact layer for forming a p-type Ohmic electrode (see, for example, Japanese Patent Application Laid-Open ( kokai ) No. 10-242568).
  • a technique for fabricating a light-emitting device including a p-type Ohmic electrode formed of a gold (symbol of element: Au)- zinc (symbol of element: Zn) alloy so as to attain contact with a surface of the p-type boron phosphide layer (see Japanese Unexamined Patent Publication (Kokai) No. 10-242568).
  • the p-type boron phosphide layer on which an Ohmic electrode is to be provided has generally been formed on a Group III nitride semiconductor layer through use of vapor phase growth means such as metal-organic chemical vapor deposition (abbreviated as MOCVD) in combination with doping boron phosphide with magnesium (symbol of element: Mg) (see, for example, the above Isamu Akasaki, "Group III Nitride Semiconductor," Baifukan Co., Ltd., Chapters 13 and 14, Dec. 8, 1999, first edition).
  • MOCVD metal-organic chemical vapor deposition
  • a contact layer for providing an Ohmic contact electrode thereon requires a boron phosphide layer having low resistance and excellent crystallinity .
  • a conventional boron phosphide layer has a zincblende crystal type, which differs from the wurtzite type of a Group III nitride semiconductor, and has lattice constants differing from those of a Group III nitride semiconductor layer. Therefore, when the boron phosphide layer is provided on the Group III nitride semiconductor layer, the formed boron phosphide has inferior crystallinity with a large number of dislocations .
  • an object of the present invention is to provide a technique for fabricating a semiconductor device through employment of a boron monophosphide or boron monophosphide-based mixed-crystal layer, the layer being formed of a bottom layer and a surface layer, the bottom layer having a crystal composition which can provide an upper layer of excellent crystallinity by absorbing dislocations and being joined with a crystalline substrate or a crystalline layer formed on the substrate, and the surface layer having a crystal composition suitable for forming, for example, an Ohmic electrode.
  • another object of the present invention is to provide a technique for fabricating a semiconductor light-emitting device through employment of a low-resistance boron monophosphide or boron monophosphide-based mixed-crystal layer to which no impurity is intentionally added, so as to prevent increasing the degree of disorder of the crystalline substrate or a layer grown on the substrate caused by diffusion and migration of the impurity.
  • Still another object of the present invention is to provide a method for producing a semiconductor device employing a boron monophosphide or boron monophosphide- based mixed-crystal layer having a crystal composition according to the present invention.
  • the present invention provides the following:
  • a semiconductor device comprising a crystalline substrate, optionally with a crystalline layer formed thereon; a boron monophosphide or monophosphide- based mixed-crystal layer on said crystalline substrate or said crystalline layer formed thereon, said boron monophosphide or boron monophosphide-based mixed-crystal layer comprising a bottom portion of a polycrystalline boron monophosphide or boron monophosphide-based mixed- crystal layer and an upper surface portion of a single- crystal boron monophosphide or boron monophosphide-based mixed-crystal layer; and an Ohmic electrode on said boron monophosphide or boron monophosphide-based mixed-crystal layer, said Ohmic electrode being in contact with said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer.
  • both of said polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer of said bottom portion and said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer of said upper surface portion are an undoped boron monophosphide or boron monophosphide-based mixed-crystal layer.
  • said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer serving as an upper surface portion of said boron monophosphide or boron monophosphide-based mixed- crystal layer; and b) a step of providing an Ohmic electrode on said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer.
  • BP monophosphide
  • boron monophosphide-based mixed- crystal layer vapor-phase grown on said crystalline substrate or said crystalline layer formed thereon has a ⁇ lll ⁇ -crystal plane.
  • BP boron monophosphide
  • boron monophosphide-based mixed-crystal layer vapor-phase grown on said crystalline substrate or said crystalline layer formed thereon has a ⁇ lll ⁇ -crystal plane.
  • BP single-crystal boron monophosphide
  • boron monophosphide-based mixed-crystal layer in an area surrounding said intermediate layer.
  • FIG. 1 is a schematic cross-sectional view of the compound semiconductor light-emitting device (LED) mentioned in Example 1.
  • the present invention no particular limitation is imposed on the type of the semiconductor device or the type of the crystalline substrate or the crystalline layer formed on the substrate crystal on which a semiconductor structure is formed.
  • the present invention is directed particularly to a semiconductor light-emitting device having a light-emitting layer employing a compound semiconductor such as a Group III nitride semiconductor
  • the structure of the electrode contact layer according to the present invention can be applied to any semiconductor device which requires such a structure.
  • the semiconductor light- emitting device no particular limitation is imposed on the species, structure, etc. of the light-emitting layer.
  • the crystalline substrate or the crystalline layer formed on the substrate crystal may be polycrystalline or amorphous.
  • the effect of the invention is most successfully attained when the crystalline substrate or the crystalline layer is formed of a single crystal.
  • the crystalline layer in a light-emitting device serves not only as a light-emitting layer but also as a current-blocking layer or a cladding layer.
  • the crystalline layer can be formed from a material which allows growth, on the crystalline layer, of a boron phosphide polycrystalline layer or a boron phosphide- based mixed-crystal polycrystalline layer.
  • Examples of the crystalline layer formed on the crystalline substrate or the substrate crystal include boron gallium phosphide (compositional formula, B x Ga 1 . x P : 0 ⁇ x ⁇ 1) crystalline layer and boron indium phosphide (compositional formula, B * In ⁇ - x P: 0 ⁇ x ⁇ 1) crystalline layer.
  • Examples of the semiconductor device include a field-effect transistor having an n-type boron phosphide crystalline layer formed on an electron-supplying crystalline layer which is fabricated from an n-type gallium nitride (GaN) channel layer and an n-type aluminum gallium nitride mixed- crystal layer (Al ⁇ a ⁇ N: 0 ⁇ x ⁇ 1) disposed thereon.
  • a field-effect transistor having an n-type boron phosphide crystalline layer formed on an electron-supplying crystalline layer which is fabricated from an n-type gallium nitride (GaN) channel layer and an n-type aluminum gallium nitride mixed- crystal layer (Al ⁇ a ⁇ N: 0 ⁇ x ⁇ 1) disposed thereon.
  • the boron phosphide or the boron phosphide-based mixed-crystal of the present invention for forming a contact layer is an excellent material for providing the contact layer, because the compounds can readily form a low-resistance crystalline layer having excellent conductivity and can provide excellent Ohmic contact with an electrode.
  • the boron phosphide layer or the boron phosphide-based mixed- crystal layer can be preferably employed as an electrode contact layer formed on a p-type Group III nitride semiconductor layer such as p-type aluminum gallium nitride, boron gallium nitride, or aluminum gallium nitride phosphide.
  • the boron phosphide layer or the boron phosphide-based mixed-crystal layer can also be formed on an n-type Group III nitride semiconductor layer such as n-type aluminum gallium nitride (chemical formula: Al ⁇ C-a ⁇ N: 0 ⁇ x ⁇ 1 ) or n-type gallium indium nitride (compositional formula: Ga x In 1 . x N: 0 ⁇ x ⁇ 1) .
  • the term "boron phosphide- based mixed-crystal” refers to a multi-element crystal containing three or more elements as constituents including boron (B) and phosphorus (P).
  • Examples include an aluminum boron phosphide mixed-crystal (compositional formula: Al ⁇ P: 0 ⁇ x ⁇ 1), boron gallium phosphide (compositional formula: B x Ga 1 . x P: 0 ⁇ x ⁇ 1), and boron indium phosphide (compositional formula: B x In 1 _ x P: 0 ⁇ x ⁇ 1 ) .
  • boron phosphide-based mixed- crystal of the present invention is boron arsenide phosphide (compositional formula: BP y As ⁇ j ,: 0 ⁇ y ⁇ 1) containing a Group V element differing from phosphorus (P) in addition to the above constituents.
  • the boron phosphide-based mixed-crystal of a cubic zincblende crystal structure can be lattice-matched, by controlling a compositional proportion of boron (B) or phosphorus
  • P with a practically employed substrate material such as a silicon (symbol of element: Si) single crystal and a single crystal of a Group III-V compound semiconductor (e.g., gallium nitride (chemical formula: GaN) or gallium phosphide (chemical formula: GaP)).
  • a boron phosphide-based mixed-crystal layer of B x Ga 1 . x P (0 ⁇ x ⁇ 1), B x In 1 . x P (0 ⁇ x ⁇ 1), etc. containing a reduced number of misfit dislocations can be formed on the above single crystals .
  • the boron phosphide layer or the boron phosphide-based mixed-crystal layer problematically deteriorates an underlying Group III-V semiconductor layer under thermal stress, when the layer has a thermal expansion coefficient differing from the semiconductor (e.g., a Group III nitride) layer.
  • the present invention can solve the aforementioned problem by employing a boron phosphide layer or a boron phosphide-based mixed-crystal layer in which the upper surface layer is formed of a single-crystal layer and the bottom portion is formed of a polycrystalline layer, whereby the crystal grain boundary of the bottom polycrystalline layer absorbs thermal stress (difference in thermal expansion) to some extent.
  • a boron phosphide layer or a boron phosphide-based mixed-crystal layer is grown directly on a Group III nitride semiconductor underlying layer, in some cases the grown boron phosphide layer or boron phosphide-based mixed-crystal layer may have poor quality. However, by the mediation of the polycrystalline layer, a high-quality single-crystal boron phosphide layer or boron phosphide-based mixed- crystal layer can be formed.
  • the polycrystal or single-crystal boron phosphide or boron phosphide-based mixed-crystal layer according to the present invention can be vapor-phase grown through the halogen method (see "Journal of the Japanese Association for Crystal Growth," Vol. 24, No. 2, (1997), p. 150) by use of sources such as boron trichloride (chemical formula: BC1 3 ) and phosphorus trichloride (chemical formula: PC1 3 ). Alternatively, vapor phase growth can also be performed through the hydride method (see J. Crystal Growth, 24/25 (1974), p.
  • MOCVD Metal-organic chemical vapor deposition
  • the boron monophosphide layer or the boron monophosphide-based mixed-crystal layer having a crystal configuration of the present invention can be formed on the surface of a crystalline substrate or the surface of a crystalline layer formed on the substrate crystal in the following manner. Firstly, a polycrystalline layer serving as a bottom portion of the boron monophosphide (BP) layer or the boron monophosphide-based mixed-crystal layer is vapor-phase grown at 750°C to 1,200°C and at a first V/III ratio (e.g., 100 or higher, particularly preferably 100 to 200).
  • a first V/III ratio e.g., 100 or higher, particularly preferably 100 to 200.
  • the v/III ratio is a ratio of the total concentration of Group V atoms to that of Group III atoms, the atoms being fed so as to carry out vapor phase growth.
  • the V/III ratio is a ratio of the total concentration of phosphorus (P) atoms fed to that of boron (B) atoms fed.
  • a single-crystal layer is vapor-phase grown on the polycrystalline layer at 750 °C to 1,200°C and at a second V/III ratio which is in excess of the first V/III ratio and equal to or less than 2,000.
  • the first V/III ratio at formation of a polycrystalline layer of boron monophosphide or a boron monophosphide-based mixed-crystal is preferably controlled to 100 or higher, particularly preferably 100 to 200.
  • the first V/III ratio is lower than 100, particularly when the ratio is 50 or lower, an amorphous layer tends to be formed, which is problematic.
  • the polycrystalline layer serving as a bottom portion is useful for providing a high-quality single-crystal layer having a small degree of strain by virtue of relaxing thermal strain generated by a difference in thermal expansion coefficient between the underlying layer and the single-crystal layer provided on the polycrystalline layer.
  • the single-crystal layer of boron monophosphide (BP) or a boron monophosphide-based mixed-crystal serving as an upper portion is preferably formed at a second V/III ratio falling within a range of 600 to 1,200.
  • the boron phosphide or the boron phosphide-based mixed-crystal can be formed under the conditions for forming a single- crystal layer, after completion of formation of the polycrystalline layer. For example, when a single vapor phase growth apparatus is employed, the first V/III ratio is switched instantly to the second V/III ratio. As a result, a crystal layer in which a single-crystal layer is stacked on the polycrystalline layer can be readily formed.
  • the switching of the first V/III ratio to the second ratio may be performed slowly, slow switching requires an excessive layer thickness until the single crystal is formed, which is undesirable.
  • Whether the formed layer is polycrystalline or a single crystal can be determined on the basis of diffraction patterns obtained by use of electron-beam diffraction means or X-ray diffraction means. These diffraction means can determine whether the polycrystalline layer of boron phosphide or a boron phosphide-based mixed-crystal contains the ⁇ 100 ⁇ -, ⁇ 111 ⁇ -, and ⁇ 110 ⁇ -crystals , polycrystals containing an amorphous portion and crystals having a crystal plane differing from these crystal planes, or has another structure. An amorphous layer exhibits a halo electron- beam diffraction pattern.
  • the single-crystal layer serving as the upper surface portion be formed of boron monophosphide or a boron monophosphide-based mixed-crystal having the ⁇ lll ⁇ -crystal plane.
  • the ⁇ lll ⁇ -crystal plane of boron monophosphide or a boron monophosphide-based mixed- crystal of a cubic zincblende crystal structure is a crystal plane in which boron (B) and phosphorus (P), constituents, are packed in the most dense manner per unit area and constituents are firmly bonded together.
  • B boron
  • P phosphorus
  • the single-crystal layer assuming the ⁇ 111 ⁇ - crystal plane is effectively produced through vapor phase growth on a substrate formed of a cubic zincblende type crystal having a ⁇ lll ⁇ -crystal plane surface or on a crystalline layer having a ⁇ lll ⁇ -surface and formed on the substrate crystal having the same crystal plane surface. Whether or not the single-crystal layer has a ⁇ lll ⁇ -crystal plane surface can be investigated by use of the aforementioned X-ray diffraction means or electron- beam diffraction means.
  • the single-crystal layer having a ⁇ lll ⁇ -crystal plane surface can also be formed conveniently through vapor phase growth on a substrate formed of a hexagonal wurtzite type crystal having a
  • the lattice constant of the a axis in the bottom surface of the ⁇ 0001 ⁇ -crystal plane of wurtzite type gallium nitride (GaN) is 0.318 nm.
  • the lattice constant of a boron monophosphide single crystal is 0.438 nm ( Iwao Teramoto, "Introduction of Semiconductor Device," March 20 (1995) Baifukan, p. 28), and the lattice plane spacing of the ⁇ 110 ⁇ -crystal plane is 0.320 nm.
  • both the polycrystalline layer serving as the bottom portion and the single- crystal layer serving as the surface portion can be formed from an undoped (i.e., containing no intentionally added impurity) boron monophosphide layer or an undoped boron monophosphide-based mixed-crystal layer.
  • an undoped boron monophosphide layer or an undoped boron monophosphide-based mixed-crystal layer deterioration of the layer on which the polycrystalline layer is vapor-phase grown can be prevented, which deterioration would otherwise be caused by thermal diffusion of impurities during vapor phase growth of the polycrystalline layer.
  • the polycrystalline layer provided on a light- emitting layer is formed from an undoped boron phosphide- based mixed-crystal layer
  • variation in carrier concentration and conductivity type of the light-emitting layer can be prevented.
  • by forming an undoped single-crystal layer on the polycrystalline layer deterioration of the underlying layer can be further prevented.
  • the Ohmic electrode is provided so as to attain contact with the single-crystal layer formed of boron phosphide or a boron phosphide-based mixed-crystal, a semiconductor device having excellent breakdown voltage can be fabricated from the Ohmic electrode.
  • a single-crystal layer assuming the ⁇ lll ⁇ -crystal plane prevents propagation of dislocation occurring in the underlying layer and serves as a high-quality crystalline layer having a reduced number of crystal defects.
  • an electrode which prevents breakdown failure caused by leakage via dislocations can be fabricated.
  • the electrode which can form Ohmic contact with the n-type boron phosphide or n-type boron phosphide-based mixed-crystal can be produced from a gold (Au) alloy such as a gold (symbol of element: Au)- germanium (symbol of element: Ge) alloy or a gold (Au)- tin (symbol of element: Sn) alloy.
  • Au gold
  • the electrode can be produced from a gold (Au) alloy such as a gold (Au) -beryllium (symbol of element: Be) alloy or a gold (Au)-zinc (symbol of element: Zn) alloy.
  • Au gold
  • a boron phosphide layer or a boron phosphide-based mixed- crystal layer having a higher carrier concentration and a lower resistivity is preferred for forming Ohmic electrodes having small contact resistance and excellent Ohmic characteristics.
  • a single-crystal layer having a higher carrier concentration and a lower resistivity can be produced.
  • a single-crystal layer having a carrier concentration of 1 x 10 18 cm -3 or higher and a resistivity of 0.1 ⁇ -cm or less is particularly preferred for forming an Ohmic electrode.
  • an Ohmic electrode having excellent Ohmic contact characteristics cannot be formed on a polycrystalline layer formed of boron monophosphide or a boron monophosphide-based mixed-crystal by the presence of, for example, a crystal grain boundary in the polycrystalline layer.
  • an Ohmic electrode having excellent Ohmic contact characteristics can be readily formed.
  • the single-crystal layer formed of boron monophosphide or a boron monophosphide-based mixed- crystal tends to induce a flow of current supplied from the Ohmic electrode for operating a device (device operation current) in a leakage and short-like manner exclusively in an area directly under the electrode.
  • an intermediate layer formed of a metallic material forming non-Ohmic contact with the single-crystal layer or formed of an insulating material (an oxide or a nitride) is provided in a portion between the single-crystal layer of boron monophosphide or a boron monophosphide-based mixed- crystal and the Ohmic electrode.
  • the intermediate layer is provided directly under the center of the Ohmic electrode in such a manner that current paths are divided.
  • Examples of the metallic material forming non-Ohmic contact with the n-type boron phosphide layer or the n-type boron phosphide-based mixed-crystal layer include gold (Au) -beryllium (Be) alloy and gold (Au)-zinc (Zn) alloy.
  • Examples of the metallic material forming non-Ohmic contact with the p-type boron phosphide layer or the p-type boron phosphide-based mixed-crystal layer include gold (Au) -germanium (Ge) alloy and gold (Au)-tin (Sn) alloy.
  • These non-Ohmic metallic materials can be formed into a layer through a generally employed method such as vacuum vapor deposition.
  • the intermediate layer is particularly effective when it is formed from an insulating material formed of an oxide or a nitride.
  • the insulating material preferably forming the intermediate layer include silicon oxide (Si0 2 ) and silicon nitride (Si 3 N 4 ).
  • a mixture thereof; i.e., silicon nitride oxide (chemical formula: SiON) can also be used.
  • These insulating layers can be formed by use of means such as chemical vapor deposition (CVD) or plasma CVD.
  • the layer formation temperature is preferably lower than 750 °C, particularly preferably 100°C to 400°C, so as to prevent damage to a boron phosphide single-crystal layer or other layers caused by vaporization of a Group V element such as phosphorus.
  • the layer is shaped into a desired planar shape through selective patterning based on a conventional photolithography technique so as to leave the insulating layer exclusively in an area under the Ohmic electrode.
  • the intermediate layer is formed from an insulating layer made of an oxide or a nitride to which phosphorus (symbol of element: P) or a Group V element other than phosphorus (N, As, Sb, Bi) forming a boron phosphide-based mixed-crystal is added, there can be fabricated an Ohmic electrode which attains excellent bonding with the single-crystal layer formed of boron phosphide or a boron phosphide-based mixed-crystal and which can prevent the aforementioned short-like leakage of device operation current.
  • phosphorus symbol of element: P
  • N, As, Sb, Bi Group V element other than phosphorus
  • An insulating layer containing phosphorus or a Group V element other than phosphorus prevents migration of phosphorus from, for example, the boron phosphide single-crystal layer into the insulating layer during heat alloying of the Ohmic electrode, thereby preventing deterioration of crystallinity of the boron phosphide single-crystal layer.
  • interlayer diffusion of Group V atoms between the insulating layer and the single-crystal layer formed of boron monophosphide or a boron monophosphide-based mixed-crystal can be effectively prevented.
  • an Si0 2 or Si 3 N 4 insulating layer having a total Group V atom (e.g., phosphorus) content of 5 x 10 18 atoms/cm 3 to 1 x 10 20 atoms/cm 3 is preferred.
  • the Ohmic electrode having the aforementioned intermediate layer can be formed by providing the intermediate layer at the center of the electrode so as to attain contact with the single-crystal layer of boron phosphide or a boron phosphide-based mixed-crystal and causing the periphery of the intermediate layer to come into contact with the surface of the aforementioned single-crystal layer of boron phosphide or boron phosphide-based mixed-crystal.
  • the configuration When the configuration is employed in a semiconductor device such as a light- emitting device having electrodes sandwiching an active layer, a flow of device operation current in a short circuit manner exclusively into an area directly under the intermediate layer can be prevented, and the device operation current can flow into a wide area of the single-crystal layer by the mediation of the Ohmic electrode forming Ohmic contact with the single-crystal layer.
  • the intermediate layer has an excessively large thickness, the spacing between the surface of the single-crystal layer and the Ohmic electrode increases, and bonding between the surface of the single-crystal layer and the Ohmic electrode is reduced particularly at the periphery of the intermediate layer, thereby failing to satisfactorily successfully produce of an Ohmic electrode with firm bonding to the single-crystal layer.
  • the intermediate layer preferably has a thickness of 100 nm or less. From another aspect, the intermediate layer preferably has a thickness of 5 nm or more, in order to prevent a flow of device operation current.
  • a boron monophosphide or boron monophosphide- based mixed-crystal layer provided on a surface of the crystalline substrate or on a surface of a crystalline layer formed on the substrate crystal, the boron monophosphide layer or the boron monophosphide-based mixed-crystal layer having a bottom portion formed of a polycrystalline layer and an upper surface portion formed of a single-crystal layer, the polycrystalline layer is capable of relaxing the thermal strain between the underlying layer and the single-crystal layer, and the single-crystal layer can provide an Ohmic electrode having excellent Ohmic characteristics.
  • the intermediate layer such as an insulating layer provided partially on the surface of the single-crystal layer formed of boron monophosphide or a boron monophosphide-based mixed-crystal can diffuse device operation current in a wide area of the underlying layer.
  • the semiconductor light-emitting device will next be described, in detail, by taking as an example a light-emitting diode (LED) employing a boron phosphide layer of which surface layer is formed of a single-crystal layer.
  • LED light-emitting diode
  • FIG. 1 schematically shows a cross-section of an LED 10 including a stacked structure 11 mentioned in the Example.
  • a phosphorus (P)-doped n-type ( 111 ) -silicon (Si) single crystal was used as a substrate 101 for fabricating the epitaxial stacked structure 11.
  • a lower cladding layer 102 formed of undoped n-type boron monophosphide (BP) was deposited by use of atmospheric pressure (near atmospheric pressure) metal-organic vapor phase growth (MOCVD) means.
  • the lower n-type cladding layer 102 was deposited at 950 °C by use of a triethylboran (molecular formula: (C 2 H 5 ) 3 B) /phosphine (molecular formula: PH 3 ) /hydrogen (H 2 ) system.
  • the thickness of the n-type lower cladding layer 102 was controlled to 440 nm so as to attain a reflectance of 40% or higher within a blue light wavelength range of 430 nm to 460 nm. Feeding of the aforementioned boron source was stopped so as to complete vapor phase growth of the n-type lower cladding layer 102.
  • n-type Si single-crystal substrate 101 was lowered to 825°C in an atmosphere containing phosphine (PH 3 ) and hydrogen (H 2 ) .
  • PH 3 phosphine
  • H 2 hydrogen
  • an n-type gallium indium nitride (Ga ⁇ n ⁇ N: 0 ⁇ x ⁇ 1) layer serving as a light-emitting layer 103 was provided at 825 °C through use of atmospheric pressure MOCVD means by use of a trimethylgallium (molecular formula: (CH 3 ) 3 Ga) /trimethylindium (molecular formula:
  • the thickness of the light-emitting layer 103 formed of the n-type Ga 09/1 In 006 N layer was controlled to 60 nm.
  • the light-emitting layer 103 was formed of a Ga 094 In 006 N layer with the ⁇ 0001 ⁇ -crystal plane at the surface thereof, because the layer 103 was provided on the ⁇ lll ⁇ -boron phosphide layer (lower cladding layer 102) with the ⁇ lll ⁇ -crystal plane at the surface thereof. Vapor phase growth of the n-type Ga 094 In 006 N layer was completed by stopping the feed of (CH 3 ) 3 Ga and (CH 3 ) 3 In.
  • a p-type polycrystalline layer 104 formed of an undoped boron phosphide layer was formed through use of atmospheric pressure MOCVD means by use of the aforementioned (C 2 H 5 ) 3 B/PH 3 /H 2 system, while the temperature of the substrate 101 was maintained at 825°C in an atmosphere containing ammonia (NH 3 ) and hydrogen (H 2 ) .
  • a ( 111 )-single-crystal layer 105 formed of undoped p-type boron phosphide was formed through use of atmospheric pressure MOCVD means by use of the (C 2 H 5 ) 3 B/PH 3 /H 2 system.
  • the p-type boron phosphide single- crystal layer 105 was grown at a V/III ratio of 900, which was higher than the V/III ratio at which the polycrystalline layer 104 had been formed.
  • the carrier concentration of the layer 105 at room temperature was found to be 2 x 10 19 cm “3 , and the resistivity thereof was found to be 4 x 10 "2 ⁇ -cm.
  • the thickness of the layer 105 was controlled to 100 nm.
  • the undoped boron phosphide polycrystalline layer 104 and the single-crystal layer 105 were analyzed in terms of crystal structure by use of electron-beam diffraction means. The analysis revealed that the boron phosphide polycrystalline layer 104 was formed of aggregated columnar boron phosphide single crystals oriented generally in the ⁇ lll>-crystal direction.
  • the boron phosphide single-crystal layer 105 was found to be a single-crystal layer having a ⁇ lll ⁇ -crystal plane surface.
  • the boron phosphide layer 106 formed of the aforementioned polycrystalline layer 104 and single- crystal layer 105 was employed as the upper cladding layer 106 also serving as a contact layer.
  • the surface of the p-type boron phosphide single- crystal layer 106 was temporarily coated with a phosphorus (P) -doped silicon dioxide (Si0 2 ) film having a thickness of 75 nm.
  • the phosphorus atom concentration in the silicon dioxide film formed through use of conventional CVD means was controlled to 9 x 10 19 atoms/cm -3 .
  • the silicon dioxide film was left as an intermediate layer 107 exclusively in a circular area (diameter: 100 ⁇ m) at the center of the p-type boron phosphide single-crystal layer 106.
  • the silicon dioxide film remaining on the area other than the circular area was removed by use of a customary hydrofluoric acid (chemical formula: HF).
  • a gold-beryllium (Au: 99 wt.% and Be: 1 wt.%) alloy film was provided through use of conventional vapor deposition means so as to cover the surface' of the remaining intermediate layer 107 and the surface of the upper cladding layer 106 from which the silicon dioxide film had been removed.
  • the alloy film was left exclusively in the remaining area of the intermediate layer 107.
  • the remaining area of the Au-Be alloy film was shaped into a circle having a diameter of 150 ⁇ m, with the center being caused to coincide with that of the intermediate layer 107 having a circular planar plane.
  • the Au-Be alloy film had a larger area relative to that of the circular-shape intermediate layer 107, and a p-type Ohmic electrode 108 was formed such that the external peripheral region of the alloy film was in contact with the surface of the p-type boron phosphide layer 106.
  • the p-type Ohmic electrode 108 underwent alloying under hydrogen flow at 450 °C for three minutes, after completion of selective patterning.
  • an n-type Ohmic electrode 109 formed of an aluminum (Al) -antimony (Sb) alloy was formed on the entire back surface of the n-type silicon (Si) single-crystal substrate 101.
  • the thus-produced stacked structure was cut through use of conventional cutting means, thereby producing individual LEDs 10 having a pn-junction DH structure.
  • the LED 10 Upon passage of an operation current of 20 mA in the forward direction between the Ohmic electrodes 108 and 109 of each LED 10, the LED 10 emitted bluish purple light having a wavelength of about 440 nm.
  • the luminous intensity of the LED chip as determined through a conventional photometric sphere, was 8 mcd. Furthermore, emission with uniform intensity was provided from a wide area of the light-emitting layer 103 other than the area covered by the p-type Ohmic electrode 108.
  • the forward voltage (i.e., Vf ) at a forward current of 20 mA was found to be 3.7 V and the reverse voltage (Vr) at a reverse current of 10 ⁇ A was found to be 8 V or more.
  • Vf forward voltage
  • Vr reverse voltage
  • No variation in emission intensity and Vf and Vr caused by long-term passage of device operation current was identified. The reason was considered as follows.
  • the polycrystalline boron phosphide layer 104 was provided so as to attain joining to the light-emitting layer 103, whereby lattice mismatch between the boron phosphide layer and the light-emitting layer 103 was mitigated.
  • the Ohmic electrode 108 was provided on the boron phosphide single-crystal layer 105 having excellent crystallinity.
  • an upper cladding layer also serving as a contact layer for forming an electrode can be readily formed on the semiconductor layer, even when the boron phosphide-based semiconductor is undoped. Therefore, a compound semiconductor light-emitting device which emits high- intensity light, maintains high-intensity emission for a long period of time, and has excellent rectifying characteristics can be provided.

Abstract

A semiconductor device comprising a crystalline substrate, optionally with a crystalline layer formed thereon; a boron monophosphide or monophosphide-based mixed-crystal layer on said crystalline substrate or said crystalline layer formed thereon, said boron monophosphide or boron monophosphide-based mixed-crystal layer comprising a bottom portion of a polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer and an upper surface portion of a single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer; and an Ohmic electrode on said boron monophosphide or boron monophosphide-based mixed-crystal layer, said Ohmic electrode being in contact with said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer.

Description

DESCRIPTION
SEMICONDUCTOR DEVICE, PRODUCTION METHOD THEREOF
AND LIGHT-EMITTING DEVICE
Cross Reference to Related Application
This application is an application filed under 35 U.S.C. §lll(a) claiming benefit, pursuant to 35 U.S.C. §119(e)(l), of the filing date of Provisional Application No.60/448, 105 filed on February 20, 2003, pursuant to 35 U.S.C. §lll(b).
Technical Field
The present invention relates to a technique for fabricating a semiconductor device, such as a semiconductor light-emitting device, through the employment of a boron monophosphide (BP) or a boron monophosphide-based mixed-crystal layer serving as an electrode contact layer.
Background Art
Conventionally, a light-emitting diode (abbreviated as LED) and a laser diode (abbreviated as LD) which emit light of a short wavelength falling within a blue-light band have employed a Group III nitride semiconductor (see, for example, Isamu Akasaki, "Group III Nitride
Semiconductor," Baifukan Co., Ltd., Chapters 13 and 14, Dec. 8, 1999, first edition). For example, a wurtzite gallium indium nitride mixed-crystal (compositional formula: GaxIn1.3CN: 0 < x < 1) layer is used for forming a light-emitting layer (see, for example, Japanese Patent Publication No. 55-3834). Aluminum gallium nitride (AlχGa^j.N: 0 ≤ x ≤ 1) having a wider band gap is used for forming a cladding barrier layer with respect to the GaxIn1.xN (0 < x < 1) light-emitting layer (see the aforementioned Isamu Akasaki, "Group ill Nitride
Semiconductor," Baifukan Co., Ltd., Chapters 13 and 14, Dec. 8, 1999, first edition). Meanwhile, the present applicant has recently disclosed that a semiconductor light-emitting device can be fabricated by employing, instead of a Group III nitride semiconductor, boron monophosphide (chemical formula: BP) having a wide band gap serving as a barrier layer (see Japanese Patent Application No. 2001-158282).
Boron phosphide tends to provide a p-type conductive layer because boron phosphide has a degenerated valence band structure which differs from that of the above wurtzite Group III nitride semiconductor (see, for example, Japanese Patent Application Laid-Open { kokai ) No. 2-288388). Thus, a p-type boron phosphide layer has been employed as a contact layer for forming a p-type Ohmic electrode (see, for example, Japanese Patent Application Laid-Open ( kokai ) No. 10-242568). For example, there has been disclosed a technique for fabricating a light-emitting device including a p-type Ohmic electrode formed of a gold (symbol of element: Au)- zinc (symbol of element: Zn) alloy so as to attain contact with a surface of the p-type boron phosphide layer (see Japanese Unexamined Patent Publication (Kokai) No. 10-242568). Conventionally, the p-type boron phosphide layer on which an Ohmic electrode is to be provided has generally been formed on a Group III nitride semiconductor layer through use of vapor phase growth means such as metal-organic chemical vapor deposition (abbreviated as MOCVD) in combination with doping boron phosphide with magnesium (symbol of element: Mg) (see, for example, the above Isamu Akasaki, "Group III Nitride Semiconductor," Baifukan Co., Ltd., Chapters 13 and 14, Dec. 8, 1999, first edition).
The formation of, for example, a contact layer for providing an Ohmic contact electrode thereon requires a boron phosphide layer having low resistance and excellent crystallinity . However, a conventional boron phosphide layer has a zincblende crystal type, which differs from the wurtzite type of a Group III nitride semiconductor, and has lattice constants differing from those of a Group III nitride semiconductor layer. Therefore, when the boron phosphide layer is provided on the Group III nitride semiconductor layer, the formed boron phosphide has inferior crystallinity with a large number of dislocations .
In addition, conventionally, a cumbersome growth operation such as addition of Mg has been required in order to form a p-type conductive contact layer. In particular, at high temperature, an impurity such as Mg reacts with boron (B) forming the boron phosphide-based semiconductor (constituent), to thereby form a compound, resulting in vacancies induced by the reaction with boron. Thus, there remains the problem that a low- resistance p-type boron phosphide-based semiconductor cannot be formed successfully.
In order to solve the aforementioned problems involved in the background art, an object of the present invention is to provide a technique for fabricating a semiconductor device through employment of a boron monophosphide or boron monophosphide-based mixed-crystal layer, the layer being formed of a bottom layer and a surface layer, the bottom layer having a crystal composition which can provide an upper layer of excellent crystallinity by absorbing dislocations and being joined with a crystalline substrate or a crystalline layer formed on the substrate, and the surface layer having a crystal composition suitable for forming, for example, an Ohmic electrode. Particularly, another object of the present invention is to provide a technique for fabricating a semiconductor light-emitting device through employment of a low-resistance boron monophosphide or boron monophosphide-based mixed-crystal layer to which no impurity is intentionally added, so as to prevent increasing the degree of disorder of the crystalline substrate or a layer grown on the substrate caused by diffusion and migration of the impurity.
Still another object of the present invention is to provide a method for producing a semiconductor device employing a boron monophosphide or boron monophosphide- based mixed-crystal layer having a crystal composition according to the present invention.
Summary of the Invention
Accordingly, in order to attain the aforementioned objects, the present invention provides the following:
(1) A semiconductor device comprising a crystalline substrate, optionally with a crystalline layer formed thereon; a boron monophosphide or monophosphide- based mixed-crystal layer on said crystalline substrate or said crystalline layer formed thereon, said boron monophosphide or boron monophosphide-based mixed-crystal layer comprising a bottom portion of a polycrystalline boron monophosphide or boron monophosphide-based mixed- crystal layer and an upper surface portion of a single- crystal boron monophosphide or boron monophosphide-based mixed-crystal layer; and an Ohmic electrode on said boron monophosphide or boron monophosphide-based mixed-crystal layer, said Ohmic electrode being in contact with said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer.
(2) The semiconductor device as described in (1) above, wherein said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer of said upper surface portion has a { lll}-crystal plane surface.
(3) The semiconductor device as described in (2) above, wherein said crystalline substrate or said crystalline layer formed thereon, disposed under said boron monophosphide or boron monophosphide-based mixed- crystal layer, is a cubic zincblende-structure or diamond-structure crystalline layer having a {111}- crystal plane surface.
(4) The semiconductor device as described in (2) above, wherein said crystalline substrate or said crystalline layer formed thereon, which is disposed under said boron monophosphide or boron monophosphide-based mixed-crystal layer, is a hexagonal wurtzite-structure crystalline layer having a {0001}-crystal plane surface.
(5) The semiconductor device as described in any one of (1) to (4) above, wherein said crystalline substrate or said crystalline layer formed thereon, which is disposed under said boron monophosphide or boron monophosphide-based mixed-crystal layer, is formed of a Group III nitride semiconductor.
(6) The semiconductor device as described in any one of (1) to (5) above, wherein said crystalline substrate or said crystalline layer formed thereon, which is disposed under said boron monophosphide or boron monophosphide-based mixed-crystal layer, is formed of gallium indium nitride (GaxIn1_J.N: 0 < x < 1), aluminum gallium nitride (AlxGa1_.[N: 0 ≤ x ≤ 1), Gaxln1_xN (0 < x < 1), boron gallium nitride (Bj-Ga^N: 0 ≤ x ≤ 1), aluminum gallium nitride phosphide (AlxGa1_xNyP1.y: O ≤ x ≤ l, 0 < y ≤ 1), boron gallium phosphide (B^-Ga^P: 0 < x < 1), or boron indium phosphide (BxIn1_xP: 0 < x < 1). (7) The semiconductor device as described in any one of (1) to (6) above, wherein both of said polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer of said bottom portion and said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer of said upper surface portion are an undoped boron monophosphide or boron monophosphide-based mixed-crystal layer.
(8) The semiconductor device as described in any one of (1) to (7) above, further comprising an insulating intermediate layer of an oxide or nitride in a portion between said boron monophosphide or boron monophosphide- based mixed-crystal layer and said Ohmic electrode.
(9) The semiconductor device as described in (8) above, wherein said intermediate layer is an insulating layer of an oxide or nitride to which phosphorus or a Group V element forming the boron phosphide-based mixed- crystal other than phosphorus has been added..
(10) The semiconductor device as described in any one of (1) to (9) above, wherein said crystalline substrate or said crystalline layer formed thereon is formed of boron gallium phosphide ^..Ga^P: 0 < x < 1), boron indium phosphide (B^n-L^P: 0 < x < 1), aluminum boron phosphide ( l^B,.?: 0 < x < 1), boron gallium phosphide (B^a^P: 0 < x < 1), boron indium phosphide
Figure imgf000008_0001
y: 0 < y < 1).
(11) The semiconductor device as described in any one of (1) to (10) above, wherein said Ohmic electrode is of AuGe, AuSn, AuBe , or AuZn.
(12) The semiconductor device as described in any one of (1) to (11) above, wherein said intermediate layer is of silicon oxide, silicon nitride or silicon oxynitride.
(13) The semiconductor device as described in any one of (1) to (11) above, wherein said intermediate layer is of silicon oxide, silicon nitride or silicon oxynitride, added with P, N, As, Sb or Bi.
(14) A light-emitting device formed of the semiconductor device as recited in any one of (1) to (13) above . (15) A light-emitting device as described in (14) above, which comprises a Group III nitride layer as a light-emitting layer.
(16) A method for producing the semiconductor device as recited in any one of (1) to (13) above, said method comprising a) a step of forming a boron monophosphide or boron monophosphide-based mixed-crystal layer on a surface of a crystalline substrate or a crystalline layer formed thereon, said step of forming a boron monophosphide or boron monophosphide-based mixed-crystal layer comprising i) vapor-phase growing a polycrystalline boron monophosphide or boron monophosphide-based mixed- crystal layer on the surface of said crystalline substrate or said crystalline layer formed thereon at a first V/III ratio in a temperature range of 750°C to 1,200°C, said polycrystalline boron monophosphide or boron monophosphide-based mixed- crystal layer serving as a bottom portion of said boron monophosphide or boron monophosphide-based mixed-crystal layer, and, subsequently, ii) vapor-phase growing a single-crystal boron monophosphide or boron monophosphide-based mixed- crystal layer on said polycrystalline boron monophosphide or boron monophosphide-based mixed- crystal layer at a second V/III ratio which is in excess of the first V/III ratio and equal to or less than 2,000 in a temperature range of 750 °C to
1,200°C, said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer serving as an upper surface portion of said boron monophosphide or boron monophosphide-based mixed- crystal layer; and b) a step of providing an Ohmic electrode on said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer.
(17) A method for producing the semiconductor device as described in (16) above, wherein said crystalline substrate or said crystalline layer formed thereon is of a cubic zincblende-structure or diamond-structure crystal having a {lll}-crystal plane, and said boron, monophosphide (BP) or boron monophosphide-based mixed- crystal layer vapor-phase grown on said crystalline substrate or said crystalline layer formed thereon has a { lll}-crystal plane. (18) A method for producing a semiconductor device as described in (16) above, wherein said crystalline substrate or said crystalline layer formed thereon is of a hexagonal wurtzite-structure crystal having a {111}- crystal plane, and said boron monophosphide (BP) or boron monophosphide-based mixed-crystal layer vapor-phase grown on said crystalline substrate or said crystalline layer formed thereon has a {lll}-crystal plane.
(19) A method for producing the semiconductor device as described in any one of (16) to (18) above, wherein the method comprises providing an intermediate layer on and in contact with said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer serving as said upper surface layer with respect to said polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer of said bottom portion, and subsequently, forming an Ohmic electrode on said intermediate layer, said Ohmic electrode being in contact with a surface of said single-crystal boron monophosphide (BP) or boron monophosphide-based mixed-crystal layer in an area surrounding said intermediate layer.
Brief Description of the Drawing
FIG. 1 is a schematic cross-sectional view of the compound semiconductor light-emitting device (LED) mentioned in Example 1.
Modes of Carrying Out the Invention
In the present invention, no particular limitation is imposed on the type of the semiconductor device or the type of the crystalline substrate or the crystalline layer formed on the substrate crystal on which a semiconductor structure is formed. Although the present invention is directed particularly to a semiconductor light-emitting device having a light-emitting layer employing a compound semiconductor such as a Group III nitride semiconductor, the structure of the electrode contact layer according to the present invention can be applied to any semiconductor device which requires such a structure. Also, regarding the semiconductor light- emitting device, no particular limitation is imposed on the species, structure, etc. of the light-emitting layer. No particular limitation is imposed on the type of the crystalline substrate or the crystalline layer formed on the substrate crystal, and the crystalline substrate or the crystalline layer may be polycrystalline or amorphous. The effect of the invention is most successfully attained when the crystalline substrate or the crystalline layer is formed of a single crystal. Specifically, the crystalline layer in a light-emitting device serves not only as a light-emitting layer but also as a current-blocking layer or a cladding layer. The crystalline layer can be formed from a material which allows growth, on the crystalline layer, of a boron phosphide polycrystalline layer or a boron phosphide- based mixed-crystal polycrystalline layer. Examples of the crystalline layer formed on the crystalline substrate or the substrate crystal include boron gallium phosphide (compositional formula, BxGa1.xP : 0 < x < 1) crystalline layer and boron indium phosphide (compositional formula, B * In ι-x P: 0 < x < 1) crystalline layer. Examples of the semiconductor device include a field-effect transistor having an n-type boron phosphide crystalline layer formed on an electron-supplying crystalline layer which is fabricated from an n-type gallium nitride (GaN) channel layer and an n-type aluminum gallium nitride mixed- crystal layer (Al^a^N: 0 < x < 1) disposed thereon.
The boron phosphide or the boron phosphide-based mixed-crystal of the present invention for forming a contact layer is an excellent material for providing the contact layer, because the compounds can readily form a low-resistance crystalline layer having excellent conductivity and can provide excellent Ohmic contact with an electrode. Thus, in the present invention, the boron phosphide layer or the boron phosphide-based mixed- crystal layer can be preferably employed as an electrode contact layer formed on a p-type Group III nitride semiconductor layer such as p-type aluminum gallium nitride, boron gallium nitride, or aluminum gallium nitride phosphide. Alternatively, the boron phosphide layer or the boron phosphide-based mixed-crystal layer can also be formed on an n-type Group III nitride semiconductor layer such as n-type aluminum gallium nitride (chemical formula: Al^C-a^N: 0 ≤ x ≤ 1 ) or n-type gallium indium nitride (compositional formula: GaxIn1.xN: 0 ≤ x ≤ 1) . In the present invention, the term "boron phosphide- based mixed-crystal" refers to a multi-element crystal containing three or more elements as constituents including boron (B) and phosphorus (P). Examples include an aluminum boron phosphide mixed-crystal (compositional formula: Al^^P: 0 < x < 1), boron gallium phosphide (compositional formula: BxGa1.xP: 0 < x < 1), and boron indium phosphide (compositional formula: BxIn1_xP: 0 < x < 1 ) . Another example of the boron phosphide-based mixed- crystal of the present invention is boron arsenide phosphide (compositional formula: BPyAs^j,: 0 < y < 1) containing a Group V element differing from phosphorus (P) in addition to the above constituents. The boron phosphide-based mixed-crystal of a cubic zincblende crystal structure can be lattice-matched, by controlling a compositional proportion of boron (B) or phosphorus
(P), with a practically employed substrate material such as a silicon (symbol of element: Si) single crystal and a single crystal of a Group III-V compound semiconductor (e.g., gallium nitride (chemical formula: GaN) or gallium phosphide (chemical formula: GaP)). Thus, a boron phosphide-based mixed-crystal layer of BxGa1.xP (0 < x < 1), BxIn1.xP (0 < x < 1), etc. containing a reduced number of misfit dislocations can be formed on the above single crystals .
However, the boron phosphide layer or the boron phosphide-based mixed-crystal layer problematically deteriorates an underlying Group III-V semiconductor layer under thermal stress, when the layer has a thermal expansion coefficient differing from the semiconductor (e.g., a Group III nitride) layer. The present invention can solve the aforementioned problem by employing a boron phosphide layer or a boron phosphide-based mixed-crystal layer in which the upper surface layer is formed of a single-crystal layer and the bottom portion is formed of a polycrystalline layer, whereby the crystal grain boundary of the bottom polycrystalline layer absorbs thermal stress (difference in thermal expansion) to some extent. When a boron phosphide layer or a boron phosphide-based mixed-crystal layer is grown directly on a Group III nitride semiconductor underlying layer, in some cases the grown boron phosphide layer or boron phosphide-based mixed-crystal layer may have poor quality. However, by the mediation of the polycrystalline layer, a high-quality single-crystal boron phosphide layer or boron phosphide-based mixed- crystal layer can be formed.
The polycrystal or single-crystal boron phosphide or boron phosphide-based mixed-crystal layer according to the present invention can be vapor-phase grown through the halogen method (see "Journal of the Japanese Association for Crystal Growth," Vol. 24, No. 2, (1997), p. 150) by use of sources such as boron trichloride (chemical formula: BC13) and phosphorus trichloride (chemical formula: PC13). Alternatively, vapor phase growth can also be performed through the hydride method (see J. Crystal Growth, 24/25 (1974), p. 193-196) by use of sources such as diborane (chemical formula: B2H6) and phosphine (chemical formula: PH3), or through molecular beam epitaxy (see J. Solid State Chem. , 133 (1997), p. 269-272). Metal-organic chemical vapor deposition (MOCVD) (see Inst. Phys . Conf. Ser., No. 129 (IOP Publishing Ltd. (UK, 1993), p. 157-162) can also be employed.
The boron monophosphide layer or the boron monophosphide-based mixed-crystal layer having a crystal configuration of the present invention can be formed on the surface of a crystalline substrate or the surface of a crystalline layer formed on the substrate crystal in the following manner. Firstly, a polycrystalline layer serving as a bottom portion of the boron monophosphide (BP) layer or the boron monophosphide-based mixed-crystal layer is vapor-phase grown at 750°C to 1,200°C and at a first V/III ratio (e.g., 100 or higher, particularly preferably 100 to 200). The v/III ratio is a ratio of the total concentration of Group V atoms to that of Group III atoms, the atoms being fed so as to carry out vapor phase growth. For example, in the case of vapor phase growth of boron phosphide (BP), the V/III ratio is a ratio of the total concentration of phosphorus (P) atoms fed to that of boron (B) atoms fed. Subsequently, a single-crystal layer is vapor-phase grown on the polycrystalline layer at 750 °C to 1,200°C and at a second V/III ratio which is in excess of the first V/III ratio and equal to or less than 2,000. When the growth temperature is higher than 1,200°C, poly boron phosphide crystals such as B13P2 tend to be formed (see J. Am. Ceramic Soc . , 47(1) (1964), p. 44-46), thereby failing to attain successful formation of a boron monophosphide crystalline layer, which is problematic.
The first V/III ratio at formation of a polycrystalline layer of boron monophosphide or a boron monophosphide-based mixed-crystal is preferably controlled to 100 or higher, particularly preferably 100 to 200. When the first V/III ratio is lower than 100, particularly when the ratio is 50 or lower, an amorphous layer tends to be formed, which is problematic. As mentioned above, the polycrystalline layer serving as a bottom portion is useful for providing a high-quality single-crystal layer having a small degree of strain by virtue of relaxing thermal strain generated by a difference in thermal expansion coefficient between the underlying layer and the single-crystal layer provided on the polycrystalline layer.
The single-crystal layer of boron monophosphide (BP) or a boron monophosphide-based mixed-crystal serving as an upper portion is preferably formed at a second V/III ratio falling within a range of 600 to 1,200. The boron phosphide or the boron phosphide-based mixed-crystal can be formed under the conditions for forming a single- crystal layer, after completion of formation of the polycrystalline layer. For example, when a single vapor phase growth apparatus is employed, the first V/III ratio is switched instantly to the second V/III ratio. As a result, a crystal layer in which a single-crystal layer is stacked on the polycrystalline layer can be readily formed. Although the switching of the first V/III ratio to the second ratio may be performed slowly, slow switching requires an excessive layer thickness until the single crystal is formed, which is undesirable. Whether the formed layer is polycrystalline or a single crystal can be determined on the basis of diffraction patterns obtained by use of electron-beam diffraction means or X-ray diffraction means. These diffraction means can determine whether the polycrystalline layer of boron phosphide or a boron phosphide-based mixed-crystal contains the {100}-, {111}-, and { 110}-crystals , polycrystals containing an amorphous portion and crystals having a crystal plane differing from these crystal planes, or has another structure. An amorphous layer exhibits a halo electron- beam diffraction pattern.
In the present invention, it is particularly preferred that the single-crystal layer serving as the upper surface portion be formed of boron monophosphide or a boron monophosphide-based mixed-crystal having the {lll}-crystal plane. The { lll}-crystal plane of boron monophosphide or a boron monophosphide-based mixed- crystal of a cubic zincblende crystal structure is a crystal plane in which boron (B) and phosphorus (P), constituents, are packed in the most dense manner per unit area and constituents are firmly bonded together. Thus, the crystal plane is advantageous in effectively preventing propagation of dislocation from the underlying layer. The single-crystal layer assuming the {111}- crystal plane is effectively produced through vapor phase growth on a substrate formed of a cubic zincblende type crystal having a {lll}-crystal plane surface or on a crystalline layer having a { lll}-surface and formed on the substrate crystal having the same crystal plane surface. Whether or not the single-crystal layer has a {lll}-crystal plane surface can be investigated by use of the aforementioned X-ray diffraction means or electron- beam diffraction means.
Alternatively, the single-crystal layer having a { lll}-crystal plane surface can also be formed conveniently through vapor phase growth on a substrate formed of a hexagonal wurtzite type crystal having a
{0001}-crystal plane surface or on a crystalline layer having a {0001}-surface and formed on the substrate crystal having the same crystal plane surface. For example, the lattice constant of the a axis in the bottom surface of the {0001}-crystal plane of wurtzite type gallium nitride (GaN) is 0.318 nm. The lattice constant of a boron monophosphide single crystal is 0.438 nm ( Iwao Teramoto, "Introduction of Semiconductor Device," March 20 (1995) Baifukan, p. 28), and the lattice plane spacing of the {110}-crystal plane is 0.320 nm. By virtue of close matching between the lattice constant and the lattice plane spacing, the boron phosphide layer can be readily formed through vapor phase growth on the {0001}- crystal plane of GaN.
Particularly, one characteristic feature of the present invention lies in that both the polycrystalline layer serving as the bottom portion and the single- crystal layer serving as the surface portion can be formed from an undoped (i.e., containing no intentionally added impurity) boron monophosphide layer or an undoped boron monophosphide-based mixed-crystal layer. When the polycrystalline layer is formed from an undoped boron monophosphide layer or an undoped boron monophosphide- based mixed-crystal layer, deterioration of the layer on which the polycrystalline layer is vapor-phase grown can be prevented, which deterioration would otherwise be caused by thermal diffusion of impurities during vapor phase growth of the polycrystalline layer. For example, when the polycrystalline layer provided on a light- emitting layer is formed from an undoped boron phosphide- based mixed-crystal layer, variation in carrier concentration and conductivity type of the light-emitting layer can be prevented. In addition, by forming an undoped single-crystal layer on the polycrystalline layer, deterioration of the underlying layer can be further prevented. According to the present invention, when the Ohmic electrode is provided so as to attain contact with the single-crystal layer formed of boron phosphide or a boron phosphide-based mixed-crystal, a semiconductor device having excellent breakdown voltage can be fabricated from the Ohmic electrode. Particularly, a single-crystal layer assuming the {lll}-crystal plane prevents propagation of dislocation occurring in the underlying layer and serves as a high-quality crystalline layer having a reduced number of crystal defects. By use of such a single-crystal layer, an electrode which prevents breakdown failure caused by leakage via dislocations can be fabricated. The electrode which can form Ohmic contact with the n-type boron phosphide or n-type boron phosphide-based mixed-crystal can be produced from a gold (Au) alloy such as a gold (symbol of element: Au)- germanium (symbol of element: Ge) alloy or a gold (Au)- tin (symbol of element: Sn) alloy. In the case of the p- type boron phosphide or p-type boron phosphide-based mixed-crystal, the electrode can be produced from a gold (Au) alloy such as a gold (Au) -beryllium (symbol of element: Be) alloy or a gold (Au)-zinc (symbol of element: Zn) alloy. When the two types of Ohmic electrodes are produced from the same metallic material, a boron phosphide layer or a boron phosphide-based mixed- crystal layer having a higher carrier concentration and a lower resistivity is preferred for forming Ohmic electrodes having small contact resistance and excellent Ohmic characteristics.
When the V/III ratio is set selected to be a high level within the suitable range for forming the aforementioned single-crystal layer, a single-crystal layer having a higher carrier concentration and a lower resistivity can be produced. A single-crystal layer having a carrier concentration of 1 x 1018 cm-3 or higher and a resistivity of 0.1 Ω-cm or less is particularly preferred for forming an Ohmic electrode. Generally, an Ohmic electrode having excellent Ohmic contact characteristics cannot be formed on a polycrystalline layer formed of boron monophosphide or a boron monophosphide-based mixed-crystal by the presence of, for example, a crystal grain boundary in the polycrystalline layer. However, through employment of the single-crystal layer having such a high carrier concentration and such a low resistance, an Ohmic electrode having excellent Ohmic contact characteristics can be readily formed.
In contrast, the single-crystal layer formed of boron monophosphide or a boron monophosphide-based mixed- crystal tends to induce a flow of current supplied from the Ohmic electrode for operating a device (device operation current) in a leakage and short-like manner exclusively in an area directly under the electrode. In order to effectively prevent flow of device operation current particularly to the limited area in a light- emitting device or a similar device, an intermediate layer formed of a metallic material forming non-Ohmic contact with the single-crystal layer or formed of an insulating material (an oxide or a nitride) is provided in a portion between the single-crystal layer of boron monophosphide or a boron monophosphide-based mixed- crystal and the Ohmic electrode. Preferably, the intermediate layer is provided directly under the center of the Ohmic electrode in such a manner that current paths are divided. Examples of the metallic material forming non-Ohmic contact with the n-type boron phosphide layer or the n-type boron phosphide-based mixed-crystal layer include gold (Au) -beryllium (Be) alloy and gold (Au)-zinc (Zn) alloy. Examples of the metallic material forming non-Ohmic contact with the p-type boron phosphide layer or the p-type boron phosphide-based mixed-crystal layer include gold (Au) -germanium (Ge) alloy and gold (Au)-tin (Sn) alloy. These non-Ohmic metallic materials can be formed into a layer through a generally employed method such as vacuum vapor deposition. Subsequently, the layer is shaped into a desired planar shape through selective patterning based on a conventional photolithography technique so as to leave the layer exclusively in a specific area under the Ohmic electrode. The intermediate layer is particularly effective when it is formed from an insulating material formed of an oxide or a nitride. Examples of the insulating material preferably forming the intermediate layer include silicon oxide (Si02) and silicon nitride (Si3N4). In addition, a mixture thereof; i.e., silicon nitride oxide (chemical formula: SiON) can also be used. These insulating layers can be formed by use of means such as chemical vapor deposition (CVD) or plasma CVD. The layer formation temperature is preferably lower than 750 °C, particularly preferably 100°C to 400°C, so as to prevent damage to a boron phosphide single-crystal layer or other layers caused by vaporization of a Group V element such as phosphorus. After completion of layer formation, the layer is shaped into a desired planar shape through selective patterning based on a conventional photolithography technique so as to leave the insulating layer exclusively in an area under the Ohmic electrode. When the intermediate layer is formed from an insulating layer made of an oxide or a nitride to which phosphorus (symbol of element: P) or a Group V element other than phosphorus (N, As, Sb, Bi) forming a boron phosphide-based mixed-crystal is added, there can be fabricated an Ohmic electrode which attains excellent bonding with the single-crystal layer formed of boron phosphide or a boron phosphide-based mixed-crystal and which can prevent the aforementioned short-like leakage of device operation current. An insulating layer containing phosphorus or a Group V element other than phosphorus prevents migration of phosphorus from, for example, the boron phosphide single-crystal layer into the insulating layer during heat alloying of the Ohmic electrode, thereby preventing deterioration of crystallinity of the boron phosphide single-crystal layer. In other words, interlayer diffusion of Group V atoms between the insulating layer and the single-crystal layer formed of boron monophosphide or a boron monophosphide-based mixed-crystal can be effectively prevented. When alloying is performed in a hydrogen (H2) atmosphere or a nitrogen (N2) atmosphere at 350°C to 550°C, an Si02 or Si3N4 insulating layer having a total Group V atom (e.g., phosphorus) content of 5 x 1018 atoms/cm3 to 1 x 1020 atoms/cm3 is preferred.
The Ohmic electrode having the aforementioned intermediate layer can be formed by providing the intermediate layer at the center of the electrode so as to attain contact with the single-crystal layer of boron phosphide or a boron phosphide-based mixed-crystal and causing the periphery of the intermediate layer to come into contact with the surface of the aforementioned single-crystal layer of boron phosphide or boron phosphide-based mixed-crystal. When the configuration is employed in a semiconductor device such as a light- emitting device having electrodes sandwiching an active layer, a flow of device operation current in a short circuit manner exclusively into an area directly under the intermediate layer can be prevented, and the device operation current can flow into a wide area of the single-crystal layer by the mediation of the Ohmic electrode forming Ohmic contact with the single-crystal layer. When the intermediate layer has an excessively large thickness, the spacing between the surface of the single-crystal layer and the Ohmic electrode increases, and bonding between the surface of the single-crystal layer and the Ohmic electrode is reduced particularly at the periphery of the intermediate layer, thereby failing to satisfactorily successfully produce of an Ohmic electrode with firm bonding to the single-crystal layer. Thus, the intermediate layer preferably has a thickness of 100 nm or less. From another aspect, the intermediate layer preferably has a thickness of 5 nm or more, in order to prevent a flow of device operation current. In a boron monophosphide or boron monophosphide- based mixed-crystal layer provided on a surface of the crystalline substrate or on a surface of a crystalline layer formed on the substrate crystal, the boron monophosphide layer or the boron monophosphide-based mixed-crystal layer having a bottom portion formed of a polycrystalline layer and an upper surface portion formed of a single-crystal layer, the polycrystalline layer is capable of relaxing the thermal strain between the underlying layer and the single-crystal layer, and the single-crystal layer can provide an Ohmic electrode having excellent Ohmic characteristics.
The intermediate layer such as an insulating layer provided partially on the surface of the single-crystal layer formed of boron monophosphide or a boron monophosphide-based mixed-crystal can diffuse device operation current in a wide area of the underlying layer.
Example
The semiconductor light-emitting device according to the present invention will next be described, in detail, by taking as an example a light-emitting diode (LED) employing a boron phosphide layer of which surface layer is formed of a single-crystal layer.
FIG. 1 schematically shows a cross-section of an LED 10 including a stacked structure 11 mentioned in the Example. A phosphorus (P)-doped n-type ( 111 ) -silicon (Si) single crystal was used as a substrate 101 for fabricating the epitaxial stacked structure 11. On the ( 111 ) -surface of the substrate 101, a lower cladding layer 102 formed of undoped n-type boron monophosphide (BP) was deposited by use of atmospheric pressure (near atmospheric pressure) metal-organic vapor phase growth (MOCVD) means. The lower n-type cladding layer 102 was deposited at 950 °C by use of a triethylboran (molecular formula: (C2H5)3B) /phosphine (molecular formula: PH3) /hydrogen (H2) system. The thickness of the n-type lower cladding layer 102 was controlled to 440 nm so as to attain a reflectance of 40% or higher within a blue light wavelength range of 430 nm to 460 nm. Feeding of the aforementioned boron source was stopped so as to complete vapor phase growth of the n-type lower cladding layer 102. Thereafter, the temperature of the n-type Si single-crystal substrate 101 was lowered to 825°C in an atmosphere containing phosphine (PH3) and hydrogen (H2) . Subsequently, an n-type gallium indium nitride (Ga^n^N: 0 < x < 1) layer serving as a light-emitting layer 103 was provided at 825 °C through use of atmospheric pressure MOCVD means by use of a trimethylgallium (molecular formula: (CH3)3Ga) /trimethylindium (molecular formula:
(CH3)3ln) /ammonia (molecular formula: NH3)/H2 system so as to attain joining to the n-type lower cladding layer 102 The gallium indium nitride layer serving as the n-type light-emitting layer 103 had a multi-phase structure which was formed from a plurality of gallium indium nitride layers (GaxIn1_xN) having indium compositional proportions (1-x) that differ from one another. The average compositional proportion of indium was found to be 0.06 (= 6%). The thickness of the light-emitting layer 103 formed of the n-type Ga09/1In006N layer was controlled to 60 nm. The light-emitting layer 103 was formed of a Ga094In006N layer with the {0001}-crystal plane at the surface thereof, because the layer 103 was provided on the {lll}-boron phosphide layer (lower cladding layer 102) with the { lll}-crystal plane at the surface thereof. Vapor phase growth of the n-type Ga094In006N layer was completed by stopping the feed of (CH3)3Ga and (CH3)3In.
On the light-emitting layer 103, a p-type polycrystalline layer 104 formed of an undoped boron phosphide layer was formed through use of atmospheric pressure MOCVD means by use of the aforementioned (C2H5)3B/PH3/H2 system, while the temperature of the substrate 101 was maintained at 825°C in an atmosphere containing ammonia (NH3) and hydrogen (H2) . The polycrystalline layer 104 was vapor-phase grown at a V/III ratio (= PH3/ (C2H5)3B) of 150. The carrier concentration of the boron phosphide polycrystalline layer 104 at room temperature, as measured through a conventional Hall effect method, was found to be 8 x 10 cm"3. Feeding of (C2H5)3B employed as a boron source was stopped so as to complete vapor phase growth of the boron phosphide polycrystalline layer 104 having a thickness of 20. nm. Thereafter, the temperature of the silicon (Si) single-crystal substrate 101 was elevated to 1,050°C under the flow of PH3 and H2.
Subsequently, on the boron phosphide polycrystalline layer 104, a ( 111 )-single-crystal layer 105 formed of undoped p-type boron phosphide was formed through use of atmospheric pressure MOCVD means by use of the (C2H5)3B/PH3/H2 system. The p-type boron phosphide single- crystal layer 105 was grown at a V/III ratio of 900, which was higher than the V/III ratio at which the polycrystalline layer 104 had been formed. The carrier concentration of the layer 105 at room temperature, as measured through a conventional Hall effect method, was found to be 2 x 1019 cm"3, and the resistivity thereof was found to be 4 x 10"2 Ω-cm. The thickness of the layer 105 was controlled to 100 nm. After completion of cooling, the undoped boron phosphide polycrystalline layer 104 and the single-crystal layer 105 were analyzed in terms of crystal structure by use of electron-beam diffraction means. The analysis revealed that the boron phosphide polycrystalline layer 104 was formed of aggregated columnar boron phosphide single crystals oriented generally in the <lll>-crystal direction. The boron phosphide single-crystal layer 105 was found to be a single-crystal layer having a { lll}-crystal plane surface. The boron phosphide layer 106 formed of the aforementioned polycrystalline layer 104 and single- crystal layer 105 was employed as the upper cladding layer 106 also serving as a contact layer.
The surface of the p-type boron phosphide single- crystal layer 106 was temporarily coated with a phosphorus (P) -doped silicon dioxide (Si02) film having a thickness of 75 nm. The phosphorus atom concentration in the silicon dioxide film formed through use of conventional CVD means was controlled to 9 x 1019 atoms/cm-3. Subsequently, through selective patterning based on a conventional photolithography technique, the silicon dioxide film was left as an intermediate layer 107 exclusively in a circular area (diameter: 100 μm) at the center of the p-type boron phosphide single-crystal layer 106. The silicon dioxide film remaining on the area other than the circular area was removed by use of a customary hydrofluoric acid (chemical formula: HF). Subsequently, a gold-beryllium (Au: 99 wt.% and Be: 1 wt.%) alloy film was provided through use of conventional vapor deposition means so as to cover the surface' of the remaining intermediate layer 107 and the surface of the upper cladding layer 106 from which the silicon dioxide film had been removed. Then, through selective patterning based on a conventional photolithography technique, the alloy film was left exclusively in the remaining area of the intermediate layer 107. The remaining area of the Au-Be alloy film was shaped into a circle having a diameter of 150 μm, with the center being caused to coincide with that of the intermediate layer 107 having a circular planar plane. Thus, the Au-Be alloy film had a larger area relative to that of the circular-shape intermediate layer 107, and a p-type Ohmic electrode 108 was formed such that the external peripheral region of the alloy film was in contact with the surface of the p-type boron phosphide layer 106. Notably, the p-type Ohmic electrode 108 underwent alloying under hydrogen flow at 450 °C for three minutes, after completion of selective patterning. On the entire back surface of the n-type silicon (Si) single-crystal substrate 101, an n-type Ohmic electrode 109 formed of an aluminum (Al) -antimony (Sb) alloy was formed.
Thereafter, the thus-produced stacked structure was cut through use of conventional cutting means, thereby producing individual LEDs 10 having a pn-junction DH structure. Upon passage of an operation current of 20 mA in the forward direction between the Ohmic electrodes 108 and 109 of each LED 10, the LED 10 emitted bluish purple light having a wavelength of about 440 nm. The luminous intensity of the LED chip, as determined through a conventional photometric sphere, was 8 mcd. Furthermore, emission with uniform intensity was provided from a wide area of the light-emitting layer 103 other than the area covered by the p-type Ohmic electrode 108. This is presumably attributable to the flow of device operation current in a short circuit manner to the light-emitting layer 103 being prevented by the insulating intermediate layer 107 provided directly under the p-type Ohmic electrode 108. In addition, it may be interpreted that the current diffused in the plane of the light-emitting layer 103 other than the area corresponding to the Ohmic electrode 108 by virtue of the p-type Ohmic electrode 108 provided so as to attain contact with the low-resistance p-type boron phosphide single-crystal layer 106. The forward voltage (i.e., Vf ) at a forward current of 20 mA was found to be 3.7 V and the reverse voltage (Vr) at a reverse current of 10 μA was found to be 8 V or more. No variation in emission intensity and Vf and Vr caused by long-term passage of device operation current was identified. The reason was considered as follows. The polycrystalline boron phosphide layer 104 was provided so as to attain joining to the light-emitting layer 103, whereby lattice mismatch between the boron phosphide layer and the light-emitting layer 103 was mitigated. As a result, the Ohmic electrode 108 was provided on the boron phosphide single-crystal layer 105 having excellent crystallinity.
Industrial Applicability By use of the boron phosphide-based semiconductor layer according to the present invention in which the lower layer is formed of a polycrystalline layer and the upper layer is formed of a single-crystal layer, an upper cladding layer also serving as a contact layer for forming an electrode can be readily formed on the semiconductor layer, even when the boron phosphide-based semiconductor is undoped. Therefore, a compound semiconductor light-emitting device which emits high- intensity light, maintains high-intensity emission for a long period of time, and has excellent rectifying characteristics can be provided.

Claims

1. A semiconductor device comprising a crystalline substrate optionally with a crystalline layer formed thereon; a boron monophosphide or monophosphide- based mixed-crystal layer on said crystalline substrate or said crystalline layer formed thereon, said boron monophosphide or boron monophosphide-based mixed-crystal layer comprising a bottom portion of a polycrystalline boron monophosphide or boron monophosphide-based mixed- crystal layer and an upper surface portion of a single- crystal boron monophosphide or boron monophosphide-based mixed-crystal layer; and an Ohmic electrode on said boron monophosphide or boron monophosphide-based mixed-crystal layer, said Ohmic electrode being in contact with said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer.
2. The semiconductor device as described in claim 1, wherein said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer of said upper surface portion has a {lll}-crystal plane surface.
3. The semiconductor device as described in claim 2, wherein said crystalline substrate or said crystalline layer formed thereon, disposed under said boron monophosphide or boron monophosphide-based mixed-crystal layer, is a cubic zincblende-structure or diamond- structure crystalline layer having a {lll}-crystal plane surface.
4. The semiconductor device as described in claim
2, wherein said crystalline substrate or said crystalline layer formed thereon, which is disposed under said boron monophosphide or boron monophosphide-based mixed-crystal layer, is a hexagonal wurtzite-structure crystalline layer having a {0001}-crystal plane surface.
5. The semiconductor device as described in any one of claims 1 to 4 , wherein said crystalline substrate or said crystalline layer formed thereon, which is disposed under said boron monophosphide or boron monophosphide-based mixed-crystal layer, is formed of a Group III nitride semiconductor.
6. The semiconductor device as described in any one of claims 1 to 5, wherein said crystalline substrate or said crystalline layer formed thereon, which is disposed under said boron monophosphide or boron monophosphide-based mixed-crystal layer, is formed of gallium indium nitride (GaxIn1.xN: 0 < x < 1), aluminum gallium nitride (Al^a^N: 0 ≤ x ≤ 1), GaxIn1_xN (0 < x <
1), boron gallium nitride (BxGa1.xN: 0 < x < 1), aluminum gallium nitride phosphide (Al^a^ ^..,: O ≤ x ≤ l, 0 < y ≤ 1), boron gallium phosphide (B^a-L^P: 0 < x < 1 ) , or boron indium phosphide (BxIn1_xP: 0 < x < 1).
7. The semiconductor device as described in any one of claims 1 to 6 , wherein both of said polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer of said bottom portion and said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer of said upper surface portion are an undoped boron monophosphide or boron monophosphide-based mixed-crystal layer.
8. The semiconductor device as described in any one of claims 1 to 7 , further comprising an insulating intermediate layer of an oxide or nitride in a portion between said boron monophosphide or boron monophosphide- based mixed-crystal layer and said Ohmic electrode.
9. The semiconductor device as described in claim 8, wherein said intermediate layer is an insulating layer of an oxide or nitride to which phosphorus or a Group V element forming the boron phosphide-based mixed-crystal other than phosphorus has been added.
10. The semiconductor device as described in any one of claims 1 to 9 , wherein said crystalline substrate or said crystalline layer formed thereon is formed of boron gallium phosphide (B-.Gaj.-.P: 0 < x < 1), boron indium phosphide (BxIn1.xP: 0 < x < 1), aluminum boron phosphide (Al1.xBxP: 0 < x < 1), boron gallium phosphide (Bj-Ga-L.,.?: 0 < x < 1), boron indium phosphide (BxIn1_xP: 0 < x < 1 ) , or boron arsenide phosphide (BPyAs1_y: 0 < y < 1).
11. The semiconductor device as described in any one of claims 1 to 10, wherein said Ohmic electrode is of AuGe, AuSn, AuBe, or AuZn.
12. The semiconductor device as described in any one of claims 1 to 11, wherein said intermediate layer is of silicon oxide, silicon nitride or silicon oxynitride.
13. The semiconductor device as described in any one of claims 1 to 11, wherein said intermediate layer is of silicon oxide, silicon nitride or silicon oxynitride, added with P, N, As, Sb or Bi.
14. A light-emitting device formed of the semiconductor device as recited in any one of claims 1 to 13.
15. A light-emitting device as described in claim 14, which comprises a Group III nitride layer as a light- emitting layer.
16. A method for producing the semiconductor device as recited in any one of claims 1 to 13, said method comprising a) a step of forming a boron monophosphide or boron monophosphide-based mixed-crystal layer on a surface of a crystalline substrate or a crystalline layer formed thereon, said step of forming a boron monophosphide or boron monophosphide-based mixed-crystal layer comprising i) vapor-phase growing a polycrystalline boron monophosphide or boron monophosphide- based mixed-crystal layer on the surface of said crystalline substrate or said crystalline layer formed thereon at a first V/III ratio in a temperature range of 750°C to 1,200°C, said polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer serving as a bottom portion of said boron monophosphide or boron monophosphide-based mixed-crystal layer, and, subsequently, ii) vapor-phase growing a single-crystal boron monophosphide or boron monophosphide- based mixed-crystal layer on said polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer at a second V/III ratio which is in excess of the first V/III ratio and equal to or less than 2,000 a temperature range of 750°C to 1,200°C, said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer serving as an upper surface portion of said boron monophosphide or boron monophosphide- based mixed-crystal layer; and b) a step of providing an Ohmic electrode on said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer.
17. A method for producing the semiconductor device as described in claim 16, wherein said crystalline substrate or said crystalline layer formed thereon is of a cubic zincblende-structure or diamond-structure crystal having a { lll}-crystal plane, and said boron monophosphide (BP) or boron monophosphide-based mixed- crystal layer vapor-phase grown on said crystalline substrate or said crystalline layer formed thereon has a {lll}-crystal plane.
18. A method for producing a semiconductor device as described in claim 16, wherein said crystalline substrate or said crystalline layer formed thereon is of a hexagonal wurtzite-structure crystal having a {111}- crystal plane, and said boron monophosphide (BP) or boron monophosphide-based mixed-crystal layer vapor-phase grown on said crystalline substrate or said crystalline layer formed thereon has a {lll}-crystal plane.
19. A method for producing the semiconductor device as described in any one of claims 16 to 18, wherein the method comprises providing an intermediate layer on and in contact with said single-crystal boron monophosphide or boron monophosphide-based mixed-crystal layer serving as said upper surface layer with respect to said polycrystalline boron monophosphide or boron monophosphide-based mixed-crystal layer of said bottom portion, and subsequently, forming an Ohmic electrode on said intermediate layer, said Ohmic electrode being in contact with a surface of said single-crystal boron monophosphide ( BP ) or boron monophosphide-based mixed-crystal layer in an area surrounding said intermediate layer.
PCT/JP2004/001296 2003-02-10 2004-02-06 Semiconductor device, production method thereof and light-emitting device WO2004070846A1 (en)

Priority Applications (1)

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EP04708877A EP1593162A4 (en) 2003-02-10 2004-02-06 Semiconductor device, production method thereof and light-emitting device

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