JP2001068593A - Multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a multilayer wiring board, capable of efficiently connecting terminals without reducing the flexibility of wiring connection, even in a group of parallel wiring being laminated alternately with the shortest distance, can reduce crosstalk noise between wiring, and is suited for an electronic circuit substrate or the like for mounting electronic components, such as a semiconductor element that operates speedily. SOLUTION: A second laminated D2, where a fourth insulation layer 14 with a fourth parallel wiring group L4, that orthogonally crosses a third insulation layer 13 with a third group of parallel wiring L3, that orthogonally crosses a first group of parallel wiring L1 by 30-60 degrees is laminated, is laminated on a first laminate D1 where a second insulation layer I2 with a second group of parallel wiring L2, that orthogonally crosses is laminated on a first insulation layer I1 with the first group of parallel wiring L1. Furthermore, in the multilayer wiring board, an interval h2 between the second and third groups of parallel wiring L2 and L3 is set larger than an interval h1' between the third and fourth groups of parallel wiring L3 and L4, thus reducing the crosstalk noises between wirings, while improving the flexibility of wiring connection.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board used for an electronic circuit board or the like, and more particularly to a wiring structure in a multilayer wiring board on which a semiconductor element operating at a high speed is mounted.

[0002]

2. Description of the Related Art Conventionally, in a multilayer wiring board on which a semiconductor element such as a semiconductor integrated circuit element is mounted and which is used for an electronic circuit board or the like, an insulating material made of ceramics such as alumina is used for forming a wiring conductor for internal wiring. Layers and wiring conductors made of a refractory metal such as tungsten (W) are alternately stacked to form a multilayer wiring board.

In a conventional multilayer wiring board, signal wirings of internal wiring wiring conductors usually have a strip line structure, and a so-called solid pattern is formed above and below wiring conductors formed as signal wirings via insulating layers. A ground (ground) layer or a power supply layer having a wide area of the shape was formed.

Further, with the increase in the speed of electric signals handled by the multilayer wiring board, the insulating layer is replaced with alumina ceramics having a relative dielectric constant of about 10, and a polyimide resin or epoxy resin having a relatively small relative dielectric constant of 3.5 to 5 is used. And a conductive layer for internal wiring made of copper (Cu) is formed on the insulating layer by using a thin film forming technique such as a vapor deposition method such as a vapor deposition method or a sputtering method. By forming a wiring conductor in a pattern and multiplying the insulating layer and the wiring conductor into layers, a multilayer wiring board having a high density, a high function and a high speed operation of a semiconductor element has been obtained.

On the other hand, the wiring structure of the internal wiring of the multilayer wiring board is designed to reduce the impedance of the wiring, reduce the crosstalk between signal wirings, etc. A structure has been proposed in which a group of parallel wirings is formed, which is multi-layered, and predetermined wirings in the wiring group of each layer are electrically connected to each other via through conductors such as via conductors and through-hole conductors.

In a multilayer wiring board having such parallel wiring groups, an electronic component such as a semiconductor element mounted on the multilayer wiring board is electrically connected to a mounting board on which the multilayer wiring board is mounted. First, an appropriate wiring is selected from each parallel wiring group in the multilayer wiring board, and the electrical connection between the wirings between different wiring layers is performed via a through conductor such as a via conductor.

[0007]

However, since the wiring direction of each parallel wiring in the conventional multilayer wiring board is composed of a so-called X direction and a Y direction which are orthogonal to each other, these orthogonal wirings in the multilayer wiring board are not included. When the electrode terminals of the desired semiconductor element and the connection terminals of the mounting board are electrically connected via the parallel wiring group, the wiring cannot be made in the shortest distance, and the wiring length in the substrate becomes longer, so that the signal There is a problem in that the resistance, capacitance, and inductance of the wiring are increased as compared with the case where the wiring is shortest. As a result, there has been a problem that the rise of a signal to be operated at a high speed is delayed and the noise is increased. On the other hand, for example, Japanese Patent Application Laid-Open No. 59-86248 discloses a first direction. A first wiring layer having a group of wirings running, and a second having a group of wirings running parallel to a second direction perpendicular to the first direction.
Wiring layer, a wiring layer of the body 3 having a wiring group running in a third direction oblique to the first direction, and a fourth wiring having a wiring group running in a fourth direction perpendicular to the third direction. A multilayer wiring board in which layers are overlapped with an insulating layer interposed therebetween is disclosed. According to this, 2 having a group of wirings orthogonal to each other
Since one insulating layer and two wiring groups obliquely intersecting with these wiring groups and orthogonal to each other are overlapped with each other between the wiring layers with an insulating layer interposed therebetween, two terminals are provided as compared with the conventional wiring grid. The length of the connection line between them can be shortened, and crosstalk between the connection lines can be reduced. That is, by adding a wiring layer having a wiring group in an oblique direction in addition to a wiring group in the X and Y directions, the degree of freedom of wiring connection is increased, and compared to a multilayer wiring board having only a wiring group in the X and Y directions. Thus, the connection wiring length can be shortened.

However, as in the first and second wiring layers and the third and fourth wiring layers in the multilayer wiring board disclosed in Japanese Unexamined Patent Publication No. 59-86248, a wiring group in a certain wiring layer is When the wiring direction is not orthogonal to the wiring direction of the wiring group in the wiring layer immediately above or immediately below the wiring layer and the wirings obliquely intersect, unnecessary electromagnetic coupling between the wirings Therefore, there is a problem that the coupling causes crosstalk noise between the upper and lower wirings.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a parallel wiring group alternately stacked so that the distance between terminals is close to the shortest distance without reducing the degree of freedom of wiring connection. Provided is a multilayer wiring board suitable for an electronic circuit board or the like on which an electronic component such as a semiconductor element operating at a high speed can be efficiently connected at a distance and can reduce crosstalk noise between wirings. It is in.

[0010]

A multilayer wiring board according to the present invention has, on a first insulating layer having a first parallel wiring group, a second parallel wiring group orthogonal to the first parallel wiring group. A third parallel wiring group is provided on a first laminate formed by laminating a second insulating layer and electrically connecting the first and second parallel wiring groups with a first through conductor group. A fourth insulating layer having a fourth parallel wiring group orthogonal to the third parallel wiring group is laminated on a third insulating layer, and the third and fourth parallel wiring groups are connected to a second through conductor. A second stacked body electrically connected in a group, the third parallel wiring group being stacked so as to cross the first parallel wiring group at an angle of 30 to 60 degrees with the first parallel wiring group; Is electrically connected to the third or fourth parallel wiring group by a third through conductor group penetrating the conductor layer. And the distance between the second and third parallel wiring groups is larger than the distance between the first and second parallel wiring groups and the distance between the third and fourth parallel wiring groups. It is assumed that.

Further, in the multilayer wiring board according to the present invention, in the above structure, the distance between the second and third parallel wiring groups is changed to the distance between the first and second parallel wiring groups and the third and fourth parallel wiring groups. Is 1.1 to 5 times the distance between the parallel wiring groups.

Further, in the multilayer wiring board according to the present invention, the first to fourth parallel wiring groups each include a plurality of signal wirings and a power supply wiring or a ground wiring adjacent to each signal wiring. It is characterized by the following.

According to the multilayer circuit board of the present invention, the first parallel wiring group and the second parallel wiring group in the first laminate are
In addition, since the third parallel wiring group and the fourth parallel wiring group in the second stacked body are orthogonal to each other, crosstalk noise between the wirings of each stacked body can be reduced and minimized. Further, since the third and fourth parallel wiring groups of the second stacked body are arranged at an angle of 30 to 60 degrees with respect to the first and second parallel wiring groups of the first stacked body, Compared with a conventional multilayer wiring board in which parallel wiring groups are arranged only orthogonally, the terminals between the first parallel wiring group of the first stacked body and the fourth parallel wiring group of the second stacked body are different. It is possible to efficiently connect the terminals at a distance close to the shortest distance without reducing the degree of freedom of the wiring connection, and to reduce the connection wiring length, and to reduce the distance between the terminals from the first laminate to the second laminate. Can be reduced in resistance, capacitance, and inductance of the wiring connecting them.

Further, the distance between the second parallel wiring group and the third parallel wiring group disposed obliquely at an angle of 30 to 60 degrees with respect to each other is defined as the distance between the first and second parallel wiring groups and the third parallel wiring group. And the distance between the fourth parallel wiring groups is larger than
Between the second parallel wiring group and the third parallel wiring group,
Further, the first and second parallel wiring groups and the third and fourth parallel wiring groups
Unnecessary electromagnetic coupling between the first and second parallel wiring groups can be suppressed, and crosstalk noise between the first and second stacked bodies can be sufficiently reduced.

Thus, according to the multilayer wiring board of the present invention, terminals can be efficiently connected at a distance close to the shortest distance without reducing the degree of freedom of wiring connection, and a semiconductor element or the like which operates at a high speed. Electronic components can be accurately and stably operated without malfunctioning.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer wiring board according to the present invention will be described in detail based on an embodiment shown in the accompanying drawings.

FIG. 1 is an exploded plan view showing an example of an embodiment of a multilayer wiring board according to the present invention. FIG. 1 (a) shows a first insulating layer, FIG. 1 (b) shows a second insulating layer, and FIG. (C) is a plan view of the third insulating layer, and (d) is a plan view of the fourth insulating layer. FIG. 2 is a cross-sectional view of a main part showing an example of an embodiment of a multilayer wiring board of the present invention formed by laminating them.

In these figures, I1 to I4 are first to fourth insulating layers, respectively, and I5 is a fourth insulating layer I4.
And a fifth insulating layer which is laminated on the substrate and serves as a surface layer of the multilayer wiring board. L1 to L4 are first to fourth parallel wiring groups disposed substantially in parallel on the upper surfaces of the first to fourth insulating layers I1 to I4, respectively, and P1 to P4 are first to fourth parallel wiring groups, respectively. The power supply lines in the wiring groups L1 to L4, G1 to G4 are the ground wirings in the first to fourth parallel wiring groups L1 to L4, respectively,
1 to S4 are first to fourth parallel wiring groups L1 to L4, respectively.
The inside signal wiring is shown.

The plurality of signal wirings S1 to S4 arranged on the same plane may transmit different signals, respectively, and the plurality of power supply wirings P1 to P1 arranged on the same plane may be used.
It goes without saying that P4 may supply different power supplies.

Such a multilayer wiring board has, for example, an MPU (Micro Processing Unit) / ASIC on its surface.
(Application Specific Integrated Circuit) DS
An electronic component such as a semiconductor element such as a P (Digital Signal Processor) is mounted. These electronic components are mounted on the surface of the multilayer wiring board by, for example, so-called bump electrodes, or are attached to a mounting portion by an adhesive, a brazing material, or the like, and are connected to a fourth wire via a bonding wire or the like.
Are electrically connected to the parallel wiring group L4 and the like. A connection portion with an external electric circuit and a connection portion with an electronic component such as a semiconductor element to be mounted are not shown.

The fifth insulating layer I5 serving as a surface layer of the multilayer wiring board is formed as necessary, and is, for example, a fourth insulating layer I5.
When the wiring group L4 is disposed in the fourth insulating layer I4, it is not always necessary to form the wiring group L4.

First parallel wiring group L on first insulating layer I1
1 is substantially parallel to the first direction, and the second on the second insulating layer I2
Are arranged substantially parallel to a second direction orthogonal to the first direction, thereby forming a first stacked body D1. Further, the third parallel wiring group L3 on the third insulating layer I3 is substantially parallel to the third direction of 30 to 60 degrees with respect to the first direction, and is connected to the fourth parallel wiring group L3 on the fourth insulating layer I4. Parallel wiring group L
4 is orthogonal to the third direction (30 to 60 with respect to the second direction).
The second stack D2 is disposed substantially parallel to the fourth direction. In this example, the third direction is approximately 45 degrees with respect to the first direction, and the fourth direction is approximately 45 degrees with respect to the second direction.

As described above, by setting the third direction to the oblique direction of 30 to 60 degrees with respect to the first direction, the first to fourth parallel wiring groups L1 to L4 can be changed only to the parallel wiring groups orthogonal to each other. In comparison with the case where the configuration is made as described above, the connection wiring length between the terminals from the first parallel wiring group L1 to the fourth parallel wiring group L4 is about 20.
% Can be shortened. Also, by setting the third direction to preferably 40 to 50 degrees with respect to the first direction, the wiring length can be further shortened. Can be shortened, and the resistance, capacitance and inductance can be reduced by about 30%.
An optimal wiring structure is obtained.

In this example, the first to fourth parallel wiring groups L1 to L4 are formed by connecting the power wirings P1 to P4 to the signal wirings S1 to S4.
4 or ground wirings G1 to G4 are arranged adjacent to each other. Thereby, the signal wirings S1 to S4 on the same insulating layers I1 to I4 are electromagnetically cut off, and crosstalk noise between the left and right signal wirings S1 to S4 on the same plane can be reduced favorably. Further, the signal wiring S1
To S4, power lines P1 to P4 or ground lines G1 to G4.
By making G4 adjacent, power supply wirings P1 to P1 on the same plane
The interaction between P4 and the signal lines S1 to S4, and the ground lines G1 to G4 and the signal lines S1 to S4 is maximized, and the inductance of the power lines P1 to P4 and the ground lines G1 to G4 can be reduced. Due to this reduction in inductance, power supply noise and ground noise can be effectively reduced.

T1 to T3 are first to third through conductor groups such as via conductors and through hole conductors, respectively. The first through conductor group T1 (shown by a circle) is the same as the first parallel wiring group L1. The second parallel wiring group L2 of the potential and the function is
The second through conductor group T2 (indicated by a square) corresponds to the third parallel wiring group L3 and the fourth parallel wiring group L4, and the third through conductor group T3 (indicated by a double circle) corresponds to the first or the second. 2 parallel wiring groups L
The first and fourth parallel wiring groups L3 and L4 are electrically connected to each other through the insulating layer between the respective wiring groups. Here, an example is shown in which the second parallel wiring group L2 and the third parallel wiring group L3 are connected by the third through conductor group T3. Further, the through conductor group is not shown in FIG.

The first to third through conductor groups T1 to T3
The through conductor group similar to the above is also used when electrically connecting the wiring of each parallel wiring group to an external connection terminal or the like attached to the surface of the semiconductor element or the multilayer wiring board.

According to the multilayer wiring board of the present invention,
As shown in FIG. 2, the second and third parallel wiring groups L2.
The distance h2 between L3 and the first and second parallel wiring groups L1.
The distance h1 between L2 and the distance h1 ′ between the third and fourth parallel wiring groups L3 and L4 are larger than (h2> h1, h
1 '). In this example, the thickness of the third insulating layer I3 located between the second and third parallel wiring groups L2 and L3 is increased by the second insulating layer located between the first and second parallel wiring groups L1 and L2. By setting the thickness of I2 and the thickness of the fourth insulating layer I4 located between the third and fourth parallel wiring groups L3 and L4, the distance between the parallel wiring groups is set as described above. I have. As a result, unnecessary coupling between the second and third parallel wiring groups L2 and L3 between different stacked bodies is reduced between the first and second parallel wiring groups L1 and L2 located vertically above and below the third stacked wiring group in the same stacked body. And the coupling between the fourth parallel wiring groups L3 and L4 can be reduced to the same level as the coupling between the first and second stacked bodies D1 and D2 without reducing the degree of freedom of the connection wiring. It can be reduced sufficiently.

In the multilayer wiring board of the present invention, the distance h2 between the second and third parallel wiring groups L2 and L3 is set to the distance h1 between the first and second parallel wiring groups L1 and L2 and the third and When the distance h1 ′ between the fourth parallel wiring groups L3 and L4 is larger than the distance h1 ′ (h2> h1, h1 ′), the distance h2 should be within a range of 1.1 to 5 times the distance h1, h1 ′, and more preferably. It is good to make it into the range of 2-3 times. By setting in this way, the above-described effects can be effectively obtained without increasing the wiring length in the multilayer wiring board so as to adversely affect the electrical characteristics. Interval h
When the distance 2 is less than 1.1 times the distances h1 and h1 ', there is a tendency that the above effects cannot be sufficiently obtained. If the interval h2 exceeds five times the intervals h1 and h1 ', the length of the third through conductor group T3, which is the wiring between the first stacked body D1 and the second stacked body D2, becomes too long. In addition, the resistance, capacitance, and inductance of the signal wiring are increased, so that the rise of the signal is delayed, and the noise tends to increase.

For example, the same dielectric material is used for each of the insulating layers I1 to I4, the interval h2 is set to 200 μm, and the intervals h1, h
When 1 ′ is 150 μm, crosstalk noise between the second parallel wiring group L2 and the third parallel wiring group L3 can be reduced by about 40%.

The size of the interval h1 and the interval h1 'may be usually the same, but they may be different within a range in which one is 1.1 to 2 times as large as the other. Good.

The multilayer wiring board of the present invention has a wiring structure similar to that obtained by laminating the second laminated body D2 on the first laminated body D1 on the second laminated body D2. A fifth insulating layer having a fifth parallel wiring group disposed substantially parallel to a fifth direction at 30 to 60 degrees with respect to the third direction;
A sixth insulating layer having a sixth parallel wiring group disposed substantially parallel to a sixth direction orthogonal to the fifth direction on the upper surface is laminated thereon, and the upper and lower parallel wiring groups are connected to the fourth insulating layer. And a third or fourth parallel wiring group L3 / L4 of the second stacked body D2.
And the fifth or sixth parallel wiring group of the third stacked body are electrically connected by the fifth through conductor group, and the distance between the fourth and fifth parallel wiring groups is set to the third and fourth parallel wiring groups. Wiring group L3 · L
A multilayer wiring board composed of the first laminate D1 to the third laminate, which is larger than the distance between the fourth and fourth and sixth and fifth parallel wiring groups, may be used. It may be repeated to form a multilayer wiring board having a multilayer structure.

In the multilayer wiring board of the present invention,
Multilayer wiring portions having various wiring structures may be stacked on and under the first and second stacked bodies D1 and D2 to form a multilayer wiring board. For example, a wiring structure having a configuration in which parallel wiring groups are orthogonally stacked like a multilayer wiring body, a wiring structure having a strip line structure, a microstrip line structure,
The coplanar line structure or the like can be appropriately selected and used according to the specifications required for the multilayer wiring board.

For example, an electronic circuit may be formed by laminating a polyimide insulating layer and a conductor layer formed by vapor deposition of copper. Further, a package for semiconductor element accommodation may be configured by attaching a chip resistor, a thin film resistor, a coil inductor, a cross capacitor, a chip capacitor, and an electrolytic capacitor.

The shape of each insulating layer including the first to fourth insulating layers I1 to I4 is not limited to a substantially square shape as shown, but may be a rectangular shape, a rhombic shape, a polygonal shape, or the like. It may be a shape such as a shape.

The first to fourth parallel wiring groups L1 to L4
Is not limited to those formed on the surfaces of the first to fourth insulating layers I1 to I4, and may be formed inside the respective insulating layers I1 to I4. Thus, when the fourth parallel wiring group L4 is formed inside the fourth insulating layer I4 with respect to the example shown in FIGS. 1 and 2, the fifth insulating layer I5
Is not always necessary.

In the multilayer wiring board of the present invention, the first to fourth insulating layers I1 to I4 and the fifth insulating layer I5 are formed by, for example, a ceramic green sheet laminating method using an aluminum oxide sintered body or an aluminum nitride sintered body. Using inorganic insulating materials such as sintered body, silicon carbide sintered body, silicon nitride sintered body, mullite sintered body, glass ceramics, or polyimide, epoxy resin, fluorine resin, polynorbornene, benzocyclobutene Or an electric insulating material such as a composite insulating material formed by bonding an inorganic insulating powder such as a ceramic powder with a thermosetting resin such as an epoxy resin.

If the insulating layers I1 to I5 are made of, for example, a sintered body of aluminum oxide, an appropriate organic binder, a solvent or the like is added to a raw material powder of aluminum oxide, silicon oxide, calcium oxide, magnesium oxide or the like. A ceramic green sheet is obtained by mixing and forming a slurry into a sheet shape by employing a conventionally known doctor blade method, and thereafter, these ceramic green sheets are subjected to an appropriate punching process. Each parallel wiring group and each through conductor group and a metal paste to be a conductor layer are printed and applied in a predetermined pattern and laminated vertically, and finally the laminated body is heated at about 1600 ° C. in a reducing atmosphere.
It is manufactured by firing at a temperature of

The thicknesses of these insulating layers I1 to I5 are as follows.
In accordance with the characteristics of the material to be used, it is appropriately set so as to satisfy conditions such as mechanical strength and electrical characteristics corresponding to required specifications, ease of forming a through conductor group, and the like.

The first to fourth parallel wiring groups L1 to L4
The first to third through conductor groups T1 to T3 are made of, for example, tungsten, molybdenum, molybdenum-manganese, copper, silver,
Metallization of metal powder such as silver-palladium, or copper
It is composed of a thin film of a metal material such as silver, nickel, chromium, titanium, gold, niobium, and alloys thereof.

For example, in the case of metallization of metal powder of tungsten, a metal paste obtained by adding and mixing an appropriate organic binder, solvent and the like to the tungsten powder is applied to a ceramic green sheet to be the insulating layers I1 to I4. The pattern is printed and applied, and is fired together with the laminate of the ceramic green sheets, thereby being disposed on the upper surfaces of the insulating layers I1 to I4.

In the case of a thin film of a metal material, a metal layer is formed by, for example, a sputtering method, a vacuum evaporation method, or a plating method, and then a predetermined wiring pattern is formed by a photolithography method. The width of each wiring and the distance between the wirings of the first to fourth parallel wiring groups L1 to L4 may be changed according to the characteristics of the material to be used to the electrical characteristics corresponding to the required specifications and the insulating layers I1 to I4. Are set appropriately so as to satisfy conditions such as ease of disposition.

The thickness of each of the parallel wiring groups L1 to L4 is 1
It is preferably about 10 μm. This thickness is 1 μm
When the value is less than the above, the resistance of the wiring increases, and it tends to be difficult to provide a good power supply to the semiconductor element by the wiring group, secure a stable ground, and propagate a good signal.
On the other hand, if it exceeds 10 μm, the insulation layer laminated thereon may be insufficiently covered, resulting in poor insulation.

At this time, if each wiring has a cross-sectional shape whose thickness is larger than the width, the coupling between the adjacent wirings is further increased to suppress the coupling between the upper and lower wirings and the wiring is formed. This is more preferable because it is less likely to be affected. When the thickness of the wiring is larger than the width, the ratio of the thickness to the width is set to 1.1: 1 to 2: 1 (the thickness is 1.1 to 2 times the width), and more preferably the thickness and the width. Ratio of 1.2: 1 to 1.7: 1 (thickness to width is 1.2
By adjusting the ratio to a factor of 1.7 to 1.7), a desired substrate shape can be obtained while the adhesion strength between the insulating layers is sufficiently maintained.

As the through conductors of the first to third through conductor groups T1 to T3, not only those having a circular cross section but also ellipses, rectangles such as squares and rectangles, and other shapes are used. Is also good. The position and size are determined according to the characteristics of the material to be used by the electrical characteristics and the insulating layer I corresponding to the required specifications.
It is set appropriately so as to satisfy conditions such as easiness of formation / arrangement to 1 to I4.

For example, if a sintered body of aluminum oxide is used for the insulating layer and a metallization of tungsten is used for the parallel wiring group, the thickness of the insulating layer is set to 200 μm.
By setting the wiring width to 100 μm, the spacing between the wirings to 150 μm, and the size of the through conductor to 100 μm, the impedance of the signal wiring is reduced to 50Ω, and the reflection of high-frequency signals between the upper and lower parallel wiring groups is suppressed. It is possible to make electrical connection.

It should be noted that the present invention is not limited to the above-described embodiments, and that various changes may be made without departing from the spirit of the present invention. For example, in the above embodiment, the present invention has been described as a multilayer wiring board on which a semiconductor element is mounted. However, the present invention may be applied to a semiconductor element housing package for housing a semiconductor element.

[0047]

According to the multilayer circuit board of the present invention, the first parallel wiring group and the second parallel wiring group in the first laminate are orthogonal to each other, and the third parallel wiring group in the second laminate is Since the fourth parallel wiring group is orthogonal to the fourth parallel wiring group, crosstalk noise between the wirings of each stacked body can be reduced and minimized. Further, since the third and fourth parallel wiring groups of the second stacked body are arranged at an angle of 30 to 60 degrees with respect to the first and second parallel wiring groups of the first stacked body,
Compared with a conventional multilayer wiring board in which parallel wiring groups are arranged only orthogonally, the terminals between the first parallel wiring group of the first stacked body and the fourth parallel wiring group of the second stacked body are different. It is possible to efficiently connect the terminals at a distance close to the shortest distance without reducing the degree of freedom of the wiring connection, and to reduce the connection wiring length, and to reduce the distance between the terminals from the first laminate to the second laminate. Can be reduced in resistance, capacitance, and inductance of the wiring connecting them. Further, the distance between the second parallel wiring group and the third parallel wiring group disposed obliquely at an angle of 30 to 60 degrees with respect to each other, the distance between the first and second parallel wiring groups and the third and fourth parallel wiring groups. , The distance between the second parallel wiring group and the third parallel wiring group, and further, the first and second parallel wiring groups and the third and fourth parallel wiring groups. Unnecessary electromagnetic coupling generated between the wiring group is suppressed, and crosstalk noise between the first stacked body and the second stacked body can be sufficiently reduced. As a result, terminals can be efficiently connected at a distance close to the shortest distance without reducing the degree of freedom of wiring connection, and electronic components such as semiconductor elements operating at high speed mounted on this multilayer wiring board malfunction. The operation can be performed accurately and stably without causing the operation.

As described above, according to the present invention, it is possible to efficiently connect terminals with a distance close to the shortest distance without reducing the degree of freedom of wiring connection by using the parallel wiring groups alternately stacked. A multilayer wiring board suitable for an electronic circuit board or the like on which electronic parts such as a semiconductor element operating at a high speed can be mounted and which can reduce crosstalk noise between wirings can be provided.

[Brief description of the drawings]

FIGS. 1A to 1D are plan views of respective insulating layers, each showing an example of an embodiment of a multilayer wiring board of the present invention.

FIG. 2 is a cross-sectional view of the essential part showing an example of the embodiment of the multilayer wiring board of the present invention.

[Explanation of symbols]

I1 to I4... First to fourth insulating layers L1 to L4... First to fourth parallel wiring groups P1 to P4... First to fourth power supply wirings G1 to G4. ... First to fourth ground wirings S1 to S4... First to fourth signal wirings T1 to T3... First to third through conductor groups D1, D2. One stacked body, second stacked body h1... Distance between first and second parallel wiring groups h1 ′... Distance between third and fourth parallel wiring groups h2. ..... distance between second and third parallel wiring groups

Claims (3)

[Claims] A first insulating layer having a first parallel wiring group and a second insulating layer having a second parallel wiring group orthogonal to the first parallel wiring group are laminated on the first insulating layer; A second parallel wiring group electrically connected by a first through conductor group; and a third parallel wiring group on a third insulating layer having a third parallel wiring group. A second stacked structure in which a fourth insulating layer having a fourth parallel wiring group orthogonal to the wiring group is stacked, and the third and fourth parallel wiring groups are electrically connected by a second through conductor group. The body is laminated with the third parallel wiring group crossing the first parallel wiring group at an angle of 30 to 60 degrees, and the first or second parallel wiring group and the third or fourth parallel wiring group are stacked. A third group of parallel wirings electrically connected to the group of parallel wirings by a third group of penetrating conductors penetrating the conductor layer; and the second and third group of parallel wirings A multi-layer wiring board, wherein a distance between the first and second parallel wiring groups and a distance between the third and fourth parallel wiring groups are larger than each other. 2. The distance between the second and third parallel wiring groups is 1.1 times the distance between the first and second parallel wiring groups and the distance between the third and fourth parallel wiring groups. ~ 5
2. The multilayer wiring board according to claim 1, wherein the number is doubled. 3. The multi-layer wiring according to claim 1, wherein each of the first to fourth parallel wiring groups has a plurality of signal wirings and a power supply wiring or a ground wiring adjacent to each signal wiring. substrate.