JP2001060543A - Recognition mark - Google Patents
Recognition markInfo
- Publication number
- JP2001060543A JP2001060543A JP11233697A JP23369799A JP2001060543A JP 2001060543 A JP2001060543 A JP 2001060543A JP 11233697 A JP11233697 A JP 11233697A JP 23369799 A JP23369799 A JP 23369799A JP 2001060543 A JP2001060543 A JP 2001060543A
- Authority
- JP
- Japan
- Prior art keywords
- recognition mark
- wavelength
- patterns
- recognition
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は認識マーク、特に、
半導体装置の露光工程時に、画像認識を通じて重ね合わ
せを行なう際に用いるパターン重ね合わせ用の認識マー
クに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recognition mark,
The present invention relates to a pattern overlay recognition mark used when performing overlay through image recognition in an exposure process of a semiconductor device.
【０００２】[0002]
【従来の技術】半導体集積回路装置を製造するための回
路パターン形成用露光工程では、ガラス基板（以下レチ
クルという）上に露光に用いる光を遮るクロム膜で形成
した回路パターンをレジストが塗布された半導体基板上
に縮小投影し、各ショット（露光）領域毎に回路パター
ンを形成する装置（以下ステッパーという）が使用され
ている。2. Description of the Related Art In an exposure process for forming a circuit pattern for manufacturing a semiconductor integrated circuit device, a resist is applied to a circuit pattern formed of a chrome film that blocks light used for exposure on a glass substrate (hereinafter referred to as a reticle). 2. Description of the Related Art An apparatus (hereinafter, referred to as a stepper) for reducing and projecting onto a semiconductor substrate and forming a circuit pattern for each shot (exposure) area is used.
【０００３】半導体集積回路装置では半導体基板上に複
数回露光する工程とエッチングの工程を繰り返すことに
よってパターンが形成される。ここで、１層目のパター
ンを形成した後、２層目以降のパターンを半導体基板上
に形成するには、各ショット領域とレチクルの回路パタ
ーン像の重ね合わせを正確に行なう必要がある。重ね合
わせを正確に行なうためには、１層目のパターンに認識
マークを回路パターンと同時に形成し、この認識マーク
の位置を認識して２層目のパターンの重ね合わせ位置を
決定し、露光を行なうのが一般的である。In a semiconductor integrated circuit device, a pattern is formed by repeating a process of exposing a semiconductor substrate a plurality of times and a process of etching. Here, in order to form the second and subsequent layers on the semiconductor substrate after the formation of the first layer pattern, it is necessary to accurately overlap each shot area with the circuit pattern image of the reticle. In order to perform the superposition accurately, a recognition mark is formed on the pattern of the first layer at the same time as the circuit pattern, the position of the recognition mark is recognized, the position of superposition of the pattern of the second layer is determined, and the exposure is performed. It is common to do.
【０００４】認識マークの位置を認識する方法は、レー
ザー光を該当認識マークに照射してその回折光により検
出する方法や、マークの画像認識により検出する方法が
ある。前記画像認識により検出する認識マークは凸部も
しくは凹部によって作られたライン状パターンが一定の
間隔で並んでいる場合が殆どである。As a method of recognizing the position of the recognition mark, there are a method of irradiating the corresponding recognition mark with a laser beam and detecting the light by diffraction light, and a method of detecting the mark by image recognition. In most cases, the recognition marks detected by the image recognition are line-shaped patterns formed by convex portions or concave portions arranged at regular intervals.
【０００５】以下、従来の画像認識に用いられている認
識マークの構成について図面を参照しながら説明する。
図５は従来の認識マークの構成図であり、図５（ａ）は
凹型の画像認識に用いる認識マークの平面図、図５
（ｂ）は図５（ａ）のＸ−Ｘ’線に沿う断面図である。Hereinafter, the configuration of a recognition mark used for conventional image recognition will be described with reference to the drawings.
FIG. 5 is a configuration diagram of a conventional recognition mark. FIG. 5A is a plan view of a recognition mark used for concave image recognition.
FIG. 5B is a cross-sectional view taken along line XX ′ of FIG.
【０００６】図５に示すように、半導体基板１の表面上
には凹型溝からなるメインパターン２Ａ，２Ｂ，２Ｃ，
２Ｄが形成され、このメインパターン２Ａ〜２Ｄは複数
本平行に一定の間隔で配置されており、これによって画
像認識に用いる凹型の認識マーク２Ｘが構成されてい
る。このように構成された認識マーク２Ｘは前記ステッ
パーにおいて、認識マークの中心部、すなわち凹部と認
識マークの周辺部とのコントラストを電気信号に変換し
たものとして検出され、認識される。As shown in FIG. 5, on the surface of a semiconductor substrate 1, main patterns 2A, 2B, 2C,
2D are formed, and a plurality of the main patterns 2A to 2D are arranged in parallel at a constant interval, thereby forming a concave recognition mark 2X used for image recognition. The recognition mark 2X thus configured is detected and recognized by the stepper as a signal obtained by converting the contrast between the central portion of the recognition mark, that is, the concave portion and the peripheral portion of the recognition mark into an electric signal.
【０００７】[0007]
【発明が解決しようとする課題】しかしながら、このよ
うな構成では、半導体集積回路装置のパターンの微細化
と共に要求される露光工程における各パターンの重ね合
わせ精度に対して、画像認識時の認識マークの画像コン
トラストが弱いため、ステッパーで検知する画像信号波
形の形状が悪く、従って重ね合わせ精度が低いという問
題点があった。However, in such a configuration, the accuracy of pattern recognition in the image recognition is reduced with respect to the superposition accuracy of each pattern in the exposure step required with the miniaturization of the pattern of the semiconductor integrated circuit device. Since the image contrast is weak, there is a problem that the shape of the image signal waveform detected by the stepper is bad, and the overlay accuracy is low.
【０００８】本発明は上記従来の問題点を解決するもの
であり、半導体装置の露光工程における回路パターンの
重ね合わせ精度を向上することができる認識マークを提
供することを目的とする。An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a recognition mark which can improve the overlay accuracy of a circuit pattern in an exposure step of a semiconductor device.
【０００９】[0009]
【課題を解決するための手段】本発明の認識マークは、
基板上に形成されたパターン重ね合わせ用の認識マーク
であって、前記基板の凹部または凸部によって形成さ
れ、認識マークに照射する光の波長またはこの波長に近
い長さを有すると共に、前記光の波長またはこの波長に
近い一定の間隔で規則正しく配列された多数のサブパタ
ーンを備えたものである。The recognition mark of the present invention is:
A recognition mark for pattern superposition formed on a substrate, formed by a concave portion or a convex portion of the substrate, having a wavelength of light irradiating the recognition mark or a length close to this wavelength, and It has a number of sub-patterns regularly arranged at a wavelength or at regular intervals close to this wavelength.
【００１０】この発明によれば、認識のために認識マー
クに照射される光はサブパターンで反射、干渉、散乱し
て認識マーク画像のコントラストを向上させるので、回
路パターン重ね合わせ精度を向上することが可能とな
る。According to the present invention, the light applied to the recognition mark for recognition is reflected, interfered and scattered by the sub-pattern to improve the contrast of the recognition mark image, thereby improving the accuracy of circuit pattern superposition. Becomes possible.
【００１１】[0011]
【発明の実施の形態】以下、本発明の各実施の形態につ
いて図面を参照しながら説明する。なお、前記従来のも
のと同一の部分については同一符号を用いるものとす
る。Embodiments of the present invention will be described below with reference to the drawings. Note that the same reference numerals are used for the same parts as those of the related art.
【００１２】（実施の形態１）図１は本発明の認識マー
クの実施の形態１における構成図であり、図１（ａ）は
凹型の認識マークの平面図、図１（ｂ）は図１（ａ）の
Ａ〜Ａ’線に沿う断面図である。(Embodiment 1) FIG. 1 is a structural view of a recognition mark according to a first embodiment of the present invention. FIG. 1 (a) is a plan view of a concave recognition mark, and FIG. 1 (b) is FIG. It is sectional drawing which follows the AA 'line of (a).
【００１３】図１に示すように、半導体基板１上には大
きい長方形で構成されたメインパターン３Ａ，３Ｂ，３
Ｃ，３Ｄと、これらメインパターン３Ａ〜３Ｄの長方形
の中に小さい長方形で構成されたサブパターン３１Ａ，
３１Ｂ，３１Ｃ，３１Ｄが設けられ、認識マーク３Ｘが
構成されている。ここで、メインパターン３Ａ〜３Ｄの
各辺の長さは縦が５０μｍ〜１００μｍ程度、横が５μ
ｍ〜１０μｍであり、パターンの間隔も横幅と同程度で
ある。サブパターン３１Ａ〜３１Ｄは島状に形成されて
メインパターン３Ａ〜３Ｄの中に複数本平行に配置され
る。メインパターン３Ａ〜３Ｄの長方形とサブパターン
３１Ａ〜３１Ｄの島との間は凹部となっており、例えば
半導体基板１上に形成された絶縁膜や導電膜をエッチン
グして得ることができる。従って凹部の深さはこれら膜
厚に依存して決定されることになる。As shown in FIG. 1, on a semiconductor substrate 1, main patterns 3A, 3B, 3
C, 3D, and sub-patterns 31A, 31A,
31B, 31C, and 31D are provided to form a recognition mark 3X. Here, the length of each side of the main patterns 3A to 3D is about 50 μm to 100 μm in length and 5 μm in width.
m to 10 μm, and the pattern interval is almost the same as the horizontal width. The sub-patterns 31A to 31D are formed in an island shape, and are arranged in parallel in the main patterns 3A to 3D. A concave portion is formed between the rectangle of the main patterns 3A to 3D and the islands of the sub patterns 31A to 31D, and can be obtained by etching an insulating film or a conductive film formed on the semiconductor substrate 1, for example. Therefore, the depth of the concave portion is determined depending on these film thicknesses.
【００１４】サブパターン３１Ａ〜３１Ｄの短辺方向の
長さあるいは島の間隔は、この認識に用いるステッパー
に装備された可視光域の光を発するハロゲンランプのよ
うな単色光の波長に近い寸法を有している。半導体装置
の製造工程に用いられるステッパーは、０．５μｍ以下
のパターン形成が可能な能力を持っているから、サブパ
ターン３１Ａ〜３１Ｄは小さくても充分加工することが
できるものである。The length of the sub-patterns 31A to 31D in the short side direction or the distance between the islands is set to a size close to the wavelength of a monochromatic light such as a halogen lamp which emits light in the visible light range provided in a stepper used for this recognition. Have. Since the stepper used in the manufacturing process of the semiconductor device has a capability of forming a pattern of 0.5 μm or less, the sub-patterns 31A to 31D can be sufficiently processed even if they are small.
【００１５】以上のように本実施の形態によれば、露光
工程における回路パターンの重ね合わせ時において認識
マークにマーク画像認識用の光を照射すると、メインパ
ターン内に配置された重ね合わせ時の個々の島からの反
射光は干渉もしくは散乱され、認識マーク領域とその周
辺領域とのコントラストが向上し、画像認識時の信号波
形の形状が明瞭化して、重ね合わせ測定の精度を向上さ
せることができる。As described above, according to the present embodiment, when the recognition mark is irradiated with the light for recognizing the mark image during the superposition of the circuit patterns in the exposure step, the individual marks arranged in the main pattern are superposed. The reflected light from the island is interfered or scattered, the contrast between the recognition mark area and the surrounding area is improved, the shape of the signal waveform at the time of image recognition is clarified, and the accuracy of the overlay measurement can be improved. .
【００１６】なお、図１に示した認識マーク３Ｘでは基
板上に形成された膜をエッチングした凹型の認識マーク
を用いたが、基板上に１層もしくは複数層、堆積及び成
長した被膜をエッチングしてサブパターン５１Ａ〜５１
Ｄの島だけを図１（ａ）と同様に配列したものを認識マ
ークにすることができる。すなわち、メインパターン３
Ａ〜３Ｄに相当する「ワク」がなく、サブパターンの多
数の配列が１つの群をなして、さらにこの群が一定の間
隔で並べられたものになる。この場合も図１の認識マー
ク３Ｘと同様サブパターン３１Ａ〜３１Ｄの島からの反
射光が干渉もしくは散乱され、認識マーク領域とその周
辺領域とのコントラストが向上する。しかし、メインパ
ターン３Ａ〜３Ｄが存在する認識マークの方が、その
「ワク」も認識するのでマーク画像に対応する信号が明
瞭になり、望ましいといえる。Although the recognition mark 3X shown in FIG. 1 is a recessed recognition mark obtained by etching a film formed on a substrate, one or more layers of the film formed and etched on the substrate are etched. Sub-patterns 51A-51
An island in which only the island D is arranged in the same manner as in FIG. 1A can be used as a recognition mark. That is, main pattern 3
There is no “excitement” corresponding to A to 3D, and a large number of arrays of subpatterns form one group, and this group is further arranged at regular intervals. Also in this case, similarly to the recognition mark 3X of FIG. 1, the reflected light from the islands of the sub-patterns 31A to 31D is interfered or scattered, and the contrast between the recognition mark area and the surrounding area is improved. However, the recognition mark in which the main patterns 3A to 3D are present also recognizes the "exciting", so that the signal corresponding to the mark image becomes clear, which is preferable.
【００１７】また、図１（ａ）において凹部溝であった
領域を反対に凸部とし、それ以外の部分を凹部にした認
識マークも可能である。この場合は図１のサブパターン
の島の間が凸部となり、画像認識用の光を反射、散乱
し、認識マーク領域とその周辺領域とのコントラストが
向上する。It is also possible to use a recognition mark in which the area which was a concave groove in FIG. 1A is made a convex part and the other part is made a concave part. In this case, the space between the islands of the sub-pattern in FIG. 1 becomes a convex portion, and the light for image recognition is reflected and scattered, so that the contrast between the recognition mark region and the peripheral region is improved.
【００１８】（実施の形態２）図２は本発明の認識マー
クの実施の形態２における構成図であり、凹部からなる
メインパターン内のサブパターンが、凸パターンで形成
されている認識マークの平面図、図３は本発明の認識マ
ークの実施の形態２における他の構成図であり、凹部か
らなるメインパターン内のサブパターンが、凹凸部で形
成されている認識マークの平面図である。(Embodiment 2) FIG. 2 is a diagram showing a configuration of a recognition mark according to Embodiment 2 of the present invention. FIG. 3 and FIG. 3 are other configuration diagrams of a recognition mark according to Embodiment 2 of the present invention, and are plan views of a recognition mark in which a sub-pattern in a main pattern formed of a concave portion is formed by an uneven portion.
【００１９】図２に示す認識マーク４Ｘは凹部からなる
メインパターン４Ａ，４Ｂ，４Ｃ，４Ｄ内のサブパター
ンが、２次元のほぼ正方形の島を縦横に規則正しく配列
した凸パターン４１Ａ，４１Ｂ，４１Ｃ，４１Ｄで形成
されたものであり、また、図３に示す認識マーク５Ｘは
凹部からなるメインパターン５Ａ，５Ｂ，５Ｃ，５Ｄ内
のサブパターン５１Ａ，５１Ｂ，５１Ｃ，５１Ｄが、メ
インパターン５Ａ〜５Ｄに対し非平行な凹凸部で形成さ
れたもので、この認識マーク５Ｘでは斜めになった凹部
の幅および間隔が画像認識用の光の波長に近いものとな
っている。In the recognition mark 4X shown in FIG. 2, the sub-patterns in the main patterns 4A, 4B, 4C, and 4D, which are concave portions, are convex patterns 41A, 41B, 41C, in which two-dimensional substantially square islands are regularly arranged vertically and horizontally. The recognition mark 5X shown in FIG. 3 is formed by sub-patterns 51A, 51B, 51C, and 51D in the main patterns 5A, 5B, 5C, and 5D formed of concave portions. On the other hand, in the recognition mark 5X, the width and the interval of the recessed portions are close to the wavelength of light for image recognition.
【００２０】以上のように本実施の形態によれば、露光
工程における回路パターンの重ね合わせ時において、認
識マーク４Ｘまたは５Ｘにマーク画像認識用の光を照射
すると、メインパターン内に配置されるサブパターンは
ある一定の法則で規則正しく並べられ、しかもその１つ
の長さがマーク認識に用いられる光の波長に近いので、
サブパターンからの反射干渉光、散乱光によって認識画
像コントラスト信号強度の向上が図られる。As described above, according to the present embodiment, when the recognition mark 4X or 5X is irradiated with light for recognizing a mark image at the time of superposing circuit patterns in the exposure step, the sub-arrangement arranged in the main pattern is performed. Since the patterns are regularly arranged according to a certain rule, and the length of one of them is close to the wavelength of light used for mark recognition,
The intensity of the recognized image contrast signal is improved by the reflected interference light and scattered light from the sub-pattern.
【００２１】なお、図２および図３のようなサブパター
ンの形状であって、例えばメインパターンの内部に小さ
い円形の島を多数縦横に規則正しく配列したものも同様
の効果を発揮する。The same effect can be obtained by the sub-pattern shapes shown in FIGS. 2 and 3, for example, those in which a large number of small circular islands are regularly arranged in the main pattern in the vertical and horizontal directions.
【００２２】（実施の形態３）図１の実施の形態１に示
した凹型の認識マークは、通常半導体基板上の回路パタ
ーンを加工するために形成した膜をエッチングする工程
と同時に得られるものであり、そしてこのエッチングの
次の工程がフォトリソグラフ工程である場合には、この
実施の形態１に示した凹型の認識マークを用いてステッ
パーで重ね合わせが行われる。しかし、このようなエッ
チング工程の次工程が露光工程ではなく成膜工程などが
来る場合は本実施の形態に示すような構成となる。(Embodiment 3) The concave recognition mark shown in Embodiment 1 of FIG. 1 is usually obtained simultaneously with the step of etching a film formed for processing a circuit pattern on a semiconductor substrate. If there is, and the next step of this etching is a photolithography step, the superposition is performed by a stepper using the concave recognition mark shown in the first embodiment. However, in the case where the film formation step or the like is performed after the etching step instead of the exposure step, the structure is as shown in this embodiment.
【００２３】図４は本発明の認識マークの実施の形態３
における構成図であり、図４（ａ）は凹型の認識マーク
の平面図、図４（ｂ）は図４（ａ）のＢ〜Ｂ’線に沿う
断面図である。FIG. 4 shows a third embodiment of the recognition mark of the present invention.
4A is a plan view of the concave recognition mark, and FIG. 4B is a cross-sectional view taken along line BB ′ of FIG. 4A.
【００２４】図４に示す認識マーク７Ｘは、そのメイン
パターン７Ａ，７Ｂ，７Ｃ，７Ｄおよびサブパターン７
１Ａ，７１Ｂ，７１Ｃ，７１Ｄの凹部を絶縁物もしくは
金属等の埋め込み材６を成長もしくは堆積することで埋
め込んだものである。このようにメインパターン７Ａ〜
７Ｄおよびサブパターン７１Ａ〜７１Ｄの凹部を埋め込
み材６で埋め込みした認識マーク７Ｘを用いて、画像認
識による重ね合わせ測定を行なった際に得られる効果は
前記実施の形態１による認識マークと同様の結果とな
り、従来と比較して認識マークのコントラストを向上さ
せることができる。The recognition marks 7X shown in FIG. 4 are composed of the main patterns 7A, 7B, 7C, 7D and the sub patterns 7D.
The recesses 1A, 71B, 71C, and 71D are embedded by growing or depositing an embedding material 6 such as an insulator or a metal. Thus, the main patterns 7A-
The effect obtained when the overlay measurement by image recognition is performed using the recognition mark 7X in which the recesses of the 7D and the sub-patterns 71A to 71D are embedded with the embedding material 6 is the same result as the recognition mark according to the first embodiment. Thus, the contrast of the recognition mark can be improved as compared with the related art.
【００２５】この認識マーク７Ｘが形成される具体的な
半導体装置での工程は複数工程存在する。まず、半導体
基板に素子絶縁分離用溝を形成する工程では素子絶縁分
離用溝を半導体基板にエッチングで形成すると同時に認
識マーク７Ｘの凹部が形成され、次に絶縁分離溝を絶縁
膜で埋め込むと同時に認識マーク７Ｘの凹部が同じ絶縁
膜で埋め込まれて図４に示す構成が完成する。また、半
導体基板にＭＯＳ型半導体装置のゲート電極を形成する
工程ではゲート電極をエッチングで形成すると共に認識
マーク７Ｘの凹部が形成され、ゲート電極のサイドウオ
ール絶縁膜形成工程でその凹部が埋め込まれる。これは
凹部の幅が非常に狭いためである。このほか、コンタク
トホール形成工程で認識マーク７Ｘの凹部ができ、コン
タクトホールのタングステンなどの埋め込みでその凹部
が埋め込まれる。さらに、金属配線エッチングで認識マ
ーク７Ｘの凹部が形成され、配線上の層間絶縁膜形成で
その凹部埋め込みがなされるのである。There are a plurality of steps in a specific semiconductor device in which the recognition mark 7X is formed. First, in the step of forming the element isolation groove in the semiconductor substrate, the element insulation isolation groove is formed in the semiconductor substrate by etching, and at the same time, the concave portion of the recognition mark 7X is formed. The concave portion of the recognition mark 7X is filled with the same insulating film to complete the configuration shown in FIG. Further, in the step of forming the gate electrode of the MOS type semiconductor device on the semiconductor substrate, the gate electrode is formed by etching and the concave portion of the recognition mark 7X is formed, and the concave portion is filled in the gate electrode side wall insulating film forming step. This is because the width of the concave portion is very narrow. In addition, a concave portion of the recognition mark 7X is formed in the contact hole forming step, and the concave portion is buried by filling the contact hole with tungsten or the like. Further, a concave portion of the recognition mark 7X is formed by metal wiring etching, and the concave portion is filled by forming an interlayer insulating film on the wiring.
【００２６】以上のように本実施の形態によれば、露光
工程における回路パターンの重ね合わせ時において、認
識マークにマーク画像認識用の光を照射すると、前記各
実施の形態と同様、メインパターン内のサブパターンか
らの反射干渉光、散乱光によって認識画像コントラスト
信号強度の向上が図られ、画像認識時の信号波形の形状
が明瞭化して、重ね合わせ測定の精度を向上させること
ができる。As described above, according to the present embodiment, when the recognition mark is irradiated with light for recognizing a mark image at the time of superimposing circuit patterns in the exposure step, the same as in the above-mentioned embodiments, The intensity of the recognized image contrast signal is improved by the reflected interference light and scattered light from the sub-pattern, and the shape of the signal waveform at the time of image recognition is clarified, so that the accuracy of the overlay measurement can be improved.
【００２７】なお、上記の各実施の形態において述べた
認識マークは、ステッパー方式の露光装置だけでなく、
レチクルとウェハとを相対的に走査して露光を行なうス
キャン方式の露光装置にも同様に適用することができ
る。また、上記の各実施の形態も前記の態様に限られる
ものではない。The recognition mark described in each of the above embodiments can be used not only in a stepper type exposure apparatus but also in a stepper type exposure apparatus.
The present invention can be similarly applied to a scan type exposure apparatus that performs exposure by relatively scanning a reticle and a wafer. Further, each of the above embodiments is not limited to the above embodiment.
【００２８】[0028]
【発明の効果】以上のように本発明によれば、基板上に
認識用の光源の波長に近い長さの多数のサブパターンを
形成すると共に、これを前記光源の波長に近い一定の間
隔で規則正しく配列することにより、認識マークの画像
認識時のコントラスト信号波形の形状を明瞭化すること
ができ、これによって重ね合わせ精度を向上することが
できるという有利な効果が得られる。As described above, according to the present invention, a large number of subpatterns having a length close to the wavelength of the light source for recognition are formed on the substrate, and are formed at regular intervals close to the wavelength of the light source. By arranging regularly, it is possible to clarify the shape of the contrast signal waveform at the time of image recognition of the recognition mark, thereby obtaining an advantageous effect that the overlay accuracy can be improved.
【図１】本発明の認識マークの実施の形態１における構
成図FIG. 1 is a configuration diagram of a recognition mark according to a first embodiment of the present invention.
【図２】本発明の認識マークの実施の形態２における構
成図FIG. 2 is a configuration diagram of a recognition mark according to a second embodiment of the present invention.
【図３】本発明の認識マークの実施の形態３における構
成図FIG. 3 is a configuration diagram of a recognition mark according to a third embodiment of the present invention.
【図４】本発明の認識マークの実施の形態３における他
の構成図FIG. 4 is another configuration diagram of the recognition mark according to the third embodiment of the present invention.
【図５】従来の認識マークの構成図FIG. 5 is a configuration diagram of a conventional recognition mark.
１ 基板 ２Ａ〜２Ｄ，３Ａ〜３Ｄ，４Ａ〜４Ｄ，５Ａ〜５Ｄ，７
Ａ〜７Ｄ 認識マークのメインパターン ３Ｘ，４Ｘ，５Ｘ，７Ｘ 認識マーク ６ 埋め込み材 ３１Ａ〜３１Ｄ，４１Ａ〜４１Ｄ，５１Ａ〜５１Ｄ，７
１Ａ〜７１Ｄ 認識マークのサブパターン1 substrate 2A-2D, 3A-3D, 4A-4D, 5A-5D, 7
A to 7D Recognition mark main pattern 3X, 4X, 5X, 7X Recognition mark 6 Embedding material 31A to 31D, 41A to 41D, 51A to 51D, 7
1A-71D Recognition mark sub-pattern
Claims (4)
用の認識マークであって、前記基板の凹部または凸部に
よって形成され、認識マークに照射する光の波長または
この波長に近い長さを有すると共に、前記光の波長また
はこの波長に近い一定の間隔で規則正しく配列された多
数のサブパターンを備えたことを特徴とする認識マー
ク。1. A recognition mark for pattern superposition formed on a substrate, the mark being formed by a concave portion or a convex portion of the substrate, and having a wavelength of light irradiated on the recognition mark or a length close to the wavelength. And a recognition mark having a number of sub-patterns regularly arranged at a wavelength of the light or at a constant interval close to the wavelength.
用の認識マークであって、前記基板の凹部または凸部に
よって形成されたメインパターンと、前記メインパター
ンのそれぞれの内部領域に前記基板の凹部または凸部に
よって形成され、認識マークに照射する光の波長または
この波長に近い長さを有すると共に、前記光の波長また
はこの波長に近い一定の間隔で規則正しく配列された多
数のサブパターンを備えたことを特徴とする認識マー
ク。2. A recognition mark for pattern superposition formed on a substrate, comprising: a main pattern formed by a concave portion or a convex portion of the substrate; and a concave portion of the substrate in each internal region of the main pattern. Or formed by a convex portion, having a wavelength of light to irradiate the recognition mark or a length close to this wavelength, and having a large number of sub-patterns regularly arranged at regular intervals close to the wavelength of the light or this wavelength. A recognition mark characterized by the fact that:
複数個一定の間隔で配置されていることを特徴とする請
求項１記載の認識マーク。3. The recognition mark according to claim 1, wherein the plurality of sub-patterns are arranged in groups of a plurality at regular intervals.
配置されていることを特徴とする請求項２記載の認識マ
ーク。4. The recognition mark according to claim 2, wherein a plurality of main patterns are arranged at a constant interval.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23369799A JP3615430B2 (en) | 1999-08-20 | 1999-08-20 | Recognition mark |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23369799A JP3615430B2 (en) | 1999-08-20 | 1999-08-20 | Recognition mark |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001060543A true JP2001060543A (en) | 2001-03-06 |
| JP3615430B2 JP3615430B2 (en) | 2005-02-02 |
Family
ID=16959142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23369799A Expired - Fee Related JP3615430B2 (en) | 1999-08-20 | 1999-08-20 | Recognition mark |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3615430B2 (en) |
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