JP2001044266A - Semiconductor wafer holding tool - Google Patents
Semiconductor wafer holding toolInfo
- Publication number
- JP2001044266A JP2001044266A JP21196399A JP21196399A JP2001044266A JP 2001044266 A JP2001044266 A JP 2001044266A JP 21196399 A JP21196399 A JP 21196399A JP 21196399 A JP21196399 A JP 21196399A JP 2001044266 A JP2001044266 A JP 2001044266A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- holding
- degrees
- wafer
- holding tool
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Drying Of Semiconductors (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体製造装置に
より各種プラズマプロセス等を行う際に半導体ウェハを
保持する半導体ウェハ保持具に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer holder for holding a semiconductor wafer when performing various plasma processes or the like by a semiconductor manufacturing apparatus.
【０００２】[0002]
【従来の技術】半導体デバイスの製造においては、エッ
チングや成膜等、ＣＦ４やＣｌ２等の腐食ガスのプラズ
マを用いる工程が存在する。これらの工程を実施するた
めの半導体製造装置に用いられる部材の一つとして、ス
テージ上で半導体ウェハを保持するための半導体ウェハ
保持具がある。半導体ウエハ処理においては１枚のウエ
ハから製造される半導体チップ数が生産コスト上重要で
あり、ウェハ外周部から数ｍｍ程度まで有効に活用して
いくことが特に重要となってきている。半導体ウェハを
有効に活用するためには、ウェハ保持部を小さくし、か
つウェハ温度の均一化を図り、ウェハ外周部まで均一な
処理条件（プラズマ条件）にすることが必要とされてい
る。ウエハ温度の均一化のためには保持したウェハの裏
面から定温Ｈｅガス等を吹き付けること等が行われてい
る。2. Description of the Related Art In the manufacture of semiconductor devices, there are steps such as etching and film formation, which use a plasma of a corrosive gas such as CF 4 or Cl 2 . As one of members used in a semiconductor manufacturing apparatus for performing these steps, there is a semiconductor wafer holder for holding a semiconductor wafer on a stage. In semiconductor wafer processing, the number of semiconductor chips manufactured from one wafer is important in terms of production cost, and it is particularly important to effectively utilize the semiconductor chips from the outer peripheral portion to a few mm. In order to make effective use of a semiconductor wafer, it is necessary to reduce the size of the wafer holding unit, to make the wafer temperature uniform, and to set uniform processing conditions (plasma conditions) up to the outer peripheral portion of the wafer. In order to make the wafer temperature uniform, a constant temperature He gas or the like is sprayed from the back surface of the held wafer.
【０００３】このような半導体ウェハ保持具としては、
従来、石英ガラスやアルミナが多く用いられている。[0003] As such a semiconductor wafer holder,
Conventionally, quartz glass and alumina are often used.
【０００４】[0004]
【発明が解決しようとする課題】石英ガラスは高純度部
材が得られること、構成元素中の金属がＳｉでありチャ
ンバー内を汚染しないことから半導体製造装置用プロセ
スパーツとして多用されているが、強度、剛性率の面か
らウェハ保持部の面積を小さくすることは困難である。
さらにプラズマによる腐蝕が著しく、腐蝕による部品の
破損が生じやすいため、部品交換のため頻繁に装置を止
める必要があり、デバイスの生産効率低下を引き起こし
ている。一方、アルミナセラミックスは石英ガラスより
は耐食性が高いものの、ガラス相が優先的に腐蝕されや
すいため脱粒をおこし、パーティクルの原因となる。さ
らにウェハ保持部の腐蝕が進行することにより半導体ウ
ェハを均一に保持することが困難となっている。Quartz glass is widely used as a process part for semiconductor manufacturing equipment because a high-purity member can be obtained and the metal in the constituent elements is Si and does not contaminate the chamber. In addition, it is difficult to reduce the area of the wafer holding unit from the viewpoint of the rigidity.
Further, since the plasma is significantly corroded and the parts are easily damaged by the corrosion, it is necessary to frequently stop the apparatus for replacing the parts, which causes a reduction in device production efficiency. On the other hand, although alumina ceramics have higher corrosion resistance than quartz glass, the glass phase is likely to be corroded preferentially, so that they are degranulated and cause particles. Further, as the corrosion of the wafer holding portion progresses, it is difficult to hold the semiconductor wafer uniformly.
【０００５】本発明はかかる事情に鑑みてなされたもの
であって、半導体ウェハの保持面積が小さくても保持す
ることが可能であり、かつパーティクル発生を抑制する
ことができる半導体ウェハ保持具を提供することを目的
とする。The present invention has been made in view of the above circumstances, and provides a semiconductor wafer holder which can hold a semiconductor wafer even if its holding area is small and can suppress generation of particles. The purpose is to do.
【０００６】[0006]
【課題を解決するための手段】上記課題を解決するため
に、本発明は、希土類酸化物を含むセラミックス焼結体
からなり、かつ誘電率が２０以下であり、リング状の本
体と、本体から内側へ突出して設けられ、半導体ウェハ
の周縁部を保持する保持部とを有し、前記保持部の突出
長さが１〜４ｍｍであり、前記保持部の半導体ウェハ保
持面の基端側から先端側へ向かう線と水平面との角度が
０．３度以上１．５度以下であることを特徴とする半導
体ウェハ保持具を提供する。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention relates to a ring-shaped main body comprising a ceramic sintered body containing a rare earth oxide and having a dielectric constant of 20 or less. A holding portion that is provided to protrude inward and holds a peripheral portion of the semiconductor wafer, wherein a length of the holding portion protruding is 1 to 4 mm, and a tip of the holding portion from a base end side of a semiconductor wafer holding surface. Provided is a semiconductor wafer holder, wherein an angle between a line toward the side and a horizontal plane is 0.3 degrees or more and 1.5 degrees or less.
【０００７】本発明によれば、半導体ウェハ保持具を石
英ガラスよりも強度および剛性率の高い希土類酸化物を
含むセラミックス焼結体で形成し、かつ保持部を所定の
形状にしたので、半導体ウェハの保持面積を低減するこ
とができ、半導体ウェハの有効活用を図ることができ
る。また、このように希土類酸化物を含むセラミックス
焼結体からなり、誘電率が２０以下であるので、腐蝕さ
れ難いとともに、反応生成物が堆積されにくく、これら
に起因するパーティクルの発生を抑制することができ
る。したがって、装置の連続運転が可能となり、生産効
率の向上を実現することができる。According to the present invention, the semiconductor wafer holder is formed of a ceramic sintered body containing a rare earth oxide having higher strength and rigidity than quartz glass, and the holder is formed in a predetermined shape. Can be reduced, and the semiconductor wafer can be effectively used. In addition, since it is made of a ceramic sintered body containing a rare earth oxide and has a dielectric constant of 20 or less, it is difficult to be corroded, and it is difficult to deposit a reaction product, thereby suppressing generation of particles due to these. Can be. Therefore, continuous operation of the device is enabled, and improvement in production efficiency can be realized.
【０００８】[0008]
【発明の実施の形態】以下、本発明について具体的に説
明する。本発明の半導体ウェハ保持具は、誘電率２０以
下の希土類酸化物を含むセラミックス焼結体からなり、
リング状の本体と、本体から内側へ突出して設けられ、
半導体ウェハの周縁部を保持する保持部とを有し、前記
保持部の突出長さが１〜４ｍｍであり、前記保持部の半
導体ウェハ保持面の基端側から先端側へ向かう線と水平
面との角度が０．３度以上１．５度以下である。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described specifically. The semiconductor wafer holder of the present invention is made of a ceramic sintered body containing a rare earth oxide having a dielectric constant of 20 or less,
A ring-shaped main body, provided to protrude inward from the main body,
A holding portion for holding a peripheral portion of the semiconductor wafer, wherein the protrusion length of the holding portion is 1 to 4 mm, and a line and a horizontal surface extending from the base end side to the tip end side of the semiconductor wafer holding surface of the holding portion. Is 0.3 degrees or more and 1.5 degrees or less.
【０００９】このように半導体ウェハ保持具を希土類酸
化物を含むセラミックス焼結体で構成することにより優
れた耐食性が得られ、石英ガラスのような腐蝕の問題
や、アルミナセラミックスのような腐蝕による脱粒に伴
うパーティクルの問題を解消することができる。希土類
酸化物を含むセラミックス焼結体としては、Ｙ２Ｏ３、
Ｄｙ２Ｏ３、Ｅｒ２Ｏ３のような希土類酸化物単独の焼
結体であってもよいし、ＹＡｌＯ３、Ｙ４Ａｌ２Ｏ９、
Ｙ３Ａｌ５Ｏ１２（イットリウム−アルミニウム−ガー
ネット）等の複合酸化物であってもよい。また、これら
に添加物、例えばＳｉＯ２等の焼結助剤が含まれていて
もよい。希土類酸化物の中では、Ｙ２Ｏ３が好ましい。As described above, by forming the semiconductor wafer holder from a ceramic sintered body containing a rare earth oxide, excellent corrosion resistance can be obtained, and there is a problem of corrosion such as quartz glass and threshing due to corrosion such as alumina ceramics. Can eliminate the problem of particles caused by the above. Ceramic sintered bodies containing rare earth oxides include Y 2 O 3 ,
A sintered body of a rare earth oxide alone such as Dy 2 O 3 or Er 2 O 3 may be used, or YAlO 3 , Y 4 Al 2 O 9 ,
A composite oxide such as Y 3 Al 5 O 12 (yttrium-aluminum-garnet) may be used. Further, these may contain an additive, for example, a sintering aid such as SiO 2 . Among the rare earth oxides, Y 2 O 3 is preferable.
【００１０】本発明の半導体ウェハ保持具の誘電率を２
０以下としたのは、プラズマ処理において誘電率が高い
と帯電しやすく、その結果プラズマガスからなる反応生
成物の堆積が生じ、パーティクルの原因となるからであ
る。すなわち、誘電率が２０以下であればこのようなこ
とが生じ難い。The dielectric constant of the semiconductor wafer holder of the present invention is 2
The reason why the value is set to 0 or less is that if the dielectric constant is high in the plasma treatment, it is easy to be charged, and as a result, a reaction product composed of plasma gas is deposited, which causes particles. That is, if the dielectric constant is 20 or less, such a phenomenon is unlikely to occur.
【００１１】図１は本発明の半導体ウェハ保持具の一例
を示す平面図および断面図、図２は図１の保持具の要部
を拡大して示す断面図である。本発明の半導体ウェハ保
持具は、図１および図２に示すように、半導体ウェハ保
持具１は、リング状の本体２と、本体２から内側へ突出
して設けられ、半導体ウェハ４を保持する保持部３とを
備えている。保持部３は、図２に示すように、半導体ウ
ェハ４を保持する保持面３ａを有しており、保持部３の
突出長Ａは１ｍｍ以上４ｍｍ以下であり、保持面３ａの
基端側から先端側へ向かう線と水平面との角度Ｂが０．
３度以上１．５度以下である。FIG. 1 is a plan view and a sectional view showing an example of a semiconductor wafer holder of the present invention, and FIG. 2 is an enlarged sectional view showing a main part of the holder of FIG. As shown in FIGS. 1 and 2, the semiconductor wafer holder 1 of the present invention is provided with a ring-shaped main body 2 and a holding body that is provided to protrude inward from the main body 2 and holds a semiconductor wafer 4. Unit 3. As shown in FIG. 2, the holding part 3 has a holding surface 3a for holding the semiconductor wafer 4, and the protrusion length A of the holding part 3 is 1 mm or more and 4 mm or less. The angle B between the line toward the tip and the horizontal plane is 0.
It is 3 degrees or more and 1.5 degrees or less.
【００１２】Ａをこのような範囲とすることにより、半
導体ウェハ保持部面積が低減されるが、連続運転後でも
半導体ウェハの保持性を維持することができる。また、
Ｂをこのような範囲とすることにより半導体ウェハが理
想的な凸状となり、半導体ウェハ均熱化を目的としてウ
ェハ裏面へ供給しているＨｅガス流が均一化されるた
め、ウェハ全面でのプラズマ処理の均一化を図ることが
できる。When A is set in such a range, the area of the semiconductor wafer holding portion is reduced, but the holding property of the semiconductor wafer can be maintained even after continuous operation. Also,
By setting B in such a range, the semiconductor wafer becomes an ideal convex shape, and the He gas flow supplied to the back surface of the wafer for the purpose of equalizing the temperature of the semiconductor wafer is made uniform. Processing can be made uniform.
【００１３】以上のように、希土類酸化物を含むセラミ
ックス焼結体からなり、かつ誘電率を２０以下とし、上
記突出長Ａを１ｍｍ以上４ｍ以下、上記角度Ｂを０．３
度以上１．５度以下とすることにより、腐蝕され難くパ
ーティクルの発生を抑制することができ、かつ半導体ウ
ェハの保持部面積の低減とともにウェハ全面での均一な
プラズマ処理が可能となるため、半導体ウェハの有効活
用を図ることができる。As described above, a ceramic sintered body containing a rare earth oxide, a dielectric constant of 20 or less, a protrusion length A of 1 mm or more and 4 m or less, and an angle B of 0.3
When the temperature is not less than 1.5 degrees and not more than 1.5 degrees, it is difficult to corrode and the generation of particles can be suppressed. In addition, the area of the holding portion of the semiconductor wafer can be reduced and uniform plasma processing can be performed on the entire surface of the semiconductor wafer. Effective utilization of the wafer can be achieved.
【００１４】[0014]
【実施例】以下、本発明の実施例について説明する。所
定の配合粉末をポリエチレンポット中に装入し、さらに
イオン交換水、有機分散剤、有機バインダーおよび鉄芯
入りナイロンボールを装入して２４時間混合した。得ら
れたスラリーをスプレードライヤーにより乾燥させ、顆
粒を作成した。この顆粒を冷間静水圧成形（ＣＩＰ）し
た後、生加工を行い、所定形状の半導体ウェハ保持具形
状を作成した後、大気雰囲気の炉で焼成を行った。Embodiments of the present invention will be described below. The prescribed compounded powder was charged into a polyethylene pot, and ion-exchanged water, an organic dispersant, an organic binder, and a nylon ball containing an iron core were further charged and mixed for 24 hours. The obtained slurry was dried with a spray drier to produce granules. After the granules were subjected to cold isostatic pressing (CIP), raw processing was performed, and a semiconductor wafer holder having a predetermined shape was formed, followed by firing in a furnace in an air atmosphere.
【００１５】得られたセラミックス焼結体は、それぞれ
所定の仕上げ加工を行い、保持部の形状を種々変化さ
せ、半導体ウェハ保持具とした。Each of the obtained ceramic sintered bodies was subjected to predetermined finishing, and the shape of the holding portion was changed variously to obtain a semiconductor wafer holder.
【００１６】その後、これら半導体ウェハ保持具を平行
平板型ＲＩＥエッチング装置のチャンバー内に組み込
み、ＣＦ４＋Ｏ２のプラズマを発生させて１０００時間
の連続運転を行い、その際のパーティクル数を測定し
た。また、半導体ウェハ保持具の腐蝕の進行により保持
部と半導体ウェハの密着性が低下してＨｅリーク量が多
くなることから、半導体ウェハを保持具で保持しウェハ
裏面からＨｅガスを供給した際の保持面側へのリーク量
を連続運転前後で測定し、半導体ウェハ保持性を評価し
た。この際の評価基準は、以下の（１）式のＱ値を計算
し、Ｑ≦１．５の場合にウェハ保持性良好（○）、Ｑ＞
１．５の場合にウェハ保持性不良（×）とした。 Ｑ＝（試験後のＨｅリーク量）／（試験前のＨｅリーク量） ……（１） また、リーク量が多くなりガス流が不均一になると、前
述した通りプラズマ処理が不均一になるため、プラズマ
処理の均一性についても同様に（１）式により評価を行
うことが可能である。Thereafter, these semiconductor wafer holders were incorporated into a chamber of a parallel plate type RIE etching apparatus, and plasma of CF 4 + O 2 was generated to perform continuous operation for 1000 hours, and the number of particles at that time was measured. Further, since the adhesion between the holding portion and the semiconductor wafer decreases due to the progress of corrosion of the semiconductor wafer holder and the amount of He leak increases, the semiconductor wafer is held by the holder and the He gas is supplied from the back surface of the wafer. The leak amount to the holding surface side was measured before and after the continuous operation, and the semiconductor wafer holding property was evaluated. The evaluation criterion at this time is to calculate the Q value of the following equation (1), and when Q ≦ 1.5, the wafer holding property is good (○), Q>
In the case of 1.5, the wafer holding property was poor (x). Q = (He leak amount after test) / (He leak amount before test) (1) Further, if the leak amount increases and the gas flow becomes non-uniform, the plasma processing becomes non-uniform as described above. Similarly, the uniformity of the plasma processing can be evaluated by the equation (1).
【００１７】結果を表１に示す。表１にはこれらの結果
の他、半導体ウェハ保持具の材料、保持部寸法、誘電率
の値も併記した。The results are shown in Table 1. Table 1 also shows, in addition to these results, the material of the semiconductor wafer holder, the dimensions of the holder, and the value of the dielectric constant.
【００１８】なお、上述のようにして製造したセラミッ
クス焼結体からなる半導体ウェハ保持具の他、従来の石
英ガラス（ＳｉＯ２）製の半導体ウェハ保持具でも同様
に試験を行った（Ｎｏ．４）。In addition, in addition to the semiconductor wafer holder made of the ceramic sintered body manufactured as described above, a conventional semiconductor wafer holder made of quartz glass (SiO 2 ) was similarly tested (No. 4). ).
【００１９】[0019]
【表１】 [Table 1]
【００２０】表１に示すように、本発明の範囲内である
Ｎｏ．１，２は、耐食性の高い希土類酸化物を含むセラ
ミックス焼結体で製造され、かつ誘電率が２０以下であ
るため、パーティクルの発生が少なくなっており、腐蝕
が少なく連続運転後のウェハ保持性は良好であった。As shown in Table 1, No. 1 within the scope of the present invention. Nos. 1 and 2 are manufactured from ceramic sintered bodies containing rare earth oxides having high corrosion resistance and have a dielectric constant of 20 or less, so that the generation of particles is small, the corrosion is small, and the wafer holding property after continuous operation is small. Was good.
【００２１】一方、従来のアルミナ（Ａｌ２Ｏ３）焼結
体で製造された比較例であるＮｏ．３は、ウェハの保持
性は良好であったが、パーティクル数が多くなった。ま
た、従来の石英ガラス（ＳｉＯ２）製の半導体ウェハ保
持具であるＮｏ．４は、腐蝕が著しく連続運転が不可で
あった。さらに、Ｎｏ．５，６は保持部の寸法を本発明
の範囲外としたものであるが、連続運転後のウェハ保持
性が低下していた。On the other hand, in Comparative Example No. 1 manufactured from a conventional alumina (Al 2 O 3 ) sintered body. In No. 3, the holding property of the wafer was good, but the number of particles was large. In addition, a semiconductor wafer holder made of a conventional quartz glass (SiO 2 ) No. In No. 4, the corrosion was remarkable and continuous operation was impossible. In addition, No. In Nos. 5 and 6, the dimensions of the holding portion were out of the range of the present invention, but the wafer holding ability after continuous operation was reduced.
【００２２】以上の結果から、希土類酸化物を含むセラ
ミックス焼結体からなり、かつ誘電率を２０以下、突出
長さＡを１〜４ｍｍ、角度Ｂを０．３度以上１．５度以
下とすることにより、連続運転後のウェハ保持性が保た
れ、パーティクル発生数を抑制することが可能であるこ
とが確認された。From the above results, the ceramic sintered body containing a rare earth oxide, having a dielectric constant of 20 or less, a protrusion length A of 1 to 4 mm, and an angle B of 0.3 to 1.5 degrees is set. By doing so, it was confirmed that the wafer holding property after the continuous operation was maintained and the number of generated particles could be suppressed.
【００２３】[0023]
【発明の効果】以上説明したように、本発明によれば、
半導体ウェハの保持面積が小さくても保持することが可
能であり、かつパーティクル発生を抑制することができ
る半導体ウェハ保持具を得ることができるので、装置停
止回数を減らすことができ半導体デバイスの生産効率を
向上させることができる。As described above, according to the present invention,
A semiconductor wafer holder that can hold a semiconductor wafer even if its holding area is small and can suppress generation of particles can be obtained, so that the number of times of stopping the apparatus can be reduced and the production efficiency of semiconductor devices can be reduced. Can be improved.
【図面の簡単な説明】[Brief description of the drawings]
【図１】本発明の半導体ウェハ保持具の一例を示す平面
図および断面図。FIG. 1 is a plan view and a sectional view showing an example of a semiconductor wafer holder of the present invention.
【図２】図１の半導体ウェハ保持具の要部を拡大して示
す断面図。FIG. 2 is an enlarged sectional view showing a main part of the semiconductor wafer holder of FIG. 1;
１；半導体ウェハ保持具 ２；本体 ３；保持部 ３ａ；保持面 ４；半導体ウェハ DESCRIPTION OF SYMBOLS 1; Semiconductor wafer holder 2; Main body 3: Holding part 3a; Holding surface 4: Semiconductor wafer
───────────────────────────────────────────────────── フロントページの続き (72)発明者 大滝 浩通 宮城県仙台市泉区明通三丁目５番 株式会 社日本セラテック本社工場内 (72)発明者 岸 幸男 宮城県仙台市泉区明通三丁目５番 株式会 社日本セラテック本社工場内 Ｆターム(参考） 5F004 AA16 BB21 BB29 5F031 CA02 DA13 EA01 MA28 MA32 PA26 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiromichi Otaki 3-5, Akimitsu, Izumi-ku, Sendai-shi, Miyagi Japan Inside the Ceratech headquarters plant of Japan Co., Ltd. (72) Yukio Kishi Meiji-san, Izumi-ku, Sendai-shi, Miyagi F-term (reference) in the Japan Ceratech headquarters and factory 5F004 AA16 BB21 BB29 5F031 CA02 DA13 EA01 MA28 MA32 PA26
Claims (1)
からなり、かつ誘電率が２０以下であり、リング状の本
体と、本体から内側へ突出して設けられ、半導体ウェハ
の周縁部を保持する保持部とを有し、前記保持部の突出
長さが１〜４ｍｍであり、前記保持部の半導体ウェハ保
持面の基端側から先端側へ向かう線と水平面との角度が
０．３度以上１．５度以下であることを特徴とする半導
体ウェハ保持具。1. A ring-shaped main body, which is made of a ceramic sintered body containing a rare earth oxide and has a dielectric constant of 20 or less, and is provided so as to protrude inward from the main body, and holds a peripheral portion of a semiconductor wafer. And a projection length of the holding portion is 1 to 4 mm, and an angle between a line from the base end side to the tip end side of the semiconductor wafer holding surface of the holding portion and a horizontal plane is 0.3 degrees or more and 1 degree or more. A semiconductor wafer holder characterized by being at most 5 degrees.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21196399A JP2001044266A (en) | 1999-07-27 | 1999-07-27 | Semiconductor wafer holding tool |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21196399A JP2001044266A (en) | 1999-07-27 | 1999-07-27 | Semiconductor wafer holding tool |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001044266A true JP2001044266A (en) | 2001-02-16 |
Family
ID=16614614
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21196399A Pending JP2001044266A (en) | 1999-07-27 | 1999-07-27 | Semiconductor wafer holding tool |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001044266A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006225185A (en) * | 2005-02-15 | 2006-08-31 | Ngk Insulators Ltd | Yttria sintered compact, ceramic member, and method for producing yttria sintered compact |
-
1999
- 1999-07-27 JP JP21196399A patent/JP2001044266A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006225185A (en) * | 2005-02-15 | 2006-08-31 | Ngk Insulators Ltd | Yttria sintered compact, ceramic member, and method for producing yttria sintered compact |
| JP4648030B2 (en) * | 2005-02-15 | 2011-03-09 | 日本碍子株式会社 | Yttria sintered body, ceramic member, and method for producing yttria sintered body |
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