JP2001035356A - Field emission type electron source and manufacture thereof, and display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a low-cost field emission type electron source capable of emitting electrons in plural directions and increasing the electron emitting area. SOLUTION: This field emission type electron source is provided with a p-type silicon substrate 1 as a conductive substrate, a n+ diffusion layer 8 formed in stripe on the main surface side of the p-type silicone substrate 1, a strong field drift layer 6 formed on the n+ diffusion layer 8, an oxidized polycrystalline silicon layer 4 formed between the strong field drift layers 6, and a surface electrode 7 formed in stripe in the direction crossing the n- diffusion layer 8 and formed of a conductive thin film formed so as to ride over the strong field drift later 6 and the polycrystalline silicon layer 4. In where a surface crossing the thickness direction of the p-type silicon substrate 1 is considered as a virtual surface, each strong field drift layer 6 has inclined drift parts 6a, 6b, respectively having an interface between the surface electrode 7 and inclined at different angles of inclination in relation to the virtual surface.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission type electron source and a method for manufacturing the same, and a display device for illuminating a phosphor with an electron beam emitted from the field emission type electron source.

[0002]

2. Description of the Related Art Conventionally, as a field emission type electron source, there is a so-called Spindt electrode disclosed in, for example, US Pat. No. 3,665,241. This Spindt-type electrode has a substrate on which a number of minute triangular pyramid-shaped emitter chips are arranged, a gate layer having a radiation hole for exposing the tip of the emitter chip, and being arranged insulated from the emitter chip. And applying a high voltage with the emitter tip as a negative electrode to the gate layer in a vacuum to emit an electron beam from the tip of the emitter tip through a radiation hole.

However, the Spindt-type electrode has a complicated manufacturing process and it is difficult to accurately form a large number of triangular pyramid-shaped emitter chips. For example, the Spindt-type electrode has a large area when applied to a flat light emitting device or a display device. There was a problem that conversion was difficult. In the Spindt-type electrode, the electric field is concentrated at the tip of the emitter tip, so if the degree of vacuum around the tip of the emitter tip is low and residual gas is present, the emitted gas turns the residual gas into positive ions. Since the ions are ionized and the positive ions collide with the tip of the emitter tip, the tip of the emitter tip is damaged (for example, damage due to ion bombardment),
A problem arises in that the current density and efficiency of the emitted electrons become unstable and the life of the emitter tip is shortened. Therefore, in the Spindt-type electrode, in order to prevent the occurrence of this kind of problem, a high vacuum (about 10 ⁻⁵ Pa
It is necessary to use it at about 10 ⁻⁶ Pa), resulting in high costs and troublesome handling. In the Spindt-type electrode, since electrons are radially emitted from the tip of the emitter tip, for example, a phosphor layer for a CRT (electrons need to be accelerated at a high voltage of several hundred V to several kV) to emit light. When applied as an electron source of a display device (in this case, in order to avoid a discharge between the glass substrate provided with the phosphor layer and the Spindt-type electrode, the distance between the glass substrate and the Spindt-type electrode is reduced. It is necessary to increase the distance), and to control the trajectory of the electrons, deflect the potential gradient in the space kept in vacuum between the Spindt-type electrode and the phosphor layer, or apply a magnetic field to this space. This has hindered the reduction in thickness and cost of the display device.

In order to improve this kind of problem, MIM
(Metal Insulator Metal) method and MOS (Metal Oxid
e Semiconductor) type field emission electron sources have been proposed. The former is a flat field emission type electron source having a metal-insulating film-metal structure, and the latter is a metal-oxide film-semiconductor stacked structure. However, in order to increase the emission efficiency of electrons in this type of field emission type electron source (to emit many electrons), it is necessary to reduce the thickness of the insulating film and the oxide film. If the thickness of the insulating film or the oxide film is too thin, dielectric breakdown may occur when a voltage is applied between the upper and lower electrodes of the laminated structure. Since the thickness of the insulating film or the oxide film is limited, the electron emission efficiency (drawing efficiency) cannot be increased.

In recent years, Japanese Patent Application Laid-Open No. 8-250766
As disclosed in Japanese Patent Application Laid-Open Publication No. H10-163, a porous semiconductor layer (porous silicon layer) is formed by using a single-crystal semiconductor substrate such as a silicon substrate and performing anodization on one surface side of the semiconductor substrate. A field emission type electron source (semiconductor cold electron emission device) is proposed in which a surface electrode is formed on the porous semiconductor layer, and a voltage is applied between the semiconductor substrate and the surface electrode to emit electrons. Have been.

[0006] However, the above-mentioned Japanese Patent Application Laid-Open No. Hei 8-2507 has been disclosed.
In the field emission electron source described in Japanese Patent Publication No. 66, since the substrate is limited to a semiconductor substrate, there is a problem that it is difficult to increase the area and reduce the cost. In addition, Japanese Patent Application Laid-Open No. 8-25076
In the field emission type electron source described in Japanese Patent Application Publication No. 6 (1995) -106, a so-called popping phenomenon is apt to occur during electron emission, and the amount of emitted electrons is likely to be uneven. There is a defect.

[0007] The inventors of the present application have proposed a technique disclosed in Japanese Patent Application No. Hei 10-2.
No. 72340, Japanese Patent Application No. 10-272342,
Rapid thermal oxidation of the porous polycrystalline silicon layer by rapid thermal oxidation (RTO) technology creates a strong electric field drift layer in which electrons injected from the conductive substrate drift between the conductive substrate and the surface electrode. The formed field emission electron source was proposed. Here, the porous polycrystalline silicon layer is formed by making the polycrystalline silicon layer on the conductive substrate porous by anodic oxidation. Further, in the surface electrode, electrons reaching the surface of the strong electric field drift layer (the reached electrons are considered hot electrons) need to be tunneled and scattered into the vacuum without being scattered in the surface electrode. Therefore, it is formed of an Au thin film having a thickness of about 10 nm. In this field emission type electron source,
The electron emission characteristics have a small dependence on the degree of vacuum, and can stably emit electrons without generating a popping phenomenon during electron emission. In addition to a semiconductor substrate such as a single crystal silicon substrate as a conductive substrate, a glass substrate For example, a substrate on which a conductive film (for example, an ITO film) is formed can be used. For this reason, a porous semiconductor layer in which a semiconductor substrate is made porous as in the related art or a Spindt-type electrode is used. ,
The area and cost of the electron source can be reduced.

Further, Japanese Patent Application No. 10-272340 mentioned above.
The field emission electron source proposed in Japanese Patent Application No. 10-272342 has a feature that emitted electrons are emitted almost uniformly in the vertical direction within the surface of the surface electrode.
When applied to a display device, the thickness and cost of the display device can be reduced.

FIG. 6 is a perspective view showing a schematic structure of a display device using this kind of field emission type electron source 10 ', and the glass substrate 3 is opposed to the field emission type electron source 10'.
3 are provided. Field emission electron source 1 on glass substrate 33
A collector electrode 31 is formed on the surface opposite to 0 ', and a fluorescent layer 32 that emits visible light by electrons emitted from the field emission electron source 10' is applied to the collector electrode 31. The glass substrate 33 is integrated with the field emission electron source 10 ′ using a glass spacer or the like (not shown), and an internal space surrounded by the glass substrate 33, the spacer, and the field emission electron source 10 ′ is formed in a predetermined manner. It has a vacuum.

As shown in FIGS. 6 to 8, the field emission type electron source 10 ′ includes a p-type silicon substrate 1 and an n ⁺ diffusion layer formed in a stripe shape on the main surface side in the p-type silicon substrate 1. N-type region 8, strong electric field drift layer 6 formed of oxidized porous polycrystalline silicon formed on n-type region 8, and oxidized polycrystalline silicon formed between strong electric field drift layers 6 A surface formed of a conductive thin film (for example, an Au thin film) formed in a stripe shape in a direction crossing the layer 4 and the n-type region 8 and formed over the strong electric field drift layer 6 and the polycrystalline silicon layer 4; And an electrode 7.

In the field emission type electron source 10 ′, a matrix is composed of an n-type region 8 formed in a stripe and a surface electrode 7 formed in a stripe in a direction intersecting the n-type region 8. Therefore, by appropriately selecting the n-type region 8 to which a voltage is applied and the surface electrode 7, electrons are emitted only from the region of the surface electrode 7 to which the voltage is applied, which crosses the n-type region 8 to which the voltage is applied. Since the electrons are emitted, electrons can be emitted from a desired region of the surface electrode 7. The contact to the n-type region 8 is formed by etching a part of the strong electric field drift layer 6 to expose a part of the surface of the n-type region 8 as shown in FIG. You. The voltage applied between the n-type region 8 and the surface electrode 7 is about 10 V to 30 V, and the collector electrode 3
The voltage applied to 1 is several hundred V to several kV.

[0012]

By the way, the display device using the field emission type electron source 10 'shown in FIGS. 6 to 8 can be made thinner and lower in cost, but the p-type silicon substrate is used. Since electrons can be emitted only in a direction parallel to the thickness direction of the p-type silicon substrate 1, the area of the screen is limited by the size of the p-type silicon substrate 1. Further, since the strong electric field drift layer 6 and the surface electrode 7 are formed in parallel with the flat main surface of the p-type silicon substrate 1, the area of the part from which electrons are emitted depends on the area of the main surface of the p-type silicon substrate. There was a problem that it was restricted.

The present invention has been made in view of the above circumstances, and has as its object to provide a field emission type electron source capable of emitting electrons in a plurality of directions and having a large electron emission area, a method of manufacturing the same, and a display. It is to provide a device.

[0014]

According to a first aspect of the present invention, there is provided a semiconductor device comprising a conductive substrate and an oxidized or nitrided porous semiconductor layer formed on one surface of the conductive substrate. A strong electric field drift layer, and a surface electrode made of a conductive thin film formed on the strong electric field drift layer. The voltage is applied from the conductive substrate by applying a voltage with the surface electrode being a positive electrode with respect to the conductive substrate. A field emission type electron source in which the generated electrons drift through the strong electric field drift layer and are emitted through the surface electrode, and the strong electric field drift layer is in contact with the surface electrode with respect to a virtual surface orthogonal to the thickness direction of the conductive substrate. It is characterized in that the interface has a plurality of inclined drift portions whose inclinations are different from each other and the inclination angles are different from each other. In the inclined drift portion, electrons move along a direction orthogonal to the interface and pass through the surface electrode. Since electrons are emitted, electrons can be emitted in a plurality of directions by having a plurality of inclined drift portions, and a virtual surface in which the interface between the inclined drift portion and the surface electrode is orthogonal to the thickness direction of the conductive substrate. , The electron emission area can be increased without increasing the size of the conductive substrate.

According to a second aspect of the present invention, there is provided a diffusion layer which is formed in a stripe shape on the main surface side of a conductive substrate and is electrically separated from each other and electrically separated from the conductive substrate. The formed strong electric field drift layer, the oxidized or nitrided polycrystalline semiconductor layer formed between the strong electric field drift layers, and the stripe formed in a direction intersecting the diffusion layer on the strong electric field drift layer and the polycrystalline semiconductor. Surface electrode comprising a conductive thin film formed over the layer,
A field emission type electron source in which electrons injected from the diffusion layer drift through the strong electric field drift layer and are emitted through the surface electrode when a voltage is applied to the diffusion layer as a positive electrode with respect to the diffusion layer. The layer has two inclined drift portions whose interfaces with the surface electrode are inclined with respect to a virtual surface orthogonal to the thickness direction of the conductive substrate and whose inclination angles are different from each other, and each inclined drift portion is oxidized or nitrided. In the inclined drift portion, electrons move along a direction orthogonal to the interface and are emitted through the surface electrode, so that a plurality of inclined drift portions are formed. The electron can be emitted in a plurality of directions, and the interface between the inclined drift portion and the surface electrode is inclined with respect to a virtual surface orthogonal to the thickness direction of the conductive substrate. Therefore, the electron emission area can be increased without increasing the size of the conductive substrate, and the screen size can be increased when a display device is configured by arranging a collector electrode on the surface electrode. The area can be increased.

According to a third aspect of the present invention, there is provided a semiconductor device comprising: a p-type semiconductor substrate;
Field-type layer formed of a stripe-shaped n-type region on the main surface side in a semiconductor substrate, a porous polycrystalline semiconductor layer formed on the n-type region and oxidized or nitrided, and a strong electric field drift layer From the oxidized or nitrided polycrystalline semiconductor layer formed on the substrate and the conductive thin film formed in stripes in a direction intersecting the n-type region and formed on the strong electric field drift layer and the polycrystalline semiconductor layer. As a strong electric field drift layer, the electric field having two inclined drift portions whose interfaces with the surface electrode are inclined with respect to a virtual surface orthogonal to the thickness direction of the p-type semiconductor substrate and whose inclination angles are different from each other. A method of manufacturing a radiation type electron source, wherein an inclined surface inclined with respect to the virtual surface orthogonal to a thickness direction of a p-type semiconductor substrate is formed in a stripe shape on a main surface side of the p-type semiconductor substrate. Thereafter, an n-type region is formed at a portion of the main surface side of the p-type semiconductor substrate that overlaps the inclined surface, and then a polycrystalline semiconductor layer is formed over the entire surface of the p-type semiconductor substrate on the main surface side. Then, by performing anodizing treatment, a portion of the polycrystalline semiconductor layer on the n-type region is made porous, and the porous portion is oxidized or nitrided to form a strong electric field drift layer. A surface electrode made of a conductive thin film intersecting the n-type region is formed on the polycrystalline semiconductor layer on which the drift layer is formed, so that electrons can be emitted in a plurality of directions and the electron emission area is increased. And a field emission type electron source capable of performing the above-described operations.

According to a fourth aspect of the present invention, the space between the field emission type electron source according to the first aspect and the field emission type electron source which is disposed opposite to the virtual surface of the field emission type electron source is a vacuum. A flat glass substrate to be maintained, and a phosphor layer provided on the glass substrate facing the virtual surface and receiving an electron beam from a field emission electron source to emit light in a visible light region. It is characterized by being able to emit electrons in a plurality of directions and increasing the electron emission area, and to increase the area of the screen by making the area of the glass substrate larger than that of the conductive substrate. It becomes possible.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention, the area of the glass substrate facing the conductive substrate on which the field emission electron source according to the first aspect is formed is the conductive substrate. Since it is set larger than the substrate, a display device having a larger screen area than the conductive substrate can be realized.

[0019]

(Embodiment 1) Electric field of this embodiment
The basic structure of the radiation type electron source 10 is shown in FIGS.
It is almost the same as the conventional configuration, and as shown in FIG.
A p-type silicon substrate 1 as a substrate and a p-type silicon substrate 1
N formed in stripes on the main surface side⁺Diffusion layer 8 (hereinafter
Below, referred to as n-type region 8) and formed on n-type region 8.
Strong electric field drift made of oxidized porous polycrystalline silicon
Oxidized layer formed between the gate layer 6 and the strong electric field drift layer 6.
In the direction intersecting the polycrystalline silicon layer 4 and the n-type region 8
The strong electric field drift layer 6 formed in a stripe shape and
From the conductive thin film formed over the polycrystalline silicon layer 4
And a surface electrode 7. In this embodiment,
Uses gold as the material of the surface electrode 7,
The material of pole 7 is not limited to gold, but its work function
Any metal can be used.
ROM, tungsten, nickel, platinum, etc.
Metal alloys and the like can be used. In this embodiment,
Has set the thickness of the surface electrode 7 to 10 nm.
There is no particular limitation. Also, the carrier of the n-type region 8
The concentration is 1 × 10^{1 8}cm^-3Or 5 × 10¹⁹c
m^-3There is.

Therefore, in the field emission type electron source 10 of the present embodiment, similarly to the conventional configuration shown in FIGS. 6 to 8, the n-type regions 8 formed in a stripe shape intersect (n-type regions 8). Since the matrix is composed of the surface electrodes 7 formed in a stripe shape in the direction orthogonal to each other, the n-type region 8 to which a voltage is applied and the surface electrode 7 are appropriately selected, so that the surface to which the voltage is applied is formed. Since electrons are emitted only from a region of the electrode 7 that intersects the n-type region 8 to which the voltage is applied, electrons can be emitted from a desired region of the surface electrode 7.

In the field emission type electron source 10 of the present embodiment, when the plane orthogonal to the thickness direction of the p-type silicon substrate 1 as the conductive substrate is defined as a virtual surface, each strong electric field drift layer 6 is formed on the virtual surface. On the other hand, the two inclined drift portions 6a and 6b whose interfaces with the surface electrode 7 are inclined and whose inclination angles are different from each other.
The feature is that it has. The number of the inclined drift portions is not limited to two, and the inclination angle of the inclined drift portion may be different for each strong electric field drift layer.

Here, in the present embodiment, a (100) substrate is used as the p-type silicon substrate 1, and the strong electric field drift layer 6 is approximately 125.3 degrees clockwise in FIG. Type drift part 6 having an inclination angle of
a in the clockwise direction of FIG. 1 with respect to the virtual surface.
And an inclined drift portion 6b having an inclination angle of 7 degrees. That is, the field emission type electron source 1 of the present embodiment
0, the protruding portion 12 having a triangular cross section is formed on the main surface side of the p-type silicon substrate 1 by using an anisotropic etching technique using KOH or the like, and the n-type region 8 is
Each strong electric field drift layer 6 is formed in an inverted V-shaped cross section as shown in FIG.

However, in the inclined drift portions 6a and 6b of the strong electric field drift layer 6, electrons injected from the n-type region 8 have the above-mentioned interface (that is, the interface between the inclined drift portion 6a and the surface electrode 7, the inclined surface). (Each of the interface between the mold drift portion 6b and the surface electrode 7) and is emitted from the surface of the surface electrode 7 parallel to the interface through the surface electrode 7 through the surface electrode 7, so that they are inclined with respect to the virtual surface. By having the inclined drift portions 6a and 6b having different angles, electrons can be emitted in two directions. The arrow in FIG. 1 indicates the direction in which electrons e ⁻ are emitted.

In this embodiment, each interface between each of the inclined drift portions 6a and 6b and the surface electrode 7 is inclined with respect to a virtual surface orthogonal to the thickness direction of the p-type silicon substrate 1 as the conductive substrate. Therefore, the electron emission area can be increased without increasing the size of the p-type silicon substrate 1 and without changing the distance between the strong electric field drift layers 6 as compared with the conventional configuration shown in FIGS. Can be.

In order to configure a display device using the field emission type electron source 10 of the present embodiment, for example, instead of the field emission type electron source 10 'in the conventional display device shown in FIG. The field emission electron source 10 described above may be used, and the size of the screen can be increased by enlarging the glass substrate 33 as compared with the above-described conventional configuration.
Here, the voltage applied between n-type region 8 and surface electrode 7 is about 10 V to 30 V. Each external lead is connected to each n-type region 8 and each surface electrode 7. The external leads connected to each n-type region 8 individually apply a voltage applied to each n-type region 8. First controllable matrix control circuit (not shown)
The external leads connected to the respective surface electrodes 7 are connected to a second matrix control circuit (not shown) which can individually control the voltage applied to each surface electrode 7.

In this embodiment, the p-type silicon substrate 1 is used as the conductive substrate, and the n-type region 8 is used as the diffusion layer.
Although the (n ⁺ diffusion layer 8) is adopted, the conductive substrate is not limited to the p-type silicon substrate, and the diffusion layer is also n-type.
The present invention is not limited to the shape region 8, and it is sufficient that the diffusion layers formed in a stripe shape are electrically separated from each other. In the present embodiment, the strong electric field drift layer 6 is made of oxidized porous polycrystalline silicon.
The strong electric field drift layer 6 may be made of nitrided porous polycrystalline silicon or another oxidized or nitrided porous polycrystalline semiconductor layer.

Hereinafter, the field emission type electron source 10 of this embodiment will be described.
Will be described with reference to FIGS. 2 (a) to 2 (g).

First, the opening area of the main surface side of the p-type silicon substrate 1 is increased toward the opening surface side (upward in FIG. 2A) by using photolithography technology, anisotropic etching technology using KOH, or the like. 2A is formed by providing a recessed portion 11 having an inverted trapezoidal cross-section in which the shape becomes larger in a stripe shape.
The structure shown in FIG. Here, the bottom surface of the recess 11 is orthogonal to the thickness direction of the p-type silicon substrate 1 and forms a part of the virtual surface.

Next, the projecting portion 12 and the recess 11
A mask for heat diffusion or ion implantation is provided on the bottom surface of the concave portion 11 on the main surface side of the p-type silicon substrate 1 on which is formed, and a heat diffusion technique or By introducing a dopant such as phosphorus (P) by an ion implantation technique, a striped n-type region 8 is formed, and by removing the mask, the structure shown in FIG. 2B is obtained.

Next, a predetermined film thickness (for example, the film thickness on the bottom surface of the recess 11 is 1.5 μm) is formed by LPCVD on the entire surface of the main surface of the p-type silicon substrate 1 on which the n-type region 8 is formed. By forming the non-doped polycrystalline silicon layer 3, the structure shown in FIG. 2C is obtained. Here, LPCV
The film forming conditions of the method D were as follows: the substrate temperature was 610 ° C., the flow rate of the SiH ₄ gas was 600 sccm, and the degree of vacuum was 20 Pa. The method for forming the polycrystalline silicon layer 3 is not limited to the LPCVD method. For example, after an amorphous silicon layer is formed by a sputtering method or a plasma CVD method, an annealing process is performed on the amorphous silicon layer. Alternatively, a method of forming the polycrystalline silicon layer 3 by crystallization may be used.

Next, a resist (for example, an X-ray resist) is applied on the polycrystalline silicon layer 3, and a resist layer patterned in a stripe by opening a portion above the n-type region 8. 9 is formed, and the structure shown in FIG. 2D is obtained.

Next, a 55 wt% aqueous solution of hydrogen fluoride and ethanol were mixed at a ratio of 1: 1 and an electrolytic solution cooled to 0 ° C. was used, a platinum electrode (not shown) was used as a negative electrode, and a p-type silicon substrate 1 (p-type) was used. An ohmic electrode (not shown) is formed on the back surface of the silicon substrate 1), and the exposed portion of the polycrystalline silicon layer 3 is irradiated with light using the resist layer 9 as a mask for anodic oxidation. By performing the anodic oxidation treatment at a constant current while performing, the porous polycrystalline silicon layer 5 is partially formed (in a stripe shape), and then the resist layer 9 is removed to thereby obtain a structure shown in FIG.
The structure shown in FIG. Here, in this embodiment, the current density is set to 20 mA /
The anodic oxidation time was set to 15 seconds with a constant cm ² , and light irradiation was performed by a 500 W tungsten lamp during the anodic oxidation treatment. In the present embodiment, the porosity of the porous polycrystalline silicon layer 5 is made substantially uniform while the current density during the anodic oxidation process is kept constant, but the porosity can be reduced by changing the current density during the anodic oxidation process. A structure in which a high-porosity polycrystalline silicon layer and a low-porosity porous polycrystalline silicon layer are alternately stacked may be used, or a structure in which the porosity continuously changes in the thickness direction may be used. In this embodiment, the polycrystalline silicon layer 3 is made porous to a depth reaching the p-type silicon substrate 1 in the thickness direction. Is also good.

Next, the porous polycrystalline silicon layer 5 is subjected to rapid thermal oxidation (RTO) in a dry oxygen atmosphere by using a lamp annealing apparatus, thereby forming a strong electric field drift layer made of thermally oxidized porous polycrystalline silicon. 6 is formed, and the structure shown in FIG. Note that reference numeral 4 in FIG. 2F indicates a thermally oxidized polycrystalline silicon layer. Here, the conditions of the rapid thermal oxidation are as follows:
The oxidation time was 1 hour.

Thereafter, a conductive thin film (for example, a gold thin film) serving as the surface electrode 7 is formed on the main surface side of the p-type silicon substrate 1 by vapor deposition or the like, and is patterned in a stripe shape in a direction orthogonal to the n-type region 8. By doing, FIG. 2 (g)
The field emission type electron source 10 having the structure shown in FIG.

(Embodiment 2) The basic configuration of a field emission type electron source 10 of this embodiment is substantially the same as that of Embodiment 1 shown in FIG. 1, and as shown in FIG. A silicon substrate 1, an n ⁺ diffusion layer 8 (hereinafter referred to as an n-type region 8) formed in a stripe shape on the main surface side of the p-type silicon substrate 1, and a strong electric field drift formed on the n-type region 8 Layer 6, an oxidized polycrystalline silicon layer 4 formed between strong electric field drift layers 6, and a strong electric field drift layer 6 formed in stripes in a direction intersecting n-type region 8, and the above polycrystalline silicon layer 4. And a surface electrode 7 made of a conductive thin film formed over the substrate. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and a description thereof is partially omitted.

In the present embodiment, a plurality of protrusions 12 having a triangular cross section are formed adjacent to the main surface of the p-type silicon substrate 1, and a tip of each of the protrusions 12 has an n-shaped cross section at the tip. A shaped region 8 is formed. Therefore, n
The shape region 8 is formed in a stripe shape as described above.

In the field emission type electron source 10 of the present embodiment, similarly to the first embodiment, when the plane orthogonal to the thickness direction of the p-type silicon substrate 1 serving as the conductive substrate is a virtual surface, each strong electric field drift layer 6 However, a plurality (in this embodiment, 2 in the present embodiment) in which the interface with the surface electrode 7 is inclined with respect to the virtual
) Inclined drift parts 6a and 6b. Each of the inclined drift portions 6a and 6b is made of oxidized porous polycrystalline silicon.

Thus, also in the present embodiment, in the inclined drift portions 6a and 6b of the strong electric field drift layer 6, electrons injected from the n-type region 8 have the above-mentioned interface (that is, the inclined drift portion 6a and the surface electrode). 7 and the interface between the inclined drift portion 6b and the surface electrode 7), and the light is emitted from the surface of the surface electrode 7 which is parallel to the interface through the surface electrode 7 so that the virtual Inclined drift portions 6a, 6b having different inclination angles with respect to the surface
, Electrons can be emitted in two directions. Note that the arrow in FIG. 3 indicates the direction in which electrons e ⁻ are emitted.

Also in the present embodiment, each interface between the inclined drift portions 6a and 6b and the surface electrode 7 is inclined with respect to a virtual surface orthogonal to the thickness direction of the p-type silicon substrate 1 as the conductive substrate. Therefore, the electron emission area can be increased without increasing the size of the p-type silicon substrate 1 and without changing the distance between the strong electric field drift layers 6 as compared with the conventional configuration shown in FIGS. Can be.

In order to configure a display device using the field emission type electron source 10 of the present embodiment, for example, instead of the field emission type electron source 10 'in the conventional display device shown in FIG. The field emission electron source 10 described above may be used, and the size of the screen can be increased by enlarging the glass substrate 33 as compared with the above-described conventional configuration.
Here, the voltage applied between n-type region 8 and surface electrode 7 is about 10 V to 30 V. Each external lead is connected to each n-type region 8 and each surface electrode 7. The external leads connected to each n-type region 8 individually apply a voltage applied to each n-type region 8. First controllable matrix control circuit (not shown)
The external leads connected to the respective surface electrodes 7 are connected to a second matrix control circuit (not shown) which can individually control the voltage applied to each surface electrode 7.

(Embodiment 3) The basic configuration of a field emission type electron source 10 of this embodiment is substantially the same as that of Embodiment 1 shown in FIG. 1, and as shown in FIG. A silicon substrate 1, an n ⁺ diffusion layer 8 (hereinafter referred to as an n-type region 8) formed in a stripe shape on the main surface side of the p-type silicon substrate 1, and a strong electric field drift formed on the n-type region 8 Layer 6, an oxidized polycrystalline silicon layer 4 formed between strong electric field drift layers 6, and a strong electric field drift layer 6 formed in stripes in a direction intersecting n-type region 8, and the above polycrystalline silicon layer 4. And a surface electrode 7 made of a conductive thin film formed over the substrate. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and a description thereof is partially omitted.

In the present embodiment, p is the same as that described in the first embodiment.
A protruding portion 12 and an n-type region 8 provided on the main surface side of the silicon substrate 1 are each formed in a trapezoidal cross section, and in the strong electric field drift layer 6, oxidation occurs between the inclined drift portions 6a and 6b. Polycrystalline silicon layer 4 '
Are formed, and each of the inclined drift portions 6a and 6b is formed of oxidized porous polycrystalline silicon.

FIG. 4 shows a schematic configuration of a display device using the field emission type electron source 10 of the present embodiment. In this display device, a glass substrate 33 is opposed to the field emission type electron source 10. Will be arranged. A collector electrode (not shown) is formed on the surface of the glass substrate 33 on the side facing the field emission type electron source 10, and the collector electrode emits visible light by electrons emitted from the field emission type electron source 10. A phosphor layer 32 is applied. The glass substrate 33 is integrated with the field emission type electron source 10 using a glass spacer (not shown), an electron source side glass substrate on which the field emission type electron source 10 is installed, and the like.
The space between 2 and the field emission type electron source 10 is set to a predetermined degree of vacuum.

The basic configuration of the display device of the present embodiment is substantially the same as the conventional configuration shown in FIG. 6, but the field-emission electron source 10 of the present embodiment has the inclined drift portions 6a and 6a.
By having b, electrons can be emitted in two directions. Therefore, the glass substrate 33 having a larger area than the p-type silicon substrate 1 is used. The screen is made larger than the conventional configuration without changing from the conventional configuration.

(Embodiment 4) As shown in FIG. 5, a field emission type electron source 10 of this embodiment has a p-type silicon substrate 1 as a conductive substrate, and a stripe-shaped on the main surface side of the p-type silicon substrate 1. ^{n +} diffusion layer 8 formed (hereinafter, n-type region 8
), A strong electric field drift layer 6 formed of oxidized porous polycrystalline silicon formed over all the n-type regions 8, and an oxidized polycrystalline layer formed on both sides of the strong electric field drift layer 6. The semiconductor device includes a crystalline silicon layer 4, a strong electric field drift layer 6 formed in a stripe shape in a direction intersecting the n-type region 8, and a surface electrode 7 made of a conductive thin film formed over the polycrystalline silicon layer 4. I have. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and a description thereof is partially omitted.

In this embodiment, steps which are lower than the central part are provided at both ends on the main surface side of the p-type silicon substrate 1, and the inclined drift parts 6 a, 6 b are respectively provided at both ends of the strong electric field drift layer 6. have.

In the field emission type electron source 10 of the present embodiment, similarly to the first embodiment, when the plane orthogonal to the thickness direction of the p-type silicon substrate 1 as the conductive substrate is a virtual surface, the strong electric field drift layer 6 The two inclined drift portions 6 whose interface with the surface electrode 7 is inclined with respect to the virtual surface and whose inclination angles are different from each other.
a and 6b.

FIG. 5 shows a schematic configuration of a display device using the field emission electron source 10 of the present embodiment. In this display device, a glass substrate 33 is opposed to the field emission electron source 10. Will be arranged. A collector electrode (not shown) is formed on the surface of the glass substrate 33 on the side facing the field emission type electron source 10, and the collector electrode emits visible light by electrons emitted from the field emission type electron source 10. A phosphor layer 32 is applied. The glass substrate 33 is integrated with the field emission type electron source 10 using a glass spacer (not shown), an electron source side glass substrate on which the field emission type electron source 10 is installed, and the like.
The space between 2 and the field emission type electron source 10 is set to a predetermined degree of vacuum.

The basic configuration of the display device of this embodiment is substantially the same as the conventional configuration shown in FIG. 6, but in the field emission type electron source 10 of this embodiment, the strong electric field drift layer 6 has inclined drifts at both ends. By having the portions 6a and 6b, electrons can be emitted in three directions. Therefore, the glass substrate 33 having a larger area than the p-type silicon substrate 1 is used. The screen is made larger than the conventional configuration without changing the size from the conventional configuration.

[0050]

According to the first aspect of the present invention, there is provided a conductive substrate, a strong electric field drift layer formed of an oxidized or nitrided porous semiconductor layer formed on one surface side of the conductive substrate, and A surface electrode made of a conductive thin film formed on the substrate, and by applying a voltage with the surface electrode being a positive electrode with respect to the conductive substrate, electrons injected from the conductive substrate drift in the strong electric field drift layer and A field emission type electron source emitted through an electrode, wherein the strong electric field drift layer has a plurality of inclined surfaces having different inclination angles at an interface with the surface electrode with respect to a virtual surface orthogonal to a thickness direction of the conductive substrate. Since the electron drifts along the direction perpendicular to the interface and is emitted through the surface electrode in the inclined drift section, the inclined drift section has a plurality of inclined drift sections. And the interface between the inclined drift portion and the surface electrode is inclined with respect to a virtual surface perpendicular to the thickness direction of the conductive substrate. There is an effect that the electron emission area can be increased without increasing.

According to a second aspect of the present invention, there is provided a diffusion layer formed in a stripe shape on the main surface side of a conductive substrate and electrically separated from each other and electrically separated from the conductive substrate. The formed strong electric field drift layer, the oxidized or nitrided polycrystalline semiconductor layer formed between the strong electric field drift layers, and the stripe formed in a direction intersecting the diffusion layer on the strong electric field drift layer and the polycrystalline semiconductor. Surface electrode comprising a conductive thin film formed over the layer,
A field emission type electron source in which electrons injected from the diffusion layer drift through the strong electric field drift layer and are emitted through the surface electrode when a voltage is applied to the diffusion layer as a positive electrode with respect to the diffusion layer. The layer has two inclined drift portions whose interfaces with the surface electrode are inclined with respect to a virtual surface orthogonal to the thickness direction of the conductive substrate and whose inclination angles are different from each other, and each inclined drift portion is oxidized or nitrided. In the inclined drift portion, electrons move along a direction perpendicular to the interface and are emitted through the surface electrode, so that the electrons are provided by having a plurality of inclined drift portions. Can be emitted in a plurality of directions, and since the interface between the inclined drift portion and the surface electrode is inclined with respect to a virtual surface orthogonal to the thickness direction of the conductive substrate, It is possible to increase the electron emission area without increasing the size of the conductive substrate, moreover,
When a display device is configured by arranging a collector electrode on a surface electrode and facing it, there is an effect that the area of a screen can be increased.

According to a third aspect of the present invention, a p-type semiconductor substrate is provided.
Field-type layer formed of a stripe-shaped n-type region on the main surface side in a semiconductor substrate, a porous polycrystalline semiconductor layer formed on the n-type region and oxidized or nitrided, and a strong electric field drift layer From the oxidized or nitrided polycrystalline semiconductor layer formed on the substrate and the conductive thin film formed in stripes in a direction intersecting the n-type region and formed on the strong electric field drift layer and the polycrystalline semiconductor layer. As a strong electric field drift layer, the electric field having two inclined drift portions whose interfaces with the surface electrode are inclined with respect to a virtual surface orthogonal to the thickness direction of the p-type semiconductor substrate and whose inclination angles are different from each other. A method of manufacturing a radiation type electron source, wherein an inclined surface inclined with respect to the virtual surface orthogonal to a thickness direction of a p-type semiconductor substrate is formed in a stripe shape on a main surface side of the p-type semiconductor substrate. Thereafter, an n-type region is formed at a portion of the main surface side of the p-type semiconductor substrate that overlaps the inclined surface, and then a polycrystalline semiconductor layer is formed over the entire surface of the p-type semiconductor substrate on the main surface side. Then, by performing anodizing treatment, a portion of the polycrystalline semiconductor layer on the n-type region is made porous, and the porous portion is oxidized or nitrided to form a strong electric field drift layer. Since a surface electrode made of a conductive thin film intersecting the n-type region is formed on the polycrystalline semiconductor layer on which the drift layer is formed, electrons can be emitted in a plurality of directions and the electron emission area can be increased. There is an effect that a field emission electron source can be provided.

According to a fourth aspect of the present invention, the space between the field emission type electron source according to the first aspect and the field emission type electron source which is disposed opposite to the virtual surface of the field emission type electron source is a vacuum. A flat glass substrate to be maintained, and a phosphor layer provided on the glass substrate facing the virtual surface and receiving an electron beam from a field emission electron source to emit light in a visible light region. It is possible to emit electrons in a plurality of directions and increase the electron emission area, and it is possible to increase the screen area by making the area of the glass substrate larger than that of the conductive substrate. This has the effect.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention, the glass substrate has a surface area opposite to the conductive substrate on which the field emission electron source according to the first aspect is formed. Since it is set larger than the substrate, there is an effect that a display device having a larger screen area than the conductive substrate can be realized.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing a first embodiment.

FIG. 2 is a cross-sectional view of a main process for describing the manufacturing method.

FIG. 3 is a schematic sectional view showing a second embodiment.

FIG. 4 is a schematic configuration diagram showing a third embodiment.

FIG. 5 is a schematic configuration diagram showing a fourth embodiment.

FIG. 6 is a schematic configuration diagram of a conventional display device.

FIG. 7 is a perspective view of a main part of the field emission electron source in the above.

FIG. 8 is a cross-sectional view of the field emission electron source in the above.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 p-type silicon substrate 4 oxidized polycrystalline silicon layer 6 strong electric field drift layer 6 a, 6 b inclined drift section 7 surface electrode 8 n ⁺ diffusion layer 10 field emission electron source

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Takashi Hatai 1048 Kazuma Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Works Co., Ltd. (72) Inventor Yoshiaki Honda 1048 Kadoma Kadoma Kadoma City, Osaka Prefecture Inside the company (72) Inventor Tsutomu Ishihara 1048 Kadoma, Kadoma, Osaka Prefecture Inside Matsushita Electric Works Co., Ltd. Takuya 1048 Kazuma Kadoma, Kadoma City, Osaka Prefecture F-term in Matsushita Electric Works, Ltd. (reference) 5C036 EE19 EF01 EF06 EF08 EG02 EG12 EH01

Claims (5)

[Claims] 1. A conductive substrate, a strong electric field drift layer made of an oxidized or nitrided porous semiconductor layer formed on one surface side of the conductive substrate, and a conductive thin film formed on the strong electric field drift layer A surface electrode comprising a surface electrode, and applying a voltage with the surface electrode being a positive electrode with respect to the conductive substrate, so that electrons injected from the conductive substrate drift in the strong electric field drift layer and are emitted through the surface electrode. Type electron source, wherein the strong electric field drift layer has a plurality of inclined drift portions in which the interface with the surface electrode is inclined with respect to a virtual surface orthogonal to the thickness direction of the conductive substrate and the inclination angles are different from each other. Characteristic field emission electron source. 2. A diffusion layer formed in a stripe shape on a main surface side of a conductive substrate and electrically separated from each other and electrically separated from the conductive substrate, and a strong electric field formed on the diffusion layer. A drift layer, an oxidized or nitrided polycrystalline semiconductor layer formed between the strong electric field drift layers, and a stripe formed in a direction crossing the diffusion layer, over the strong electric field drift layer and the polycrystalline semiconductor layer. A surface electrode consisting of a formed conductive thin film is provided, and by applying a voltage with the surface electrode as a positive electrode to the diffusion layer, electrons injected from the diffusion layer drift in the strong electric field drift layer and are emitted through the surface electrode. Field emission type electron source,
The strong electric field drift layer has two inclined drift portions whose interfaces with the surface electrode are inclined with respect to a virtual surface orthogonal to the thickness direction of the conductive substrate and whose inclination angles are different from each other. Or a field emission type electron source comprising a nitrided porous polycrystalline semiconductor layer. 3. A p-type semiconductor substrate, an n-type region formed in a stripe shape on a main surface side in the p-type semiconductor substrate, and a porous polycrystalline semiconductor layer formed on the n-type region and oxidized or nitrided. A strong electric field drift layer, an oxidized or nitrided polycrystalline semiconductor layer formed between the strong electric field drift layers, and a stripe formed in a direction intersecting the n-type region on the strong electric field drift layer and the polycrystalline semiconductor. Surface electrode comprising a conductive thin film formed over the layer,
A method for manufacturing a field emission type electron source having two inclined drift portions whose interfaces with a surface electrode are inclined with respect to a virtual surface orthogonal to a thickness direction of a p-type semiconductor substrate as a strong electric field drift layer and whose inclination angles are different from each other. After forming an inclined surface inclined with respect to the virtual surface orthogonal to the thickness direction of the p-type semiconductor substrate in a stripe shape on the main surface side of the p-type semiconductor substrate, Forming an n-type region in a portion overlapping the inclined surface, and then forming a polycrystalline semiconductor layer on the entire surface on the main surface side of the p-type semiconductor substrate,
Next, a portion on the n-type region of the polycrystalline semiconductor layer is made porous by performing anodizing treatment, and the porous portion is oxidized or nitrided to form a strong electric field drift layer. A method for manufacturing a field emission type electron source, comprising: forming a surface electrode made of a conductive thin film crossing an n-type region on a polycrystalline semiconductor layer on which an electric field drift layer is formed. 4. A flat plate-shaped electron source according to claim 1, wherein a space between said field emission electron source and said virtual surface of said field emission electron source is placed in a vacuum. And a phosphor layer provided on the side of the glass substrate facing the virtual surface and receiving an electron beam from a field emission electron source and emitting light in a visible light region. Display device. 5. The glass substrate is characterized in that the area of the surface facing the conductive substrate on which the field emission electron source according to claim 1 is formed is set larger than the conductive substrate. 5. The display device according to claim 4, wherein: