JP2001015542A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

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Publication number
JP2001015542A
JP2001015542A JP11189246A JP18924699A JP2001015542A JP 2001015542 A JP2001015542 A JP 2001015542A JP 11189246 A JP11189246 A JP 11189246A JP 18924699 A JP18924699 A JP 18924699A JP 2001015542 A JP2001015542 A JP 2001015542A
Authority
JP
Japan
Prior art keywords
wire
chip
main surface
ball
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11189246A
Other languages
Japanese (ja)
Inventor
Toshihiko Oyama
利彦 大山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP11189246A priority Critical patent/JP2001015542A/en
Publication of JP2001015542A publication Critical patent/JP2001015542A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To reduce the thickness of a semiconductor device by ball-bonding one end of a wire to a wire connecting section and stitch-bonding the other end of the wire to the first main surface of a semiconductor chip. SOLUTION: After a light emitting diode chip 1 is fixed on an insulating substrate 2, a wire 3 is nearly vertically raised from a conductor layer 9 arranged at a position lower than that of the first electrode 6a of the chip 1, and brought to the first electrode 6a after extending the wire 3 in almost parallel with the main surface of the substrate 2. Namely, one end of the wire 3 is connected to the conductor layer 9 which works as a wire connecting section with a ball-bonded portion 12a, and the other end of the wire 3 is connected to the first element 6a on the first main surface of the light emitting diode chip 1 with a stitch-bonding section 13a.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は、薄型化可能な発光ダイ
オ−ド等の半導体装置及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a light emitting diode which can be reduced in thickness and a method for manufacturing the same.

【０００２】[0002]

【従来の技術】従来の表面実装型の発光ダイオ−ドは、
図1に示すように3−5族化合物半導体から成る発光ダイ
オ−ドチップ（半導体チップ）1と、絶縁性基板2と、ワ
イヤ(金属細線)3と、透明エポキシ樹脂とから成る被覆
体4とを備えている。発光ダイオ−ドチップ1はｐｎ接合
を有する半導体層5の第1の主面に第1の電極6ａを設け、
第2の主面に第2の電極6ｂを設けたものであり、基板2の
第1の接続導体7にＡｇぺ−ストから成る導電性接着剤8
でダイボンデイングされている。基板2は合成樹脂から
成り、ここには前述した第1の接続導体層7の他に第2の
接続導体層9が形成され、更に、第1及び第2の端子１
０、１１を有する。ワイヤ3の一端は第1の電極6ａにボ
−ルボンデイング部分12で結合され、他端は第2の接続
導体層９にステッチボンデイング部分又はウエッチボン
デイング部分１３で結合されている。第１及び第2の端
子１０、１１は第１及び第２の接続導体層7、９に接続
され、基板２の表面から裏面に至るようにコの字状に形
成されている。透明被覆体4はチップ1及びワイヤ３を覆
うように形成されている。2. Description of the Related Art A conventional surface mount type light emitting diode is:
As shown in FIG. 1, a light emitting diode chip (semiconductor chip) 1 made of a group 3-5 compound semiconductor, an insulating substrate 2, a wire (thin metal wire) 3, and a cover 4 made of a transparent epoxy resin are formed. Have. The light emitting diode chip 1 is provided with a first electrode 6a on a first main surface of a semiconductor layer 5 having a pn junction,
A second electrode 6b is provided on the second main surface, and a conductive adhesive 8 made of Ag paste is attached to the first connection conductor 7 of the substrate 2.
It is die bonded. The substrate 2 is made of a synthetic resin, in which a second connection conductor layer 9 is formed in addition to the first connection conductor layer 7 described above.
It has 0 and 11. One end of the wire 3 is connected to the first electrode 6a by a ball bonding portion 12, and the other end is connected to the second connection conductor layer 9 by a stitch bonding portion or a wet bonding portion 13. The first and second terminals 10 and 11 are connected to the first and second connection conductor layers 7 and 9 and are formed in a U-shape from the front surface to the back surface of the substrate 2. The transparent cover 4 is formed so as to cover the chip 1 and the wire 3.

【０００３】[0003]

【発明が解決しようとする課題】ところで、従来のワイ
ヤボンデイング方法ではチップ５上でのワイヤ３の高さ
を大幅に低くすることはできない。即ち、ワイヤボンデ
イング時には、キャピラリから導出されたワイヤの先端
にボ−ルを作り、このボ−ルをチップ５の主面に接続
し、しかる後、キャピラリをチップ５の主面よりも上方
に移動した後に水平方向に移動する。この結果、ワイヤ
３がチップ１の主面から垂直に比較的高く立上った状態
となり、チップ１の主面からの被覆体４の高さ(厚さ)Ｈ
2を、チップ１の主面からワイヤ３の最大高さＨ１より
も大きくすることが必要になり、表面実装型発光ダイオ
−ドの薄型化が困難であった。今、発光ダイオ−ドにつ
いて述べたが他の半導体装置においても同様な問題があ
る。The height of the wire 3 on the chip 5 cannot be significantly reduced by the conventional wire bonding method. That is, at the time of wire bonding, a ball is formed at the tip of the wire led out of the capillary, and this ball is connected to the main surface of the chip 5, and then the capillary is moved above the main surface of the chip 5. Then move horizontally. As a result, the wire 3 rises relatively vertically vertically from the main surface of the chip 1, and the height (thickness) H of the coating 4 from the main surface of the chip 1
2 must be greater than the maximum height H1 of the wire 3 from the main surface of the chip 1, making it difficult to reduce the thickness of the surface-mounted light emitting diode. Although the light emitting diode has been described above, there is a similar problem in other semiconductor devices.

【０００４】そこで、本発明の目的は、薄型化を図るこ
とができる半導体装置及びその製造方法を提供すること
にある。An object of the present invention is to provide a semiconductor device which can be made thinner and a method of manufacturing the same.

【０００５】[0005]

【課題を解決するための手段】上記課題を解決し、上記
目的を達成するための本発明は、第1及び第2の主面を有
している半導体チップと、前記チップの前記第2の主面
が固着されているチップ支持基体と、ワイヤ接続部分を
有する導体と、前記チップの前記第1の主面と前記ワイ
ヤ接続部分とを接続しているワイヤとを備えた半導体装
置であって、前記ワイヤ接続部分が前記チップ支持基体
を基準にして前記チップの前記第1の主面の高さ位置よ
りも低い位置に配置され、前記ワイヤの一端が前記ワイ
ヤ接続部分にボ−ルボンデイングされ、前記ワイヤの他
端が前記チップの前記第1の主面にステッチボンデイン
グ又はウエッジボンデイングされていることを特徴とす
る半導体装置に係るものである。ここで、ステッチボン
デイング又はウエッチボンデイングは、ワイヤをその径
方向に押しつぶして接続する方法を意味する。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems and to achieve the above-mentioned object, the present invention provides a semiconductor chip having first and second main surfaces, and a semiconductor chip having the second main surface. A semiconductor device comprising: a chip supporting base having a main surface fixed thereto; a conductor having a wire connection portion; and a wire connecting the first main surface of the chip and the wire connection portion. The wire connection portion is disposed at a position lower than the height position of the first main surface of the chip with reference to the chip support base, and one end of the wire is ball-bonded to the wire connection portion. A semiconductor device, wherein the other end of the wire is stitch-bonded or wedge-bonded to the first main surface of the chip. Here, stitch bonding or wet bonding means a method of crushing and connecting a wire in its radial direction.

【０００６】なお、請求項２に示すように半導体チップ
を発光ダイオ−ドチップとし、ステッチボンデイング部
分又はウエッチボンデイング部分の面積を、ボ−ルボン
デイング部分の面積よりも小さくすることが望ましい。
また、請求項３に記載の方法で半導体装置を製造するこ
とが望ましい。また、請求項４に示すように補強層を設
けることができる。It is desirable that the semiconductor chip is a light emitting diode chip and the area of the stitch bonding portion or the wet bonding portion is smaller than the area of the ball bonding portion.
It is desirable that the semiconductor device is manufactured by the method described in claim 3. Further, as described in claim 4, a reinforcing layer can be provided.

【０００７】[0007]

【発明の効果】本願各請求項の発明においては、チップ
の第１の主面よりも低い位置のワイヤ接合部分にワイヤ
をボ−ルボンデイングし、チップにワイヤをステッチボ
ンデイング又はウエッチボンデイングするので、ボ−ル
ボンデイングのために生じるワイヤの立上り部分がチッ
プに並置された状態となり、半導体装置全体の薄型化が
可能になる。また、請求項2の発明によれば、半導体発
光素子としての発光ダイオ−ドチップの第１の主面上で
のワイヤの接続面積が従来のボ−ルボンデイングによる
接続部分の面積に比べて小さくなるので、第１の主面か
らの光取り出し効率が良くなる。また、請求項４の発明
によれば、補強層を容易に形成することができる。According to the present invention, the wire is ball-bonded to the wire bonding portion at a position lower than the first main surface of the chip, and the wire is stitch-bonded or wet-bonded to the chip. In addition, the rising portions of the wires generated due to ball bonding are in a state of being juxtaposed to the chip, so that the semiconductor device can be made thinner as a whole. According to the second aspect of the present invention, the connection area of the wire on the first main surface of the light emitting diode chip as the semiconductor light emitting element is smaller than the area of the connection portion by the conventional ball bonding. Therefore, the light extraction efficiency from the first main surface is improved. According to the invention of claim 4, the reinforcing layer can be easily formed.

【０００８】[0008]

【実施形態及び実施例】次に、図２〜図５を参照して本
発明の実施例に係わる半導体発光ダイオ−ド装置を説明
する。但し、図２〜図５において図１と実質的に同一の
部分には同一の符号を付してその説明を省略する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a semiconductor light emitting diode device according to an embodiment of the present invention will be described with reference to FIGS. However, in FIGS. 2 to 5, substantially the same parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

【０００９】図２に示す半導体発光ダイオ−ド装置は、
ワイヤ３の接続構成を変え、この他は図１と同一に構成
したものであり、図１と同様に半導体発光ダイオ−ドチ
ップ１と、チップ支持基体としての絶縁性基板２と、金
属細線としてのワイヤ３と、透明被覆体４とを備えてい
る。The semiconductor light emitting diode device shown in FIG.
The connection configuration of the wires 3 is changed, and the other configuration is the same as that of FIG. 1. Similar to FIG. 1, the semiconductor light emitting diode chip 1, the insulating substrate 2 as a chip supporting base, and the thin metal wires as A wire 3 and a transparent cover 4 are provided.

【００１０】ワイヤ３は線径３０μｍのＡｕ(金)ワイヤ
であり、この一端はボ−ルボンデイング部分１２ａによ
ってワイヤ接続部分としての導体層９に結合され、この
ワイヤ３の他端はステッチボンデイング部分１３ａによ
ってチップ１の第１の主面の第１の電極６ａに結合され
ている。ボ−ルボンデイング部分１２ａの導体層９に対
する接触領域の直径は約１１０〜１２０μｍである。直
径約１００μｍの丸形の第１の電極6ａに対するステッ
チボンデイング部分１３ａの接触領域の平面パタ−ンは
図３に示すように三日月形となっている。三日月形のス
テッチボンデイング部分１３ａの最大径は約９０μｍで
あり、この面積はボ−ルボンデイング部分１２ａの約１
／３程度である。The wire 3 is an Au (gold) wire having a wire diameter of 30 μm. One end of the wire 3 is connected to a conductor layer 9 as a wire connection portion by a ball bonding portion 12a, and the other end of the wire 3 is a stitch bonding portion. The chip 13 is coupled to the first electrode 6a on the first main surface of the chip 1 by 13a. The diameter of the contact area of the ball bonding portion 12a with the conductor layer 9 is about 110 to 120 μm. The plane pattern of the contact area of the stitch bonding portion 13a with the round first electrode 6a having a diameter of about 100 μm is a crescent shape as shown in FIG. The maximum diameter of the crescent-shaped stitch-bonding portion 13a is about 90 μm, and its area is about 1 μm of the ball-bonding portion 12a.
/ 3.

【００１１】ワイヤ３は、チップ１の第１の電極６ａよ
りも低い位置に配置された導体層９からほぼ垂直に立上
った後に基板２の主面にほぼ平行に延びてチップ１の第
１の電極６ａに至っている。ワイヤは第１の電極6ａに
結合されたステッチボンデイング１３ａからチップ１の
主面にほぼ平行に延びている。従って、チップ1の半導
体層５の主面とワイヤ３の間隔は狭い。チップ1は発光
ダイオ−ドチップであり、半導体層5の主面とは同一導
電型領域であるので、ここにワイヤ３が接近又は接触し
ても短絡等の電気的問題が発生しない。The wire 3 rises substantially perpendicularly from the conductor layer 9 disposed at a position lower than the first electrode 6 a of the chip 1, and then extends substantially parallel to the main surface of the substrate 2 so as to extend to the first side of the chip 1. One electrode 6a is reached. The wire extends from the stitch bonding 13a connected to the first electrode 6a substantially parallel to the main surface of the chip 1. Therefore, the distance between the main surface of the semiconductor layer 5 of the chip 1 and the wire 3 is small. Since the chip 1 is a light emitting diode chip and has the same conductivity type as the main surface of the semiconductor layer 5, even if the wire 3 approaches or comes into contact therewith, an electrical problem such as a short circuit does not occur.

【００１２】ワイヤ３は超音波熱圧着方式ワイヤボンデ
イング装置を使用して接続される。この方式でワイヤを
接続する時には、まず、基板2にチップ１を固着した組
立体を用意する。次に、図４に示すように周知のキャピ
ラリ３０からワイヤ３を繰り出して周知の方法でワイヤ
３の先端に金ボ−ル３１を形成し、周知の方法で１５０
〜３００℃程度に加熱された導体層９にボ−ル３１を超
音波を伴って熱圧着し、図５に示すように第１ボンドと
してのボ−ルボンデイング部分１２ａを形成する。次
に、キャピラリ３０を基板2の主面に対して垂直に引き
上げ、しかる後、チップ１の第１の電極6ａの上まで水
平移動し、周知の方法で１５０〜３００℃程度に加熱さ
れた第１の電極６ａにキャピラリ30によってワイヤ３を
超音波を伴って熱圧着し、しかる後、ワイヤ３を鉛直上
方に引っ張ってワイヤ３を切断し、ステッチボンデイン
グ部分１３ａを得る。なお、ボ−ルボンデイング部分１
２ａとステッチボンデイング部分１3ａを形成する時に
キャピラリ３０も加熱することができる。The wires 3 are connected using an ultrasonic thermocompression bonding wire bonding apparatus. When connecting wires by this method, first, an assembly in which the chip 1 is fixed to the substrate 2 is prepared. Next, as shown in FIG. 4, the wire 3 is drawn out from the well-known capillary 30, and a gold ball 31 is formed at the tip of the wire 3 by a well-known method.
A ball 31 is thermocompression-bonded to the conductor layer 9 heated to about 300 DEG C. with ultrasonic waves to form a ball bonding portion 12a as a first bond as shown in FIG. Next, the capillary 30 is pulled up perpendicularly to the main surface of the substrate 2 and then horizontally moved to above the first electrode 6a of the chip 1 and heated to about 150 to 300 ° C. by a known method. The wire 3 is thermocompression-bonded to the first electrode 6a by a capillary 30 with ultrasonic waves. Thereafter, the wire 3 is pulled vertically upward to cut the wire 3, thereby obtaining a stitch-bonded portion 13a. In addition, ball bonding part 1
The capillary 30 can also be heated when forming the stitch bonding portion 13a with 2a.

【００１３】本実施例は次の効果を有する。 （1） ワイヤ３を基板２の導体層９にボ−ルボンデイ
ングし、ワイヤ３を基板２から垂直に立ち上げた後に水
平に移動してチップ１にステッチボンデイングするの
で、チップ1上におけるワイヤ3の立上りが実質的に無く
なり、チップ1の主面上の透明被覆体4の高さＨ3即ち厚
みを0.05ｍｍ程度とすることができ、図1のＨ2(約0．15
ｍｍ)よりも大幅に薄くすることができる。この結果、
発光ダイオ−ド装置の薄型化を達成することができる。 （2） チップ1上のワイヤ3のステッチボンデイング部
分13ａは図3に示すように三日月形になり、この面積は
ボ−ルボンデイング部分12ａの面積よりも小さいので、
ワイヤ3の接続部による光取り出しの妨害が少なくな
り、光取り出し効率が向上する。 （3） 既存のワイヤボンデイング技術で表面実装型発
光ダイオ−ド装置を作製するので、コストの低減を図る
ことができる。This embodiment has the following effects. (1) The wire 3 is ball-bonded to the conductor layer 9 of the substrate 2, and the wire 3 is raised vertically from the substrate 2 and then moved horizontally to be stitch-bonded to the chip 1, so that the wire 3 on the chip 1 1 is substantially eliminated, and the height H3, that is, the thickness of the transparent cover 4 on the main surface of the chip 1 can be reduced to about 0.05 mm.
mm). As a result,
The thickness of the light emitting diode device can be reduced. (2) The stitch-bonded portion 13a of the wire 3 on the chip 1 has a crescent shape as shown in FIG. 3, and this area is smaller than the area of the ball-bonded portion 12a.
Disturbance of light extraction by the connection portion of the wire 3 is reduced, and light extraction efficiency is improved. (3) Since the surface-mount type light emitting diode device is manufactured by the existing wire bonding technology, the cost can be reduced.

【００１４】[0014]

【変形例】本発明は上の実施例に限定されるものでな
く、例えば次の変形が可能なものである。 （1） 超音波を伴なわない熱圧着方式ワイヤボンデイ
ングでワイヤ３の接続を行うことができる。 （2） チップ１の割れを防止するためにチップ１のス
テッチボンデイング部分13ａに図６に示すように補強層
6ｃを設けることができる。即ち、金属電極６ａの上に
ワイヤボンデイング装置を使用してＡｕワイヤ３の先端
にボ−ルを形成し、このボ−ルを押しつぶして補強層６
ｃとすることができる。なお、補強層6ｃの厚みはボ−
ルボンデイングのワイヤ３の立上りの高さＨ1に比べて
小さいので、薄型化が確保される。 （3） チップ１の電極6ａの厚さを従来よりも厚くする
ことができる。また、半導体層５の厚さを従来よりも厚
くすることができる。 （４） ボ−ルボンデイング部分１２ａからのワイヤ３
の立上り部をチップ１とステッチボンデイング部分１３
ａとの合計の高さ以下に抑えることができる。 （5） ワイヤ３の太さを例えば２５〜５０μｍ程度の
範囲で変えることができる。[Modifications] The present invention is not limited to the above embodiment, and for example, the following modifications are possible. (1) The wire 3 can be connected by thermocompression bonding without ultrasonic waves. (2) As shown in FIG. 6, a reinforcing layer is provided on the stitch bonding portion 13a of the chip 1 to prevent the chip 1 from cracking.
6c can be provided. That is, a ball is formed at the tip of the Au wire 3 using a wire bonding device on the metal electrode 6a, and the ball is crushed to form the reinforcing layer 6.
c. The thickness of the reinforcing layer 6c is
Since the rising height H1 of the bonding wire 3 is small, the thickness can be reduced. (3) The thickness of the electrode 6a of the chip 1 can be made larger than before. Further, the thickness of the semiconductor layer 5 can be made larger than before. (4) Wire 3 from ball bonding portion 12a
The rising part of the tip 1 and the stitch bonding part 13
The height can be suppressed to a value equal to or less than the total height of a. (5) The thickness of the wire 3 can be changed within a range of, for example, about 25 to 50 μm.

【図面の簡単な説明】[Brief description of the drawings]

【図1】従来の発光ダイオ−ドを示す断面図である。FIG. 1 is a sectional view showing a conventional light emitting diode.

【図2】本発明の実施例の発光ダイオ−ド装置を示す断
面図である。FIG. 2 is a sectional view showing a light emitting diode device according to an embodiment of the present invention.

【図3】図2のステッチボンデイング部分とチップ上面を
示す平面図である。FIG. 3 is a plan view showing a stitch bonding portion and a chip upper surface in FIG. 2;

【図4】ボ−ルボンデイングを説明するための断面図で
ある。FIG. 4 is a cross-sectional view for explaining ball bonding.

【図5】ステッチボンデイングの直前の状態を示す断面
図である。FIG. 5 is a cross-sectional view showing a state immediately before stitch bonding.

【図６】変形例の発光ダイオ−ド装置の一部を示す断面
図である。FIG. 6 is a sectional view showing a part of a light emitting diode device according to a modification.

【符号の説明】[Explanation of symbols]

1発光ダイオ−ドチップ 2基板 3ワイヤ 4被覆体 5半導体層 6ａ、6ｂ 電極 7、9導体層 12ａ ボ−ルボンデイング部分 13ａ ステッチボンデイング部分 1 Light emitting diode chip 2 Substrate 3 Wire 4 Coating 5 Semiconductor layer 6a, 6b Electrode 7, 9 Conductive layer 12a Ball bonding part 13a Stitch bonding part

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 第1及び第2の主面を有している半導体チ
ップと、前記チップの前記第2の主面が固着されている
チップ支持基体と、ワイヤ接続部分を有する導体と、前
記チップの前記第1の主面と前記ワイヤ接続部分とを接
続しているワイヤとを備えた半導体装置であって、 前記ワイヤ接続部分が前記チップ支持基体を基準にして
前記チップの前記第1の主面の高さ位置よりも低い位置
に配置され、前記ワイヤの一端が前記ワイヤ接続部分に
ボ−ルボンデイングされ、前記ワイヤの他端が前記チッ
プの前記第1の主面にステッチボンデイング又はウエッ
ジボンデイングされていることを特徴とする半導体装
置。A semiconductor chip having first and second main surfaces, a chip support base to which the second main surface of the chip is fixed, a conductor having a wire connection portion, A semiconductor device comprising a wire connecting the first main surface of the chip and the wire connection portion, wherein the wire connection portion is the first of the chip with respect to the chip support base. One end of the wire is ball-bonded to the wire connection portion, and the other end of the wire is stitch-bonded or wedged to the first main surface of the chip. A semiconductor device characterized by being bonded. 【請求項2】 前記半導体チップは、半導体発光ダイオ
−ドチップであり、前記第1の主面におけるステッチボ
ンデイング部分又はウエッジボンデイング部分の面積は
前記ワイヤ接続部分におけるボ−ルボンデイング部分の
面積よりも小さいことを特徴とする請求項1記載の半導
体装置。2. The semiconductor chip is a semiconductor light emitting diode chip, and an area of a stitch bonding portion or a wedge bonding portion on the first main surface is smaller than an area of a ball bonding portion of the wire connection portion. 2. The semiconductor device according to claim 1, wherein: 【請求項3】 第1及び第2の主面を有している半導体チ
ップと、前記チップの前記第2の主面が固着されている
チップ支持基体と、前記支持基体を基準にして前記チッ
プの前記第1の主面の高さ位置よりも低い位置に配置さ
れたワイヤ接続部分とを有する組立体を用意する工程
と、 キャピラリから繰り出されたワイヤの先端にボ−ルを形
成し、前記ワイヤ接続部分にワイヤをボ−ルボンデイン
グする工程と、 前記キャピラリからワイヤを繰り出しながら前記キャピ
ラリを前記チップの前記第1の主面上に移動し、前記第1
の主面にワイヤをステッチボンデイング又はウエッジボ
ンデイングする工程とを備えた半導体装置の製造方法。3. A semiconductor chip having first and second main surfaces, a chip support base to which the second main surface of the chip is fixed, and the chip based on the support base. Preparing an assembly having a wire connection portion disposed at a position lower than the height position of the first main surface; and forming a ball at the tip of the wire fed out of the capillary, Ball-bonding a wire to a wire connecting portion; moving the capillary onto the first main surface of the chip while feeding the wire from the capillary;
Stitch-bonding or wedge-bonding a wire on the main surface of the semiconductor device. 【請求項４】 前記半導体チップのステッチボンデイン
グ又はウエッチボンデイングする部分に、金属電極と、
この金属電極の上にワイヤの先端にボ−ルを形成し、こ
のボ−ルを押しつぶしたものから成る補強層とを設ける
ことを特徴とする請求項３記載の半導体装置の製造方
法。4. A metal electrode is provided on a portion of the semiconductor chip to be stitch-bonded or wet-bonded.
4. The method according to claim 3, wherein a ball is formed at the tip of the wire on the metal electrode, and a reinforcing layer formed by crushing the ball is provided.
JP11189246A 1999-07-02 1999-07-02 Semiconductor device and its manufacture Pending JP2001015542A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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