JP2001013522A - Electrooptical device, manufacture of electrooptical device and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electrooptical device having a structure with high precision and high productivity. SOLUTION: The liquid crystal device is provided with a liquid crystal layer 50 held between a pair of substrates and pixel electrodes 9a arranged in a matrix on a TFT array substrate 10. Data lines with light shielding property 6a are buried in trenches 4t provided on a first interlayer insulation layer 4 flush. A second interlayer insulation layer 7, the pixel electrodes 9a and an alignment layer 16 are flatly formed compatibly with the upper surface of the first interlayer insulation layer 4 and no alignment defect is generated. Furthermore, gaps between adjacent pixel electrodes 9a are light-shielded with the data lines 6a.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention belongs to the technical field of an electro-optical device of an active matrix drive system driven by a thin film transistor (hereinafter, referred to as TFT), and particularly to an electro-optical device having a high definition and high productivity structure. Belongs to the technical field.

[0002]

2. Description of the Related Art In an electro-optical device of an active matrix driving system by TFT driving, a large number of scanning lines and data lines arranged vertically and horizontally and a large number of TFTs corresponding to their respective intersections are formed on a TFT array substrate. Is provided. When a scanning signal is supplied to the gate electrode of the TFT via a scanning line, the TFT is turned on, and an image signal supplied to the source region of the semiconductor layer via the data line is supplied to the source-drain of the TFT. It is supplied to the pixel electrode through the space. And by the electro-optical response obtained by applying a voltage corresponding to the image signal to the liquid crystal layer,
It modulates the light incident on the liquid crystal layer.

An alignment film for controlling the alignment of an electro-optical material such as a liquid crystal composition is formed on the pixel electrode, but the pattern and the unevenness on the lower layer cause unevenness in the pixel electrode and the alignment film. In the vicinity of such concavities and convexities, there is a problem that poor alignment and abnormal alignment of the liquid crystal layer occur, which causes adverse effects such as light leakage and a decrease in contrast. As a method of avoiding such light leakage, there is a method of forming a light-shielding film on a TFT array substrate or a counter substrate, or incorporating a light-shielding film in a part of a laminated structure of the TFT array substrate.

On the other hand, if the pixel electrode and the alignment film can be flattened, light leakage as described above can be avoided. In order to form the pixel electrode flat, a method using a flattening film such as an organic film has been proposed. However, in particular, in the case of a projection type display device using a light valve such as a liquid crystal panel, there is a problem that the organic film is deteriorated by ultraviolet rays applied to the liquid crystal panel, thereby lowering the reliability of the liquid crystal panel. Further, there is a problem that it is difficult to control the layer thickness of a planarizing film such as an organic film, and it is particularly difficult to form a thick film. Further, for example, when the flattening film is formed of an organic film or the like, TF
There is a problem that stress is applied to the T-array substrate and the display performance and reliability of the electro-optical device are reduced.

Conventionally, patterning of signal lines and the like of a liquid crystal panel has been performed by pattern etching using a so-called photoetching process. However, this method is required to cope with higher definition which has been required more and more recently. There is a problem that is difficult.

[0006]

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and an object of the present invention is to provide an electro-optical device having a structure with high contrast and high productivity, and a method of manufacturing the same. As an issue. Another object of the present invention is to provide an electro-optical device capable of coping with high definition and high-speed operation, and a method of manufacturing the same.

[0007]

In order to solve such a problem, the present invention employs the following configuration.

An electro-optical device according to the present invention includes a substrate, a switching element provided on the substrate, a first interlayer insulating film provided to cover the switching element and planarized, Embedded in the first interlayer insulating film,
A data line connected to the switching element, a second interlayer insulating film provided on the first interlayer insulating film, and a pixel provided on the second interlayer insulating film and connected to the switching element And an electrode.

That is, in the present invention, the first interlayer insulating film covering the switching element such as a thin film transistor is substantially flat, and the data lines are embedded in the first interlayer insulating film. Further, the second interlayer insulating film is formed on the flattened first interlayer insulating film and thus is substantially flat. For example, in the present invention, even if the second interlayer insulating film is formed by a method that follows the lower layer shape such as a CVD method, the second interlayer insulating film is formed flat. For this reason, in the electro-optical device according to the present invention, the pixel electrodes and the alignment film are also arranged flat, and light leakage can be reduced. In addition, pixel electrodes that cause light leakage,
Since there is no unevenness in the alignment film, there is no need to provide a light-shielding film that covers these uneven areas.

[0010] In another aspect of the electro-optical device according to the present invention, the data line is made of a light-shielding conductor. Such data lines include, for example, Al, Cu, Ti, Cr,
It may be made of a simple metal, an alloy, or a silicide containing at least one selected from the group consisting of W, Ta, Mo, and Pb. By doing so, the data line can also function as a light shielding film. In this case, since the signal line is embedded in the first interlayer insulating film, no irregularities are caused on the pixel electrode and the alignment film due to the data line, and therefore, it is not necessary to newly provide a light shielding film.

According to another aspect of the electro-optical device of the present invention, a plurality of the pixel electrodes are arranged in a matrix on the second interlayer insulating film, and a region between the adjacent pixel electrodes is the data line. And is facing. Thus, for example, the gap between the pixel electrodes adjacent to each other in the direction orthogonal to the direction in which the data lines extend can be covered with the data lines having a light shielding function. In this case, in order to effectively reduce light leakage, it is preferable that the line width of the data line be larger than the gap between adjacent pixel electrodes.

Another aspect of the electro-optical device according to the present invention further includes a capacitive element provided on the substrate, wherein the capacitive element faces the data line. In an electro-optical device such as a liquid crystal display device, generally, a so-called storage capacitor is provided. In the present invention, this capacitive element may be covered by a data line having a light shielding film.

As the switching element, a two-terminal element such as a thin film transistor having a semiconductor film having a source region, a channel region and a drain region, and a TFD (Thin Film Diode) can be used. When a thin film transistor is used as a switching element, the source region of the semiconductor film may be connected to the data line via a contact hole provided in the first interlayer insulating film. Further, the drain region of the semiconductor film may be connected to the pixel electrode via a contact hole provided in the first interlayer insulating film and the second interlayer insulating film.

In the method of manufacturing an electro-optical device according to the present invention, a step of forming a thin film transistor on a substrate; a step of forming a first interlayer insulating film so as to cover the thin film transistor and to be planarized; Forming a groove in the interlayer insulating film, forming a conductor film on the first interlayer insulating film and filling the groove in the first interlayer insulating film, selectively forming a groove in the first interlayer insulating film; Polishing the conductive film and the first interlayer insulating film so that the conductive film is exposed.

That is, in the present invention, the first interlayer insulating film is formed so as to cover the TFT array and to be planarized. Then, a groove (trench) is formed in the flattened first interlayer insulating film, and the data line is embedded in the groove.
The embedding of the data line may be performed by a damascene method.

After that, a step of forming a second interlayer insulating film on the first interlayer insulating film and a step of forming a pixel electrode on the second interlayer insulating film can also reduce the surface of the second interlayer insulating film. It is formed flat, so that the pixel electrode and the alignment film can also be formed flat.

In the present invention, the step of flattening the first interlayer insulating film may be performed by a chemical mechanical polishing method. The step of forming the conductor film may be performed by a sputtering method. Further, the step of polishing the conductor film and the first interlayer insulating film may be performed by a chemical mechanical polishing method. Here, the chemical mechanical polishing method refers to a method using both chemical leaching and mechanical polishing.

An electronic apparatus according to the present invention includes a light valve having the above-described electro-optical device according to the present invention or the electro-optical device manufactured by the method for manufacturing an electro-optical device, a light source, and an optical system for projecting incident light. Between the two. The light from the light source is modulated by a light valve, guided to the projection optical system, and projected on, for example, a screen. The electro-optical device according to the present invention can project a high-quality image because light leakage of reflected light is small.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

(Configuration and Operation of First Embodiment of Liquid Crystal Device) The configuration and operation of the liquid crystal device according to the first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is an equivalent circuit of various elements, wiring, and the like in a plurality of pixels formed in a matrix forming an image forming area of a liquid crystal device. FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, light-shielding films, etc. are formed, and FIG. FIG. 4 is a sectional view taken along the line BB ′ of FIG. FIG.
FIG. 3 is a block diagram illustrating a specific configuration of a pixel unit and peripheral circuits on a T array substrate. In FIGS. 3 and 4, the scale is appropriately set for each layer and each member so that each layer and each member have a size that can be recognized in the drawings.

In FIG. 1, a plurality of unit pixel regions formed in a matrix forming an image display region of the liquid crystal device of the present embodiment control a plurality of pixel electrodes 9a and a plurality of pixel electrodes 9a formed in a matrix. A data line 6a to which an image signal is supplied is
It is electrically connected to 30 sources. Data line 6a
, Sn to be written may be supplied line-sequentially in this order, or may be supplied to a plurality of adjacent data lines 6a for each group. The scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning line 3a is provided at a predetermined timing.
The scanning signals G1, G2,..., Gm are applied to a in a pulse-wise manner in this order. The pixel electrode 9a is electrically connected to the drain of the TFT 30. By closing the switch of the TFT 30, which is a switching element, for a certain period, the image signals S1, S2,... Write at a predetermined timing. The image signals S1, S2,..., Sn of a predetermined level written in the liquid crystal via the pixel electrodes 9a are provided by counter electrodes (described later) formed on a counter substrate (described later).
Is maintained for a certain period of time. The liquid crystal modulates light by changing the orientation and order of the molecular assembly according to the applied voltage level, thereby enabling gray scale display. Here, in order to prevent the held image signal from leaking, a storage capacitor 70 is added in parallel with a liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode.

In FIG. 2, a plurality of transparent pixel electrodes 9a are arranged in a matrix on a TFT array substrate of a liquid crystal device.
(The outline is indicated by a dotted line portion 9a ′), and the data line 6a, the scanning line 3a, and the capacitor line 3b are provided along the vertical and horizontal boundaries of the pixel electrode 9a.
The data line 6a is electrically connected to a later-described source region of the semiconductor layer 1a such as a polysilicon film via the contact hole 5, and the pixel electrode 9a is connected to a later-described source region of the semiconductor layer 1a via the contact hole 8. Is electrically connected to the drain region. Further, the scanning line 3a is arranged so as to face a channel region (a hatched region on the right in the figure) of the semiconductor layer 1a, and the scanning line 3a functions as a gate electrode.

The capacitance line 3b has a main line portion extending substantially linearly along the scanning line 3a (that is, the scanning line 3a in a plan view).
(A first region formed along the data line 6a) and a protruding portion (upward in the figure) protruding along the data line 6a from a point intersecting the data line 6a (ie, the data line 6a extending along the second region 6a).

A plurality of first light-shielding films 11a are provided in a region indicated by oblique lines rising to the right in the drawing. More specifically, the first light-shielding films 11a are provided at positions where the TFTs including the channel region of the semiconductor layer 1a in the pixel portion are covered when viewed from the TFT array substrate side.
A main line portion that extends linearly along the scanning line 3a opposite to the main line portion of the capacitor line 3b, and a step side (ie, downward in the drawing) adjacent to the data line 6a from a portion that intersects the data line 6a. And a protruding projection. The tip of the downward protruding portion in each stage (pixel row) of the first light-shielding film 11a overlaps the tip of the upward protruding portion of the capacitor line 3b in the next stage below the data line 6a. A contact hole 13 for electrically connecting the first light-shielding film 11a and the capacitance line 3b to each other is provided in the overlapping portion. That is,
In the present embodiment, the first light-shielding film 11a is electrically connected to the preceding or subsequent capacitive line 3b through the contact hole 13.

Next, as shown in the cross-sectional view of FIG. 3, the liquid crystal device comprises a TFT array substrate 10 which is an example of one transparent substrate, and an example of another transparent substrate which is disposed to face the TFT array substrate. And the opposing substrate 20. The TFT array substrate 10 is made of, for example, a quartz substrate, and has a counter substrate 20.
Is made of, for example, a glass substrate or a quartz substrate. The pixel electrode 9a is provided on the TFT array substrate 10, and an alignment film 16 on which a predetermined alignment process such as a rubbing process is performed is provided above the pixel electrode 9a. The pixel electrode 9a is, for example,
It is made of a transparent conductive film such as an ITO film (indium tin oxide film). The alignment film 16 is made of, for example, an organic film such as a polyimide thin film.

On the other hand, a counter electrode (common electrode) 21 is provided on the entire surface of the counter substrate 20, and an alignment film 22 on which a predetermined alignment process such as a rubbing process is performed is provided below the counter electrode. Is provided. The counter electrode 21 is, for example, I
It is made of a transparent conductive thin film such as a TO film. Also, the alignment film 22
Consists of an organic thin film such as a polyimide thin film.

As shown in FIG. 3, each pixel electrode 9a is provided on the TFT array substrate 10 at a position adjacent to each pixel electrode 9a.
Pixel switching TFT3 for switching control of a
0 is provided. In FIG. 3, a pixel switching TFT 30 has an LDD (Lightly Doped Drain) structure, and includes a scanning line 3a, a channel region 1a 'of a semiconductor layer 1a in which a channel is formed by an electric field from the scanning line 3a, and a scan. A gate insulating film 2 that insulates the line 3a from the semiconductor layer 1a, a data line 6a, a low-concentration source region (source-side LDD region) 1b and a low-concentration drain region (drain-side LDD region) 1c of the semiconductor layer 1a, and a semiconductor layer 1a High-concentration source region 1d and high-concentration drain region 1e. A corresponding one of the plurality of pixel electrodes 9a is connected to the high-concentration drain region 1e. The source regions 1b and 1d and the drain regions 1c and 1e have a predetermined concentration of n-type or p-type impurity ions in the semiconductor layer 1a depending on whether an n-type or p-type channel is formed, as described later. Is formed by doping.
An n-type channel TFT has the advantage of a high operating speed, and is often used as a pixel switching TFT 30 that is a pixel switching element. In the present embodiment, in particular, the data line 6a is formed of a light-shielding thin film such as a metal film of Al or Cu or an alloy film of metal silicide. Further, a first interlayer insulating film having a contact hole 5 leading to the high-concentration source region 1d and a contact hole 8 leading to the high-concentration drain region 1e is formed on the scanning line 3a, the gate insulating film 2, and the base insulating film 12, respectively. Membrane 4
Are formed. Through the contact hole 5 to the source region 1b, the data line 6a is connected to the high concentration source region 1
d. Further, a second interlayer insulating film 7 having a contact hole 8 to the high-concentration drain region 1e is formed on the data line 6a and the first interlayer insulating film 4. The pixel electrode 9a is electrically connected to the high-concentration drain region 1e via the contact hole 8 to the high-concentration drain region 1e. The aforementioned pixel electrode 9a
Is provided on the upper surface of the second interlayer insulating film 7 thus configured. The pixel electrode 9a and the high-concentration drain region 1e are connected to the same Al, Cu,
The same polysilicon film as b may be relayed for electrical connection.

The pixel switching TFT 30 preferably has an LDD structure as described above, but may have an offset structure in which impurity ions are not implanted into the low-concentration source region 1b and the low-concentration drain region 1c. A self-aligned TFT in which impurity ions are implanted at a high concentration using 3a as a mask to form high-concentration source and drain regions in a self-aligned manner may be used.

As shown in FIG. 3, the opposing substrate 20 is provided with a second light-shielding film 23 in a region other than the opening region of each pixel portion. For this reason, the incident light does not enter the channel region 1a 'and the LDD (Lightly Doped Drain) regions 1b and 1c of the semiconductor layer 1a of the pixel switching TFT 30 from the side of the counter substrate 20. Further, the second light-shielding film 23 has functions such as improvement of contrast and prevention of color mixture of color materials.

A sealing material (to be described later) (see FIGS. 10 and 11) is provided between the TFT array substrate 10 and the opposing substrate 20, which are configured as described above and in which the pixel electrode 9a and the opposing electrode 21 face each other. The liquid crystal is sealed in the space surrounded by (), and the liquid crystal layer 50 is formed. The liquid crystal layer 50 has the alignment film 16 in a state where no electric field is applied from the pixel electrode 9a.
A predetermined orientation state is taken by (2) and (2). The liquid crystal layer 50
For example, it is composed of a liquid crystal in which one or several kinds of nematic liquid crystals are mixed. The sealing material is an adhesive made of, for example, a photo-curing resin or a thermosetting resin for bonding the two substrates 10 and 20 around them, and a glass for setting a distance between the two substrates to a predetermined value. Spacers such as fibers or glass beads are mixed.

As shown in FIG. 3, the pixel switching T
First light-shielding films 11a are provided between the TFT array substrate 10 and the pixel switching TFTs 30 at positions facing the FTs 30, respectively. First light shielding film 11
a is preferably an opaque refractory metal Ti, C
It is composed of a single metal, an alloy, a metal silicide or the like containing at least one of r, W, Ta, Mo and Pd. With such a material, the first light-shielding film 11a is not broken or melted by high-temperature processing in the step of forming the pixel switching TFT 30 performed after the step of forming the first light-shielding film 11a on the TFT array substrate 10. I can do it. Since the first light-shielding film 11a is formed, return light and the like from the side of the TFT array substrate 10 are transmitted to the channel region 1a 'of the pixel switching TFT 30 or the LDD.
The incident on the regions 1b and 1c can be prevented beforehand, and the pixel switching TFT 30
Does not deteriorate.

Further, a base insulating film 12 is provided between the first light shielding film 11a and the plurality of pixel switching TFTs 30. The base insulating film 12 is formed by forming the semiconductor layer 1a constituting the pixel switching TFT 30 into a first light shielding film 11a.
It is provided for electrical insulation from

As shown in FIGS. 3 and 4, in the liquid crystal device according to the present embodiment, the data line 6a has the first interlayer insulating film 4 planarized so as to be flush with the surface of the first interlayer insulating film 4. Embedded in A second interlayer insulating film 7 is provided on the flat first interlayer insulating film 4 and data line 6a. Since the first interlayer insulating film 4 is flat and the data lines 6a are not formed on the first interlayer insulating film 4 in a convex shape, the second
The interlayer insulating film 7 can also be formed flat by, for example, a CVD method.

Further, in this example, the data line 6a is formed of a light-shielding conductor, and faces the gap between the adjacent pixel electrodes as shown in FIG. 4, that is, the end of the adjacent pixel electrode. Are provided so as to overlap the data lines, and the data lines also function as light-shielding films for shielding light. When the data line 6a is formed in a convex shape on the first interlayer insulating film 4, when the second interlayer insulating film 7 is formed in a conformal manner, the pixel electrode 9a and the alignment film 16 have unevenness due to the data line. Will have. Therefore, in order to improve the contrast of the liquid crystal device, it is necessary to provide a light-shielding film that covers these uneven regions. In the present invention, the pixel electrode and the alignment film are also arranged flat, so that light leakage can be reduced. In addition, since there is no unevenness of the pixel electrode and the alignment film that causes light leakage, it is not necessary to provide a light-shielding film covering these uneven areas.

In this embodiment, the gate insulating film 2 is used as a dielectric film extending from a position facing the scanning line 3a, and the semiconductor film 1a is used as a first storage capacitor electrode 1f. A storage capacitor 70 is formed by using a part of the capacitor line 3b facing these as a second storage capacitor electrode. More specifically, a high-concentration drain region 1e of the semiconductor layer 1a extends below the data line 6a and the scanning line 3a, and an insulating film is formed on a portion of the capacitance line 3b extending along the data line 6a and the scanning line 3a. The first storage capacitor electrode (semiconductor layer) 1f is opposed to the first storage capacitor electrode 2 via the second storage capacitor electrode 2. In particular, since the insulating film 2 as a dielectric of the storage capacitor 70 is the same film as the gate insulating film 2 of the TFT 30 formed on the polysilicon film by high-temperature oxidation, it can be a thin and high withstand voltage insulating film. The capacitor 70 can be configured as a large-capacity storage capacitor with a relatively small area. In this embodiment, the storage capacitor 70 is covered by the data line 6a.

Further, in the storage capacitor 70, as can be seen from FIGS. 2, 3 and 4, the first light shielding film 11a is provided on the opposite side of the capacitor line 3b as the second storage capacitor electrode. By being arranged opposite to 1f as a third storage capacitor electrode via the base insulating film 12 (see the storage capacitor 70 on the right side of FIG. 3), the storage capacitor is further provided. That is, in the present embodiment, a double storage capacitor structure in which storage capacitors are provided on both sides of the first storage capacitor electrode 1f is constructed, and the storage capacitance further increases. Therefore, the function of the liquid crystal device for preventing flicker and burn-in in a display image is improved. As a result, the space under the data line 6a and the area outside the opening area, that is, the area where the liquid crystal disclination occurs along the scanning line 3a (that is, the area where the capacitance line 3b is formed) are effectively used. Thus, the storage capacitance of the pixel electrode 9a can be increased.

In this embodiment, each capacitance line 3b is electrically connected to the first light-shielding film 11a via the contact hole 13. Therefore, the resistance of the capacitance line 3b is
It is significantly reduced by the resistance of the first light shielding film 11a. In this embodiment, the first light-shielding film 11a (and the capacitance line 3b electrically connected thereto) is electrically connected to a constant potential source, and the first light-shielding film 11a and the capacitance line 3b are set to a constant potential. You. Therefore, the potential fluctuation of the first light-shielding film 11a does not adversely affect the pixel switching TFT 30 that is disposed to face the first light-shielding film 11a. Also, the capacitance line 3b
Can function well as a second storage capacitor electrode of the storage capacitor 70.

(Manufacturing Process of First Embodiment of Liquid Crystal Device) Next, a manufacturing process of the first embodiment of the liquid crystal device having the above configuration will be described with reference to FIGS. 5 to 8 are process diagrams showing each layer on the TFT array substrate side in each process corresponding to the AA ′ section in FIG. 2 as in FIG.

As shown in step (1) of FIG. 5, a TFT array substrate 10 such as a quartz substrate or hard glass is prepared. Here, annealing is preferably performed in an inert gas atmosphere such as N ₂ (nitrogen) and at a high temperature of about 900 to 1300 ° C., and a pre-treatment is performed so that distortion generated in the TFT array substrate 10 in a high-temperature process performed later is reduced. Keep it. That is, the TFT array substrate 10 is preliminarily heat-treated at the same temperature or higher in accordance with the highest processing temperature at the highest temperature in the manufacturing process.

The TFT array substrate 1 thus processed
0, a metal such as Ti, Cr, W, Ta, Mo and Pb, or a metal alloy film such as metal silicide is sputtered with a layer thickness of about 100 to 500 nm, preferably about 20 nm.
A light-shielding film 11 having a thickness of 0 nm is formed.

Subsequently, as shown in step (2), a resist mask corresponding to the pattern of the first light-shielding film 11a (see FIG. 2) is formed on the formed light-shielding film 11 by photolithography. Light shielding film 11 through a mask
The first light shielding film 11a is etched by etching
To form

Next, as shown in step (3), a TEOS (tetra-ethyl-ortho-silicate) gas, TEB (tetra-ethyl) is formed on the first light-shielding film 11a by, for example, normal pressure or reduced pressure CVD.・ Boat rate) Gas, T
The underlying insulating film 12 made of a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like is formed using MOP (tetramethyl oxyphosphate) gas or the like. The layer thickness of the base insulating film 12 is, for example, about 500 to 2000 nm.

Next, as shown in step (4), a temperature of about 450 to 550 ° C., preferably about 500
Flow rate of about 400 to 600 cc /
An amorphous silicon film is formed by low-pressure CVD (for example, CVD at a pressure of about 20 to 40 Pa) using a monosilane gas, a disilane gas, or the like for min. Thereafter, in a nitrogen atmosphere at about 600 to 700 ° C. for about 1 to 10 hours,
Preferably, the polysilicon film 1 is formed to a thickness of about 50 to 200 nm by performing an annealing process for 4 to 6 hours.
Preferably, the solid phase is grown to a thickness of about 100 nm.

Next, as shown in step (5), a semiconductor layer 1a having a predetermined pattern as shown in FIG. 2 is formed by a photolithography step, an etching step, or the like, as shown in step (5). That is, in particular, the region where the capacitance line 3b is formed below the data line 6a and the region where the capacitance line 3b is formed along the scanning line 3a are located in the pixel switching TF.
A first storage capacitor electrode 1f extending from the semiconductor layer 1a constituting T30 is formed.

Next, as shown in a step (6), the first layer together with the semiconductor layer 1a constituting the pixel switching TFT 30 is formed.
By thermally oxidizing the storage capacitor electrode 1f at a temperature of about 900 to 1300 ° C., preferably about 1000 ° C., a relatively thin thermally oxidized silicon film having a thickness of about 30 nm is formed. A high-temperature silicon oxide film (HTO film) or a silicon nitride film is deposited to a relatively thin thickness of about 50 nm to form a pixel switching T having a multilayer structure.
The gate insulating film 2 for capacitance formation is formed together with the gate insulating film 2 of the FT 30 (see FIG. 3). As a result, the semiconductor layer 1
a and the thickness of the first storage capacitor electrode 1f are about 30 to 150
nm, preferably about 35 to 50 nm, and the gate insulating film 2 has a thickness of about 20 to 150 nm, preferably about 30 to 100 nm. By shortening the high-temperature thermal oxidation time in this way, it is possible to prevent warpage due to heat, particularly when a large wafer of about 8 inches is used. However, the gate insulating film 2 having a single-layer structure may be formed only by thermally oxidizing the polysilicon layer 1.

Although not particularly limited in the step (6), the semiconductor layer portion serving as the first storage capacitor electrode 1f is doped with, for example, P ions at a dose of about 3 × 10 ¹² / cm ² to obtain a low resistance. You may make it.

Next, in step (7), the base insulating film 1
Second, a contact hole 13 reaching the first light-shielding film 11a is formed by dry etching such as reactive ion etching, reactive ion beam etching, or wet etching. At this time, there is an advantage that opening the contact hole 13 or the like by anisotropic etching such as reactive etching or reactive ion beam etching can make the opening shape almost the same as the mask shape. However, if the dry etching and the wet etching are performed in combination, the contact holes 13 and the like can be tapered, so that there is an advantage that disconnection during wiring connection can be prevented.

Next, as shown in step (8), low pressure CVD
After depositing a polysilicon layer 3 by a method such as phosphorus (P)
Is thermally diffused to make the polysilicon film 3 conductive. Or P
A doped silicon film in which ions are introduced simultaneously with the formation of the polysilicon film 3 may be used.

Next, as shown in a step (9) of FIG. 6, a capacitor line 3b is formed together with a scanning line 3a having a predetermined pattern as shown in FIG. 2 by a photolithography step using a resist mask, an etching step and the like. I do. The layer thickness of the capacitance line 3b and the scanning line 3a is, for example, about 350 nm.

Next, as shown in the step (10), when the pixel switching TFT 30 shown in FIG. 3 is an n-channel type TFT having an LDD structure, the semiconductor layer 1a first includes the low-concentration source region 1b and the low-concentration source region 1b. In order to form the concentration drain region 1c, the scan line 3a (gate electrode) is used as a diffusion mask and the impurity ions 60 of a group V element such as P are doped at a low concentration (for example, P ions are 1-3 × 10 ¹³ / cm 3). (Dose of ² ). Thereby, the semiconductor layer 1a below the scanning line 3a becomes the channel region 1a '. The resistance of the capacitance line 3b and the scanning line 3a is also reduced by the doping of the impurity.

Subsequently, as shown in step (11), in order to form the high-concentration source region 1b and the high-concentration drain region 1c constituting the pixel switching TFT 30, the resist is formed using a mask wider than the scanning line 3a. After the layer 62 is formed on the scanning line 3a, a high concentration of impurity ions 61 of a group V element such as P (for example, P ions are
Doping (at a dose of 10 ¹⁵ / cm ² ). Also,
When the pixel switching TFT 30 is of a p-channel type, a low concentration source region 1b and a low concentration drain region 1c, and a high concentration source region 1d and a high concentration drain region 1e are formed in the semiconductor layer 1a. Doping is performed using an impurity ion of a group element. For example,
A TFT having an offset structure may be used without performing low concentration doping.
A self-aligned TFT may be formed by an ion implantation technique using ions or the like.

The resistance of the capacitance line 3b and the scanning line 3a is further reduced by the impurity doping.

Further, the step (10) and the step (11) are repeated again, and a p-channel TFT can be formed by performing impurity ions of a group III element such as B (boron) ion. Thereby, the n-channel TFT
In addition, the data line driving circuit 101 and the scanning line driving circuit 104 having a complementary structure composed of a p-channel TFT and a p-channel TFT can be formed in a peripheral portion on the TFT array substrate 10. As described above, in the present embodiment, since the semiconductor layer of the pixel switching TFT 30 is formed of polysilicon, the data line driving circuit 101 and the scanning line driving circuit 104 are formed in substantially the same process when the pixel switching TFT 30 is formed. This is advantageous in manufacturing.

Next, as shown in step (12), for example, using normal pressure or low pressure CVD, TEOS gas, or the like, so as to cover the capacitance line 3b and the scanning line 3a together with the scanning line 3a in the pixel switching TFT 30. , NSG, PS
A first interlayer insulating film 4 made of a silicate glass film such as G, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like is formed, and the surface is flattened by a CMP method or the like. The thickness of the first interlayer insulating film 4 is preferably about 500 to 1500 nm.

Next, in the step (13), an annealing process at about 1000 ° C. is performed for about 20 minutes to activate the high concentration source region 1d and the high concentration drain region 1e.
The contact hole 5 for the data line 31 is formed by dry etching such as reactive ion etching or reactive ion beam etching or by wet etching. Further, a contact hole for connecting the scanning line 3a and the capacitance line 3b to a wiring (not shown) is also formed in the first interlayer insulating film 4 in the same process as the contact hole 5.

Next, in the step (14), the data line 6a
4t is formed by dry etching such as reactive ion etching or reactive ion beam etching or by wet etching. The trench 4t may be formed in the same step as the contact hole 5.

Next, as shown in step (15) of FIG. 7, a low-resistance metal or metal such as Al or Cu, which is light-shielding, is formed on the first interlayer insulating film 4 in which the trench 4t is formed by sputtering or the like. Approximately 100 to 500
Then, as shown in a step (16), the data line 6a is selectively buried in the trench 4t, and the first interlayer insulating film 4 is exposed in other regions. As described above, polishing is performed by a CMP method or the like. In the present invention, the data lines 6a are buried by such a method, so that the data lines 6a can be formed finer than the conventional method in which the data lines 6a are formed by a photolithography process, an etching process, or the like. Can be. Therefore, the arrangement pitch of the pixels can be reduced, and a high-definition and bright liquid crystal device can be provided.
Further, according to the method of the present invention, a data line can be formed by using Cu, which could not be used as a data line until now. Therefore, the resistance of the data line can be reduced, and a signal with a higher frequency can be handled.

Next, as shown in step (17), NSG, PSG, BSG, BSG are applied to cover the data lines 6a using, for example, normal pressure or reduced pressure CVD, TEOS gas, or the like.
A second interlayer insulating film 7 made of a silicate glass film such as PSG, a silicon nitride film, a silicon oxide film, or the like is formed.
The thickness of the second interlayer insulating film 7 is preferably about 500 to 1500 nm. At this time, in the present invention, the first interlayer insulating film 4 is formed flat, and the data lines 6a are also formed on the first interlayer insulating film 4.
, The second interlayer insulating film 7 is also formed to be flat in conformity therewith. If, for example, an organic film is used as the first interlayer insulating film or the second interlayer insulating film as in the prior art, there is a problem that it is difficult to control the film thickness or the insulating film is deteriorated by ultraviolet rays. There is also a problem that a flattening film made of a film causes a stress between the other laminated films and the other laminated films due to a large difference in linear expansion coefficient from the other laminated films. In the present invention, since the second interlayer insulating film 7 can be formed from a silicate glass film, a silicon nitride film, a silicon oxide film, or the like, such a problem can be avoided and a highly reliable liquid crystal device can be manufactured. .

Next, in the step (18) of FIG.
In the pixel switching TFT 30, the pixel electrode 9a
A contact hole 8 for electrically connecting to the high-concentration drain region 1e is formed by dry etching such as reactive ion etching or reactive ion beam etching.

Next, as shown in step (19), a transparent conductive thin film 9 such as an ITO film is deposited on the second interlayer insulating film 7 by sputtering or the like to a thickness of about 50 to 200 nm. Then, as shown in the step (20), the pixel electrode 9a is formed by a photolithography step, an etching step and the like. When the liquid crystal device is used for a reflection type liquid crystal device, the pixel electrode 9a may be formed from an opaque material having a high reflectance such as Al.

Subsequently, a coating liquid for a polyimide-based alignment film is applied onto the pixel electrode 9a, and then a rubbing process is performed so as to have a predetermined pretilt angle and in a predetermined direction. 3, see FIG. 4).

In the present invention, since the pixel electrode 9a and the alignment film are formed on the second interlayer insulating film 7 in a consistently flat manner, no defective alignment occurs. Therefore, there is no need to provide a light-shielding film for shielding these uneven areas.

On the other hand, as for the counter substrate 20 shown in FIG. 3, a glass substrate or the like is first prepared, and the second light shielding film 23 and a second light shielding film (see FIGS.
1) is formed, for example, by sputtering metal chromium, followed by a photolithography step and an etching step. These second light-shielding films may be formed of a material such as resin black in which carbon or Ti is dispersed in a photoresist, in addition to a metal material such as Cr, Ni, or Al.

Then, a transparent conductive thin film such as ITO is applied to the entire surface of the counter substrate 20 by sputtering or the like for about 50 to 2 minutes.
The counter electrode 21 is formed by depositing to a thickness of 00 nm. Furthermore, after applying a coating liquid for a polyimide-based alignment film to the entire surface of the counter electrode 21, a rubbing process is performed so as to have a predetermined pretilt angle and in a predetermined direction, so that the alignment film 22 (see FIG. 3) is formed. It is formed.

Finally, as described above, the T
The FT array substrate 10 and the counter substrate 20 are bonded together by a sealing material 52 such that the alignment films 16 and 22 face each other, and a plurality of types of nematic liquid crystals are mixed in a space between the two substrates by vacuum suction or the like. The liquid crystal is sucked to form a liquid crystal layer 50 having a predetermined thickness.

(Overall Configuration of Liquid Crystal Device) The overall configuration of each embodiment of the liquid crystal device configured as described above will be described with reference to FIGS. 9 and 10. FIG. FIG. 9 is a plan view of the TFT array substrate 10 together with the components formed thereon as viewed from the counter substrate 20, and FIG.
FIG. 10 is a sectional view taken along the line HH ′ of FIG.

In FIG. 9, a sealing material 52 is provided on the TFT array substrate 10 along the edge thereof.
A second light-shielding film 53 as a frame made of, for example, the same or different material as the second light-shielding film 23 is provided in parallel with the inside. The data line drive circuit 101 and the external circuit connection terminal 102 are provided with TFTs in a region outside the sealing material 52.
The scanning line driving circuit 104 is provided along one side of the array substrate 10 and is provided along two sides adjacent to the one side. If the delay of the scanning signal supplied to the scanning line 3a does not matter, it goes without saying that the scanning line driving circuit 104 may be provided on only one side. Further, the data line driving circuits 101 may be arranged on both sides along the side of the screen display area. For example, the odd-numbered data lines 6a supply an image signal from a data line driving circuit arranged along one side of the screen display area, and the even-numbered data lines extend along the opposite side of the screen display area. The image signal may be supplied from a data line driving circuit disposed in the same manner. If the data lines 6a are driven in a comb-tooth shape in this manner, the area occupied by the data line driving circuit can be expanded, so that a complicated circuit can be formed. Further, on one remaining side of the TFT array substrate 10, a plurality of wirings 10 for connecting between the scanning line driving circuits 104 provided on both sides of the screen display area are provided.
5 is provided, and a second light-shielding film 5 as a frame is further provided.
3, a precharge circuit 201 (see FIG. 5) may be provided. At least one corner of the opposing substrate 20 is provided with a conductive material 106 for establishing electric conduction between the TFT array substrate 10 and the opposing substrate 20.
Is provided. Then, as shown in FIG.
Counter substrate 2 having substantially the same contour as sealing material 52 shown in FIG.
0 is fixed to the TFT array substrate 10 by the sealing material 52.

The TFT array substrate 10 of the liquid crystal device according to each of the embodiments described with reference to FIGS. 1 to 10 is further inspected for quality, defects, and the like of the liquid crystal device during manufacturing or shipping. May be formed. Further, the data line driving circuit 101 and the scanning line driving circuit 104
Is provided on the TFT array substrate 10, for example, via a drive LSI mounted on a TAB (tape automated bonding substrate) via an anisotropic conductive film provided on the periphery of the TFT array substrate 10. The connection may be made electrically and mechanically.

Since the liquid crystal device in each of the embodiments described above is applied to a color liquid crystal projector (projection display device), three liquid crystal devices are used as RGB light valves, and each panel has The light of each color separated via the dichroic mirror for RGB color separation is respectively incident as projection light. Therefore, in each embodiment, the counter substrate 20 is not provided with a color filter. However, in a predetermined region facing the pixel electrode 9a where the second light-shielding film 23 is not formed, RGB
May be formed on the counter substrate 20 together with the protective film. In this way, the liquid crystal device according to each embodiment can be applied to a color liquid crystal device such as a direct-view or reflection type color liquid crystal television other than the liquid crystal projector. Further, a micro lens may be formed on the counter substrate 20 so as to correspond to one pixel. If you do this,
By improving the light collection efficiency of incident light, a bright liquid crystal device can be realized. Furthermore, a dichroic filter that produces RGB colors using light interference may be formed by depositing a number of interference layers having different refractive indexes on the counter substrate 20. According to the counter substrate with the dichroic filter, a brighter color liquid crystal device can be realized.

In the liquid crystal device according to each of the embodiments described above, incident light is incident from the side of the counter substrate 20 as in the related art. However, since the first light shielding film 11a is provided, the TFT array substrate 10 May be incident from the side of the counter substrate 20 and emitted from the side of the counter substrate 20. That is,
Thus, even if the liquid crystal device is attached to the liquid crystal projector, it is possible to prevent light from being incident on the channel region 1a 'and the LDD regions 1b, 1c of the semiconductor layer 1a, and it is possible to display a high quality image. is there. Here, conventionally, in order to prevent reflection on the back side of the TFT array substrate 10, an antireflection AR (anti-reflect) is used.
ion) It was necessary to separately arrange the coated polarizing means or to attach an AR film. However, in each embodiment, the surface of the TFT array substrate 10 and at least the channel region 1a 'and the LDD region 1b, 1
Since the first light-shielding film 11a is formed between the TFT array substrate and the substrate c, there is no need to use such an AR-coated polarizing means or AR film, or to use a substrate obtained by subjecting the TFT array substrate 10 itself to an AR process. Therefore, according to each of the embodiments, the material cost can be reduced, and the yield is not greatly reduced due to dust, scratches or the like when attaching the polarizing means, which is very advantageous. In addition, since light resistance is excellent, even if a bright light source is used or polarization conversion is performed by a polarizing beam splitter to improve light use efficiency, image quality deterioration such as crosstalk due to light does not occur.

The switching element provided in each pixel is described as a normal stagger type or coplanar type polysilicon TFT.
The embodiments are also effective for other types of TFTs such as TFTs and amorphous silicon TFTs.

(Electronic Apparatus) As an example of an electronic apparatus using the above-described liquid crystal device, a configuration of a projection display device will be described with reference to FIG. In FIG. 11, a projection-type display device 1100 is a schematic configuration diagram of an optical system of a projection-type liquid crystal device in which three liquid crystal devices described above are prepared and used as liquid crystal devices 962R, 962G, and 962B for RGB. The light source device 920 and the uniform illumination optical system 923 described above are adopted as the optical system of the projection display device of this example. Then, the projection display apparatus uses the uniform illumination optical system 9.
A color separation optical system 92 as a color separation unit that separates the light flux W emitted from the light into red (R), green (G), and blue (B).
4, three light valves 925R, 925G, and 925B as modulation means for modulating the color light beams R, G, and B;
A color synthesizing prism 910 as a color synthesizing unit for re-synthesizing the modulated color luminous flux, and a projection surface 10
A projection lens unit 906 is provided as projection means for performing enlarged projection on the surface of the projection lens 0. Further, a light guide system 927 for guiding the blue light flux B to the corresponding light valve 925B is also provided.

The uniform illumination optical system 923 includes two lens plates 921 and 922 and a reflection mirror 931, and the two lens plates 921 and 922 are arranged so as to be orthogonal to each other with the reflection mirror 931 interposed therebetween. Uniform illumination optical system 923
The two lens plates 921 and 922 each include a plurality of rectangular lenses arranged in a matrix. The light beam emitted from the light source device 920 is transmitted to the first lens plate 92.
The light is split into a plurality of partial light beams by one rectangular lens.
Then, these partial light beams are divided into three light valves 925R and 925R by the rectangular lens of the second lens plate 922.
Superimposed around 5G and 925B. Therefore, by using the uniform illumination optical system 923, even when the light source device 920 has an uneven illuminance distribution in the cross section of the emitted light beam, the three light valves 925R, 925G, and 925B are used.
Can be illuminated with uniform illumination light.

Each color separation optical system 924 includes a blue-green reflecting dichroic mirror 941, a green reflecting dichroic mirror 942, and a reflecting mirror 943. First, in the blue-green reflecting dichroic mirror 941, the blue light beam B and the green light beam G included in the light beam W are reflected at right angles, and head toward the green reflecting dichroic mirror 942. The red light beam R passes through the mirror 941, is reflected at a right angle by the rear reflection mirror 943, and is emitted from the emission unit 944 of the red light beam R to the prism unit 910 side.

Next, the green reflection dichroic mirror 942
Of the blue and green light fluxes B and G reflected by the blue-green reflection dichroic mirror 941,
Only the green light beam G is reflected at a right angle, and is emitted from the emission unit 945 of the green light beam G to the color combining optical system side. The blue light flux B that has passed through the green reflection dichroic mirror 942 is emitted from the emission section 946 of the blue light flux B to the light guide system 927 side. In this example, the emission portions 944 and 94 of the color light beams in the color separation optical system 924 from the emission portion of the light beam W of the uniform illumination optical element.
The distances to 5,946 are set to be substantially equal.

The red and green luminous flux R of the color separation optical system 924
Condensing lenses 951 and 952 are arranged on the emission sides of the G emission sections 944 and 945, respectively. Therefore,
The red and green luminous fluxes R and G emitted from the respective emission sections are incident on these condenser lenses 951 and 952 and are parallelized.

The red and green luminous fluxes R and G thus collimated enter the light valves 925R and 925G and are modulated to add image information corresponding to each color light. That is, the switching of these liquid crystal devices is controlled by driving means (not shown) in accordance with the image information, whereby each color light passing therethrough is modulated. On the other hand, the blue light flux B is guided to the corresponding light valve 925B via the light guide system 927, where it is similarly modulated according to image information. In addition, the light valve 925 of this example
R, 925G, and 925B further include a liquid crystal light further including incident-side polarization units 960R, 960G, and 960B, emission-side polarization units 961R, 961G, and 961B, and liquid crystal devices 962R, 962G, and 962B disposed therebetween. It is a valve.

The light guide system 927 is a light emitting section 94 for the blue light beam B.
No. 6, a condenser lens 954 disposed on the exit side, an incident-side reflection mirror 971, an exit-side reflection mirror 972, an intermediate lens 973 disposed between these reflection mirrors, and a front side of the light valve 925B. And a condenser lens 953. The blue light flux B emitted from the condenser lens 946 is transmitted through the light guide system 927 to the liquid crystal device 962B.
And modulated. The optical path length of each color beam, that is,
Each liquid crystal device 962R, 962G, 9
The distance to 62B is the longest for the blue luminous flux B, and therefore the loss of light quantity of the blue luminous flux is the largest. However, by interposing the light guide system 927, the loss of light amount can be suppressed.

Each light valve 925R, 925G, 92
The color light fluxes R, G, and B modulated through 5B are incident on a color combining prism 910, where they are combined. The light combined by the color combining prism 910 is enlarged and projected on the surface of the projection surface 100 at a predetermined position via the projection lens unit 906.

In this example, the liquid crystal devices 962R, 962G,
Since a light-blocking layer is provided on the lower side of the TFT in the 962B, the light reflected and projected by the projection optical system in the liquid crystal projector based on the light projected from the liquid crystal devices 962R, 962G, and 962B passes. Even if reflected light from the surface of the TFT array substrate, part of the projected light that passes through the projection optical system after being emitted from another liquid crystal device, etc., is incident on the TFT array substrate side as return light, the pixel electrode It is possible to sufficiently shield the channel of the switching TFT from light.

For this reason, even if a prism unit suitable for miniaturization is used for the projection optical system, each of the liquid crystal devices 962R, 96
It is not necessary to separately arrange a film for preventing return light between the 2G, 962B and the prism unit, or to perform a return light prevention process on the polarizing means, so that the configuration can be reduced in size and simplified. It is very advantageous.

In the present embodiment, T
Since the influence of the FT on the channel region can be suppressed, the polarizing means 9 which has been directly subjected to the anti-backlight treatment to the liquid crystal device 9
It is not necessary to attach 61R, 961G, and 961B.
Therefore, as shown in FIG. 12, the polarizing means is formed apart from the liquid crystal device, and more specifically, one polarizing means 96 is formed.
1R, 961G and 961B are attached to the prism unit 910, and the other polarizing means 960R, 960G and 960
B can be attached to the condenser lenses 953, 945, and 944. In this manner, by attaching the polarizing means to the prism unit or the condenser lens, the heat of the polarizing means is absorbed by the prism unit or the condenser lens, so that the temperature of the liquid crystal device can be prevented from rising.

Although not shown, an air layer is formed between the liquid crystal device and the polarizing means by forming the liquid crystal device and the polarizing means apart from each other. By sending air such as cold air to the liquid crystal device, the temperature rise of the liquid crystal device can be further prevented, and malfunction due to the temperature rise of the liquid crystal device can be prevented.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram of various elements, wiring, and the like provided in a plurality of pixels in a matrix forming an image forming area in a first embodiment of a liquid crystal device.

FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which a data line, a scanning line, a pixel electrode, a light shielding film, and the like are formed in the first embodiment of the liquid crystal device.

FIG. 3 is a sectional view taken along line A-A 'of FIG.

FIG. 4 is a sectional view taken along line B-B 'of FIG.

FIG. 5 is a process diagram (part 1) for sequentially illustrating the manufacturing process of the first embodiment of the liquid crystal device.

FIG. 6 is a process diagram (part 2) for sequentially illustrating the manufacturing process of the first embodiment of the liquid crystal device.

FIG. 7 is a process diagram (part 3) for sequentially illustrating the manufacturing process of the first embodiment of the liquid crystal device.

FIG. 8 is a process view (part 4) for sequentially illustrating the manufacturing process of the first embodiment of the liquid crystal device.

FIG. 9 is a plan view of the TFT array substrate in each embodiment of the liquid crystal device together with the components formed thereon as viewed from the counter substrate side.

FIG. 10 is a sectional view taken along line H-H ′ of FIG. 9;

FIG. 11 is a configuration diagram of a projection display device which is an example of an electronic device using a liquid crystal device.

[Explanation of symbols]

 1a Semiconductor layer 1a 'Channel region 1b Low-concentration source region (source-side LDD region) 1c Low-concentration drain region (drain-side LDD region) 1d High-concentration source region 1e High-concentration drain region 1f First accumulation Capacitance electrode 2 ... Gate insulating film 3a ... Scan line (gate electrode) 3b ... Capacitance line (second storage capacitor electrode) 4 ... First interlayer insulating film 4t ... Trench (groove) 5 ... Contact hole 6a ... Data line (source electrode) 7) Second interlayer insulating film 8 ... Contact hole 9a ... Pixel electrode 10 ... TFT array substrate 11a, 11a '... First light-shielding film 12 ... Base insulating film 13, 13' ... Contact hole 16 ... Alignment film 20 ... Counter substrate DESCRIPTION OF SYMBOLS 21 ... Counter electrode 22 ... Alignment film 23 ... 2nd light shielding film 30 ... TFT 50 ... Liquid crystal layer 52 ... Sealing material 53 ... 2nd light shielding film (frame) 70 ... Storage capacitance 101: Data line drive circuit 104: Scan line drive circuit

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) 2H092 JA25 JA29 JA38 JA42 JA44 JA46 JB13 JB23 JB32 JB33 JB38 JB51 JB58 JB63 JB69 KA04 KA07 KA16 KA18 MA05 MA07 MA14 MA15 MA16 MA18 MA19 MA20 MA28 MA35 MA37 MA41 NA04 NA18 NA19 RA05 5C094 AA05 AA42 AA43 BA03 CA19 DA15 EA03 EA04 EA07 ED15 FB12 FB19 GB01 5F110 AA01 AA03 AA18 BB02 BB04 CC02 CC08 DD02 DD03 DD12 DD13 DD14 DD22 DD25 FF02 FF03 FF09 FF23 GG03 GG02GG13 GG32GG NN03 NN04 NN22 NN23 NN24 NN42 NN44 NN46 NN47 NN54 NN72 NN80 PP10 QQ04 QQ05 QQ11 QQ19 QQ30

Claims (15)

[Claims] 1. A substrate, a switching element provided on the substrate, a first interlayer insulating film provided to cover the switching element and planarized, and A data line embedded and connected to the switching element; a second interlayer insulating film provided on the first interlayer insulating film; and a data line provided on the second interlayer insulating film. An electro-optical device, comprising: a pixel electrode connected thereto. 2. The electro-optical device according to claim 1, wherein the data line is formed of a light-shielding conductor. 3. The data line includes Al, Cu, Ti, C
The electro-optical device according to claim 1, further comprising at least one selected from the group consisting of r, W, Ta, Mo, and Pb. 4. A plurality of pixel electrodes are arranged in a matrix on the second interlayer insulating film, and a region between the adjacent pixel electrodes faces the data line. The electro-optical device according to claim 1. 5. The electro-optical device according to claim 4, wherein a line width of the data line is larger than a gap between adjacent pixel electrodes. 6. The semiconductor device according to claim 1, further comprising a capacitive element disposed on the substrate, wherein the capacitive element faces the data line. An electro-optical device according to claim 1. 7. The switching element according to claim 1, wherein the switching element is a thin film transistor including a semiconductor film having a source region, a channel region, and a drain region. Electro-optical device. 8. The electro-optical device according to claim 7, wherein the source region of the semiconductor film is connected to the data line via a contact hole provided in the first interlayer insulating film. 9. The semiconductor device according to claim 7, wherein the drain region of the semiconductor film is connected to the pixel electrode via contact holes provided in the first interlayer insulating film and the second interlayer insulating film. Or the electro-optical device according to claim 8. 10. A step of forming a thin film transistor on a substrate, a step of forming a first interlayer insulating film so as to cover and flatten the thin film transistor, and a step of forming a groove in the first interlayer insulating film. Forming a conductive film on the first interlayer insulating film and filling the groove of the first interlayer insulating film; and forming the conductive film selectively exposed in the groove of the first interlayer insulating film. Polishing the conductive film and the first interlayer insulating film. 11. The method according to claim 11, further comprising: forming a second interlayer insulating film on the first interlayer insulating film; and forming a pixel electrode on the second interlayer insulating film. Item 12. The method for manufacturing an electro-optical device according to item 11. 12. The method according to claim 10, wherein the step of flattening the first interlayer insulating film is performed by a chemical mechanical polishing method.
An electro-optical device according to claim 1. 13. The electro-optical device according to claim 10, wherein the step of forming the conductive film is performed by a sputtering method. 14. The electro-optical device according to claim 10, wherein the step of polishing the conductive film and the first interlayer insulating film is performed by a chemical mechanical polishing method. 15. A light source, a projection optical system for projecting incident light, interposed between the light source and the optical system, and modulating light from the light source to guide the light to the projection optical system. A light valve having the electro-optical device according to any one of claims 1 to 9 or the electro-optical device manufactured by the manufacturing method according to any one of claims 10 to 14. Electronic equipment characterized by the following.