JP2001013209A - Dut board with ic socket - Google Patents

Dut board with ic socket

Info

Publication number
JP2001013209A
JP2001013209A JP11186068A JP18606899A JP2001013209A JP 2001013209 A JP2001013209 A JP 2001013209A JP 11186068 A JP11186068 A JP 11186068A JP 18606899 A JP18606899 A JP 18606899A JP 2001013209 A JP2001013209 A JP 2001013209A
Authority
JP
Japan
Prior art keywords
socket
contact
dut board
board
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP11186068A
Other languages
Japanese (ja)
Inventor
Takahiro Nagata
孝弘 永田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ando Electric Co Ltd
Original Assignee
Ando Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ando Electric Co Ltd filed Critical Ando Electric Co Ltd
Priority to JP11186068A priority Critical patent/JP2001013209A/en
Priority to KR10-2000-0028648A priority patent/KR100499196B1/en
Priority to DE2000130209 priority patent/DE10030209A1/en
Publication of JP2001013209A publication Critical patent/JP2001013209A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Connecting Device With Holders (AREA)

Abstract

PROBLEM TO BE SOLVED: To arrange by-pass capacitors close to contacts and in the same plane as an IC socket body in a DUT board with an IC socket to be in contact with an IC. SOLUTION: Contacts 2A come into contact with the terminals of an IC, an IC socket body 1 holds the contacts 2A in a housing 2B, and the IC socket body 1 is mounted to a DUT board. Recessed parts 11 and 12 open to the surface side to be in contact with a printed circuit board 4 are formed in the housing 2B of the IC socket 1. By-pass capacitors 5 and 6 to be mounted to the printed circuit board 4 are housed in the recesses 11 and 12. It is possible to mount the by-pass capacitors 5 and 6 to be normally used for the power supply pins of an IC to the same plane as the contacts 2A and to obtain a DUT board for high frequencies.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、例えば、BGA(B
all Grid Array) 形ICの特性を試験する半導体集積回
路試験装置に用いられるICソケット付きDUT(Devic
e Under Test) ボードに関するものである。
The present invention relates to, for example, BGA (B
all Grid Array) DUT with IC socket (Devic) used in semiconductor integrated circuit test equipment for testing the characteristics of ICs
e Under Test) This is for the board.

【0002】[0002]

【従来の技術】図2は従来のICソケット付きDUTボ
ードの構成を示すもので、図中、1はICソケット、2
Aはコンタクト、2Bはハウジング、3は位置決めピ
ン、4はプリント基板、7,8はバイパスコンデンサで
ある。コンタクト2Aは、両端が伸縮し、一端が図示し
ないICの端子に圧接し、他端がプリント基板4のパタ
ーンに圧接する。通常、ICソケット1は、ICの端子
に接触するコンタクト2A,2A,2A,…が、図示の
ように、ハウジング2Bにより保持されており、コンタ
クト2A,2A,2A,…のすぐ近くには、電源ピンに
必要であるバイパスコンデンサ7,8を配置することが
困難である。このため、従来は、ハウジング2Bの周辺
にバイパスコンデンサ7,8を配置したり、または、図
示したように、ICソケット1を実装しているプリント
基板4のICソケット1実装面とは反対の裏側にバイパ
スコンデンサ7,8を配置している。
2. Description of the Related Art FIG. 2 shows the structure of a conventional DUT board with an IC socket.
A is a contact, 2B is a housing, 3 is a positioning pin, 4 is a printed circuit board, and 7 and 8 are bypass capacitors. The contact 2 </ b> A expands and contracts at both ends, one end is pressed against a terminal of an IC (not shown), and the other end is pressed against a pattern on the printed circuit board 4. Normally, in the IC socket 1, contacts 2A, 2A, 2A,... That contact the terminals of the IC are held by a housing 2B, as shown in the figure, and the contacts 2A, 2A, 2A,. It is difficult to arrange the bypass capacitors 7 and 8 necessary for the power supply pins. For this reason, conventionally, the bypass capacitors 7 and 8 are arranged around the housing 2B, or the back side opposite to the IC socket 1 mounting surface of the printed circuit board 4 on which the IC socket 1 is mounted as shown in the drawing. Are provided with bypass capacitors 7 and 8.

【0003】[0003]

【発明が解決しようとする課題】しかし、従来のよう
に、バイパスコンデンサ7,8を、ICソケット1の周
辺に配置した場合、電源ピンからの距離が長くなってし
まうため、プリント基板4のパターンのインダクタンス
によりバイパスコンデンサ7,8のバイパス効果が低下
してしまう。また、図2に示したように、バイパスコン
デンサ7,8を、ICソケット1の裏側(プリント基板
4のICソケット1実装面と反対の裏側)に実装した場
合も、プリント基板の厚さは通常2〜3mm程度あり、プ
リント基板4を貫通するスルーホールのインダクタンス
値も数ナノヘンリーであり、これもバイパスコンデンサ
7,8のバイパス効果を低下させているという問題があ
る。
However, when the bypass capacitors 7 and 8 are arranged around the IC socket 1 as in the prior art, the distance from the power supply pins becomes long, and therefore the pattern of the printed circuit board 4 is increased. , The bypass effect of the bypass capacitors 7 and 8 is reduced. Also, as shown in FIG. 2, when the bypass capacitors 7 and 8 are mounted on the back side of the IC socket 1 (the back side opposite to the mounting surface of the printed circuit board 4 on which the IC socket 1 is mounted), the thickness of the printed circuit board is usually It is about 2 to 3 mm, and the inductance value of the through hole penetrating the printed circuit board 4 is also several nanohenries, which also has a problem that the bypass effect of the bypass capacitors 7 and 8 is reduced.

【0004】本発明の目的は、ICと接触するコンタク
トを持つICソケットをDUTボードに実装する場合に
おいて、コンタクトに近く、かつ、ICソケットと同一
面にバイパスコンデンサを配置できるICソケット付き
DUTボードを提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a DUT board with an IC socket in which a bypass capacitor can be arranged close to the contact and on the same surface as the IC socket when the IC socket having a contact for contacting the IC is mounted on the DUT board. To provide.

【0005】[0005]

【課題を解決するための手段】以上の課題を解決すべく
請求項1記載の発明は、例えば、図1に示すように、コ
ンタクト2AはICの端子に接触し、ICソケット1は
コンタクト2Aをハウジング2Bに保持し、ICソケッ
ト1を実装するDUTボードであって、ハウジング2B
はプリント基板4と接する面側に開口する凹部11,1
2を形成することを特徴としている。
According to the first aspect of the present invention, as shown in FIG. 1, for example, as shown in FIG. 1, a contact 2A contacts an IC terminal, and an IC socket 1 connects a contact 2A. A DUT board that holds the IC socket 1 and is held in the housing 2B,
Are concave portions 11, 1 opened on the surface side in contact with the printed circuit board 4.
2 is formed.

【0006】このように、請求項1記載の発明によれ
ば、ICの端子に接触するコンタクトを保持するハウジ
ングに、ICソケットを実装するプリント基板と接する
面側に開口する凹部を形成したICソケット付きDUT
ボードなので、ICソケットがプリント基板と接する面
側に開口した凹部に、ICの電源ピンに通常用いるバイ
パスコンデンサを収納して、コンタクトと同一面にバイ
パスコンデンサを実装できる。即ち、バイパスコンデン
サを、プリント基板の電源用スルーホールによるインダ
クタンスの無いところに実装できる。これにより、IC
テスタで被測定IC(DUT)の高速試験する際に、I
Cの電源ピンのインダクタンスを最小限に抑えながらテ
ストができるため、より高精度に測定できる。また、高
速動作するICを、本発明のICソケット付きDUTボ
ードで試験する場合、電源ノイズを最小限に抑えられ
る。
As described above, according to the first aspect of the present invention, an IC socket in which a recess is formed in a housing for holding a contact that contacts a terminal of an IC, the recess being opened on a surface contacting a printed circuit board on which the IC socket is mounted. DUT with
Since it is a board, a bypass capacitor normally used for a power supply pin of the IC is housed in a concave portion opened on the side where the IC socket contacts the printed circuit board, and the bypass capacitor can be mounted on the same surface as the contact. That is, the bypass capacitor can be mounted on the printed circuit board at a place where there is no inductance due to the power supply through hole. Thereby, IC
When performing a high-speed test of an IC under test (DUT) with a tester,
Since the test can be performed while minimizing the inductance of the power supply pin of C, measurement can be performed with higher accuracy. Also, when testing an IC that operates at high speed with the DUT board with an IC socket of the present invention, power supply noise can be minimized.

【0007】請求項2記載の発明は、請求項1記載のI
Cソケット付きDUTボードであって、例えば、図1に
示すように、プリント基板4に実装するバイパスコンデ
ンサ5,6をハウジング2Bに形成された凹部11,1
2に収容することを特徴としている。
[0007] The invention according to claim 2 is the invention according to claim 1.
In a DUT board with a C socket, for example, as shown in FIG. 1, bypass capacitors 5 and 6 mounted on a printed board 4 are provided with recesses 11 and 1 formed in a housing 2B.
2 is housed.

【0008】このように、請求項2記載の発明によれ
ば、プリント基板に実装するバイパスコンデンサを、請
求項1記載のハウジングの凹部に収容したので、コンタ
クトと同一面にバイパスコンデンサを実装できる。
According to the second aspect of the present invention, the bypass capacitor mounted on the printed circuit board is housed in the recess of the housing according to the first aspect, so that the bypass capacitor can be mounted on the same surface as the contact.

【0009】また、請求項3記載の発明は、例えば、図
1に示すように、コンタクト2AはICの端子に接触
し、ICソケット1はコンタクト2Aをハウジング2B
に保持し、ICソケット1を実装するDUTボードであ
って、ICソケット1と接するプリント基板4面上にバ
イパスコンデンサ5,6を配置することを特徴としてい
る。
According to the third aspect of the present invention, for example, as shown in FIG. 1, the contact 2A contacts the terminal of the IC, and the IC socket 1 connects the contact 2A to the housing 2B.
And a DUT board on which the IC socket 1 is mounted, wherein bypass capacitors 5 and 6 are arranged on the surface of the printed circuit board 4 in contact with the IC socket 1.

【0010】このように、請求項3記載の発明によれ
ば、ICの端子に接触するコンタクトを保持するハウジ
ングを有するICソケットと接するプリント基板面上に
バイパスコンデンサを配置したICソケット付きDUT
ボードなので、コンタクトと同一面にバイパスコンデン
サを実装できる。即ち、バイパスコンデンサを、プリン
ト基板の電源用スルーホールによるインダクタンスの無
いところに実装できる。これにより、ICテスタで被測
定IC(DUT)の高速試験する際に、ICの電源ピン
のインダクタンスを最小限に抑えながらテストができる
ため、より高精度に測定できる。また、高速動作するI
Cを、本発明のICソケット付きDUTボードで試験す
る場合、電源ノイズを最小限に抑えられる。
As described above, according to the third aspect of the present invention, a DUT with an IC socket in which a bypass capacitor is arranged on a printed circuit board surface in contact with an IC socket having a housing for holding a contact that contacts a terminal of an IC.
Since it is a board, a bypass capacitor can be mounted on the same surface as the contact. That is, the bypass capacitor can be mounted on the printed circuit board at a place where there is no inductance due to the power supply through hole. Thus, when performing a high-speed test of an IC under test (DUT) with an IC tester, the test can be performed while minimizing the inductance of the power supply pins of the IC, so that measurement can be performed with higher accuracy. In addition, I which operates at high speed
When C is tested with the DUT board with IC socket of the present invention, power supply noise can be minimized.

【0011】請求項4記載の発明は、請求項3記載のI
Cソケット付きDUTボードであって、例えば、図1に
示すように、ICソケット1のハウジング2Bにバイパ
スコンデンサ5,6を収容する凹部11,12を形成す
ることを特徴としている。
[0011] The invention according to claim 4 is the invention according to claim 3.
A DUT board with a C socket, for example, as shown in FIG. 1, is characterized in that recesses 11 and 12 for housing bypass capacitors 5 and 6 are formed in a housing 2B of an IC socket 1.

【0012】このように、請求項4記載の発明によれ
ば、ICソケットのハウジングに、請求項3記載のバイ
パスコンデンサを収容する凹部を形成したので、コンタ
クトと同一面にバイパスコンデンサを実装できる。
According to the fourth aspect of the present invention, since the recess for accommodating the bypass capacitor according to the third aspect is formed in the housing of the IC socket, the bypass capacitor can be mounted on the same surface as the contact.

【0013】請求項5記載の発明は、請求項1、2、3
または4記載のICソケット付きDUTボードであっ
て、例えば、図1に示すように、DUTボードは位置決
めピン3を立設し、その位置決めピン3でICソケット
1が位置決めされることを特徴としている。
[0013] The invention according to claim 5 is the invention according to claims 1, 2, and 3.
Or a DUT board with an IC socket described in 4, wherein, for example, as shown in FIG. 1, the DUT board is provided with positioning pins 3, and the IC socket 1 is positioned by the positioning pins 3. .

【0014】[0014]

【発明の実施の形態】以下に、本発明に係るICソケッ
ト付きDUTボードの実施の形態例を図1に基づいて説
明する。図1は本発明を適用した一例としてのICソケ
ット付きDUTボードの構成を示す要部縦断面図で、図
中、1はICソケット、2Aはコンタクト、2Bはハウ
ジング、3は位置決めピン、4はプリント基板、5,6
はバイパスコンデンサ、11,12は凹部である。この
DUTボードは、BGA形ICを対象とする高周波用I
Cソケット付きのもので、図示のように、ICソケット
1のハウジング2Bに、DUTボードであるプリント基
板4と接する面側に開口する複数(図示では2個)の凹
部11,12を形成して、その一方の凹部11にバイパ
スコンデンサ5を収容するとともに、他方の凹部12に
もバイパスコンデンサ6を収容したものである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a DUT board with an IC socket according to the present invention will be described below with reference to FIG. FIG. 1 is a longitudinal sectional view showing a main part of a DUT board with an IC socket as an example to which the present invention is applied. In the drawing, 1 is an IC socket, 2A is a contact, 2B is a housing, 3 is a positioning pin, and 4 is a positioning pin. Printed circuit board, 5,6
Is a bypass capacitor, and 11 and 12 are recesses. This DUT board is a high frequency I
As shown in the figure, a plurality (two in the figure) of recesses 11 and 12 are formed in the housing 2B of the IC socket 1 and open on the side in contact with the printed circuit board 4 as a DUT board, as shown in the figure. One of the concave portions 11 accommodates the bypass capacitor 5, and the other concave portion 12 accommodates the bypass capacitor 6.

【0015】即ち、ICソケット1のハウジング2Bに
は、その中央部に保持した複数のコンタクト2A,2
A,2A,…と周辺部に貫通した複数の位置決めピン
3,3との間において、図示下面側に開口する図示2個
の凹部11,12を形成しておく。また、プリント基板
4の図示上面には、その中央部と周辺部に起設した図示
2本の位置決めピン3,3との間において、図示2個の
バイパスコンデンサ5,6を実装しておく。そして、I
Cソケット1に位置決めピン3,3を挿入して、ICソ
ケット1をプリント基板4上に組み付ける際に、プリン
ト基板4,4上のバイパスコンデンサ5,6を、ICソ
ケット1のハウジング2Bに形成された凹部11,12
に収容する。
That is, the housing 2B of the IC socket 1 has a plurality of contacts 2A, 2
Two concave portions 11 and 12 shown in the figure are opened on the lower surface side between A, 2A,... And a plurality of positioning pins 3 and 3 penetrating the peripheral portion. Two bypass capacitors 5 and 6 are mounted on the upper surface of the printed circuit board 4 between the two positioning pins 3 and 3 provided at the center and the periphery thereof. And I
When inserting the positioning pins 3 and 3 into the C socket 1 and assembling the IC socket 1 on the printed board 4, the bypass capacitors 5 and 6 on the printed boards 4 and 4 are formed in the housing 2B of the IC socket 1. Recesses 11, 12
Housed in

【0016】以上の通り、DUTボードは、図示しない
被測定ICをICソケット1を介してプリント基板4に
実装する場合において、バイパスコンデンサ5,6を、
中央部のコンタクト2A,2A,2A,…に近く、か
つ、ICソケット1と同一面に配置した構成である。即
ち、バイパスコンデンサ5,6を、プリント基板4の従
来の如く電源用スルーホールによるインダクタンスの無
いところに実装できる。この結果、ICテスタで被測定
ICの高速試験する際に、ICの電源ピンのインダクタ
ンスを最小限に抑えながらテストができるため、より高
精度に測定できるものとなる。また、高速動作するIC
を、ICソケット付きDUTボードで試験する場合、電
源ノイズを最小限に抑えることができるといった利点が
得られる。
As described above, when the DUT board mounts the IC to be measured (not shown) on the printed circuit board 4 via the IC socket 1, the DUT board includes the bypass capacitors 5 and 6.
, And arranged on the same plane as the IC socket 1. The contacts 2A, 2A, 2A,... That is, the bypass capacitors 5 and 6 can be mounted on the printed circuit board 4 in a place where there is no inductance due to the power supply through hole as in the related art. As a result, when performing a high-speed test of an IC to be measured by an IC tester, the test can be performed while minimizing the inductance of the power supply pin of the IC, so that the measurement can be performed with higher accuracy. In addition, IC that operates at high speed
Is tested on a DUT board with an IC socket, there is an advantage that power supply noise can be minimized.

【0017】なお、以上の実施の形態例においては、高
周波用ICソケット付きDUTボードとしたが、本発明
は測定周波数に限定されるものではなく、通常のICソ
ケット付きDUTボードとしても利用できる。また、凹
部の形状や大きさ等も任意であり、1枚のDUTボード
に複数のICソケットを実装配置する他、具体的な細部
構造等についても適宜に変更可能であることは勿論であ
る。
In the above embodiment, the DUT board with an IC socket for high frequency is used. However, the present invention is not limited to the measurement frequency, and can be used as a DUT board with an ordinary IC socket. Also, the shape and size of the concave portion are arbitrary, and it goes without saying that a plurality of IC sockets are mounted and arranged on one DUT board, and the specific detailed structure can be appropriately changed.

【0018】[0018]

【発明の効果】以上のように、請求項1記載の発明に係
るICソケット付きDUTボードによれば、ICソケッ
トの本体となるハウジングに、プリント基板と接する面
側に開口する凹部を形成し、前記凹部にバイパスコンデ
ンサを収納して、コンタクトと同一面にバイパスコンデ
ンサを実装することができる。つまり、バイパスコンデ
ンサを、プリント基板の電源用スルーホールによるイン
ダクタンスの無いところに実装できる。従って、ICテ
スタで被測定ICの高速試験する際において、ICの電
源ピンのインダクタンスを最小限に抑えながらテストが
できるため、より高精度に測定することができる。ま
た、高速動作するICを、本発明のICソケット付きD
UTボードで試験する場合において、電源ノイズを最小
限に抑えることができる。
As described above, according to the DUT board with the IC socket according to the first aspect of the present invention, the recess serving as the main body of the IC socket is formed with an opening on the side in contact with the printed circuit board. The bypass capacitor can be housed in the recess, and the bypass capacitor can be mounted on the same surface as the contact. That is, the bypass capacitor can be mounted on the printed circuit board at a place where there is no inductance due to the power supply through hole. Therefore, when performing a high-speed test of an IC to be measured by an IC tester, the test can be performed while minimizing the inductance of the power supply pin of the IC, so that the measurement can be performed with higher accuracy. Further, an IC that operates at a high speed is replaced with a D with an IC socket of the present invention.
When testing on a UT board, power supply noise can be minimized.

【0019】請求項2記載の発明に係るICソケット付
きDUTボードによれば、DUTボードに実装するバイ
パスコンデンサをハウジングに形成された凹部に収容し
たため、コンタクトと同一面にバイパスコンデンサを実
装して、請求項1記載の発明により得られる効果を発揮
することができる。
According to the DUT board with the IC socket according to the second aspect of the present invention, since the bypass capacitor mounted on the DUT board is housed in the recess formed in the housing, the bypass capacitor is mounted on the same surface as the contact. The effect obtained by the invention of claim 1 can be exhibited.

【0020】また、請求項3記載の発明に係るICソケ
ット付きDUTボードによれば、ICソケットと接する
プリント基板の面上にバイパスコンデンサを配置したた
め、プリント基板の電源用スルーホールによるインダク
タンスの無いところにバイパスコンデンサを実装するこ
とができる。従って、ICテスタで被測定ICの高速試
験する際において、ICの電源ピンのインダクタンスを
最小限に抑えながらテストができるため、より高精度に
測定することができる。また、高速動作するICを、本
発明のICソケット付きDUTボードで試験する場合に
おいて、電源ノイズを最小限に抑えることができる。
According to the DUT board with an IC socket according to the third aspect of the present invention, since the bypass capacitor is arranged on the surface of the printed circuit board in contact with the IC socket, there is no inductance due to the power supply through hole of the printed circuit board. Can be mounted with a bypass capacitor. Therefore, when performing a high-speed test of an IC to be measured by an IC tester, the test can be performed while minimizing the inductance of the power supply pin of the IC, so that the measurement can be performed with higher accuracy. Further, when testing an IC operating at high speed with the DUT board with an IC socket of the present invention, power supply noise can be minimized.

【0021】請求項4記載の発明に係るICソケット付
きDUTボードによれば、ICソケットのハウジングに
バイパスコンデンサを収容する凹部を形成したため、コ
ンタクトと同一面にバイパスコンデンサを実装して、請
求項1記載の発明により得られる効果を発揮することが
できる。
According to the DUT board with the IC socket according to the fourth aspect of the present invention, since the recess for accommodating the bypass capacitor is formed in the housing of the IC socket, the bypass capacitor is mounted on the same surface as the contact. The effects obtained by the described invention can be exerted.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明を適用した一例としてのICソケット付
きDUTボードの構成を示す要部縦断面図である。
FIG. 1 is a longitudinal sectional view of a main part showing a configuration of a DUT board with an IC socket as an example to which the present invention is applied.

【図2】従来のICソケット付きDUTボードの構成を
示す要部縦断面図である。
FIG. 2 is a vertical sectional view showing a main part of a conventional DUT board with an IC socket.

【符号の説明】[Explanation of symbols]

1 ICソケット 2A コンタクト 2B ハウジング 3 位置決めピン 4 プリント基板 5,6 バイパスコンデンサ 11,12 凹部 DESCRIPTION OF SYMBOLS 1 IC socket 2A Contact 2B Housing 3 Positioning pin 4 Printed circuit board 5, 6 Bypass capacitor 11, 12 Recess

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】コンタクトはICの端子に接触し、ICソ
ケットは前記コンタクトをハウジングに保持し、前記I
Cソケットを実装するDUTボードであって、 前記ハウジングは前記DUTボードと接する面側に開口
する凹部を形成することを特徴とするICソケット付き
DUTボード。
A contact contacting a terminal of the IC; an IC socket holding the contact in a housing;
A DUT board on which a C socket is mounted, wherein the housing has a concave portion opened on a surface in contact with the DUT board.
【請求項2】DUTボードに実装するバイパスコンデン
サをハウジングに形成された凹部に収容することを特徴
とする請求項1記載のICソケット付きDUTボード。
2. The DUT board with an IC socket according to claim 1, wherein a bypass capacitor mounted on the DUT board is accommodated in a recess formed in the housing.
【請求項3】コンタクトはICの端子に接触し、ICソ
ケットは前記コンタクトをハウジングに保持し、前記I
Cソケットを実装するDUTボードであって、 前記DUTボードはICソケットと接する面上にバイパ
スコンデンサを配置することを特徴とするICソケット
付きDUTボード。
3. A contact contacts an IC terminal, an IC socket holds the contact in a housing, and
A DUT board mounting a C socket, wherein the DUT board has a bypass capacitor disposed on a surface in contact with the IC socket.
【請求項4】ICソケットのハウジングにバイパスコン
デンサを収容する凹部を形成することを特徴とする請求
項3記載のICソケット付きDUTボード。
4. The DUT board with an IC socket according to claim 3, wherein a recess for accommodating a bypass capacitor is formed in a housing of the IC socket.
【請求項5】DUTボードは位置決めピンを立設し、前
記位置決めピンでICソケットが位置決めされることを
特徴とする請求項1、2、3または4記載のICソケッ
ト付きDUTボード。
5. The DUT board with an IC socket according to claim 1, wherein the DUT board has a positioning pin erected, and the IC socket is positioned by the positioning pin.
JP11186068A 1999-06-30 1999-06-30 Dut board with ic socket Withdrawn JP2001013209A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP11186068A JP2001013209A (en) 1999-06-30 1999-06-30 Dut board with ic socket
KR10-2000-0028648A KR100499196B1 (en) 1999-06-30 2000-05-26 Dut board provided with an ic socket
DE2000130209 DE10030209A1 (en) 1999-06-30 2000-06-21 Test socket has IC holder with housing contg. contacts, each of which makes contact with IC connection points, apertures in housing and open to side that contacts test socket

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11186068A JP2001013209A (en) 1999-06-30 1999-06-30 Dut board with ic socket

Publications (1)

Publication Number Publication Date
JP2001013209A true JP2001013209A (en) 2001-01-19

Family

ID=16181838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11186068A Withdrawn JP2001013209A (en) 1999-06-30 1999-06-30 Dut board with ic socket

Country Status (3)

Country Link
JP (1) JP2001013209A (en)
KR (1) KR100499196B1 (en)
DE (1) DE10030209A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120025861A1 (en) * 2010-08-02 2012-02-02 Samsung Electronics Co., Ltd. Test socket and test device having the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58148510A (en) * 1982-03-01 1983-09-03 Toyo Commun Equip Co Ltd Method for forming lead terminal on printed circuit board
US5661882A (en) * 1995-06-30 1997-09-02 Ferro Corporation Method of integrating electronic components into electronic circuit structures made using LTCC tape
JP2842378B2 (en) * 1996-05-31 1999-01-06 日本電気株式会社 High-density mounting structure for electronic circuit boards
JP3322575B2 (en) * 1996-07-31 2002-09-09 太陽誘電株式会社 Hybrid module and manufacturing method thereof
JPH11121897A (en) * 1997-10-14 1999-04-30 Fujitsu Ltd Structure and production of printed wiring board mounting a plurality of circuit elements

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120025861A1 (en) * 2010-08-02 2012-02-02 Samsung Electronics Co., Ltd. Test socket and test device having the same

Also Published As

Publication number Publication date
DE10030209A1 (en) 2001-01-04
KR20010007125A (en) 2001-01-26
KR100499196B1 (en) 2005-07-01

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