JP2000351093A - Soldering material, and electronic parts using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a soldering material which is small in initial void generation ratio, excellent in heat fatigue resistance in soldering parts largely different in coefficient of thermal expansion from each other, and capable of improving the level in die bonding an IC chip by specifying the Pb content and the Bi and Sb contents in the soldering material having the composition consisting of Sn, In and Ag of specified ratio and the balance Pb with inevitable impurities. SOLUTION: The soldering material has the composition consisting of, by weight, 2.0-3.0% Sn, 0.001-0.2% In, 0-2.0% Ag, and the balance Pb with inevitable impurities, and the Pb content is 95.5-97.99%, and the Bi and Sb contents are <=0.005%. In addition, metallic or non-metallic particles of high melting point are preferably contained by 0.001 to 5.0%, and the soldering material is suitable for soldering the IC chip to a substrate having a Ni or Cu surface. The particles of high melting point include metallic particles such as Cu and Ni, and non-metallic particles of oxide such as SiO2 and carbide such as SiC.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-temperature solder material containing Pb as a main component, and more particularly to a solder material suitable for die bonding of an IC chip for a semiconductor device and an electronic component using the same.

[0002]

2. Description of the Related Art Conventionally, when soldering electronic parts, Sn-P
A solder material having a basic composition of b is used.
Since the melting point of 63Sn-37Pb composition is as low as about 183 ° C., it is widely used because it has little thermal effect on electronic components. On the other hand, the solder joints are subject to repeated temperature changes between a temperature rise in an operating state of the electronic component and a normal temperature in a non-operating state. There is a concern that cracks may occur at the joints and develop to reduce the joint strength and the reliability of the electrical connection.

[0003] Therefore, in order to improve the thermal fatigue resistance, Sn-Pb solder is used as a base, and Bi, Ga, I
Proposals have been made to improve the thermal fatigue resistance by adding trace elements such as n and Sb. For example, JP-A-7-19519
In No. 1, Bi was added to Pb as a main component in an amount of 1% by weight or more and Sn was added in an amount of 2% by weight or more to Pb at room temperature within a solid solubility limit.
A high-temperature solder in which at least one of n and Ag is added to Pb at room temperature within a solid solubility limit has been proposed. Also, JP
No. 1-5189 proposes a solder material in which Bi, Sb or the like is added to a Pb-Sn solder as a base in order to enhance the fatigue resistance of a solder having a ball or bump shape. However, in the recent flow of high-density mounting, the temperature change in the operating state of electronic components has become more severe, and a solder material that can further suppress the crack generation speed is required.

[0004]

SUMMARY OF THE INVENTION In addition to the above requirements,
When connecting the IC chip to the board, the soldered IC
Since the horizontality of the chip is required, a solder material that spreads while maintaining homogeneity in the height direction is required. For example,
Referring to the state in which the electrodes and external leads of the IC chip shown in FIG. 1 are wired, reference numeral 1 in the figure indicates a die, 2 indicates solder, 3 indicates Ni plating, 4 indicates an IC chip, 5 indicates an electrode, 6 Is a wiring (gold wire), and 7 is an external lead. At this time, when the IC chip 4 is die-bonded to the die 1, if the IC chip 4 is connected at an angle, the wiring 6 may have a high height, which hinders the thinning of the semiconductor device. Also, there is a possibility that a trouble occurs due to the occurrence of wiring that is not sufficiently sealed with resin.

The present invention has been proposed in order to solve the above-mentioned problems, and has a low initial void generation rate of a solder material and a thermal expansion coefficient such as die bonding of an IC chip using Si. When soldering components that differ greatly from each other, using a solder material that excels in thermal fatigue resistance of the joined solder material and that can improve the levelness when IC chips are die-bonded, and using that solder material It is an object to provide an electronic component.

[0006]

Means for Solving the Problems In order to achieve the above object, the present inventors have conducted intensive studies and as a result, have found that the coexistence of a predetermined amount of Sn, In, Pb and selective Ag, Bi, S
The inventors have found that the above-mentioned object can be achieved by setting the content of b to a predetermined value or less, and have reached the present invention. That is, the present invention provides, as described in claim 1, 2.0 to 3.0% by weight of Sn,
0.001 to 0.2% by weight In, 0 to 2.0% by weight A
g and the remainder consist of Pb and unavoidable impurities.
When the content is 95.5 to 97.9% by weight and Bi, S
The solder material has a b content of 0.005% by weight or less.

According to the present invention, there is provided the present invention as described in claim 2.
0-3.0 wt% Sn, 0.05-0.2 wt% In,
0.5 to 2.0% by weight of Ag, and the balance is composed of Pb and unavoidable impurities, and the Pb content is 95.5 to 97.45.
It is a solder material having a content of Bi and Sb of 0.005% by weight or less, respectively.

[0008] The solder material according to claim 1 or 2,
It is preferable to further contain 0.001 to 5.0% by weight of metal or nonmetal particles.

The electronic component according to the present invention is obtained by soldering an IC chip to a substrate having a Ni or Cu surface, and the material used for the soldering is 2.0 to 3.0% by weight of Sn,
0.001 to 0.2% by weight In, 0 to 2.0% by weight A
g, and the balance is a solder material comprising Pb and unavoidable impurities, and the Pb content in the solder material is 95.5 to 97.
99% by weight and the content of Bi and Sb is 0.005 each.
% By weight or less.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be further described based on embodiments.

In the composition of the solder material according to the present invention, Pb as a raw material is preferably high purity Pb of 99.9% by weight or more. More preferably, it is 99.99% by weight or more. This is because the higher the purity of the Pb raw material, the more unavoidable impurities can be prevented from being mixed with Sb, Bi, and the like, which are harmful elements to the problems of the present invention.

A predetermined amount of Sn, In or in addition to Ag
In the presence of Pb, the Pb content was 95.5 to 97.9.
It must be in weight percent. Pb content is 95.5
If it is less than 9% by weight or more than 97.9% by weight,
The improvement in the number of heat-resistant fatigue cycles (heat-resistant fatigue resistance) is insufficient, and the inclination when the IC chip is die-bonded becomes large. Further, a more preferable Pb content for improving the number of heat-resistant fatigue cycles is 95.5 to 97.45% by weight.

[0013] Predetermined amount of Pb, In or in addition to Ag
And Sn content is 2.0 to 3.0% by weight.
It is necessary to be. If the Sn content is less than 2.0% by weight or exceeds 3.0% by weight, the number of cycles of heat-resistant fatigue is insufficiently improved, and the inclination when the IC chip is die-bonded becomes large.

A predetermined amount of Pb, Sn or, in addition, Ag
, The In content needs to be 0.001 to 0.2% by weight. In content 0.001
If the amount is less than 0.2% by weight or more than 0.2% by weight, the number of thermal fatigue cycles is insufficiently improved, and the inclination when the IC chip is die-bonded becomes large. In addition, when the content exceeds 0.2% by weight, there is a disadvantage that initial voids are largely generated. Further, the more preferable In content for improving the number of heat-resistant fatigue cycles is 0.05%.
~ 0.2% by weight.

Ag can be contained in an amount of 0 to 2.0% by weight in the presence of a predetermined amount of Pb, Sn and In.
If the Ag content exceeds 2.0% by weight, the improvement in the number of thermal fatigue cycles is insufficient, and the inclination when the IC chip is die-bonded becomes large. A more preferable Ag content for improving the number of heat-resistant fatigue cycles is 0.5
~ 2.0% by weight.

In the present invention, Bi and S in the solder material
The content of b must be 0.005% by weight or less. If at least one of Bi and Sb is contained in excess of 0.005% by weight, the improvement in the number of heat-resistant fatigue cycles will be insufficient, and the inclination when the IC chip is die-bonded will increase. Also, the generation of initial voids increases.

The solder material according to the present invention can be used after being processed into tapes, wires, pellets and the like. It can also be used as a composite material mixed with high melting point particles. The following method can be exemplified as a method of processing a tape or a wire. In the case of a tape, it is cast into an ingot, and then subjected to rolling and slitting to finish it into a tape shape having a predetermined dimension. The tape size is 0.05-0.5m in thickness
m and a range of 0.5 to 5.0 mm in width are selected. In the case of a wire, a strand is obtained by extrusion of an ingot or a quenching method in which a molten metal is jetted into water, and then finished into a wire having a predetermined dimension by wire drawing. As the wire size, a diameter of 0.
A range of from 0.05 to 5.0 mm is selected. Pellets are produced by pressing or shearing tape.

When the solder material according to the present invention is used for die bonding for joining an IC chip to a substrate, high melting point particles are added to the solder material of the composition of the present invention in order to further improve the horizontality between the IC chip and the substrate. It can be used as a mixed composite material. The melting point of the high melting point particles is 400 ° C. or higher,
The content is preferably 0.001 to 5.0% by weight, and the diameter of the particles is preferably 5 to 100 μm. Examples of the material of the high melting point particles include metal particles such as Cu and Ni, oxides such as SiO2, and nonmetal particles such as carbides such as SiC.

The solder material according to the present invention is preferably used when the material to be soldered is Ni, Cu or a material to be bonded is coated with a Ni film. As a method for forming the Ni film, a method such as plating or vapor deposition is used. The thickness of the Ni film formed by vapor deposition is preferably 1000 to 3000 Å.

[0020]

[Example 1] High purity P of 99.99% by weight or more
b, Sn and In were added so as to have the contents shown in Table 1, melted and cast, and the obtained ingot was rolled and pressed to prepare a solder pellet having a thickness of 0.1 mm × 5 mm × 4 mm. did. Using this solder pellet, a sample used for a measurement test was prepared as shown in FIG. In the drawing, reference numeral 1 denotes a copper die, 2 denotes solder that becomes the solder pellet, and 4 denotes an Si I
C chip (0.4mm thickness x 5mm x 4mm), 3 is I
This is a Ni film on the C chip. Fig. 2
Set at the position of the solder 2 of the above, and assemble the sample.
A sample was prepared by die bonding in a furnace of No. 1, and the initial void generation rate, the number of thermal fatigue cycles, and the inclination of the IC chip were measured. The measurement method will be described below.

A transmission image is created by irradiating soft X-rays from above the die-bonded sample shown in FIG. 2, and the density of the transmission image is analyzed by analyzing the density of the transmission image to measure the ratio of the light-colored portion viewed on a plane, and the initial void generation is performed. Rate (%). Table 2 shows the results.

The die-bonded sample shown in FIG.
After being exposed to an atmosphere of 65 ° C to + 150 ° C repeatedly, a soft X-ray is irradiated from the top of the sample to form a transmission image, and the density of the transmission image is analyzed to measure the ratio of the light-colored portion viewed on a plane. And the crack occurrence rate (%). The number of cycles until the crack occurrence rate reached 40% was measured and defined as the number of heat-resistant fatigue cycles. Table 2 shows the measurement results.

From the micrograph (100 times) of the cross section of the die-bonded sample shown in FIG.
The thickness of the solder between them (h1, h2 in FIG. 2) was measured.
The ratio is calculated based on the smaller one of h1 and h2 (example: h
2 / h1), the inclination of the IC chip. The measurement was performed on ten samples, and the average value was defined as the inclination of the IC chip.
Table 2 shows the measurement results.

[Examples 2 to 22, Comparative Examples 1 to 10] 9
High purity Pb of 9.99% by weight or more is added to Sn, In, Ag,
A sample was prepared and measured in the same manner as in Example 1 except that Sb and Bi were added so as to have the contents shown in Tables 1 and 3. The results are shown in Tables 2 and 4.

[0025]

[Table 1]

[0026]

[Table 2]

[0027]

[Table 3]

[0028]

[Table 4]

From the above measurement results, the following was confirmed. In Examples 1 to 22 having the solder composition of the present invention (Example of Claim 1), the number of heat-resistant fatigue cycles was 100%.
0 or more, the initial void generation rate was 5 to 10%, and the inclination of the IC chip was 1.5 or less, which was excellent. Furthermore, S
the content of n, In, and Ag is 2.0 to 3.0% by weight Sn;
0.05-0.2% by weight In, 0.5-2.0% by weight A
g of Examples 7 to 21 (Example of Claim 2)
Was more excellent, with the number of thermal fatigue cycles being 1250 or more and the initial void generation rate being 5%.

On the other hand, Comparative Examples 1 and 2 in which the Sn content is less than 2.0% by weight and Comparative Examples in which the Sn content exceeds 3.0% by weight, except for the composition range of the present invention except for Sn. Sample No. 3 was insufficient for the object of the present invention, with the number of heat-resistant fatigue cycles being 750 and the slope of the IC chip being 2.0. In addition, the composition of Comparative Example 4 containing no In except for In was in the composition range of the present invention, but the number of heat-resistant fatigue cycles was 750 and the slope of the IC chip was 2.0, which was insufficient for the object of the present invention. It was something. Except for In, the content of In is 0.2% by weight while being within the composition range of the present invention.
In Comparative Example 5, the number of thermal fatigue cycles was 50 or more.
0, the initial void generation rate was 20%, and the inclination of the IC chip was 2.5, which was insufficient for the object of the present invention.
Comparative Example 6 having an Ag content exceeding 2.2% by weight while having a composition other than Ag within the composition range of the present invention has a heat-resistant fatigue cycle number of 750 and an IC chip inclination of 2.5. It was insufficient for the task. Comparative Example 7 having a Pb content of less than 95.5% by weight, except for Pb, which is within the composition range of the present invention, has a heat-resistant fatigue cycle number of 850 and an IC chip inclination of 2.5. Was insufficient for the task of Except for Sb and Bi, the Sb and Bi content is 1.0 to 1.0 while being within the composition range of the present invention.
In Comparative Examples 8 to 10 which are 2.0% by weight, the number of thermal fatigue cycles is 250 and the initial void generation rate is 20 to 30.
%, The inclination of the IC chip was 2.5, which was insufficient for the object of the present invention.

[0031]

The present invention has the following effects. (Claim 1) 2.0 to 3.0% by weight Sn, 0.001 to
0.2% by weight of In, 0 to 2.0% by weight of Ag, and the balance is composed of Pb and unavoidable impurities. The Pb content in the solder material is 95.5 to 97.9% by weight, and the Bi and Sb content is Are 0.005% by weight or less in each case, so that the initial void generation rate in soldering is small, and the soldering portion in the solder joint of components having a significantly different coefficient of thermal expansion is excellent in heat fatigue resistance. Further, there is an effect that the horizontality when the IC chip is die-bonded can be improved. (Claim 2) The composition of the solder material is 2.0 to 3.0% by weight Sn, 0.05 to 0.2% by weight In, 0.5 to 2.0%.
Weight% Ag, and the balance consisting of Pb and unavoidable impurities,
When the Pb content is 95.5 to 97.45% by weight, Bi,
When the Sb content is 0.005% by weight or less,
The above effects can be made more effective. (Claim 3) In the above composition, metal or non-metal particles are added in an amount of 0.1.
Since the solder material further contains 001 to 5.0% by weight, the horizontality between the IC chip and the substrate can be further improved when the IC chip is used for die bonding for bonding the IC chip to the substrate. (Claim 4) Using a solder material having the composition of the present invention,
Since the electronic component is obtained by soldering an IC chip to a substrate having an i or Cu surface, it exhibits excellent characteristics such as initial void generation rate, heat fatigue resistance, and levelness of the IC chip at the soldered portion. The electronic component suitable for high-density mounting of the semiconductor device in the above was provided.

[Brief description of the drawings]

FIG. 1 is a partially enlarged view of a semiconductor device schematically showing a state in which electrodes of an IC chip and external leads are wired.

FIG. 2 is a simplified diagram of a sample used for a measurement test.

[Explanation of symbols]

 1: die 2: solder 3: Ni plating 4: IC chip 5: electrode 6: wiring 7: external lead

Claims (4)

[Claims] 1. 2.0 to 3.0% by weight of Sn, 0.001
0.2% by weight of In, 0 to 2.0% by weight of Ag, and the balance being Pb and inevitable impurities, wherein the Pb content in the solder material is 95.5 to 97.9% by weight. , Bi and Sb contents are each 0.005% by weight or less. 2. 2.0 to 3.0% by weight of Sn, 0.05 to
0.2% by weight of In, 0.5 to 2.0% by weight of Ag, and the balance being Pb and unavoidable impurities, wherein the Pb content in the solder material is 95.5 to 97.45% by weight. %, Bi and Sb contents are each 0.005% by weight or less. 3. The method according to claim 1, further comprising the step of:
The solder material according to claim 1, wherein the content is 001 to 5.0% by weight. 4. An electronic component in which an IC chip is soldered to a substrate having a Ni or Cu surface, wherein the material used for soldering is 2.0 to 3.0 wt% Sn, 0.001 to
0.2% by weight of In, 0 to 2.0% by weight of Ag, and the balance being Pb and unavoidable impurities, wherein the Pb content in the solder material is 95.5 to 97.9% by weight,
An electronic component, wherein Bi and Sb are each a solder material of 0.005% by weight or less.