JP2000349200A - Wiring board - Google Patents

Wiring board

Info

Publication number
JP2000349200A
JP2000349200A JP2000115683A JP2000115683A JP2000349200A JP 2000349200 A JP2000349200 A JP 2000349200A JP 2000115683 A JP2000115683 A JP 2000115683A JP 2000115683 A JP2000115683 A JP 2000115683A JP 2000349200 A JP2000349200 A JP 2000349200A
Authority
JP
Japan
Prior art keywords
wiring board
crystal phase
weight
glass
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000115683A
Other languages
Japanese (ja)
Other versions
JP3764626B2 (en
Inventor
Yoshitake Terashi
吉健 寺師
Shinya Kawai
信也 川井
Tetsuya Kimura
哲也 木村
Hitoshi Kumadawara
均 隈田原
Yasuhide Tami
保秀 民
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP10276260A external-priority patent/JP3085667B2/en
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000115683A priority Critical patent/JP3764626B2/en
Publication of JP2000349200A publication Critical patent/JP2000349200A/en
Application granted granted Critical
Publication of JP3764626B2 publication Critical patent/JP3764626B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Compositions Of Oxide Ceramics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which is burned at a temperature of 800 to 1000 deg.C, low in dielectric constant and low in dielectric loss in a high-frequency region, high in mechanical strength, similar to a printed board in thermal expansion coefficient, and high in mounting reliability. SOLUTION: A mixture of 50 to 95 wt.% glass powder which is capable of separating out diopside oxide crystal phase (DI) which contains SiO2, Al2O3, MgO and CaO, and 5 to 50 wt.% in a total weight of quartz powder and/or amorphous silica powder is molded and burned into a porcelain board which contains diopside oxide crystal phase (DI) and SiO2 crystal phase (Si), has a thermal expansion coefficient of 8.5 ppm/ deg.C or above in a temperature range from a room temperature to 400 deg.C, and is made to serve as the insulating board for a wiring board.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子収納用
パッケージや多層配線基板等に適用される配線基板に関
するものであり、特に、銅や銀と同時焼成が可能であ
り、また、プリント基板などの有機樹脂からなる外部回
路基板に対し、高い信頼性をもって実装可能な配線基板
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board applied to a package for accommodating a semiconductor element, a multi-layer wiring board, and the like. The present invention relates to a wiring board which can be mounted on an external circuit board made of an organic resin with high reliability.

【0002】[0002]

【従来技術】従来より、セラミック多層配線基板として
は、アルミナ質焼結体からなる絶縁基板の表面または内
部にタングステンやモリブデンなどの高融点金属からな
る配線層が形成されたものが最も普及している。
2. Description of the Related Art Heretofore, as a ceramic multilayer wiring board, a wiring board made of a refractory metal such as tungsten or molybdenum formed on the surface or inside of an insulating substrate made of an alumina sintered body has been most widely used. I have.

【0003】また、最近に至り、高度情報化時代を迎
え、使用される周波数帯域はますます高周波化に移行し
つつある。このような、高周波の信号の伝送を必要とす
る高周波配線基板においては、高周波信号を損失なく伝
送する上で、配線層を形成する導体の抵抗が小さいこ
と、また絶縁基板の高周波領域での誘電損失が小さいこ
とが要求される。
Further, recently, with the era of advanced information, the frequency band to be used is shifting to higher and higher frequencies. In such a high-frequency wiring board that requires transmission of a high-frequency signal, in order to transmit a high-frequency signal without loss, the resistance of the conductor forming the wiring layer is small, and the dielectric of the insulating substrate in the high-frequency region is low. Low loss is required.

【0004】ところが、従来のタングステン(W)や、
モリブデン(Mo)などの高融点金属は導体抵抗が大き
く、信号の伝搬速度が遅く、また、1GHz以上の高周
波領域の信号伝搬も困難であることから、W、Moなど
の金属に代えて銅、銀、金などの低抵抗金属を使用する
ことが必要となっている。このような低抵抗金属からな
る配線層は、融点が低く、アルミナと同時焼成すること
が不可能であるため、最近では、ガラス、またはガラス
とセラミックスとの複合材料からなる、いわゆるガラス
セラミックスを絶縁基板として用いた配線基板が開発さ
れつつある。例えば、特開昭60−240135号のよ
うに、ホウケイ酸亜鉛系ガラスに、Al 23、ジルコニ
ア、ムライトなどのフィラーを添加したものを低抵抗金
属と同時焼成した多層配線基板や、特開平5−2989
19号のように、ムライトやコージェライトを結晶相と
して析出させたガラスセラミック材料が提案されてい
る。
However, conventional tungsten (W),
Refractory metals such as molybdenum (Mo) have high conductor resistance
Signal propagation speed is slow, and high frequency
Since it is difficult to propagate signals in the wave region, W, Mo, etc.
Use low-resistance metals such as copper, silver, and gold instead of metals
It is necessary. Because of such low resistance metal
The wiring layer has a low melting point and should be co-fired with alumina.
Is impossible, because recently, glass, or glass
So-called glass made of composite material of ceramic and ceramic
Wiring board using ceramics as insulating substrate was developed.
It is getting. For example, JP-A-60-240135
In the case of zinc borosilicate glass, TwoOThree, Zirconi
A, low-resistance gold with fillers such as mullite
Multilayer wiring board co-fired with metal
As in No. 19, mullite and cordierite are used as crystalline phases.
Glass ceramic materials deposited by
You.

【0005】また、多層配線基板や半導体素子収納用パ
ッケージなどの配線基板をマサーボードなどの有機樹脂
を含むプリント基板に実装する上で、絶縁基板とチップ
部品あるいはプリント基板との熱膨張差に起因して発生
する応力により実装部分が剥離したり、クラックなどが
発生するのを防止する観点から、絶縁基板の熱膨張係数
がチップ部品やプリント基板のそれと近似していること
が望まれる。
Further, when mounting a wiring board such as a multilayer wiring board or a package for housing a semiconductor element on a printed board containing an organic resin such as a mother board, a difference in thermal expansion between an insulating board and a chip component or a printed board is caused. It is desired that the thermal expansion coefficient of the insulating substrate is similar to that of the chip component or the printed circuit board from the viewpoint of preventing the mounting portion from peeling or cracking due to the generated stress.

【0006】そこで、本出願人は、先に特開平9−17
904号に開示されるように、結晶化が可能なリチウム
珪酸ガラスを用いることにより、絶縁基板の熱膨張係数
を高めることができることを提案した。
Therefore, the present applicant has previously disclosed in Japanese Patent Laid-Open No. 9-17 / 1997.
As disclosed in Japanese Patent No. 904, it has been proposed that the use of crystallizable lithium silicate glass can increase the thermal expansion coefficient of an insulating substrate.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、前記従
来のガラスセラミックスは、銅、銀、金などの低抵抗金
属との同時焼成が可能であっても、熱膨張係数が3〜5
ppm/℃程度と低く、プリント基板(熱膨張係数12
〜15ppm/℃)に実装する場合に、実装の信頼性が
低く実用上満足できるものではなかった。
However, the conventional glass ceramic has a thermal expansion coefficient of 3 to 5 even if it can be co-fired with a low-resistance metal such as copper, silver or gold.
ppm / ° C, the printed circuit board (coefficient of thermal expansion 12
-15 ppm / ° C.), the reliability of the mounting was low and was not satisfactory in practice.

【0008】また、特開平9−17904号に開示され
るようにアルカリ金属を含有するガラスを用いる方法で
は、長時間高温多湿雰囲気に曝されると、アルカリ金属
が大気中の水分と反応し表面にシリケート結晶相が析出
して表面が変質してしまう場合があった。
In the method using a glass containing an alkali metal as disclosed in Japanese Patent Application Laid-Open No. Hei 9-17904, when exposed to a high-temperature and high-humidity atmosphere for a long time, the alkali metal reacts with the moisture in the atmosphere to produce a surface. In some cases, a silicate crystal phase is precipitated and the surface is deteriorated.

【0009】また、従来のガラスセラミックスは、ミリ
波などの高周波信号を用いる配線基板の絶縁基板として
具体的に検討されておらず、そのほとんどは誘電損失が
高く、十分満足できる高周波特性を有するものではなか
った。
Conventional glass ceramics have not been specifically studied as insulating substrates for wiring boards using high-frequency signals such as millimeter waves, and most of them have high dielectric loss and have satisfactory high-frequency characteristics. Was not.

【0010】従って、本発明は、金、銀、銅を配線導体
として多層化が可能な800〜1000℃での焼成が可
能であるとともに、プリント基板の熱膨張係数と近似し
た熱膨張係数を有し、高周波領域においても低誘電率で
かつ誘電損失が低い磁器を絶縁基板とする配線基板を提
供することを目的とする。
Therefore, the present invention can be fired at 800 to 1000 ° C., which can be multilayered using gold, silver and copper as wiring conductors, and has a thermal expansion coefficient close to that of a printed circuit board. It is another object of the present invention to provide a wiring board using a porcelain having a low dielectric constant and a low dielectric loss even in a high frequency region as an insulating substrate.

【0011】[0011]

【課題を解決するための手段】本発明者は、上記課題を
鋭意検討した結果、SiO2、Al23、MgOおよび
CaOを含み、ディオプサイド型酸化物結晶相を析出可
能なガラス粉末に対して、クォーツ粉末および/または
アモルファスシリカ粉末を特定の比率で配合した組成物
を用い、これを成形後、800〜1000℃の温度で焼
成して、ディオプサイド型酸化物結晶相を主結晶相とし
て析出させることによって、低誘電率で、かつプリント
基板の熱膨張係数と近似した熱膨張係数を有し、1GH
z以上の高周波領域においても低誘電損失を有する配線
基板の絶縁基板に適した磁器が得られることを知見し、
本発明に至った。
Means for Solving the Problems As a result of diligent studies on the above-mentioned problems, the present inventors have found that glass powder containing SiO 2 , Al 2 O 3 , MgO and CaO and capable of precipitating a diopside oxide crystal phase. On the other hand, a composition in which quartz powder and / or amorphous silica powder were blended at a specific ratio was used, and after molding, the composition was fired at a temperature of 800 to 1000 ° C. to form a diopside oxide crystal phase mainly. By precipitating as a crystal phase, it has a low dielectric constant and a thermal expansion coefficient close to the thermal expansion coefficient of a printed circuit board.
Finding that a porcelain suitable for an insulating substrate of a wiring board having low dielectric loss can be obtained even in a high frequency region of z or more,
The present invention has been reached.

【0012】即ち、本発明の配線基板は、SiO2、A
23、MgOおよびCaOを含むディオプサイド型酸
化物結晶相を析出可能なガラス粉末を50〜95重量%
と、クォーツ粉末および/またはアモルファスシリカ粉
末を総量で5〜50重量%との割合で含有する混合物を
成形後、焼成してディオプサイド型酸化物結晶相を主結
晶相として析出してなる磁器を絶縁基板とし、かつ該絶
縁基板の底面に取付けたボール状端子を具備することを
特徴とするものである。
That is, the wiring board of the present invention is made of SiO 2 , A
l 2 O 3, the glass powder can be precipitated diopside-type oxide crystal phase containing MgO and CaO 50 to 95 wt%
And a mixture containing quartz powder and / or amorphous silica powder in a total amount of 5 to 50% by weight, followed by firing to deposit a diopside oxide crystal phase as a main crystal phase. Is an insulating substrate, and is provided with a ball-shaped terminal attached to the bottom surface of the insulating substrate.

【0013】ここで、前記ガラス粉末が、SiO245
〜55重量%と、Al233〜10重量%と、MgO1
3〜24重量%と、CaO20〜30重量%とからなる
ことが望ましい。
Here, the glass powder is SiO 2 45
And 55 wt%, and Al 2 O 3 3 to 10 wt%, MgO1
Desirably, it is composed of 3 to 24% by weight and 20 to 30% by weight of CaO.

【0014】また、前記絶縁基板が、さらに、SiO2
結晶相を含有し、且つ室温から400℃における熱膨張
係数が8.5ppm/℃以上、誘電率が7以下、60〜
77GHzでの誘電損失が15×10-4以下の磁器から
なることが望ましい。
The insulating substrate may further comprise SiO 2
It contains a crystalline phase, has a thermal expansion coefficient of 8.5 ppm / ° C. or more from room temperature to 400 ° C., a dielectric constant of 7 or less, and 60 to 60 ° C.
It is desirable to use a porcelain having a dielectric loss of 15 × 10 −4 or less at 77 GHz.

【0015】[0015]

【発明の実施の形態】本発明の配線基板における絶縁基
板として用いる磁器組成物は、SiO2、Al23、M
gOおよびCaOを含み、ディオプサイド型酸化物結晶
相を析出可能なガラス粉末を50〜95重量%と、クォ
ーツ粉末および/またはアモルファスシリカ粉末の総量
で5〜50重量%との割合で含有するものである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The porcelain composition used as an insulating substrate in the wiring board of the present invention is SiO 2 , Al 2 O 3 , M
A glass powder containing gO and CaO and capable of precipitating a diopside-type oxide crystal phase in a proportion of 50 to 95% by weight and a total of 5 to 50% by weight of quartz powder and / or amorphous silica powder. Things.

【0016】各成分組成を上記の範囲に限定したのは、
上記ガラス粉末が50重量%よりも少ないと、1000
℃以下の温度での焼成により磁器を緻密化させることが
困難であり、95重量%よりも多いと、ガラスの結晶化
が不十分となり、誘電損失の大きなガラス相が残留し、
磁器の高周波での誘電損失が増大するためである。ガラ
ス粉末の特に望ましい範囲は、60〜85重量%であ
る。
The reason for limiting each component composition to the above range is as follows.
If the glass powder is less than 50% by weight, 1000
It is difficult to densify the porcelain by firing at a temperature of not more than 95 ° C., and if it is more than 95% by weight, crystallization of the glass becomes insufficient and a glass phase having a large dielectric loss remains,
This is because dielectric loss at high frequencies of the porcelain increases. A particularly desirable range for the glass powder is 60-85% by weight.

【0017】ここで、前記ガラス粉末は、ガラスの軟化
点が500〜800℃であることが望ましく、その組成
はSiO245〜55重量%、Al233〜10重量
%、MgO13〜24重量%、CaO20〜30重量%
の割合であることが望ましい。
Here, the glass powder desirably has a glass softening point of 500 to 800 ° C., and its composition is 45 to 55% by weight of SiO 2 , 3 to 10% by weight of Al 2 O 3 , and 13 to 24% of MgO. Wt%, CaO 20-30 wt%
Is desirable.

【0018】一般に、Al23やSiO2を含むガラス
相の熱膨張係数は4〜5ppm/℃と低い。これに対
し、MgCaSi26のディオプサイド型酸化物結晶相
は約8〜9ppm/℃の高熱膨張特性を有することか
ら、上記組成のガラス粉末よりディオプサイド型酸化物
結晶相を析出させるとともに、さらに13〜20ppm
/℃の高熱膨張係数を有するクォーツを特定量添加する
ことにより、熱膨張係数を8.5ppm/℃以上に高め
ることが可能である。
Generally, the glass phase containing Al 2 O 3 or SiO 2 has a low thermal expansion coefficient of 4 to 5 ppm / ° C. On the other hand, since the diopside oxide crystal phase of MgCaSi 2 O 6 has a high thermal expansion characteristic of about 8 to 9 ppm / ° C., the diopside oxide crystal phase is precipitated from the glass powder having the above composition. Together with 13-20 ppm
By adding a specific amount of quartz having a high thermal expansion coefficient of / ° C, the thermal expansion coefficient can be increased to 8.5 ppm / ° C or more.

【0019】しかも、ディオプサイド並びにクォーツは
ミリ波帯での誘電損失が小さいものであることから、磁
器の低誘電損失化をも図ることができる。
Moreover, since diopside and quartz have small dielectric loss in the millimeter wave band, the dielectric loss of the porcelain can be reduced.

【0020】また、MgCaSi26のディオプサイド
型酸化物結晶相は、誘電率6〜8を有するものである
が、これに誘電率4〜4.5のクォーツ粉末および/ま
たは誘電率3.8〜4.2のアモルファスシリカ粉末を
特定量添加することにより、誘電率を5.9以下に低誘
電率化することも可能である。
The diopside-type oxide crystal phase of MgCaSi 2 O 6 has a dielectric constant of 6 to 8, which is added to quartz powder having a dielectric constant of 4 to 4.5 and / or a dielectric constant of 3 to 3. The dielectric constant can be reduced to 5.9 or less by adding a specific amount of amorphous silica powder of 0.8 to 4.2.

【0021】上記のガラスからのディオプサイド型酸化
物結晶相の析出割合を高める上では、ガラス中における
CaOとMgOの合計量が35〜50重量%であること
が望ましい。
In order to increase the precipitation ratio of the diopside oxide crystal phase from the above glass, it is desirable that the total amount of CaO and MgO in the glass is 35 to 50% by weight.

【0022】クォーツ粉末および/またはアモルファス
シリカ粉末の総量が5重量%よりも少ないと、ガラスの
残存率が高くなり、誘電損失が大きくなる。逆に、50
重量%を越えると、難焼結性となり、1000℃以下の
焼成温度で緻密化することができない。クォーツおよび
/またはアモルファスシリカの総量の望ましい範囲は、
15〜40重量%である。
When the total amount of the quartz powder and / or the amorphous silica powder is less than 5% by weight, the residual ratio of the glass increases, and the dielectric loss increases. Conversely, 50
If the content exceeds 10% by weight, sintering becomes difficult, and densification cannot be performed at a firing temperature of 1000 ° C. or less. A desirable range of the total amount of quartz and / or amorphous silica is:
15 to 40% by weight.

【0023】また、添加したクォーツは、焼成によりク
オーツの他にクリストバライト、トリジマイトなどに相
変態してもよいが、クリストバライトは、200℃付近
に熱膨張係数の屈曲点を有することから熱膨張挙動、誘
電特性の点でクォーツとして残存することが望ましい。
The added quartz may undergo a phase transformation to cristobalite, tridymite, etc. in addition to quartz by calcination. Desirably, it remains as quartz in terms of dielectric properties.

【0024】上記の態様の磁器組成物は、800〜10
00℃の温度範囲での焼成によって相対密度97%以上
まで緻密化することができ、これによって形成される磁
器の全体組成としては、Si、Al、MgおよびCaの
各金属元素の酸化物換算による合量を100重量%とし
た時、SiO2を55〜75重量%、Al23を3〜5
重量%、MgOを10〜14重量%、CaO15〜21
重量%の割合から構成されることが望ましい。
[0024] The porcelain composition of the above embodiment has a composition of 800 to 10
By sintering in a temperature range of 00 ° C., the density can be reduced to a relative density of 97% or more, and the overall composition of the porcelain formed thereby is calculated based on oxides of metal elements of Si, Al, Mg and Ca. when the total amount is 100 wt%, a SiO 2 55 to 75 wt%, the Al 2 O 3 3 to 5
%, MgO 10-14% by weight, CaO 15-21
Desirably, it consists of a percentage by weight.

【0025】また、上記磁器は、図1の磁器組織の概略
図に示すように、結晶相として、ガラスから析出する少
なくともMgOとCaOとSiO2とを含むディオプサ
イド型酸化物結晶相MgCaSi26(DI)以外に、
SiO2結晶相(Si)を含有するものであり、それ以
外にも、Ca2MgSi27(akermanit
e)、CaMgSiO4(monticellit
e)、Ca3MgSi28(merwinite)等高
熱膨張を有する類似の相が析出してもよい。
As shown in the schematic diagram of the porcelain structure in FIG. 1, the porcelain has a diopside oxide crystal phase MgCaSi 2 containing at least MgO, CaO and SiO 2 precipitated from glass as a crystal phase. In addition to O 6 (DI),
It contains a SiO 2 crystal phase (Si), and also contains Ca 2 MgSi 2 O 7 (akermanit).
e), CaMgSiO 4 (monticellit)
e), similar phases with high thermal expansion, such as Ca 3 MgSi 2 O 8 (merwinite), may precipitate.

【0026】本発明の配線基板における絶縁基板用の磁
器は、少なくともMg、Ca、Siを含むディオプサイ
ド型酸化物結晶相と、SiO2結晶相とを含有し、且つ
室温から400℃における熱膨張係数が8.5ppm/
℃以上、特に9ppm/℃以上、誘電率が7以下、特に
6.5以下、60〜77GHzでの誘電損失が15×1
-4以下であることが重要である。
The porcelain for an insulating substrate in the wiring board of the present invention contains a diopside-type oxide crystal phase containing at least Mg, Ca and Si, and a SiO 2 crystal phase, and has a heat resistance from room temperature to 400 ° C. Expansion coefficient is 8.5 ppm /
° C or higher, particularly 9 ppm / ° C or higher, dielectric constant of 7 or lower, particularly 6.5 or lower, and a dielectric loss of 15 × 1 at 60 to 77 GHz.
It is important that it is 0-4 or less.

【0027】したがって、本発明の配線基板における磁
器組成物は、1GHz以上、特に20GHz以上、さら
には50GHz以上、またさらには70GHz以上の高
周波用配線基板の絶縁層を形成するのに好適な磁器であ
る。本発明によれば、この磁器を配線基板の絶縁基板と
して用いるものであるが、高周波信号の伝送特性への影
響を低減するため、誘電率が7以下、特に6以下と低い
ことが望ましい。
Therefore, the porcelain composition in the wiring board of the present invention is a porcelain suitable for forming an insulating layer of a high-frequency wiring board of 1 GHz or more, especially 20 GHz or more, further 50 GHz or more, or even 70 GHz or more. is there. According to the present invention, this porcelain is used as an insulating substrate of a wiring board. However, in order to reduce the influence on the transmission characteristics of high-frequency signals, it is desirable that the dielectric constant be as low as 7 or less, particularly 6 or less.

【0028】また、磁器の室温から400℃における熱
膨張係数は、実装するプリント基板等の熱膨張係数に近
似するように適宜調整することが望ましい。これは、上
記の磁器の熱膨張係数が実装されるプリント基板のそれ
と差がある場合、半田実装時や半導体素子の作動停止に
よる繰り返し温度サイクルによって、プリント基板とパ
ッケージとの実装部に熱膨張差に起因する応力が発生
し、実装部にクラック等が発生し、実装構造の信頼性を
損ねてしまうためである。
It is desirable that the coefficient of thermal expansion of the porcelain from room temperature to 400 ° C. is appropriately adjusted so as to approximate the coefficient of thermal expansion of the printed circuit board to be mounted. This is because if the thermal expansion coefficient of the porcelain is different from that of the printed board on which it is mounted, the difference in thermal expansion between the printed board and the package due to repeated temperature cycles during solder mounting or when the operation of the semiconductor element is stopped. This causes a stress due to the above, and cracks or the like are generated in the mounting portion, which impairs the reliability of the mounting structure.

【0029】具体的には、プリント基板との整合を図る
上ではプリント基板との熱膨張係数の差が2ppm/℃
以下であることが望ましい。
Specifically, in order to achieve matching with the printed board, the difference in thermal expansion coefficient between the printed board and the printed board is 2 ppm / ° C.
It is desirable that:

【0030】次に、上記磁器組成物を用い絶縁基板とな
る磁器を製造する方法について説明する。まず、出発原
料として、SiO2、Al23、MgO、CaOを含み
ディオプサイド型結晶相を析出可能な結晶化ガラス粉末
を50〜95重量%と、クォーツおよび/またはアモル
ファスシリカの総量5〜50重量%との割合で秤量混合
する。
Next, a method of manufacturing a porcelain serving as an insulating substrate using the above-described porcelain composition will be described. First, as a starting material, 50 to 95% by weight of a crystallized glass powder containing SiO 2 , Al 2 O 3 , MgO, and CaO and capable of precipitating a diopside crystal phase, and a total amount of quartz and / or amorphous silica of 5% Weigh and mix at a rate of 5050% by weight.

【0031】そして、この混合粉末を用いてドクターブ
レード法やカレンダーロール法、あるいは圧延法、プレ
ス成形法の周知の成型法により所定形状の成形体を作製
した後、該成形体を800〜1000℃の酸化性雰囲気
または不活性雰囲気中で焼成することにより作製するこ
とができる。
Then, using the mixed powder, a molded article having a predetermined shape is produced by a doctor blade method, a calender roll method, a rolling method, or a well-known molding method such as a press molding method. By baking in an oxidizing atmosphere or an inert atmosphere.

【0032】また、配線層を具備する配線基板を作製す
るには、前記混合粉末に、適当な有機溶剤、溶媒を用い
混合してスラリーを調製し、これを従来周知のドクター
ブレード法やカレンダーロール法、あるいは圧延法、プ
レス成形法により、シート状に成形する。そして、この
シート状成形体に所望によりスルーホールを形成した
後、スルーホール内に、銅、金、銀のうちの少なくとも
1種を含む金属ペーストを充填する。そして、シート状
成形体表面には、高周波信号が伝送可能な高周波線路パ
ターン等に前記金属ペーストを用いてスクリーン印刷
法、グラビア印刷法などによって配線層の厚みが5〜3
0μmとなるように、印刷塗布する。
In order to manufacture a wiring board having a wiring layer, a slurry is prepared by mixing the mixed powder with an appropriate organic solvent and a solvent, and the slurry is prepared by a conventional doctor blade method or calender roll. It is formed into a sheet by a rolling method or a press forming method. Then, after a through-hole is formed in this sheet-like molded body as desired, the through-hole is filled with a metal paste containing at least one of copper, gold, and silver. Then, on the surface of the sheet-like molded body, the thickness of the wiring layer is reduced to 5 to 3 by a screen printing method, a gravure printing method, or the like using the metal paste in a high-frequency line pattern or the like capable of transmitting a high-frequency signal.
Print and apply so that the thickness becomes 0 μm.

【0033】その後、複数のシート状成形体を位置合わ
せして積層圧着し、800〜1000℃の窒素ガスや窒
素−酸素混合ガス等の非酸化性雰囲気で焼成することに
より、配線基板を作製することができる。そして、この
配線基板の表面には、適宜半導体素子等のチップ部品が
搭載され配線層と信号の伝達が可能なように接続され
る。接続方法としては、配線層上に直接搭載させて接続
させたり、あるいは50μm程度の樹脂、Ag−エポキ
シ、Ag−ガラス、Au−Si等の樹脂、金属、セラミ
ックス等の接着剤によりチップ部品を絶縁基板表面に固
着し、ワイヤーボンディングや、TABテープなどによ
り配線層と半導体素子とを接続する。
Thereafter, a plurality of sheet-like molded bodies are aligned and laminated and pressed, and fired in a non-oxidizing atmosphere such as a nitrogen gas or a nitrogen-oxygen mixed gas at 800 to 1000 ° C. to produce a wiring substrate. be able to. A chip component such as a semiconductor element is appropriately mounted on the surface of the wiring board, and is connected to the wiring layer so that signals can be transmitted. As a connection method, the chip component is directly mounted on the wiring layer and connected, or a chip component is insulated by a resin of about 50 μm, a resin such as Ag-epoxy, Ag-glass, Au-Si, or an adhesive such as metal or ceramic. The wiring layer is fixed to the substrate surface, and the wiring layer and the semiconductor element are connected by wire bonding, TAB tape, or the like.

【0034】なお、この半導体素子としては、Si系や
GaAs系等のチップ部品が使用できるが、特に熱膨張
係数の近似性の点では、最もGaAs系のチップ部品の
実装に有効である。
As the semiconductor element, a chip component such as a Si-based or GaAs-based component can be used, but it is most effective for mounting a GaAs-based chip component in terms of the similarity of the thermal expansion coefficient.

【0035】さらに、半導体素子が搭載された配線基板
表面に、絶縁基板と同種の絶縁材料や、その他の絶縁材
料、あるいは放熱性が良好な金属等からなり、電磁波遮
蔽性を有するキャップをガラス、樹脂、ロウ材等の接着
剤により接合してもよく、これにより半導体素子を気密
に封止することができる。
Further, a cap made of an insulating material of the same kind as the insulating substrate, another insulating material, or a metal having a good heat radiation property and having an electromagnetic wave shielding property is provided on the surface of the wiring board on which the semiconductor element is mounted, with a glass, The semiconductor element may be hermetically sealed by bonding with an adhesive such as a resin or a brazing material.

【0036】上記磁器組成物を好適に使用しうる本発明
の配線基板の具体的な構造とその実装構造について図2
をもとに説明する。図2は、半導体収納用パッケージ、
特に、接続端子がボール状端子からなるボールグリッド
アレイ(BGA)型パッケージの概略断面図である。
FIG. 2 shows a specific structure of the wiring board of the present invention in which the above-mentioned ceramic composition can be suitably used and a mounting structure thereof.
It is explained based on. FIG. 2 shows a semiconductor storage package,
In particular, it is a schematic cross-sectional view of a ball grid array (BGA) type package in which connection terminals include ball terminals.

【0037】図2によれば、パッケージAは、絶縁材料
からなる絶縁基板1と蓋体2によりキャビティ3が形成
されており、そのキャビティ3内には、GaAs等のチ
ップ部品4が前述の接着剤により実装されている。
According to FIG. 2, the package A has a cavity 3 formed by an insulating substrate 1 made of an insulating material and a lid 2, in which a chip component 4 such as GaAs is bonded. Implemented by agent.

【0038】また、絶縁基板1の表面および内部には、
チップ部品4と電気的に接続された配線層5が形成され
ている。この配線層5は、高周波信号の伝送時に導体損
失を極力低減するために、銅、銀あるいは金などの低抵
抗金属からなることが望ましい。また、この配線層5に
1GHz以上の高周波信号を伝送する場合には、高周波
信号が損失なく伝送されることが必要となるため、配線
層5は周知のストリップ線路、マイクロストリップ線
路、コプレーナ線路、誘電体導波管線路のうちの少なく
とも1種から構成される。
Further, on the surface and inside of the insulating substrate 1,
A wiring layer 5 electrically connected to the chip component 4 is formed. The wiring layer 5 is desirably made of a low-resistance metal such as copper, silver, or gold in order to minimize conductor loss when transmitting a high-frequency signal. When transmitting a high-frequency signal of 1 GHz or more to the wiring layer 5, it is necessary to transmit the high-frequency signal without loss. Therefore, the wiring layer 5 includes a known strip line, microstrip line, coplanar line, It is composed of at least one of dielectric waveguide lines.

【0039】また、図2のパッケージAにおいて、絶縁
基板1の底面には、接続用電極層6が被着形成されてお
り、パッケージA内の配線層5と接続されている。そし
て、接続用電極層6には、半田などのロウ材7によりボ
ール状端子8が被着形成されている。
In the package A of FIG. 2, a connection electrode layer 6 is formed on the bottom surface of the insulating substrate 1 and is connected to the wiring layer 5 in the package A. A ball-shaped terminal 8 is formed on the connection electrode layer 6 with a brazing material 7 such as solder.

【0040】また、上記パッケージAを外部回路基板B
に実装するには、図2に示すように、ポリイミド樹脂、
エポキシ樹脂、フェノール樹脂などの有機樹脂を含む絶
縁材料からなる絶縁基板9の表面に配線導体10が形成
された外部回路基板Bに対して、ロウ材を介して実装さ
れる。具体的には、パッケージAにおける絶縁基板1の
底面に取付けられているボール状端子8と、外部回路基
板Bの配線導体10とを当接させてPb−Snなどの半
田等のロウ材11によりロウ付けして実装される。ま
た、ボール状端子8自体を溶融させて配線導体10と接
続させてもよい。
The package A is connected to an external circuit board B.
As shown in FIG. 2, a polyimide resin,
An external circuit board B having a wiring conductor 10 formed on the surface of an insulating substrate 9 made of an insulating material containing an organic resin such as an epoxy resin or a phenol resin is mounted via a brazing material. Specifically, the ball-shaped terminals 8 attached to the bottom surface of the insulating substrate 1 in the package A and the wiring conductors 10 of the external circuit board B are brought into contact with each other, and the brazing material 11 such as a solder such as Pb-Sn is used. It is mounted with brazing. Further, the ball-shaped terminal 8 itself may be melted and connected to the wiring conductor 10.

【0041】本発明によれば、GaAs等のチップ部品
4をロウ付けや接着剤により実装したり、このようなボ
ール状端子8を介在したロウ付けによりプリント基板等
の外部回路基板に実装されるような表面実装型のパッケ
ージにおいて、外部回路基板の絶縁基板との熱膨張差を
従来のセラミック材料よりも小さくできることから、か
かる実装構造に対して、熱サイクルが印加された場合に
おいても、実装部での応力の発生を抑制することができ
る結果、実装構造の長期信頼性を高めることができる。
According to the present invention, the chip component 4 such as GaAs is mounted on an external circuit board such as a printed board by brazing or mounting with an adhesive or by brazing with such ball-shaped terminals 8 interposed therebetween. In such a surface mount type package, the thermal expansion difference between the external circuit board and the insulating substrate can be made smaller than that of the conventional ceramic material. As a result, the long-term reliability of the mounting structure can be improved.

【0042】[0042]

【実施例】下記の組成からなる2種のディオプサイド型
酸化物結晶相を析出可能な結晶化ガラスを準備した。 ガラスA:SiO250重量%−Al235.5重量% −MgO18.5重量%−CaO26重量% ガラスB:SiO252重量%−Al235重量% −MgO18重量%−CaO25重量% そして、この結晶化ガラス粉末に対して、平均粒径が5
μmのクオーツおよび平均粒径が2μmのアモルファス
シリカ粉末を用いて、焼成後の磁器が表1、表2の組成
となるように混合した。そして、この混合物に有機バイ
ンダ、可塑剤、トルエンを添加し、スラリーを調製した
後、このスラリーを用いてドクターブレード法により厚
さ300μmのグリーンシートを作製した。そして、こ
のグリーンシートを10〜15枚積層し、50℃の温度
で100kg/cm2の圧力を加えて熱圧着した。得ら
れた積層体を水蒸気含有/窒素雰囲気中、700℃で脱
バインダ処理を行った後、乾燥窒素中で表1、表2の条
件で焼成し絶縁基板用磁器を得た。
EXAMPLE A crystallized glass capable of precipitating two kinds of diopside oxide crystal phases having the following compositions was prepared. Glass A: SiO 2 50 wt% -Al 2 O 3 5.5 wt% -MgO18.5 wt% -CaO26 wt% Glass B: SiO 2 52 wt% -Al 2 O 3 5 wt% -MgO18 wt% -CaO25 % By weight and the average particle size is 5
Using a quartz having a particle size of μm and an amorphous silica powder having an average particle size of 2 μm, they were mixed so that the porcelain after firing had the compositions shown in Tables 1 and 2. Then, an organic binder, a plasticizer, and toluene were added to this mixture to prepare a slurry, and then a green sheet having a thickness of 300 μm was produced using the slurry by a doctor blade method. Then, 10 to 15 green sheets were laminated and thermocompression-bonded at a temperature of 50 ° C. by applying a pressure of 100 kg / cm 2 . The obtained laminate was subjected to a binder removal treatment in a steam-containing / nitrogen atmosphere at 700 ° C., and then fired in dry nitrogen under the conditions shown in Tables 1 and 2 to obtain a porcelain for an insulating substrate.

【0043】得られた磁器について誘電率、誘電正接を
以下の方法で評価した。測定は形状、直径2〜7mm、
厚み1.5〜2.5mmの形状に切り出し、60GHz
にてネットワークアナライザー、シンセサイズドスイー
パーを用いて誘電体円柱共振器法により行った。測定で
は、NRDガイド(非放射性誘電体線路)で、誘電体共
振器の励起を行い、TE021、TE031モードの共振特性
より、誘電率、誘電損失を算出した。
The obtained ceramics were evaluated for permittivity and dielectric loss tangent by the following methods. The measurement is shape, diameter 2-7mm,
Cut out to 1.5-2.5mm thickness, 60GHz
, And a dielectric cylinder resonator method using a network analyzer and a synthesized sweeper. In the measurement, the dielectric resonator was excited by an NRD guide (non-radiative dielectric line), and the dielectric constant and the dielectric loss were calculated from the resonance characteristics of the TE 021 and TE 031 modes.

【0044】また、室温から400℃における熱膨張曲
線をとり、熱膨張係数を算出した。さらに、焼結体中に
おける結晶相をX線回折チャートから同定した。結果は
表1、表2に示した。
A thermal expansion curve from room temperature to 400 ° C. was taken to calculate a thermal expansion coefficient. Further, the crystal phase in the sintered body was identified from the X-ray diffraction chart. The results are shown in Tables 1 and 2.

【0045】また、一部の試料については、フィラー成
分として、クォーツおよびアモルファスシリカに代わ
り、ZrO2粉末、CaZrO3粉末を用いて同様に磁器
を作製し評価した(試料No.7〜9、20〜22)。ま
た、上記結晶化ガラスA、Bに代わり、以下の組成から
なるガラスCを用いて同様に評価を行った(試料No.2
3、24)。 ガラスC:SiO210.4重量%−Al232.5重量% −B2345.3重量%−CaO35.2重量% −Na2O6.6重量%
For some of the samples, ZrO 2 powder and CaZrO 3 powder were used in place of quartz and amorphous silica as filler components, and porcelain was similarly prepared and evaluated (samples Nos. 7 to 9, 20 to 20). ~ 22). In addition, the same evaluation was performed using glass C having the following composition instead of the crystallized glasses A and B (Sample No. 2).
3, 24). Glass C: SiO 2 10.4 wt% -Al 2 O 3 2.5 wt% -B 2 O 3 45.3 wt% -CaO35.2 wt% -Na 2 O6.6 wt%

【0046】[0046]

【表1】 [Table 1]

【0047】[0047]

【表2】 [Table 2]

【0048】表1、2の結果から明らかなように、Si
2、Al23、MgO、CaOを含むガラス量が95
重量%を越える試料No.1では、誘電損失が15×1
-4を越えてしまい、ガラス量が50重量%よりも少な
い試料No.10〜12および19では、低温で焼結す
ることが困難であり、緻密化しなかった。試料No.7
〜9および20〜22は、ガラスへの添加成分として、
ZrO2やCaZrO3を配合したものであるが、焼結体
中にZrO2やCaZrO3などが析出し誘電損失が増大
した。また、ガラスとして、B23を多く含むガラスC
を用いた試料No.23、24では、Bを含むガラスが
多く残留し、誘電損失が大きくなる傾向にあった。
As is clear from the results in Tables 1 and 2, Si
The glass content including O 2 , Al 2 O 3 , MgO and CaO is 95
% Of the sample no. At 1, the dielectric loss is 15 × 1
Sample No. 0-4 was exceeded and the glass content was less than 50% by weight. In Nos. 10 to 12 and 19, it was difficult to perform sintering at a low temperature, and they were not densified. Sample No. 7
-9 and 20-22 are added components to the glass,
Although ZrO 2 and CaZrO 3 were blended, ZrO 2 and CaZrO 3 were precipitated in the sintered body and dielectric loss increased. In addition, glass C containing a large amount of B 2 O 3 is used as the glass.
Using the sample No. In Nos. 23 and 24, a large amount of glass containing B remained and the dielectric loss tended to increase.

【0049】これに対して、本発明に従い、特定量のク
ォーツ粉末を添加した試料No.2〜6、13、15〜
18では、磁器中にクォーツ相の析出が見られ、また、
いずれも熱膨張係数が8.5ppm/℃以上、60GH
zの測定周波数にて、誘電率7以下、誘電損失が15×
10-4以下の優れた特性を有するものであった。
On the other hand, according to the present invention, sample no. 2-6, 13, 15
In No. 18, a quartz phase was precipitated in the porcelain,
All have a thermal expansion coefficient of 8.5 ppm / ° C. or more and 60 GH
At the measurement frequency of z, the dielectric constant is 7 or less and the dielectric loss is 15 ×
It had excellent properties of 10 -4 or less.

【0050】また、特定量のアモルファスシリカ粉末を
添加した試料No.13では、磁器中にアモルファスシ
リカ相が存在し、また、60GHzの測定周波数にて、
誘電率5.9以下、誘電損失が15×10-4以下の優れ
た特性を有するものであった。
Sample No. 1 containing a specific amount of amorphous silica powder was added. In No. 13, an amorphous silica phase exists in the porcelain, and at a measurement frequency of 60 GHz,
It had excellent characteristics with a dielectric constant of 5.9 or less and a dielectric loss of 15 × 10 −4 or less.

【0051】[0051]

【発明の効果】以上詳述した通り、本発明の配線基板に
よれば、絶縁基板を1000℃以下の低温にて焼成でき
ることから、銅などの低抵抗金属による配線層を形成で
き、しかも1GHz以上の高周波領域において、低誘電
率、低誘電損失を有することから、高周波信号を極めて
良好に損失なく伝送することができる。しかも、この絶
縁基板は、プリント基板と近似した熱膨張特性に制御で
きることから、有機樹脂を含む絶縁基板を具備するプリ
ント基板などのマザーボードに対してロウ材等により実
装した場合において優れた耐熱サイクル性を有し、高信
頼性の実装構造を提供できる。
As described in detail above, according to the wiring board of the present invention, since the insulating substrate can be fired at a low temperature of 1000 ° C. or less, a wiring layer of a low-resistance metal such as copper can be formed, and moreover, 1 GHz or more. In this high-frequency region, a low dielectric constant and a low dielectric loss allow a high-frequency signal to be transmitted very favorably and without loss. In addition, since this insulating substrate can be controlled to have a thermal expansion characteristic similar to that of a printed circuit board, it has excellent heat cycle resistance when mounted on a motherboard such as a printed circuit board having an insulating substrate containing an organic resin with a brazing material or the like. And a highly reliable mounting structure can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の組成物を焼成して得られる磁器の組織
を説明するための概略図である。
FIG. 1 is a schematic diagram for explaining the structure of porcelain obtained by firing a composition of the present invention.

【図2】本発明の配線基板の一例である半導体素子収納
用パッケージの実装構造の一例を説明するための概略断
面図である。
FIG. 2 is a schematic cross-sectional view for explaining an example of a mounting structure of a package for housing a semiconductor element which is an example of a wiring board of the present invention.

【符号の説明】[Explanation of symbols]

Si SiO2結晶相 DI ディオプサイド型酸化物結晶相 G 非晶質(ガラス)相 AM アモルファスシリカ相 A 半導体素子収納用パッケージ B 外部回路基板 1 絶縁基板 2 蓋体 3 キャビティ 4 チップ部品 5 配線層 6 接続用電極層 7 ロウ材 8 ボール状端子 9 絶縁基板 10 配線導体 11 ロウ材Si SiO 2 crystal phase DI Diopside-type oxide crystal phase G Amorphous (glass) phase AM Amorphous silica phase A Package for storing semiconductor elements B External circuit board 1 Insulating substrate 2 Lid 3 Cavity 4 Chip component 5 Wiring layer 6 connecting electrode layer 7 brazing material 8 ball-shaped terminal 9 insulating substrate 10 wiring conductor 11 brazing material

───────────────────────────────────────────────────── フロントページの続き (72)発明者 隈田原 均 鹿児島県国分市山下町1番4号 京セラ株 式会社総合研究所内 (72)発明者 民 保秀 鹿児島県国分市山下町1番4号 京セラ株 式会社総合研究所内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hitoshi Kumadahara 1-4 Yamashita-cho, Kokubu-shi, Kagoshima Inside the Kyocera Research Institute (72) Inventor Yasuhide Minami 1-4-Yamashita-cho, Kokubu-shi, Kagoshima Kyocera Research Institute

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】SiO2、Al23、MgOおよびCaO
を含むディオプサイド型酸化物結晶相を析出可能なガラ
ス粉末を50〜95重量%と、クォーツ粉末および/ま
たはアモルファスシリカ粉末を5〜50重量%との割合
で含有する混合物を成形後、焼成してディオプサイド型
酸化物結晶相を主結晶相として析出させた磁器を絶縁基
板とし、かつ該絶縁基板の底面に取付けたボール状端子
を具備することを特徴とする配線基板。
2. The method according to claim 1, wherein the first and second layers are SiO 2 , Al 2 O 3 , MgO and CaO.
After forming a mixture containing 50 to 95% by weight of a glass powder capable of precipitating a diopside type oxide crystal phase containing and 5 to 50% by weight of a quartz powder and / or an amorphous silica powder, firing is performed. A wiring board, comprising: a porcelain formed by depositing a diopside oxide crystal phase as a main crystal phase, as an insulating substrate, and ball-shaped terminals attached to the bottom surface of the insulating substrate.
【請求項2】前記ガラス粉末が、SiO245〜55重
量%と、Al233〜10重量%と、MgO13〜24
重量%と、CaO20〜30重量%とからなることを特
徴とする請求項1記載の配線基板。
2. The glass powder comprises 45 to 55% by weight of SiO 2 , 3 to 10% by weight of Al 2 O 3 and 13 to 24% of MgO.
The wiring board according to claim 1, wherein the wiring board is composed of 20% by weight and 20 to 30% by weight of CaO.
【請求項3】前記絶縁基板が、さらにSiO2結晶相を
含有し、且つ室温から400℃における熱膨張係数が
8.5ppm/℃以上、誘電率が7以下、60〜77G
Hzでの誘電損失が15×10-4以下の磁器からなるこ
とを特徴とする請求項1または2記載の配線基板。
3. The insulating substrate further contains a SiO 2 crystal phase, has a coefficient of thermal expansion from room temperature to 400 ° C. of 8.5 ppm / ° C. or more, a dielectric constant of 7 or less, and 60 to 77 G
3. The wiring board according to claim 1, wherein the wiring board is made of a porcelain having a dielectric loss of 15 × 10 −4 or less at Hz.
JP2000115683A 1998-09-29 2000-04-17 Wiring board Expired - Fee Related JP3764626B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000115683A JP3764626B2 (en) 1998-09-29 2000-04-17 Wiring board

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP10276260A JP3085667B2 (en) 1998-09-29 1998-09-29 High frequency porcelain composition, high frequency porcelain and method for producing the same
JP2000115683A JP3764626B2 (en) 1998-09-29 2000-04-17 Wiring board

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP10276260A Division JP3085667B2 (en) 1998-08-29 1998-09-29 High frequency porcelain composition, high frequency porcelain and method for producing the same

Publications (2)

Publication Number Publication Date
JP2000349200A true JP2000349200A (en) 2000-12-15
JP3764626B2 JP3764626B2 (en) 2006-04-12

Family

ID=18627273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000115683A Expired - Fee Related JP3764626B2 (en) 1998-09-29 2000-04-17 Wiring board

Country Status (1)

Country Link
JP (1) JP3764626B2 (en)

Also Published As

Publication number Publication date
JP3764626B2 (en) 2006-04-12

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