JP2000323624A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

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Publication number
JP2000323624A
JP2000323624A JP11131005A JP13100599A JP2000323624A JP 2000323624 A JP2000323624 A JP 2000323624A JP 11131005 A JP11131005 A JP 11131005A JP 13100599 A JP13100599 A JP 13100599A JP 2000323624 A JP2000323624 A JP 2000323624A
Authority
JP
Japan
Prior art keywords
semiconductor chip
resin
substrate
semiconductor device
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11131005A
Other languages
Japanese (ja)
Other versions
JP3384359B2 (en
Inventor
Mikio Baba
幹夫 馬場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP13100599A priority Critical patent/JP3384359B2/en
Priority to DE10022982A priority patent/DE10022982A1/en
Publication of JP2000323624A publication Critical patent/JP2000323624A/en
Application granted granted Critical
Publication of JP3384359B2 publication Critical patent/JP3384359B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/055Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C43/00Compression moulding, i.e. applying external pressure to flow the moulding material; Apparatus therefor
    • B29C43/32Component parts, details or accessories; Auxiliary operations
    • B29C43/58Measuring, controlling or regulating
    • B29C2043/5825Measuring, controlling or regulating dimensions or shape, e.g. size, thickness
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L2224/161Disposition
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    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/321Disposition
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    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device in which an underfill resin can be prevented from peeling off by reducing warping of an insulating substrate when the underfill resin between a semiconductor chip and the insulating substrate is cured, and a manufacturing method thereof. SOLUTION: In a semiconductor device in which a semiconductor chip 12 is flip-chip mounted on a resin substrate 11 through a underfill resin 19, the length of a fillet 20 formed on the side edge face of the semiconductor chip 12 by implanting the underfill resin 19 is made longer than the distance between the surface of the resin substrate 11 and the rear side of the semiconductor chip 12. By doing this, when the underfill resin 9 between the semiconductor chip 12 and an insulating substrate is cured, warping of the insulating substrate can be reduced. Thus, the underfill resin 19 can be prevented from peeling off, and further, the resin substrate 11 can be protected against cracking.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、半導体装置およ
びその製造方法に関し、特に、プリント配線基板に半導
体チップがフリップチップ実装された半導体装置および
その製造方法に関する。
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device in which a semiconductor chip is flip-chip mounted on a printed wiring board and a method of manufacturing the same.

【0002】[0002]

【従来の技術】従来、プリント配線基板(printe
d wiring board:PWB)に半導体チッ
プがフリップチップ実装された半導体装置が知られてい
る。
2. Description of the Related Art Conventionally, printed wiring boards (printed
A semiconductor device in which a semiconductor chip is flip-chip mounted on a d wiring board (PWB) is known.

【0003】図7は、従来の半導体装置の断面図であ
る。図7に示すように、半導体装置1は、銅(Cu)か
らなる補強材が張り付けられた、例えば、ポリイミド等
の樹脂からなる絶縁性基板(PWB)2上に、ハンダバ
ンプ3を持ったフリップチップ4がフェイスダウンで実
装されている。このハンダバンプ3と絶縁性基板2の予
備ハンダとが溶融接続されることにより、フリップチッ
プ4と絶縁性基板2が電気的に接続される。
FIG. 7 is a sectional view of a conventional semiconductor device. As shown in FIG. 7, the semiconductor device 1 is a flip chip having solder bumps 3 on an insulating substrate (PWB) 2 made of a resin such as polyimide, to which a reinforcing material made of copper (Cu) is attached. 4 is mounted face down. The flip chip 4 and the insulating substrate 2 are electrically connected by melting and connecting the solder bumps 3 and the preliminary solder of the insulating substrate 2.

【0004】ここで、フリップチップ4と絶縁性基板2
とのギャップは120μm、バンプ間ピッチは240μ
m、バンプ数は3000個、チップサイズは13mm
□、チップ厚は0.68mmである。
Here, the flip chip 4 and the insulating substrate 2
Is 120μm and the pitch between bumps is 240μ
m, number of bumps is 3000, chip size is 13mm
□, the chip thickness is 0.68 mm.

【0005】この半導体装置1の製造に際し、絶縁性基
板2とフリップチップ4との間のハンダ接続部には、エ
ポキシ系の樹脂がアンダーフィル樹脂5として適量注入
され、その後、アンダーフィル樹脂5は、適正な温度、
例えば、150℃で硬化される。硬化により、フリップ
チップ4の側方から絶縁性基板2上にかけて、アンダー
フィル樹脂5のはみ出し部分であるフィレット5aが形
成される。
In manufacturing the semiconductor device 1, an epoxy resin is injected into the solder connection between the insulating substrate 2 and the flip chip 4 in an appropriate amount as an underfill resin 5. , Proper temperature,
For example, it is cured at 150 ° C. By the curing, a fillet 5a, which is a protruding portion of the underfill resin 5, is formed from the side of the flip chip 4 onto the insulating substrate 2.

【0006】アンダーフィル樹脂5の注入後、フリップ
チップ4の裏面に、導電性の特性を有する銀(Ag)ペ
ーストを接着樹脂6aとして塗布する。このとき、絶縁
性基板2の両側に配置された補強板7の上部にも、接着
樹脂6bを塗布しておく。その後、フリップチップ4の
裏面及び補強板7の上部に、Cuからなるリッド8を配
置し、接着樹脂6a,6bを硬化させリッド8を固着す
る。
After the underfill resin 5 is injected, a silver (Ag) paste having a conductive property is applied to the back surface of the flip chip 4 as an adhesive resin 6a. At this time, the adhesive resin 6b is also applied to the upper portions of the reinforcing plates 7 arranged on both sides of the insulating substrate 2. Thereafter, a lid 8 made of Cu is arranged on the back surface of the flip chip 4 and on the reinforcing plate 7, and the lids 8 are fixed by curing the adhesive resins 6a and 6b.

【0007】リッド8を取り付けた後、フリップチップ
4が搭載されていない絶縁性基板2の裏面にハンダボー
ル9を搭載することにより、フリップチップ型のBGA
(ball grid array)パッケージからな
る半導体装置1が得られる。
After the lid 8 is attached, the flip-chip type BGA is mounted by mounting solder balls 9 on the back surface of the insulating substrate 2 on which the flip chip 4 is not mounted.
(Ball grid array) The semiconductor device 1 composed of a package is obtained.

【0008】[0008]

【発明が解決しようとする課題】しかしながら、半導体
装置1に対し温度サイクル試験等の信頼性試験を実施し
た場合、インターポーザである絶縁性基板2の反りによ
り、フリップチップ4と絶縁性基板2の間のアンダーフ
ィル樹脂5注入部分にストレスが加わり、アンダーフィ
ル樹脂5の剥離が発生し易い。
However, when a reliability test such as a temperature cycle test is performed on the semiconductor device 1, the warpage of the insulating substrate 2 serving as an interposer causes a problem between the flip chip 4 and the insulating substrate 2. Of the underfill resin 5 is stressed, and the underfill resin 5 is easily peeled off.

【0009】また、アンダーフィル樹脂5にかかる応力
は、フィレット5aから絶縁性基板2の内側に向かって
クラックc(図7参照)も引き起こし易い。
The stress applied to the underfill resin 5 easily causes a crack c (see FIG. 7) from the fillet 5a toward the inside of the insulating substrate 2.

【0010】このような剥離やクラックcがあると、オ
ープン不良による断線等の異常を生じさせる。剥離発生
率は、温度サイクル試験の300サイクル後で約10%
(5/53個)である。
[0010] If there is such peeling or crack c, an abnormality such as disconnection due to an open defect occurs. The peeling rate is about 10% after 300 cycles of the temperature cycle test.
(5/53).

【0011】このようなアンダーフィル樹脂5の剥離が
起こるのは、チップ側面に形成されたアンダーフィル樹
脂5のフィレット5aの長さがチップ厚よりも短く、チ
ップ直下にフィレット5aが位置する場合である。この
場合、アンダーフィル樹脂5の硬化時、フリップチップ
4及び絶縁性基板2には、熱膨張係数の違いによる大き
な応力がかかり、フリップチップ4及び絶縁性基板2が
大きく反ってしまう。
The peeling of the underfill resin 5 occurs when the fillet 5a of the underfill resin 5 formed on the side surface of the chip is shorter than the chip thickness and the fillet 5a is located immediately below the chip. is there. In this case, when the underfill resin 5 is cured, a large stress is applied to the flip chip 4 and the insulating substrate 2 due to a difference in thermal expansion coefficient, and the flip chip 4 and the insulating substrate 2 are greatly warped.

【0012】とりわけ、現在、半導体チップにおいて
は、柔軟性を有する樹脂基板を用いた高密度配線が主流
になってきており、柔軟性に欠ける従来のガラス基板で
は、高密度配線に対応することができないため、熱膨張
に伴う応力への対応は避けられないものとなっている。
In particular, at present, high-density wiring using a resin substrate having flexibility has become mainstream in semiconductor chips, and a conventional glass substrate lacking in flexibility cannot cope with high-density wiring. Therefore, it is inevitable to deal with the stress caused by thermal expansion.

【0013】この発明の目的は、半導体チップと絶縁性
基板の間のアンダーフィル樹脂が硬化する際に絶縁性基
板が反るのを防ぎ、アンダーフィル樹脂の剥離を防止す
ることができる半導体装置およびその製造方法を提供す
ることである。
An object of the present invention is to provide a semiconductor device capable of preventing the insulating substrate from warping when the underfill resin between the semiconductor chip and the insulating substrate is cured, and preventing the underfill resin from peeling off. It is an object of the present invention to provide a manufacturing method thereof.

【0014】[0014]

【課題を解決するための手段】上記目的を達成するた
め、この発明に係る半導体装置は、基板上に、アンダー
フィル樹脂を介して半導体チップがフリップチップ実装
される半導体装置において、前記アンダーフィル樹脂の
注入により前記半導体チップの側端面に形成されるフィ
レットの長さが、前記基板の表面から前記半導体チップ
の裏面迄の距離よりも長いことを特徴している。
To achieve the above object, a semiconductor device according to the present invention is a semiconductor device in which a semiconductor chip is flip-chip mounted on a substrate via an underfill resin. The length of the fillet formed on the side end surface of the semiconductor chip by the implantation of the semiconductor chip is longer than the distance from the front surface of the substrate to the back surface of the semiconductor chip.

【0015】上記構成を有することにより、基板上に、
アンダーフィル樹脂を介して半導体チップがフリップチ
ップ実装される半導体装置において、前記アンダーフィ
ル樹脂の注入により前記半導体チップの側端面に形成さ
れるフィレットの長さは、前記基板の表面から前記半導
体チップの裏面迄の距離よりも長くなる。これにより、
半導体チップと絶縁性基板の間のアンダーフィル樹脂が
硬化する際に絶縁性基板が反るのを防ぎ、アンダーフィ
ル樹脂の剥離を防止することができる。
[0015] With the above configuration, on the substrate,
In a semiconductor device in which a semiconductor chip is flip-chip mounted via an underfill resin, a fillet formed on a side end surface of the semiconductor chip by injecting the underfill resin has a length from the surface of the substrate to the length of the semiconductor chip. It is longer than the distance to the back. This allows
When the underfill resin between the semiconductor chip and the insulating substrate is cured, the insulating substrate can be prevented from warping, and peeling of the underfill resin can be prevented.

【0016】また、この発明に係る半導体装置の製造方
法により、上記半導体装置を製造することができる。
Further, the semiconductor device can be manufactured by the method of manufacturing a semiconductor device according to the present invention.

【0017】[0017]

【発明の実施の形態】以下、この発明の実施の形態につ
いて図面を参照して説明する。 (第1の実施の形態)図1は、この発明の第1の実施の
形態に係る半導体装置の構成を示す断面図である。図1
に示すように、半導体装置10は、例えばポリイミドか
らなる絶縁性の樹脂基板(PWB)11、フリップチッ
プ方式による半導体チップ12、及びCuからなるリッ
ド13が、記載順に下から積層された層構造を有する矩
形板状に形成され、樹脂基板11上の周縁には、中心部
の半導体チップ12を囲むように、リッド13との間に
挟み込まれた金属製の補強枠14が設けられている。
Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a sectional view showing a configuration of a semiconductor device according to a first embodiment of the present invention. FIG.
As shown in FIG. 1, the semiconductor device 10 has a layered structure in which an insulating resin substrate (PWB) 11 made of, for example, polyimide, a semiconductor chip 12 made of a flip-chip method, and a lid 13 made of Cu are stacked from the bottom in the stated order. At the periphery of the resin substrate 11, a metal reinforcing frame 14 sandwiched between the lid 13 is provided so as to surround the semiconductor chip 12 at the center.

【0018】樹脂基板11と補強枠14は接着樹脂15
により、半導体チップ12とリッド13は接着樹脂16
により、リッド13と補強枠14は接着樹脂17によ
り、それぞれ接着されている。これら接着樹脂15,1
6,17は、例えば、シリコーン系、エポキシ系又は熱
可塑性樹脂によるAgペーストが用いられる。
The resin substrate 11 and the reinforcing frame 14 are made of an adhesive resin 15.
Thereby, the semiconductor chip 12 and the lid 13 are bonded to the adhesive resin 16.
Thus, the lid 13 and the reinforcing frame 14 are bonded to each other by the adhesive resin 17. These adhesive resins 15, 1
For 6, 17, for example, an Ag paste made of a silicone-based, epoxy-based, or thermoplastic resin is used.

【0019】樹脂基板11には、Cuからなる補強板が
張り付けられており、この樹脂基板11上に、ハンダバ
ンプ18を持った半導体チップ12がフェイスダウンに
より実装される。実装により、半導体チップ12のハン
ダバンプ18と樹脂基板11の予備ハンダとが溶融接続
され、半導体チップ12と樹脂基板11が電気的に接続
される。
A reinforcing plate made of Cu is attached to the resin substrate 11, and a semiconductor chip 12 having solder bumps 18 is mounted face down on the resin substrate 11. By mounting, the solder bumps 18 of the semiconductor chip 12 and the preliminary solder of the resin substrate 11 are melt-connected, and the semiconductor chip 12 and the resin substrate 11 are electrically connected.

【0020】半導体チップ12と樹脂基板11の間の、
ハンダバンプ18を介在させたハンダ接続部には、アン
ダーフィル樹脂19としてエポキシ系樹脂が適量注入さ
れている。アンダーフィル樹脂19の注入により、半導
体チップ12の側面には、アンダーフィル樹脂19のは
み出し部であるフィレット20が形成される。フィレッ
ト20は、縦断面が、半導体チップ12の上面と側端面
とが交差する上角部20aと、樹脂基板11に沿って半
導体チップ12から遠ざかる先端部である下角部20b
とを結ぶ線を斜辺とする、略直角三角形状を呈している
(図1参照)。
Between the semiconductor chip 12 and the resin substrate 11,
An appropriate amount of epoxy resin is injected as an underfill resin 19 into the solder connection portion with the solder bump 18 interposed therebetween. By injecting the underfill resin 19, a fillet 20 which is a protruding portion of the underfill resin 19 is formed on the side surface of the semiconductor chip 12. The fillet 20 has an upper corner portion 20 a having a vertical cross section at which the upper surface and the side end surface of the semiconductor chip 12 intersect, and a lower corner portion 20 b which is a tip portion moving away from the semiconductor chip 12 along the resin substrate 11.
And has a substantially right-angled triangular shape with the line connecting to the oblique sides (see FIG. 1).

【0021】アンダーフィル樹脂19の注入量は、半導
体チップ12の側端面からフィレット20の下角部20
b迄の距離であるフィレット長さLが、樹脂基板11の
表面から半導体チップ12の裏面迄の距離であるチップ
高さH1よりも長くなるように、調整される。
The amount of the underfill resin 19 to be injected is determined from the side end surface of the semiconductor chip 12 to the lower corner 20 of the fillet 20.
The fillet length L, which is the distance to b, is adjusted so as to be longer than the chip height H1, which is the distance from the front surface of the resin substrate 11 to the back surface of the semiconductor chip 12.

【0022】ここで、チップ高さH1は、半導体チップ
12の厚みに、ハンダバンプ18の厚み、即ち、半導体
チップ12と樹脂基板11とのギャップを加えたもので
ある。また、チップ高さH1の代わりに、反り等による
変形前の樹脂基板11の表面から、変形後の半導体チッ
プ12の裏面迄の距離であるチップ高さH2を用いても
良い。この場合、フィレット長さLは、チップ高さH2
よりも長くなるように調整されることになり、樹脂基板
11の変形度合いに応じた調整が可能になる。
Here, the chip height H1 is the thickness of the semiconductor chip 12 plus the thickness of the solder bump 18, that is, the gap between the semiconductor chip 12 and the resin substrate 11. Further, instead of the chip height H1, a chip height H2 which is a distance from the surface of the resin substrate 11 before deformation due to warpage or the like to the back surface of the semiconductor chip 12 after deformation may be used. In this case, the fillet length L is equal to the tip height H2.
The adjustment is made to be longer than that, and the adjustment according to the degree of deformation of the resin substrate 11 becomes possible.

【0023】なお、樹脂基板11、半導体チップ12及
びアンダーフィル樹脂19の熱膨張係数α(ppm/
℃)は、一例として次のようになる。樹脂基板11はα
=18、半導体チップ12はα=3、アンダーフィル樹
脂19はα=20〜32である。また、アンダーフィル
樹脂19の粘度は13〜40(Pa・s)である。
The thermal expansion coefficient α (ppm / ppm) of the resin substrate 11, the semiconductor chip 12, and the underfill resin 19
C) is as follows as an example. The resin substrate 11 is α
= 18, α = 3 for the semiconductor chip 12 and α = 20 to 32 for the underfill resin 19. The viscosity of the underfill resin 19 is 13 to 40 (Pa · s).

【0024】樹脂基板11の半導体チップ12が搭載さ
れていない下面側には、下面全域に渡って複数のハンダ
ボール21が設けられている。
On the lower surface of the resin substrate 11 where the semiconductor chip 12 is not mounted, a plurality of solder balls 21 are provided over the entire lower surface.

【0025】この半導体装置10は、例えば、半導体チ
ップ12と樹脂基板11とのギャップが120μm、バ
ンプ間ピッチが240μm、バンプ数が3000個、チ
ップサイズが13mm□、チップ厚が0.68mm、に
それぞれ形成される。
In this semiconductor device 10, for example, the gap between the semiconductor chip 12 and the resin substrate 11 is 120 μm, the pitch between bumps is 240 μm, the number of bumps is 3000, the chip size is 13 mm □, and the chip thickness is 0.68 mm. Each is formed.

【0026】図2は、図1の半導体装置の製造方法を示
す工程図である。図2に示すように、先ず、矩形の樹脂
基板11を用意する((a)参照)。
FIG. 2 is a process chart showing a method of manufacturing the semiconductor device of FIG. As shown in FIG. 2, first, a rectangular resin substrate 11 is prepared (see (a)).

【0027】樹脂基板11には、予め一方の面にパッド
22が複数配列され、他方の面に外部電極23が配列さ
れている。パッド22と外部電極23は、樹脂基板11
中の配線層(図示しない)を介して互いに対応するもの
同士が電気的に接続されている。
On the resin substrate 11, a plurality of pads 22 are previously arranged on one surface, and external electrodes 23 are arranged on the other surface. The pad 22 and the external electrode 23 are
Those corresponding to each other are electrically connected to each other via an inner wiring layer (not shown).

【0028】また、樹脂基板11の縁周辺には、後にリ
ッド13を固定するための補強枠14が、接着樹脂15
によって予め接着されている。この補強枠14は、樹脂
基板11とリッド13との間に半導体チップ12を設置
するためのスペースを確保する働きも持つ。
Around the edge of the resin substrate 11, a reinforcing frame 14 for fixing the lid 13 later is provided with an adhesive resin 15.
Are pre-bonded. The reinforcing frame 14 also has a function of securing a space for installing the semiconductor chip 12 between the resin substrate 11 and the lid 13.

【0029】次に、各ハンダバンプ18とそれらに対応
するパッド22との位置合わせを行ってから、半導体チ
ップ12をフェイスダウンにより樹脂基板11上に載置
する((b)参照)。載置後、リフローにより、ハンダ
バンプ18を溶かして外部電極22と接続することによ
り、半導体チップ12を樹脂基板11上に実装する、所
謂、フリップチップ実装を行う((c)参照)。その
後、フラックス洗浄を行う。
Next, the positions of the solder bumps 18 and the corresponding pads 22 are adjusted, and then the semiconductor chip 12 is mounted face down on the resin substrate 11 (see (b)). After mounting, the semiconductor chip 12 is mounted on the resin substrate 11 by melting the solder bumps 18 and connecting to the external electrodes 22 by reflow, so-called flip-chip mounting is performed (see (c)). Thereafter, flux cleaning is performed.

【0030】次に、ハンダバンプ18の剥がれを防止す
るために、半導体チップ12と樹脂基板11の隙間のハ
ンダ接続部に、流動性のあるアンダーフィル樹脂19を
注入し基板11上に塗布する((d)参照)。注入され
たアンダーフィル樹脂19は、半導体チップ12と樹脂
基板11との間隔は非常に狭いため、毛細管現象により
半導体チップ12の全面に行き渡って広がる。
Next, in order to prevent the solder bumps 18 from peeling, a fluid underfill resin 19 is injected into the solder connection portion in the gap between the semiconductor chip 12 and the resin substrate 11 and applied onto the substrate 11 (( d)). Since the space between the semiconductor chip 12 and the resin substrate 11 is very small, the injected underfill resin 19 spreads over the entire surface of the semiconductor chip 12 by a capillary phenomenon.

【0031】このとき、フィレット20のフィレット長
さLが、樹脂基板11の表面から半導体チップ12の裏
面迄の距離であるチップ高さH1よりも長くなるよう
に、例えば、1〜1.5mmに、アンダーフィル樹脂1
9の注入量が調整される。この場合、チップ高さH1
(120μm+0.68mm=0.8mm)に対し、フ
ィレット長さLは約1mmに調整される。
At this time, the fillet length L of the fillet 20 is set to, for example, 1 to 1.5 mm so as to be longer than the chip height H1 which is the distance from the front surface of the resin substrate 11 to the back surface of the semiconductor chip 12. , Underfill resin 1
The injection amount of 9 is adjusted. In this case, the tip height H1
(120 μm + 0.68 mm = 0.8 mm), the fillet length L is adjusted to about 1 mm.

【0032】その後、アンダーフィル樹脂19を適正な
温度、例えば、150℃でキュア(加熱処理)し硬化さ
せる。
Thereafter, the underfill resin 19 is cured (heat-treated) at an appropriate temperature, for example, 150 ° C. and cured.

【0033】なお、半導体チップ12の真下に位置す
る、樹脂基板11のチップ接続面部分は、反り量が最大
60μm程度有する山形に変形した状態にある。
The chip connecting surface portion of the resin substrate 11 located immediately below the semiconductor chip 12 is in a state of being deformed into a mountain shape having a maximum warpage of about 60 μm.

【0034】次に、樹脂基板11上に搭載された半導体
チップ12の裏面(能動素子形成面とは反対側の面)及
び補強枠14の上面に、シリコーン系で低弾性のAgペ
ーストからなる接着樹脂16,17をそれぞれ塗布し、
半導体チップ12及び補強枠14を覆うようにリッド1
3を載置した後、パッケージ全体をキュアする((e)
参照)。接着樹脂16,17の硬化により、リッド13
が載置状態で固定される。
Next, the lower surface of the semiconductor chip 12 mounted on the resin substrate 11 (the surface opposite to the surface on which the active element is formed) and the upper surface of the reinforcing frame 14 are bonded with a silicone-based low-elasticity Ag paste. Resins 16 and 17 are applied respectively,
The lid 1 covers the semiconductor chip 12 and the reinforcing frame 14.
After placing 3, cure the entire package ((e)
reference). The curing of the adhesive resins 16 and 17 causes the lid 13
Is fixed in the mounted state.

【0035】その後、半導体チップ12が搭載されてい
ない樹脂基板11の裏面にハンダボール21を搭載し、
フリップチップ型のBGAパッケージからなる半導体装
置10を得る。
Thereafter, solder balls 21 are mounted on the back surface of the resin substrate 11 on which the semiconductor chip 12 is not mounted,
The semiconductor device 10 including the flip chip type BGA package is obtained.

【0036】つまり、半導体チップ12の側面に形成し
たアンダーフィル樹脂19のフィレット長さLを、チッ
プ高さH1(或いは、チップ高さH2)よりも長くする
ことによって、半導体チップ12と樹脂基板11の間に
注入したアンダーフィル樹脂19の剥離を防止すること
ができる。また、剥離を防ぐことにより、フィレット2
0の先端部である下角部20bから樹脂基板11に入る
クラックcを防止することができる。
That is, by making the fillet length L of the underfill resin 19 formed on the side surface of the semiconductor chip 12 longer than the chip height H1 (or the chip height H2), the semiconductor chip 12 and the resin substrate 11 are formed. It is possible to prevent the underfill resin 19 injected between them from peeling off. Also, by preventing peeling, the fillet 2
The crack c entering the resin substrate 11 from the lower corner portion 20b, which is the front end portion of the zero, can be prevented.

【0037】上述した半導体チップ12における、温度
サイクル試験で300サイクル実施後の剥離発生率は、
0%(0/97個)であった。これは、フィレット長さ
Lをチップ高さH1よりも長くすることで、半導体チッ
プ12と樹脂基板11とにかかるアンダーフィル樹脂1
9の応力を低減(分散)することができるためと思われ
る。
The peeling rate of the semiconductor chip 12 after 300 cycles in the temperature cycle test is as follows:
It was 0% (0/97). This is because the fillet length L is made longer than the chip height H1 so that the underfill resin 1 applied to the semiconductor chip 12 and the resin substrate 11 is removed.
This is because the stress of No. 9 can be reduced (dispersed).

【0038】なお、アンダーフィル樹脂19の注入後、
半導体チップ12の裏面及び補強枠14の上面に接着樹
脂16,17をそれぞれ塗布し、アンダーフィル樹脂1
9と共に接着樹脂16,17をキュアすることによっ
て、アンダーフィル樹脂19及び接着樹脂15,16,
17を同時に硬化させてもよい。
After the injection of the underfill resin 19,
Adhesive resins 16 and 17 are applied to the back surface of the semiconductor chip 12 and the upper surface of the reinforcing frame 14, respectively.
9, the underfill resin 19 and the adhesive resins 15, 16,
17 may be cured simultaneously.

【0039】その結果、各部に塗布された樹脂の硬化に
際し応力が発生するものの、同時に硬化させることによ
って応力の発生が同時になって応力が相殺され、樹脂基
板11や半導体チップ12に対し局所的に応力がかかる
ことはない。 (第2の実施の形態)図3は、この発明の第2の実施の
形態に係る半導体装置の概略構成を示す断面図である。
図3に示すように、半導体装置25は、半導体チップ1
2と樹脂基板11の隙間のハンダ接続部に注入したアン
ダーフィル樹脂19を、金型(図示しない)を用いて硬
化させ、フィレット26を、略直角三角形状ではなく矩
形状の縦断面となるように形成する。その他の構成及び
作用は、半導体装置10(図1参照)と同様である。
As a result, although a stress is generated when the resin applied to each part is cured, the stress is simultaneously generated by curing the resin at the same time, thereby canceling the stress, and the resin substrate 11 and the semiconductor chip 12 are locally localized. No stress is applied. (Second Embodiment) FIG. 3 is a sectional view showing a schematic configuration of a semiconductor device according to a second embodiment of the present invention.
As shown in FIG. 3, the semiconductor device 25 includes a semiconductor chip 1
The underfill resin 19 injected into the solder connection portion in the gap between the resin substrate 11 and the resin substrate 11 is cured using a mold (not shown) so that the fillet 26 has a rectangular vertical section instead of a substantially right triangle. Formed. Other configurations and operations are the same as those of the semiconductor device 10 (see FIG. 1).

【0040】従って、フィレット26は、半導体チップ
12を取り巻く壁状に一体成形され、樹脂基板11の表
面から半導体チップ12の裏面まで、チップ高さH1
(或いはチップ高さH2)よりも長いフィレット長さL
(約1mm)を有することになる。 (第3の実施の形態)図4は、この発明の第3の実施の
形態に係る半導体装置の構成を示す断面図である。図5
は、図4の半導体装置に形成されたフィレットを示し、
(a)は第1の例の平面図、(b)は第2の例の平面図
である。
Accordingly, the fillet 26 is integrally formed in a wall shape surrounding the semiconductor chip 12, and has a chip height H 1 from the front surface of the resin substrate 11 to the back surface of the semiconductor chip 12.
(Or fillet length L longer than tip height H2)
(About 1 mm). (Third Embodiment) FIG. 4 is a sectional view showing a configuration of a semiconductor device according to a third embodiment of the present invention. FIG.
Indicates a fillet formed in the semiconductor device of FIG. 4,
(A) is a plan view of a first example, and (b) is a plan view of a second example.

【0041】図4に示すように、半導体装置30は、半
導体チップ12の真下に位置する、樹脂基板11のチッ
プ接続面部分が、中空にされ(図4参照)、或いは低熱
膨張係数のアンダーフィル樹脂が注入されると共に、高
粘度樹脂からなるフィレット31を有している。その他
の構成及び作用は、半導体装置10(図1参照)と同様
である。
As shown in FIG. 4, in the semiconductor device 30, the chip connecting surface portion of the resin substrate 11 located directly below the semiconductor chip 12 is made hollow (see FIG. 4), or the underfill having a low thermal expansion coefficient is formed. The resin is injected and has a fillet 31 made of a high-viscosity resin. Other configurations and operations are the same as those of the semiconductor device 10 (see FIG. 1).

【0042】この場合、図5に示すように、フィレット
31は、半導体チップ12の四辺を除いて四隅の角部の
みに形成され((a)参照)、或いは、半導体チップ1
2の四隅を除いて四辺のみに形成される((b)参
照)。フィレット長さLは、任意で良いが、チップ高さ
H1(或いはチップ高さH2)よりも長いフィレット長
さLとすることにより、より効果的である。
In this case, as shown in FIG. 5, the fillet 31 is formed only at the four corners except for the four sides of the semiconductor chip 12 (see FIG. 5A).
It is formed only on four sides except for the four corners 2 (see (b)). The fillet length L may be arbitrarily set, but it is more effective if the fillet length L is longer than the tip height H1 (or the tip height H2).

【0043】つまり、半導体チップ12の真下に位置す
る、樹脂基板11のチップ接続面部分には、硬化に際し
応力を発生させるアンダーフィル樹脂がなく、或いは、
あっても低熱膨張係数のアンダーフィル樹脂であるた
め、樹脂基板11や半導体チップ12の間に応力が発生
せず、また、発生しても僅かなので、応力発生による反
り等を生じないか、殆ど影響がない。
That is, there is no underfill resin which generates stress upon curing in the chip connecting surface portion of the resin substrate 11 located immediately below the semiconductor chip 12 or
Even if it is an underfill resin having a low coefficient of thermal expansion, no stress is generated between the resin substrate 11 and the semiconductor chip 12, and even if it is slight, warpage or the like due to the stress is hardly generated. No effect.

【0044】なお、フィレット31及び注入される場合
のアンダーフィル樹脂の熱膨張係数α(ppm/℃)等
は、一例として次のようになる。フィレット31の高粘
度樹脂は、α=10、粘度=100(Pa・s)、アン
ダーフィル樹脂は、α=7〜10である。
The thermal expansion coefficient α (ppm / ° C.) of the fillet 31 and the underfill resin when injected is as follows, for example. The high-viscosity resin of the fillet 31 has α = 10, the viscosity = 100 (Pa · s), and the underfill resin has α = 7 to 10.

【0045】図6は、図4の半導体装置のフィレット形
成状態を示す断面図である。図6に示すように、半導体
チップ12の側端面に沿って上下動可能に半導体チップ
12の側端面側上方に位置させた、樹脂供給ノズル32
から、ハンダ接続部側方の四隅或いは四辺に、高粘度樹
脂を滴下しフィレット31を形成する。
FIG. 6 is a cross-sectional view showing a fillet formation state of the semiconductor device of FIG. As shown in FIG. 6, the resin supply nozzle 32 is located above the side end surface of the semiconductor chip 12 so as to be vertically movable along the side end surface of the semiconductor chip 12.
Then, a high-viscosity resin is dropped at four corners or four sides on the side of the solder connection portion to form a fillet 31.

【0046】なお、低熱膨張係数のアンダーフィル樹脂
を、樹脂基板11と半導体チップ12の間のハンダ接続
部に注入する場合、高粘度樹脂からなるフィレット31
のエア抜き用の孔から行っても良い。
When an underfill resin having a low coefficient of thermal expansion is injected into the solder connection between the resin substrate 11 and the semiconductor chip 12, a fillet 31 made of a high-viscosity resin is used.
May be performed from the air vent hole.

【0047】このように、この発明によれば、フリップ
チップ型BGAの半導体装置10において、樹脂基板1
1の反りによりチップ剥がれ等が発生するのを防止する
ため、樹脂基板11と半導体チップ12の間のハンダ接
続部に注入した、補強用樹脂としてのアンダーフィル樹
脂19の半導体チップ12側面からのはみ出し部である
フィレットを、チップ高さ以上に調整した。
As described above, according to the present invention, in the flip-chip type BGA semiconductor device 10, the resin substrate 1
In order to prevent chip peeling or the like from occurring due to the warpage of 1, the underfill resin 19 as a reinforcing resin injected into the solder connection portion between the resin substrate 11 and the semiconductor chip 12 protrudes from the side surface of the semiconductor chip 12. The fillet, which is a part, was adjusted to a tip height or higher.

【0048】これにより、熱膨張係数が異なる複数の樹
脂間に働く応力を分散することができ、半導体チップ1
2と樹脂基板11の間のアンダーフィル樹脂19が硬化
する際に樹脂基板11が反るのを防いで、アンダーフィ
ル樹脂19の剥離、更に、樹脂基板11にクラックcが
入るのを防止することができる。
As a result, stress acting between a plurality of resins having different thermal expansion coefficients can be dispersed, and the semiconductor chip 1
When the underfill resin 19 between the substrate 2 and the resin substrate 11 is cured, the resin substrate 11 is prevented from warping, thereby preventing the underfill resin 19 from peeling and preventing the resin substrate 11 from being cracked. Can be.

【0049】よって、従来例に示すように剥離や歪みが
生じることはなく、ハンダバンプ構造を有する半導体装
置の生産性及び信頼性を高めることができる。
Therefore, there is no occurrence of peeling or distortion as shown in the conventional example, and the productivity and reliability of the semiconductor device having the solder bump structure can be improved.

【0050】これは、特に、現在主流になってきてい
る、柔軟性を有する樹脂基板11を用いた高密度配線の
半導体チップ12において効果的である。即ち、この樹
脂基板11を用いた高密度配線の半導体チップ12にお
いては、端子数が約3000ピンから5000ピン程に
なるが、ガラス基板からなる液晶ドライバの場合は、約
40から50ピン程であり、また、チップサイズも、半
導体チップ12の場合、約13から17mm角である
が、液晶ドライバの場合、約9mm角であり、応力は面
積比に比例することから、加わる応力に大きな差があ
る。
This is particularly effective in a semiconductor chip 12 of high-density wiring using a resin substrate 11 having flexibility, which is now mainstream. That is, in the semiconductor chip 12 of high-density wiring using the resin substrate 11, the number of terminals is about 3,000 pins to 5,000 pins, but in the case of a liquid crystal driver made of a glass substrate, it is about 40 to 50 pins. In addition, the chip size is about 13 to 17 mm square in the case of the semiconductor chip 12, but is about 9 mm square in the case of the liquid crystal driver, and the stress is proportional to the area ratio. is there.

【0051】また、半導体装置30は、半導体チップ1
2の真下に位置する、樹脂基板11のチップ接続面部分
が、中空にされ(図4参照)、或いは低熱膨張係数のア
ンダーフィル樹脂が注入されると共に、高粘度樹脂から
なるフィレット31を有する。これにより、樹脂基板1
1のチップ接続面部分には、硬化に際し応力を発生させ
るアンダーフィル樹脂がなく、或いは、あっても低熱膨
張係数のアンダーフィル樹脂であるため、応力発生によ
る反り等を生じさせないか、殆ど影響を及ぼさない。
The semiconductor device 30 includes the semiconductor chip 1
The chip connecting surface portion of the resin substrate 11 located directly below the resin substrate 2 is made hollow (see FIG. 4), or an underfill resin having a low coefficient of thermal expansion is injected, and a fillet 31 made of a high-viscosity resin is provided. Thereby, the resin substrate 1
The chip connection surface portion 1 does not have an underfill resin that generates stress upon curing, or even has a low thermal expansion coefficient. Has no effect.

【0052】なお、上記各実施の形態において、BGA
構造に限るものではなく、CSP(chip size
package)構造の半導体装置についても、同様
の対応が可能である。
In each of the above embodiments, the BGA
The structure is not limited to a CSP (chip size).
The same can be applied to a semiconductor device having a (package) structure.

【0053】[0053]

【発明の効果】以上説明したように、この発明によれ
ば、基板上に、アンダーフィル樹脂を介して半導体チッ
プがフリップチップ実装される半導体装置において、前
記アンダーフィル樹脂の注入により前記半導体チップの
側端面に形成されるフィレットの長さは、前記基板の表
面から前記半導体チップの裏面迄の距離よりも長くなる
ので、半導体チップと絶縁性基板の間のアンダーフィル
樹脂が硬化する際に絶縁性基板が反るのを低減し、アン
ダーフィル樹脂の剥離を防止することができ、更に、樹
脂基板にクラックが入るのを防止することができる。よ
って、ハンダバンプ構造を有する半導体装置の生産性及
び信頼性を高めることができる。
As described above, according to the present invention, in a semiconductor device in which a semiconductor chip is flip-chip mounted on a substrate via an underfill resin, the semiconductor chip is injected by the underfill resin. The length of the fillet formed on the side end surface is longer than the distance from the front surface of the substrate to the back surface of the semiconductor chip, so that when the underfill resin between the semiconductor chip and the insulating substrate is hardened, the insulating property is increased. It is possible to reduce the warpage of the substrate, prevent the underfill resin from peeling off, and prevent the resin substrate from cracking. Therefore, the productivity and reliability of the semiconductor device having the solder bump structure can be improved.

【0054】また、この発明に係る半導体装置の製造方
法により、上記半導体装置を製造することができる。
The above-described semiconductor device can be manufactured by the method for manufacturing a semiconductor device according to the present invention.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の第1の実施の形態に係る半導体装置
の構成を示す断面図である。
FIG. 1 is a cross-sectional view showing a configuration of a semiconductor device according to a first embodiment of the present invention.

【図2】図1の半導体装置の製造方法を示す工程図であ
る。
FIG. 2 is a process chart showing a method for manufacturing the semiconductor device of FIG. 1;

【図3】この発明の第2の実施の形態に係る半導体装置
の概略構成を示す断面図である。
FIG. 3 is a sectional view illustrating a schematic configuration of a semiconductor device according to a second embodiment of the present invention;

【図4】この発明の第3の実施の形態に係る半導体装置
の構成を示す断面図である。
FIG. 4 is a sectional view showing a configuration of a semiconductor device according to a third embodiment of the present invention.

【図5】図4の半導体装置に形成されたフィレットを示
し、(a)は第1の例の平面図、(b)は第2の例の平
面図である。
5A and 5B show a fillet formed in the semiconductor device of FIG. 4, wherein FIG. 5A is a plan view of a first example and FIG. 5B is a plan view of a second example.

【図6】図4の半導体装置のフィレット形成状態を示す
断面図である。
FIG. 6 is a cross-sectional view showing a fillet formation state of the semiconductor device of FIG. 4;

【図7】従来の半導体装置の断面図である。FIG. 7 is a sectional view of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

10,25,30 半導体装置 11 樹脂基板 12 半導体チップ 13 リッド 14 補強枠 15,16,17 接着樹脂 18 ハンダバンプ 19 アンダーフィル樹脂 20,26,31 フィレット 20a 上角部 20b 下角部 21 ハンダボール 22 パッド 23 外部電極 32 樹脂供給ノズル H1,H2 チップ高さ L フィレット長さ 10, 25, 30 Semiconductor device 11 Resin substrate 12 Semiconductor chip 13 Lid 14 Reinforcement frame 15, 16, 17 Adhesive resin 18 Solder bump 19 Underfill resin 20, 26, 31 Fillet 20a Upper corner 20b Lower corner 21 Solder ball 22 Pad 23 External electrode 32 Resin supply nozzle H1, H2 Tip height L Fillet length

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】基板上に、アンダーフィル樹脂を介して半
導体チップがフリップチップ実装される半導体装置にお
いて、 前記アンダーフィル樹脂の注入により前記半導体チップ
の側端面に形成されるフィレットの長さが、前記基板の
表面から前記半導体チップの裏面迄の距離よりも長いこ
とを特徴とする半導体装置。
1. A semiconductor device in which a semiconductor chip is flip-chip mounted on a substrate via an underfill resin, wherein a length of a fillet formed on a side end surface of the semiconductor chip by injection of the underfill resin is: A semiconductor device, wherein the distance is longer than a distance from a front surface of the substrate to a back surface of the semiconductor chip.
【請求項2】前記基板は、樹脂基板であることを特徴と
する請求項1に記載の半導体装置。
2. The semiconductor device according to claim 1, wherein said substrate is a resin substrate.
【請求項3】前記基板と前記半導体チップは、ハンダバ
ンプを介して接続され、前記半導体チップの裏面側に
は、前記半導体チップを取り囲む補強枠の上面と共に接
着樹脂で接着されたリッドを有することを特徴とする請
求項2に記載の半導体装置。
3. The semiconductor device according to claim 1, wherein the substrate and the semiconductor chip are connected via solder bumps, and a back surface of the semiconductor chip has a lid bonded with an upper surface of a reinforcing frame surrounding the semiconductor chip with an adhesive resin. The semiconductor device according to claim 2, wherein:
【請求項4】前記アンダーフィル樹脂を、型を用いて硬
化させ前記半導体チップを取り巻く壁状に一体成形した
ことを特徴とする請求項2または3に記載の半導体装
置。
4. The semiconductor device according to claim 2, wherein the underfill resin is cured by using a mold and integrally molded into a wall shape surrounding the semiconductor chip.
【請求項5】前記アンダーフィル樹脂の熱膨張係数を、
前記基板の熱膨張係数と前記半導体チップの熱膨張係数
の中間の値にしたことを特徴とする請求項2から4のい
ずれかに記載の半導体装置。
5. The thermal expansion coefficient of the underfill resin,
5. The semiconductor device according to claim 2, wherein the thermal expansion coefficient is set to an intermediate value between the thermal expansion coefficient of the substrate and the thermal expansion coefficient of the semiconductor chip.
【請求項6】前記基板の前記半導体チップとの接続面部
分から前記アンダーフィル樹脂を取り除き、前記半導体
チップの周辺のみに前記フィレットを形成したことを特
徴とする請求項2〜5のいずれかに記載の半導体装置。
6. The semiconductor device according to claim 2, wherein the underfill resin is removed from a portion of the substrate connected to the semiconductor chip, and the fillet is formed only around the semiconductor chip. 13. The semiconductor device according to claim 1.
【請求項7】前記アンダーフィル樹脂を取り除いた部分
に、低熱膨張係数のアンダーフィル樹脂を注入したこと
を特徴とする請求項6に記載の半導体装置。
7. The semiconductor device according to claim 6, wherein an underfill resin having a low coefficient of thermal expansion is injected into a portion where said underfill resin is removed.
【請求項8】基板上に、半導体チップをフリップチップ
実装する工程と、 リフローを行い前記基板と前記半導体チップをバンプに
より接続する工程と、 その後、前記基板と前記半導体チップとの間に、アンダ
ーフィル樹脂の塗布により前記半導体チップ側面に形成
されるフィレットの長さが、前記基板の表面から前記半
導体チップの裏面迄の距離よりも長くなるように樹脂量
を調整して、前記アンダーフィル樹脂を塗布する工程
と、 塗布した前記アンダーフィル樹脂を硬化する工程とを有
することを特徴とする半導体装置の製造方法。
8. A step of flip-chip mounting a semiconductor chip on a substrate; a step of performing reflow to connect the substrate and the semiconductor chip by bumps; By adjusting the amount of resin so that the length of the fillet formed on the side surface of the semiconductor chip by applying the fill resin is longer than the distance from the front surface of the substrate to the back surface of the semiconductor chip, the underfill resin is removed. A method for manufacturing a semiconductor device, comprising: a step of applying; and a step of curing the applied underfill resin.
【請求項9】前記アンダーフィル樹脂を塗布する工程に
おいて、 前記フィレットを、前記基板の前記半導体チップとの接
続面部分を除き前記半導体チップの周辺のみに形成する
ことを特徴とする請求項8に記載の半導体装置の製造方
法。
9. The method according to claim 8, wherein, in the step of applying the underfill resin, the fillet is formed only on the periphery of the semiconductor chip except for a portion of the substrate connected to the semiconductor chip. The manufacturing method of the semiconductor device described in the above.
JP13100599A 1999-05-12 1999-05-12 Semiconductor device and manufacturing method thereof Expired - Fee Related JP3384359B2 (en)

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JP13100599A JP3384359B2 (en) 1999-05-12 1999-05-12 Semiconductor device and manufacturing method thereof
DE10022982A DE10022982A1 (en) 1999-05-12 2000-05-11 Semiconductor component and method for its production

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