JP2000307023A - Production of printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make uniform the shape and height of solder bump without causing short circuit between solder bumps by performing solder paste printing for solder bump forming pads while subdividing into a plurality of printing times so that solder bumps dealing with fine pitch and fine patterning can be formed. SOLUTION: An opening 21b is formed only at a part facing a part of all solder bump forming pads. First time printing is performed using a mask 21 having a wide interval between openings and second time and subsequent printing are performed using a mask where the bump forming pads not printed during first time printing are opened. Since no mechanical problem occur at the opening 21b of the mask 21, strength of the mask 21 can be sustained and since the mask 21 is not damaged nor warped during solder printing, lifetime of the mask 21 is prolonged. Furthermore, insufficient removal and blurring of solder paste due to warpage are eliminated and the yield is increased in the formation of solder bumps.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a printed wiring board, which is characterized by a method of printing a solder paste on a solder bump forming pad formed on a solder resist layer.

[0002]

2. Description of the Related Art A multilayer printed wiring board called a so-called multilayer build-up wiring board is manufactured by a semi-additive method or the like.
m on a resin substrate reinforced with glass cloth, etc.
It is manufactured by alternately laminating a conductor circuit made of copper or the like and an interlayer resin insulating layer. The connection between the conductor circuits via the interlayer resin insulation layer of the multilayer printed wiring board is performed by via holes.

Conventionally, build-up multilayer printed wiring boards have been manufactured by a method disclosed in, for example, Japanese Patent Application Laid-Open No. 9-130050. That is, first, a through-hole is formed in the copper-clad laminate on which the copper foil is stuck, and then a through-hole is formed by performing an electroless copper plating process. Subsequently, the surface of the substrate is etched into a conductor pattern using a photolithography technique to form a conductor circuit. Next, on the surface of the formed conductor circuit,
After forming a roughened surface by electroless plating or etching, forming an insulating resin layer on the conductor circuit having the roughened surface, performing exposure and development processing to form a via hole opening, and then UV After curing and main curing, an interlayer resin insulating layer is formed.

Further, after performing a roughening treatment on the interlayer resin insulating layer with an acid or an oxidizing agent, a thin electroless plating film is formed, a plating resist is formed on the electroless plating film, and then an electrolytic plating is performed. Then, etching is performed after the plating resist is stripped to form a conductive circuit connected to the lower conductive circuit by a via hole. After repeating this, finally, a solder resist layer for protecting the conductor circuit is formed, and a portion where the opening is exposed for connection with an electronic component such as an IC chip or a motherboard is plated. Then, a solder paste is printed to form solder bumps on the electronic component side such as an IC chip, thereby producing a build-up multilayer printed wiring board. Also, if necessary, solder bumps are formed on the motherboard side.

[0005]

In recent years, as electronic components such as IC chips have become denser and more highly integrated, the pitch of electronic component bumps has become narrower and finer. Similarly, there is a demand for narrower pitch and finer solder bumps.

However, conventionally, a mask having an opening at a portion facing a solder bump forming pad formed on a solder resist is used, and after mounting this mask on a solder resist layer, a solder paste is printed and reflowed. Therefore, when the pitch of the solder bump forming pad is made narrower and finer, the following inconvenience occurs.

That is, when an opening corresponding to the above-mentioned solder bump forming pad is to be formed, the distance between the openings of the mask is reduced, so that the strength of the mask itself is reduced. Warpage may occur. In this case, the life of the mask (number of usable shots)
The solder paste becomes extremely short, or the solder paste becomes less removable due to warpage. When the formed solder bumps are connected to an IC chip, etc., unconnected portions may occur or the solder paste may be too narrow due to the narrow gap between the bumps. As a result, a short circuit occurs between the solder bumps, and the formation yield of the solder bumps is deteriorated.

Even when there is no warpage or the like, since the distance between the solder bumps is small, if the solder paste bleeds during printing, a short circuit occurs between the solder bumps. On the other hand, the opening diameter is reduced to eliminate bleeding. When the thickness of the mask is increased, there has been a problem that the removability of the solder paste is reduced. As described above, the conventional solder paste printing method using a mask has a problem that it is difficult to form solder bumps corresponding to fine pitch and fineness.

The present invention has been made in view of the above problems, and has a narrow pitch.
Solder bumps corresponding to fineness can be formed, short-circuit between solder bumps does not occur, the shape and height of solder bumps are made uniform, and connection with electronic components such as IC chips can be reliably performed. An object of the present invention is to obtain a printed wiring board having excellent connectivity and reliability.

[0010]

Means for Solving the Problems The inventor of the present invention has conducted intensive studies in view of the above-mentioned problems. When printing solder paste on solder bump formation pads that have been refined and refined,
The spacing between the openings formed in the mask can be made relatively wide, the shape and height of the solder bumps to be formed can be made uniform, and as a result, a printed wiring board with no short circuit between the solder bumps can be manufactured. It has been found that the present invention has the following features.

That is, in the method of manufacturing a printed wiring board according to the present invention, the step of forming an interlayer insulating layer on the formed conductive circuit is repeated to form a conductive circuit comprising a plurality of layers with an interlayer insulating layer interposed on an insulating substrate. After forming, a solder resist layer is provided on the uppermost conductive circuit, a part of the solder resist layer is opened to form a plurality of solder bump forming pads, and a mask is formed on the solder bump forming pad. A method of manufacturing a printed wiring board, wherein a solder paste is printed using a solder paste to form solder bumps, wherein an opening is formed only in a portion facing a part of all of the formed solder bump forming pads, and the openings are formed with each other. Using a mask with a large space between
The second printing process is performed, and the printing process is performed using a mask in which a solder bump forming pad portion that is not printed in the first printing in the second and subsequent printing is opened.

In the method of manufacturing a printed wiring board, the solder paste is filled into the solder bump forming pad so that the upper surface of the formed solder paste layer is substantially the same as the surface of the solder resist layer in the first printing. It is desirable to do.

In the second and subsequent printings, an opening smaller than the previously formed opening is provided not only in a newly printed portion but also in a portion facing the previously printed solder bump forming pad. It is desirable to perform printing processing using a mask that has been set.

In the present invention, the reflow step may be performed after the solder paste printing step is completed.
Following the solder paste printing process, perform the reflow process,
It is desirable to perform the following solder paste printing process. Further, in the present invention, in the second and subsequent printing of the solder paste, it is preferable to use a mask in which a concave portion is formed in a portion which is in contact with the solder resist and which faces the previously formed solder bump forming pad.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION The method for manufacturing a printed wiring board according to the present invention comprises a plurality of layers with an interlayer insulating layer interposed on an insulating substrate by repeating a step of forming an interlayer insulating layer on the formed conductor circuit. After forming the conductive circuit, a solder resist layer is provided on the uppermost conductive circuit, a part of the solder resist layer is opened to form a plurality of solder bump forming pads, and the solder bump forming pad is formed on the solder resist layer. A method for manufacturing a printed wiring board, in which a solder paste is printed using a mask to form solder bumps, wherein an opening is formed only in a portion opposed to a part of all formed solder bump forming pads, and the opening is formed. 1 using a mask with a large space between parts
The second printing process is performed, and the printing process is performed using a mask in which a solder bump forming pad portion that is not printed in the first printing in the second and subsequent printing is opened.

Here, "the distance between the openings is widened" means that the opening of the mask is larger than the case where the opening is formed in a portion of the mask facing all the pads for forming solder bumps. It means that the interval between them is wide.

According to the method for manufacturing a printed wiring board,
Because the distance between the openings of the mask can be widened, there is no mechanical problem at the opening of the mask, the strength of the mask itself can be maintained, and the mask is damaged or warped during solder printing Since there is no mask, the life of the mask is prolonged, the defect of solder paste coming off and the defect of bleeding due to warpage are eliminated, and the yield of solder bump formation is improved.

Further, since the space between the mask openings is widened, it is not necessary to reduce the opening diameter, so that the solder paste can be easily removed, and the height and shape of the solder bumps can be kept uniform. It is possible to surely connect the electronic component such as the bump to the bump. Therefore, even if the solder bumps are formed at a narrower pitch than in the related art, a printed wiring board having excellent connectivity and reliability can be manufactured.

Next, a method for forming solder bumps in the method for manufacturing a printed wiring board of the present invention will be described. In the present invention, after various processes, a solder resist layer is formed on a conductor circuit, and a portion serving as a pad for forming a solder bump is opened. The opening of the pad for forming the solder bump is formed by a method using photolithography, a method using laser, punching, or the like. The shape of the opening in a plan view is not particularly limited, and includes, for example, a circle, an oval, a square, a rectangle, and the like. A circular shape is desirable from the viewpoint of increasing the space and allowing the wiring to pass through) and the stability of the solder bump shape.

A roughened layer is formed on the conductor circuit, and the roughened layer ensures the close contact between the solder resist layer and the conductor circuit. The roughened layer preferably has an average roughness of 0.5 to 10 μm, more preferably 1 to 5 μm. The roughened layer is desirably formed by electroless plating, etching, oxidation-reduction treatment, polishing treatment, or the like. The thickness of the solder resist layer is 5 to 70 μm.
m is desirable. If the thickness is less than 5 μm, the solder resist layer is peeled off, cracks occur, etc.
This is because it is difficult to form an opening when the ratio exceeds.

The conductor circuit portion exposed by the opening is usually covered with a corrosion-resistant metal such as nickel, palladium, gold, silver, and platinum. Specifically, nickel-gold, nickel-
The coating layer is formed of a metal such as silver, nickel-palladium, and nickel-palladium-gold. The coating layer is formed by, for example, a plating method, a vapor deposition method, an electrodeposition method, and the like. Among these, the plating method is preferable from the viewpoint of film uniformity.

Next, a solder paste layer is formed on the solder bump forming pad on which the metal coating layer has been formed by printing the solder paste using a mask.

The opening of the mask may be formed so as to have a wall surface parallel to the solder resist layer, or a taper may be formed such that the diameter gradually increases toward the solder resist layer. In order to prevent the solder paste from catching on the mask, it is desirable that a taper be formed. Regarding the taper of the opening, the difference between the width of the widest part on the solder resist layer side of the mask and the narrowest part width of the solder paste entrance is preferably 0 to 25 μm, more preferably 5 to 15 μm. By providing such a taper, the removability of the solder paste from the mask is improved, so that the filling property of the solder bump forming pad is improved, and the shape and size of the formed solder bump are uniformly maintained. be able to. In addition, the use of a mask having a tapered surface improves the filling property of the solder bump forming pad, eliminates a gap due to insufficient filling of the solder bump forming pad bottom, and improves the performance of the printed wiring board in a reliability test. Quality is improved.

The mask used for the second and subsequent printing of the solder paste includes a recess (hereinafter referred to as a counterbore) in a portion which is in contact with the solder resist (hereinafter referred to as a back side) and which faces the previously formed solder bump forming pad. ) Is preferably used. This is because it is possible to prevent the solder bumps from being damaged by the mask and to prevent a short circuit caused by the solder paste adhering to the back side of the mask and subsequently adhering to the solder resist surface.

However, when manufacturing a mask having both a taper and a counterbore, it is necessary to increase the distance between the taper and the counterbore in order to prevent the strength of the mask from deteriorating.

The type of the mask is not particularly limited, and all materials used for a print mask for manufacturing a printed wiring board and other print masks can be used. Specifically, for example, a metal mask made of a nickel alloy, a nickel-cobalt alloy, SUS, or the like; a plastic mask made of an epoxy resin, a polyimide resin, or the like can be given. Etching, as a manufacturing method of the mask,
Additive processing, laser processing, and the like are included.

The thickness of the mask is preferably 20 to 70 μm, more preferably 30 to 50 μm. By setting the thickness in the above range, the removability of the opening of the solder paste is improved, the height of the solder bump can be set appropriately, and there is no problem in mechanical strength even if the counterbore is provided. From.

If the thickness of the mask is less than 20 μm, the height of the formed bump is too low or uniform, and it is difficult to form a taper or counterbore having a desired width in forming the solder bump. On the other hand, if the thickness of the mask exceeds 70 μm, the removability of the solder paste decreases, and the paste remains in the openings, so that the shape and height of the solder bumps may not be uniform. As the pitch of the solder bumps becomes smaller and finer, the formation of the solder bumps becomes more difficult.

The solder paste used for printing is not particularly limited, and any paste generally used in the manufacture of printed wiring boards can be used. In particular,
For example, Sn: Pb (weight ratio) = 63: 37, Sn: P
b: Ag = 62: 36: 2, Sn: Ag = 96.5:
3.5 and the like. Solder particle size is 5
The viscosity of the solder paste at the time of printing is 100 to 400 Pa. s is desirable. The viscosity of the solder paste is 100 Pa. lower than s
The shape of the solder bump cannot be maintained, and 400P
a. If the length exceeds s, the solder paste cannot be efficiently filled in the solder bump forming pad portion.

When printing the solder paste, a printing squeegee is usually used. The material of the squeegee for forming a print is not particularly limited, for example, rubber such as polyethylene;
Metals such as iron and stainless steel; and materials generally used for printing on printed wiring boards such as ceramics can be used.

With respect to the shape of the squeegee, there are various shapes such as a flat type and a square type. The squeegee having the above-described shape may be cut in time to improve the filling property of the solder paste. The thickness of the squeegee is preferably from 10 to 30 mm, more preferably from 15 to 25 mm. This is because there is no warping or bending even if printing is repeated.

However, in consideration of the reduction of the squeegee, the reproducibility due to abrasion, and the inclusion of foreign matter in the solder paste, a metal squeegee is preferable. In the case of metal, the thickness of the squeegee is desirably 50 to 300 μm. Further, printing may be performed by a closed squeegee unit. Examples of such a squeegee include an air press-fit type, a roller press-fit type, and a piston press-fit type.

When printing the solder paste using the above mask or the like, the following method is used. FIG. 1 is a plan view schematically showing an example of an arrangement state of solder bump formation pads formed on a solder resist layer on a printed wiring board. FIG. 2 is a plan view of an arrangement state of solder bump formation pads. It is the top view which showed another example typically.

As shown in FIG. 1, when the pads for forming solder bumps are formed in a state of being arranged vertically and horizontally,
First, solder paste is printed on only one of the adjacent solder bump forming pads 18 (marked by ○), and secondly, another solder bump forming pad (marked by ◎) is printed. Print.

Further, as shown in FIG. 2, the pads 18 for forming the solder bumps are not formed in a state of being aligned in a vertical line, and the formation positions are set every other horizontal line to the distance between the pads 18 for forming the solder bumps. If it is halved by half, 1
The solder paste is printed only on the odd-numbered rows of solder bump forming pads (marked with ○) the second time, and the other even-numbered rows of solder bump forming pads (marked with ◎) are printed on the second time. Therefore, a mask having an opening formed in a portion facing the solder bump forming pad is used.

However, depending on the distance between the solder bumps to be formed, the height of the solder bumps, the shape of the pads for forming the solder bumps, the composition, viscosity, and particle size of the solder paste, printing of the solder paste is performed three times or more. Is also good. This is because it may be better to change the distance between the openings formed in the mask depending on these. In the first printing, the solder paste is not filled so as to be higher than the surface of the solder resist layer, and the solder paste is filled so that the upper surface of the solder paste layer is substantially the same as the surface of the solder resist layer. It is desirable. This is because even after the first printing, the solder resist surface is flat, and even when a mask is placed in the second printing, no deformation or the like occurs in the solder paste layer. In the first printing, when the solder paste layer is formed so that the upper surface of the solder paste layer is higher than the surface of the solder resist layer, the mask used for the second and subsequent printing of the solder paste is shown in FIG. As shown, it is desirable to form the solder paste layer 22a using a mask 21 having a counterbore 21a on the back side.

Further, in the second and subsequent printing, FIG.
As shown in (a), a mask 21 having a small opening 21b formed in a portion facing a solder paste layer or solder bump portion 22a formed by printing before is used. Part 22a
Then, a solder paste layer 22c may be further formed.
This makes it possible to compensate for a portion where the amount of the solder paste is insufficient and to form a solder bump having a desired height. FIG. 4B shows a case where the solder paste layer 22a is filled in the first printing so that the upper surface of the solder paste layer is higher than the surface of the solder resist layer. By devising the shape so as not to hit the solder paste layer 22a, the solder paste can be printed without any trouble.

The reason why the small opening is provided in the portion facing the previously printed solder bump forming pad is to keep the distance between the openings wide. Therefore, even in such a small opening, a sufficient amount of paste can be supplied.

There are two types of pads for forming solder bumps, those formed on a flat conductor circuit and flat, and those formed on a via hole and having a recess with a diameter of 10 to 120 μm at the center. Since the amount of solder paste to be printed is also slightly different depending on the type, the printing may be performed using a mask having openings formed for each type.

When the solder bump is formed by one printing, the shape of the opening of the mask is desirably larger than the shape of the solder bump forming pad of the solder resist layer. This is for sufficiently supplying the solder paste into the solder bump forming pad. When the solder bump is formed by two printings, the shape of the opening of the mask is almost the same as the shape of the solder bump forming pad of the solder resist layer, but when the tapered opening is formed. It is desirable that the shape of the narrowest opening (solder paste inlet side) is substantially the same as the shape of the solder bump forming pad.

As described above, after all the solder paste printing steps are completed, the reflow step may be performed or the solder bump forming pad may be formed. Deformation of the paste layer,
In order to prevent the effect of the decrease in the amount due to the adhesion to the mask, etc., a reflow process is performed following a single solder paste printing process to form solder bumps of a predetermined shape, and then the next solder paste is formed. May be performed. Whether or not reflow is performed each time depends on the diameter and height of the solder bump to be formed, the opening diameter of the pad for forming the solder bump, the thickness of the solder resist layer, the composition, viscosity, and particle size of the solder paste.

The shape of the solder bump formed by the method of forming a solder bump according to the present invention is semi-spherical, and its height is 5 to 50 μm.
m, and a solder bump having a uniform height and shape can be formed. The reflow is desirably performed in a temperature range of 150 to 300 ° C. in an inert atmosphere such as nitrogen. The reflow temperature is set according to the solder composition.

Next, a method for manufacturing a printed wiring board according to the present invention will be briefly described. (1) In the method for manufacturing a printed wiring board of the present invention, first, a substrate having a conductive circuit formed on a surface of an insulating substrate is prepared.

As the insulating substrate, a resin substrate is desirable, and specific examples thereof include a glass epoxy substrate, a polyimide substrate, a bismaleimide-triazine resin substrate, a fluororesin substrate, a ceramic substrate, and a copper-clad laminate. . In the present invention, a through hole is formed in the insulating substrate by a drill or the like, and the wall surface of the through hole and the surface of the copper foil are subjected to electroless plating to form a surface conductive film and a through hole. Copper plating is preferred as the electroless plating.

After the electroless plating, a roughening treatment is usually performed on the inner wall of the through hole and the surface of the electrolytic plating film.
Examples of the roughening forming treatment method include blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, treatment with Cu-Ni-P needle-like alloy plating, and the like.

(2) Next, a conductive circuit-shaped etching resist is formed on the substrate on which the electroless plating has been performed, and etching is performed to form a conductive circuit. Next, a resin filler is applied to the surface of the substrate on which the conductive circuit is formed, dried to a semi-cured state, then polished, the resin filler layer is ground, and the upper part of the conductive circuit is also ground. Then, both main surfaces of the substrate are flattened. Thereafter, the layer of the resin filler is completely cured.

(3) Next, a roughened layer is formed on the conductor circuit. Examples of the roughening treatment method include a blackening (oxidation) -reduction treatment, a spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, and a treatment with Cu-Ni-P alloy plating.

(4) Next, a coating layer made of tin, zinc, copper, nickel, cobalt, thallium, lead or the like is formed on the surface of the formed roughened layer by electroless plating, vapor deposition, or the like. By depositing the coating layer in the range of 0.01 to 2 μm, the conductor circuit exposed from the interlayer insulating layer can be protected from a roughening solution or an etching solution, and discoloration and dissolution of the inner layer pattern can be reliably prevented. Because.

(5) Thereafter, an interlayer resin insulating layer is provided on the conductor circuit on which the roughened layer has been formed. As a material of the interlayer resin insulating layer, a thermosetting resin, a thermoplastic resin, a resin obtained by sensitizing a part of the thermosetting resin, or a composite resin thereof can be used. The interlayer insulating layer may be formed by applying an uncured resin, or may be formed by thermocompression bonding an uncured resin film. Further, a resin film in which a metal layer such as a copper foil is formed on one surface of an uncured resin film may be attached. When such a resin film is used, an opening is formed by irradiating a laser beam after etching a metal layer in a via hole forming portion. As the resin film having the metal layer formed thereon, a resin-coated copper foil or the like can be used.

When forming the interlayer insulating layer, an adhesive layer for electroless plating can be used. The most suitable adhesive for electroless plating is one in which heat-resistant resin particles soluble in a cured acid or oxidizing agent are dispersed in an uncured heat-resistant resin hardly soluble in an acid or oxidizing agent. is there. By treating with an acid or an oxidizing agent, the heat-resistant resin particles are dissolved and removed, and a roughened surface composed of an octopus pot-shaped anchor can be formed on the surface.

In the above-mentioned adhesive for electroless plating, the heat-resistant resin particles particularly subjected to the curing treatment include (a) a heat-resistant resin powder having an average particle diameter of 10 μm or less, and (b) a heat-resistant resin powder having an average particle diameter of 2 μm or less. Aggregated particles obtained by aggregating heat-resistant resin powder,
(c) a mixture of a heat-resistant resin powder having an average particle diameter of 2 to 10 μm and a heat-resistant resin powder having an average particle diameter of 2 μm or less, (d)
Pseudo particles obtained by adhering at least one of a heat-resistant resin powder or an inorganic powder having an average particle diameter of 2 μm or less to the surface of a heat-resistant resin powder having an average particle diameter of 2 to 10 μm, A mixture of 0.1 to 0.8 μm heat-resistant powder resin powder and a heat-resistant resin powder having an average particle diameter of more than 0.8 μm and less than 2 μm, (f) an average particle diameter of 0.1 to 1.0 μm It is desirable to use heat-resistant resin powder. They are,
This is because a more complicated anchor can be formed.

Examples of the heat-resistant resin hardly soluble in an acid or an oxidizing agent include a “resin composite composed of a thermosetting resin and a thermoplastic resin” and a “resin composite composed of a photosensitive resin and a thermoplastic resin”. desirable. This is because the former has high heat resistance, and the latter can form an opening for a via hole by photolithography.

As the thermosetting resin, for example, epoxy resin, phenol resin, polyimide resin and the like can be used. Examples of the photosensitized resin include those obtained by subjecting a thermosetting group to methacrylic acid or acrylic acid to undergo an acrylation reaction. In particular, an acrylated epoxy resin is most suitable. As the epoxy resin, a novolak type epoxy resin such as a phenol novolak type and a cresol novolak type, and an alicyclic epoxy resin modified with dicyclopentadiene can be used.

As the thermoplastic resin, polyether sulfone (PES), polysulfone (PSF), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenyl ether (PP
E), polyetherimide (PI), fluororesin and the like can be used. The mixing ratio of the thermosetting resin (photosensitive resin) and the thermoplastic resin is preferably thermosetting resin (photosensitive resin) / thermoplastic resin = 95/5 to 50/50. This is because a high toughness value can be secured without impairing the heat resistance.

The mixing weight ratio of the heat-resistant resin particles is preferably 5 to 50% by weight, more preferably 10 to 40% by weight, based on the solid content of the heat-resistant resin matrix. As the heat-resistant resin particles, an amino resin (a melamine resin, a urea resin, a guanamine resin), an epoxy resin, or the like is desirable.

(6) Next, while the interlayer insulating resin layer is cured, an opening for forming a via hole is provided in the interlayer resin layer. Opening of the interlayer insulating resin layer is performed using laser light or oxygen plasma when the resin matrix of the adhesive for electroless plating is a thermosetting resin, and exposed when the resin matrix is a photosensitive resin. Performed by development processing. In the exposure and development process, a photomask (preferably a glass substrate) on which a circular pattern for forming a via hole is drawn is brought into close contact with the photosensitive interlayer resin insulating layer on the circular pattern side. After mounting, the substrate is exposed and immersed in a developing solution or sprayed with the developing solution. By curing the interlayer resin insulating layer formed on the conductor circuit having a roughened surface with a sufficient unevenness, an interlayer resin insulating layer having excellent adhesion to the conductor circuit can be formed.

(7) Next, the surface of the interlayer resin insulating layer (adhesive layer for electroless plating) having the via hole opening is roughened. Usually, the roughening is performed by dissolving and removing the heat-resistant resin particles present on the surface of the adhesive layer for electroless plating with an acid or an oxidizing agent. The height of the roughened surface formed by acid treatment or the like is desirably Rmax = 0.01 to 20 μm. This is for ensuring adhesion to the conductor circuit. In particular, in the semi-additive method, 0.1 to 5 μm is desirable. This is because the electroless plating film can be removed while ensuring adhesion.

When performing the above acid treatment, phosphoric acid, hydrochloric acid,
Sulfuric acid or an organic acid such as formic acid or acetic acid can be used, and it is particularly preferable to use an organic acid. This is because the metal conductor layer exposed from the via hole is hardly corroded when the roughening treatment is performed. The oxidation treatment is performed using chromic acid,
It is desirable to use permanganate (such as potassium permanganate).

(8) Next, a thin electroless plating film is formed on the entire surface of the roughened interlayer insulating resin. The electroless plating film is preferably formed by electroless copper plating, and has a thickness of 1 to 3.
5 μm is desirable, and 2-3 μm is more desirable.

(9) Further, a plating resist is provided thereon. As the plating resist, a commercially available photosensitive dry film or liquid resist can be used. Then, after applying a photosensitive dry film or applying a liquid resist, an ultraviolet exposure process is performed, and a developing process is performed with an alkaline aqueous solution.

(10) Next, after the substrate subjected to the above treatment is immersed in an electroplating solution, direct current electroplating is performed using the electroless plating layer as a cathode and the metal to be plated as an anode, and plating the openings for via holes. While filling
An upper conductor circuit is formed. As the electrolytic plating, electrolytic copper plating is preferable, and its thickness is preferably 10 to 20 μm.

(11) Next, the plating resist is peeled off with a strong alkali aqueous solution and then etched to remove the electroless plating layer, thereby forming the upper conductor circuit and the via hole into an independent pattern. As the etching solution, a sulfuric acid / hydrogen peroxide aqueous solution, an aqueous solution of a persulfate such as ferric chloride, cupric chloride, or ammonium persulfate is used. The palladium catalyst nuclei exposed on the non-conductor circuit portion are dissolved and removed with chromic acid, sulfuric acid, hydrogen peroxide or the like.

(12) Thereafter, if necessary, the steps (3) to (11) are repeated, and the uppermost conductive circuit is subjected to electroless plating under the same conditions as in the above step (3). A roughening layer is formed on the conductor circuit.

Next, a solder resist layer is formed on the substrate surface including the uppermost conductive circuit, and solder bumps are formed by the above-described method, thereby completing the manufacture of the printed wiring board. In addition, a plasma treatment with oxygen, carbon tetrachloride, or the like may be performed as needed for a character printing process for forming a product recognition character or the like or for modifying a solder resist layer. Although the above method is based on the semi-additive method, a full additive method may be employed.

[0065]

The present invention will be described in more detail below. Example 1 A. Preparation of adhesive for electroless plating (adhesive for upper layer) (i) 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) at a concentration of 80% by weight of diethylene glycol dimethyl ether (DMDG) 35 parts by weight of a resin solution dissolved in water, photosensitive monomer (Aronix M315, manufactured by Toa Gosei Co., Ltd.) 3.1
5 parts by weight, antifoaming agent (S-65, manufactured by San Nopco) 0.5
Parts by weight and 3.6 parts by weight of N-methylpyrrolidone (NMP) were placed in a container and mixed by stirring to prepare a mixed composition.

(Ii) Polyether sulfone (PES) 1
2 parts by weight, 7.2 parts by weight of an epoxy resin particle (manufactured by Sanyo Kasei Co., polymer pole) having an average particle diameter of 1.0 μm and 3.09 parts by weight of an epoxy resin particle having an average particle diameter of 0.5 μm were placed in another container, After stirring and mixing, 30 parts by weight of NMP was further added and stirred and mixed with a bead mill to prepare another mixed composition.

(Iii) 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), 2 parts by weight of a photopolymerization initiator (Irgacure I-907, manufactured by Ciba-Geigy), a photosensitizer (Nippon Kayaku) 0.2 parts by weight of DETX-S) and 1.5 parts by weight of NMP were placed in another container and mixed by stirring to prepare a mixed composition. Then, an adhesive for electroless plating was obtained by mixing the mixed compositions prepared in (i), (ii) and (iii).

B. Preparation of adhesive for electroless plating (adhesive for lower layer) (i) 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) at a concentration of 80% by weight of diethylene glycol dimethyl ether (DMDG) 35 parts by weight of a resin solution, 4 parts by weight of a photosensitive monomer (manufactured by Toagosei Co., Aronix M315), 0.5 parts by weight of an antifoaming agent (S-65 manufactured by Sannopco) and N-methylpyrrolidone (NMP) 3.6 parts by weight were placed in a container and mixed by stirring to prepare a mixed composition.

(Ii) Polyether sulfone (PES) 1
2 parts by weight and epoxy resin particles (manufactured by Sanyo Chemical Industries,
14.4 having an average particle size of 0.5 μm
9 parts by weight were placed in another container and mixed with stirring.
30 parts by weight of MP was added and mixed by stirring with a bead mill to prepare another mixed composition.

(Iii) 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), 2 parts by weight of a photopolymerization initiator (Irgacure I-907, manufactured by Ciba-Geigy), a photosensitizer (Nippon Kayaku) 0.2 parts by weight of DETX-S) and 1.5 parts by weight of NMP were placed in another container and mixed by stirring to prepare a mixed composition. Then, an adhesive for electroless plating was obtained by mixing the mixed compositions prepared in (i), (ii) and (iii).

C. Preparation of resin filler (i) 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell Co., molecular weight: 310, YL983U),
SiO ₂ spherical particles having an average particle diameter of 1.6 μm and a maximum particle diameter of 15 μm or less (CRS 1101 manufactured by Adtec Co., Ltd.) having a surface coated with a silane coupling agent.
-CE) 170 parts by weight and 1.5 parts by weight of a leveling agent (Perenol S4 manufactured by San Nopco Co.) are placed in a container, and the mixture is stirred and mixed to have a viscosity of 40 to 40 at 23 ± 1 ° C.
A resin filler of 50 Pa · s was prepared. As the curing agent, an imidazole curing agent (2E4MZ manufactured by Shikoku Chemicals Co., Ltd.)
-CN) 6.5 parts by weight.

D. Manufacturing method of printed wiring board (1) 1 mm thick glass epoxy resin or BT (bismaleimide triazine) resin
A copper-clad laminate on which an 8 μm copper foil 8 was laminated was used as a starting material (see FIG. 5A). First, the copper-clad laminate was drilled, subjected to electroless plating, and etched in a pattern to form a lower conductor circuit 4 and through holes 9 on both surfaces of the substrate 1.

(2) Through hole 9 and lower conductor circuit 4
After the substrate on which was formed was washed with water and dried, NaOH (1
0 g / l), NaClO ₂ (40 g / l), Na ₃ PO
₄ A blackening treatment using an aqueous solution containing (6 g / l) as a blackening bath (oxidizing bath), NaOH (10 g / l), NaBH
₄ A reduction treatment was performed using an aqueous solution containing (6 g / l) as a reduction bath, and roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 including the through holes 9 (see FIG. 5B). .

(3) After preparing the resin filler described in the above C, within 24 hours after the preparation by the following method, the resin filler 1 in the through hole 9 and between the lower conductor circuits 4 is prepared.
0 (see FIG. 5 (c)).
At this time, as a coating method, a printing method using a squeegee was adopted. In the first printing coating, the through holes 9 were mainly filled and dried at 100 ° C. for 20 minutes. Also,
In the second printing application, the recesses mainly formed by the formation of the lower conductive circuit 4 were filled and dried at 100 ° C. for 20 minutes.

(4) One surface of the substrate after the treatment of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku Co., Ltd.) to form the surface of the lower conductor circuit 4 and the through holes 9 Was polished so that the resin filler did not remain on the land surface, and then buffed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Thereafter, a heat treatment was performed at 100 ° C. for 1 hour and at 150 ° C. for 1 hour to completely cure the resin filler layer.

In this way, the surface portion of the resin filler 10 formed in the through hole 9 and the portion where the conductor circuit is not formed and the surface of the lower conductor circuit 4 are flattened, and the resin filler 10 and the side surface of the lower conductor circuit 4 are flattened. 4a is firmly adhered through the roughened surface, and the inner wall surface 9a of the through hole 9 and the resin filler 10
Was firmly adhered through the roughened surface to obtain an insulating substrate (see FIG. 5D).

(5) Next, the insulating substrate on which the conductor circuit is formed by the above-described process is housed in a rack so that the insulating substrates are spaced apart from each other by 3 cm, alkali-degreased and soft-etched, Treatment with a catalyst solution consisting of palladium and an organic acid provided a Pd catalyst and activated the catalyst.

Next, copper sulfate (3.9 × 10 ^-2 mol /
l), nickel sulfate (3.8 × 10 ^-3 mol / l), sodium citrate (7.8 × 10 ^-3 mol / l), sodium hypophosphite (2.3 × 10 ^-1 mol / l) ), Surfactant (Sufinol 465, manufactured by Nissin Chemical Industry Co., Ltd.)
(1.0 g / l), the substrate was immersed in an electroless copper plating bath of pH = 9 consisting of an aqueous solution containing 1 g of an aqueous solution, and after 1 minute of immersion, vibrated in the vertical and horizontal directions at a rate of once per 4 seconds. Cu-N on the surface of the land of the lower conductor circuit and the through hole
A roughened layer of a needle-shaped alloy made of iP was provided. Further, tin borofluoride (0.1 mol / l), thiourea (1.0 mol / l)
(mol / l), a Cu—Sn substitution reaction was performed using a plating bath at a temperature of 35 ° C. and a pH of 1.2 to provide an Sn layer having a thickness of 0.3 μm on the surface of the roughened layer (FIG. )reference).

(6) Further, tin borofluoride (0.1 mol
1 / l), temperature 3 containing thiourea (1.0 mol / l)
Using a tin-substituted plating solution at 5 ° C. and a pH of 1.2, a Cu—Sn substitution reaction was performed for 10 minutes in an immersion time to provide a 0.3 μm-thick Sn layer on the surface of the roughened layer. However, this Sn layer is not shown.

(7) Adhesive for lower layer electroless plating described in B above (viscosity: 1.5 Pa ·
s) was applied using a roll coater within 24 hours after preparation, allowed to stand in a horizontal state for 20 minutes, and then dried at 60 ° C. for 30 minutes. Next, the adhesive for electroless plating (viscosity: 7 Pa · s) for the upper layer described in the above A was applied using a roll coater within 24 hours after preparation, and similarly left for 20 minutes in a horizontal state, After drying at 60 ° C. for 30 minutes, a 35 μm-thick electroless plating adhesive layer 2
a and 2b were formed (see FIG. 6B).

(8) A photomask film on which a black circle having a diameter of 85 μm is printed is brought into close contact with both surfaces of the substrate on which the layer of the adhesive for electroless plating is formed in the above (7), and is 500 mJ / cm by an ultrahigh pressure mercury lamp. After exposure at ^two intensities, it was spray-developed with a DMDG solution. Thereafter, the substrate was further exposed at 3000 mJ / cm ² intensity using an ultra-high pressure mercury lamp,
A heat treatment at 100 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours is performed.
(See FIG. 6 (c)). Note that the tin plating layer was partially exposed in the opening serving as the via hole.

(9) The substrate in which the via hole opening 6 was formed was immersed in a chromic acid aqueous solution (7500 g / l) for 19 minutes to dissolve and remove the epoxy resin particles present on the surface of the interlayer resin insulating layer. Was roughened to obtain a roughened surface. Then, it was immersed in a neutralizing solution (manufactured by Shipley) and washed with water (see FIG. 6D). Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate subjected to the surface roughening treatment, catalyst nuclei were attached to the surface of the interlayer insulating material layer and the inner wall surface of the via hole opening.

(10) Next, the substrate is immersed in an electroless copper plating aqueous solution having the following composition, and has a thickness of 0.6 to 1.
An electroless copper plating film 12 of 2 μm was formed (FIG. 7A)
reference). [Electroless plating aqueous solution] EDTA 0.08 mol / l Copper sulfate 0.03 mol / l HCHO 0.05 mol / l NaOH 0.05 mol / l α, α'-bipyridyl 80 mg / l PEG 0.10 g / L (polyethylene glycol) [Electroless plating conditions] at a liquid temperature of 65 ° C for 20 minutes

(11) A commercially available photosensitive dry film is adhered to the electroless copper plating film 12, and a mask is placed thereon.
Exposure was performed at mJ / cm ² , and development was performed with a 0.8% aqueous sodium carbonate solution to provide a plating resist 3 having a thickness of 15 μm (see FIG. 7B).

(12) Next, the copper-free copper plating film 13 having a thickness of 15 μm was formed on the non-resist-formed portion under the following conditions (see FIG. 7C). [Electroplating aqueous solution] sulfuric acid 2.24 mol / l copper sulfate 0.26 mol / l additive 19.5 ml / l (manufactured by Atotech Japan, capparaside HL) [electroplating conditions] current density 1 A / dm ² hours 65 minutes Temperature 22 ± 2 ℃

(13) Further, after the plating resist is stripped and removed with a 5% KOH aqueous solution, the electroless plating film under the plating resist is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide to form an independent upper layer. The conductor circuit 5 (including the via hole 7) was used (see FIG. 7D).

(14) With respect to the substrate on which the conductor circuit is formed,
Perform the same treatment as in (5), and apply a 2 μm thick
An alloy roughened layer 11 made of Cu—Ni—P was formed (see FIG. 8A). (15) Subsequently, the above steps (6) to (14) were repeated to form a further upper layer conductive circuit. (FIG. 8 (b)
To FIG. 9 (b)).

(16) Next, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) to a concentration of 60% by weight was used. 46.67 parts by weight of an oligomer for imparting property (molecular weight: 4000), 15 parts by weight of a bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell Co., Ltd.) dissolved in methyl ethyl ketone, and 15 parts by weight of an imidazole curing agent ( (Shikoku Chemicals, trade name: 2E4MZ-CN)
6 parts by weight, 3 parts by weight of a polyfunctional acrylic monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.), which is a photosensitive monomer, and polyvalent acrylic monomer (trade name: DP, manufactured by Kyoei Chemical Co., Ltd.)
E6A) 1.5 parts by weight and 0.71 part by weight of a dispersion antifoaming agent (manufactured by San Nopco, trade name: S-65) in a container,
A mixed composition was prepared by stirring and mixing, and 2.0 parts by weight of benzophenone (manufactured by Kanto Kagaku) as a photopolymerization initiator and Michler's ketone (manufactured by Kanto Kagaku) as a photosensitizer were added to the mixed composition. Add 0.2 parts by weight and adjust viscosity to 25 ° C
To obtain a solder resist composition (organic resin insulating material) adjusted to 2.0 Pa · s. The viscosity was measured with a B-type viscometer (DVL-B type, manufactured by Tokyo Keiki Co., Ltd.) when the rotor No. was 60 rpm. Rotor N at 4,6 rpm
o. According to 3.

(17) Next, the above-mentioned solder resist composition is applied to both sides of the multilayer wiring board in a thickness of 20 μm,
After performing a drying process under the conditions of 20 ° C. for 20 minutes and 70 ° C. for 30 minutes, a 5 mm-thick photomask on which a pattern of the opening of the solder resist is drawn is brought into close contact with the solder resist layer, and an ultraviolet ray of 1000 mJ / cm ² is applied. Exposure with DM
Development was performed with a TG solution to form an opening having a diameter of 200 μm. Then, at 80 ° C. for 1 hour, and at 100 ° C. for 1 hour.
The solder resist layer was cured by performing a heat treatment under the conditions of 1 hour at 120 ° C. and 3 hours at 150 ° C., and the solder pad portion was opened, and the thickness was 20 μm.
Of the solder resist layer (organic resin insulating layer) 14 was formed.

(18) Next, a solder resist layer (organic resin
The substrate on which the insulating layer (14) is formed is coated with nickel chloride (2.3).
× 10^-1mol / l), sodium hypophosphite (2.8
× 10 ^-1mol / l), sodium citrate (1.6 ×
10^-1mol / l) and pH = 4.5
Immersion in a plating solution for 20 minutes, and a 5 μm thick
A nickel plating layer 15 was formed. In addition, the board
Potassium gold cyanide (7.6 × 10^-3mol / l), salt
Ammonium iodide (1.9 × 10^-1mol / l), quenched
Sodium acid (1.2 × 10^-1mol / l), phosphorus hypophosphite
Sodium acid (1.7 × 10^-1mol / l)
Immerse in a plating solution at 80 ° C for 7.5 minutes,
0.03 μm thick gold plating layer on the Kell plating layer 15
No. 16 was formed.

(19) Next, solder paste was printed to form solder bumps only on the fine pitch side for connecting electronic components such as IC chips. At this time, the printing of the solder paste was performed twice using two masks.
First, in the first printing of the solder paste, printing can be performed every other row on the portion of the solder bump forming pad 18 shown in FIG. Using a mask configured as described above, this mask is placed on the solder resist 14 and has a hardness of 75 °.
Using a rubber squeegee, the solder paste was filled in the pad portion for forming the solder bump. The opening diameter of the mask is 17
It was 0 μm.

The solder paste mainly contains a solder having a particle diameter of 5 to 25 μm in which Sn / Pb is blended at a weight ratio of 63:37, and has a viscosity of 200 Pa.s. s.

Next, the second printing of the solder paste was performed. At this time, the printing was performed only on the portions marked with ◎ of the solder bump forming pad shown in FIG. A mask as shown in FIG. 3 having a counterbore 21a was used in a portion facing the portion where the solder bump was formed for the first time. The printing conditions were the same as in the first printing, and the opening diameters of the masks were all 170 μm.
Thereafter, solder bumps were formed by reflowing the solder paste layers formed in the first and second times at 200 ° C. (FIG. 9C).

(21) Next, the printed circuit board is subjected to flux cleaning, and the substrate is divided into pieces having an appropriate size by a device having a router. I got (20) By the above method, a plurality of printed wiring boards are manufactured,
The other part of the manufactured printed wiring board was joined to an IC chip. That is, using a predetermined mounting device, after the flux cleaning, the solder bumps of the printed wiring board are aligned with the bumps provided on the IC chip with reference to the target mark, and the solder is reflowed. The solder bump and the bump of the IC chip were joined. And after flux washing,
An underfill was filled between the IC chip and the multilayer printed wiring board to obtain a printed wiring board to which the IC chip was connected.

(Embodiment 2) After the first solder printing, the formed solder paste layer is reflowed at 200 ° C. to form solder bumps, and then the second solder paste printing is performed. A printed wiring board was manufactured in the same manner as in Example 1 except that bumps were formed.

Comparative Example 1 A printed wiring board was manufactured in the same manner as in Example 1 except that all the solder bumps were filled with the solder paste by a single solder paste printing to form the solder bumps.

Next, with respect to the printed wiring boards manufactured in Examples 1 and 2 and Comparative Example 1, contamination of the solder resist layer was observed, and solder bump height and shape, performance tests before and after the reliability test, and the like were performed. The evaluation is performed by the following method.
A comparative evaluation was also made on whether or not the mask was damaged. The results are shown in Table 1.

[0098]Evaluation method  (1) Shape and height of solder bumps Cut the printed wiring board at the portions where the solder bumps are formed.
After observing the cross section with a microscope,
Measure the height of the solder bump from the solder layer, observe the shape,
Was. Regarding the shape, circle the hemisphere,
Those that were not eligible were marked X.

(2) Reliability Test (Heat Cycle Test) After standing at 135 ° C. and a relative humidity of 85% for 1000 hours, the following continuity test was carried out, and the printed wiring board was formed with solder bump portions. The part was cut and the state of the solder bump was observed.も の indicates that there is no change from before the reliability test, and X indicates that cracks and the like are observed.

(3) Continuity Test A continuity test was performed after the printed wiring board was manufactured, before the reliability test, or after the reliability test, and the continuity was evaluated based on the result displayed on the monitor.も の indicates that there was no short circuit or disconnection, and X indicates that there was a short circuit or disconnection.

(5) State of Mask The mask was visually observed. ×, if damage was found
If no damage was observed, it is marked with a circle.

[0102]

[Table 1]

As shown in Table 1, in the printed wiring boards manufactured in Examples 1 and 2, the height and shape of the solder bumps were substantially uniform, and the solder bumps between the solder bumps due to the bleeding of the solder paste were used. There were no short circuits. In addition, since the distance between the masks was appropriate, even when continuous printing was performed, no damage to the mask such as tearing of the mask or destruction of the opening occurred. Further, even if a conduction test was performed before and after the reliability test, there was no problem at all, and no crack or peeling of the solder bump was found.

On the other hand, the printed wiring board manufactured in Comparative Example 1 had voids formed in the solder bumps, had a large variation in height compared to Example 1, and had a non-uniform shape. In addition, a short circuit between the solder bumps due to the bleeding of the solder paste was observed. Regarding the continuity test, there was no particular problem after the formation of the solder bumps, except for the short circuit between the solder bumps during the formation of the solder bumps.
A short circuit has occurred. Further, when the cross section of the solder bump at the portion where the disconnection was confirmed was cut, cracks and peeling were caused. It was presumed to be caused by voids in the solder bumps.

[0105]

As described above, according to the method of manufacturing a printed wiring board of the present invention, it is possible to form solder bumps corresponding to narrow pitch and fine pitch of electronic components such as IC chips. No short circuit between solder bumps
The uniformity of the shape and height of the solder bumps, and the connectivity that enables reliable connection with electronic components such as IC chips,
A highly reliable printed wiring board can be manufactured.

[Brief description of the drawings]

FIG. 1 is a plan view schematically showing an example of an arrangement state of solder bump forming pads formed on a solder resist layer on a printed wiring board.

FIG. 2 is a plan view schematically showing another example of an arrangement state of pads for forming solder bumps.

FIG. 3 is a cross-sectional view illustrating an example of a method of forming a solder bump in the method of manufacturing a printed wiring board according to the present invention.

FIGS. 4A and 4B are cross-sectional views showing another example of a method of forming a solder bump in the method of manufacturing a printed wiring board according to the present invention.

FIGS. 5A to 5D are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 6A to 6D are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 7A to 7D are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 8A to 8C are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 9A to 9C are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

[Explanation of symbols]

Reference Signs List 1 substrate 2 (2a, 2b) interlayer resin insulating layer (adhesive layer for electroless plating) 3 plating resist layer 4 lower layer conductor circuit 4a roughened surface 5 upper layer conductor circuit 7 via hole 8 copper foil 9 through hole 9a roughened surface DESCRIPTION OF SYMBOLS 10 Resin filler 11 Roughening layer 12 Electroless plating layer 13 Electroplating layer 14 Solder resist layer (organic resin insulating layer) 15 Nickel plating film 16 Gold plating film 17 Solder bump 18 Solder bump formation pad 21 Mask 21a Counterbore 21b Opening Parts 22a, 22b, 22c Solder paste layer

Claims (5)

[Claims] A step of forming an interlayer insulating layer on the formed conductor circuit to form a plurality of conductive circuits on the insulating substrate with the interlayer insulating layer interposed therebetween; A solder resist layer is provided, a plurality of solder bump forming pads are formed by opening a part of the solder resist layer, a solder paste is printed on the solder bump forming pad using a mask, and the solder bumps are formed. A method of manufacturing a printed wiring board to be formed, wherein an opening is formed only in a portion facing a part of all the formed solder bump forming pads, and a mask having a large space between the openings is used. A printed wiring board, comprising: performing a first printing process; and performing a printing process using a mask having an opening in a solder bump forming pad portion that has not been printed in a second or subsequent printing process. Production method. 2. The print according to claim 1, wherein in the first printing, the solder paste is filled in the solder bump forming pad such that the upper surface of the formed solder paste layer is substantially the same as the surface of the solder resist layer. Manufacturing method of wiring board. 3. In the second and subsequent printings, an opening smaller than the previously formed opening is provided not only in a newly printed portion but also in a portion facing the previously printed solder bump forming pad. 2. A printing process is performed using a mask that has been set.
Or the method for manufacturing a printed wiring board according to 2. 4. The method for manufacturing a printed wiring board according to claim 1, wherein a reflow process is performed after the solder paste printing process, and a subsequent solder paste printing process is performed. 5. The second or subsequent printing of a solder paste, wherein a mask having a concave portion formed on a portion in contact with the solder resist and facing a previously formed solder bump forming pad is used. 5. The method for manufacturing a printed wiring board according to any one of 4.