JP2000293246A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance a fail safe resistance to the fault of a constant voltage power circuit even if a drive circuit for controlling the operation of a load, a logic circuit for controlling the drive circuit and a constant voltage power circuit are made into one chip to make them small is size and light in weight. SOLUTION: An IC 1 for drive is constituted by forming a drive circuit 5 formed by containing MOSFET 3 for conducting/disconnecting a load 2, monitoring logic 6 which turns on/off MOSFET 3 with a command from a micro computer 9, a constant voltage power circuit 7 becoming the power of the micro computer 9 and motor logic 6, and a fail safe circuit 8 on the same SOI substrate. The fall safe circuit 8 directly obtains the power from an outer power source. When the output voltage of the constant voltage power circuit 7 becomes an abnormal state, MOSFET 3 is compulsorily turned off and the load 2 is disconnected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device comprising a drive circuit for controlling the switching of a load and a logic circuit for a control operation, together with a constant voltage power supply circuit for supplying power thereto, in one chip. About.

[0002]

SUMMARY OF THE INVENTION For example, EC for automobiles
The U (Electronic Control Unit) is composed of a microcomputer, a drive circuit for driving the load, a logic circuit for controlling the drive circuit and monitoring the operation state and temperature of the load, a constant voltage power supply circuit, and the like. In recent years, in order to reduce the size and weight, a plurality of circuits are formed on the same semiconductor substrate to form a single chip. In this case, generally, a drive IC in which a drive circuit, a logic circuit, a constant voltage power supply circuit, and the like are integrated into one chip is provided, and a load is driven while data is exchanged between the drive IC and the microcomputer. Configuration is considered.

However, in such a configuration, since the power of the logic circuit and the microcomputer is supplied from the constant voltage power supply circuit in the drive IC, if a failure occurs in the constant voltage power supply circuit, There is a possibility that the operation of the logic circuit or the microcomputer becomes unstable and the control operation of the load becomes impossible, which has been an unsolved problem.

The present invention has been made in view of the above circumstances, and has as its object to provide a drive circuit for controlling the operation of a load,
Even if the logic circuit and the constant voltage power supply circuit that perform the control operation are integrated into one chip to reduce the size and weight,
An object of the present invention is to provide a semiconductor device capable of improving fail-safe performance against a failure of a constant voltage power supply circuit.

[0005]

To achieve the above object, the means described in claim 1 can be adopted. According to this means, a drive circuit for controlling the cut-off of the load, a logic circuit for performing a control operation including control of the drive circuit, and a constant-voltage power supply circuit for supplying power to the whole are provided in the same manner. Since it is formed on a semiconductor substrate, the overall size and weight can be reduced. In this case, a fail-safe circuit is provided for forcibly turning off the load when the output voltage of the constant-voltage power supply circuit becomes abnormal, and the fail-safe circuit is configured to be supplied with power from an external power supply. Therefore, even if the output voltage of the constant voltage power supply circuit is in an abnormal state as described above, the forced cutoff operation of the load can be reliably performed, and its fail-safe performance can be enhanced. Become like

According to the second aspect of the present invention, the drive circuit includes a switching element for switching the load, that is, a power switching element is formed on the same semiconductor substrate. Therefore, it is possible to further reduce the overall size and weight.

According to a third aspect of the present invention, the fail-safe circuit is formed in a predetermined element formation region provided on the semiconductor substrate in a state of being insulated from other circuit element formation regions. Therefore, the possibility that the function of the fail-safe circuit is adversely affected by the state of other circuit elements is reduced.

When the SOI substrate is used and the element formation region for the fail-safe circuit has a trench isolation structure, the function of the fail-safe circuit is reduced. On the other hand, it is possible to reliably prevent the adverse effects caused by the states of other circuit elements, so that the fail-safe function can be further enhanced.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. In FIG. 1 showing an electrical configuration, a drive IC 1 as a semiconductor device drives an external load 2 through a load connection terminal 1a, and has a power IC as a switching element for controlling the cut-off of the load 2. The MOSFET 3 is provided. This M
The OSFET 3 is of an N-channel type, and has a drain connected to the power supply terminal VB and a source connected to the load connection terminal 1a. The power supply terminal VB is supplied with power from an external power supply (not shown) (output voltage is, for example, 12 V).

In the drive IC 1, the above MOSFE
In addition to T3, when the ON command is given, the MOSF
A charge pump circuit 4 for generating a gate signal for ET3 is provided. The drive circuit 5 according to the present invention is provided by the MOSFET 3 and the charge pump circuit 4.
Is configured. The power of the charge pump circuit 4 is supplied from the power terminal VB.

In addition, a monitoring logic 6 (corresponding to a logic circuit in the present invention), a constant voltage power supply circuit 7, and a fail-safe circuit 8 are provided in the drive IC 1. The monitoring logic 6 includes a current mirror circuit (not shown) for detecting a load current flowing through the MOSFET 3,
It has a function of monitoring the load current, the temperature of the MOSFET 3, etc., based on a state detection signal from a state detection circuit including a temperature detection circuit (not shown) for detecting the temperature of the MOSFET 3, and a signal indicating the monitoring result. Is transmitted to the microcomputer 9 outside the drive IC 1. The microcomputer 9 determines a driving method of the load 2 based on a signal from the monitoring logic 6 and a preset program, and transmits a signal for instructing the monitoring logic 6 to turn on and off the MOSFET 3. The monitoring logic 6 generates an ON command and an OFF command for the MOSFET 3 based on a command signal from the microcomputer 8.
3 is controlled through the charge pump circuit 4.

The constant voltage power supply circuit 7 is supplied with power from an external power supply through a power supply terminal VB and outputs an output of a constant voltage (5 V) to internal circuit elements such as the monitoring logic 6 and a current mirror circuit and the microcomputer 9. It is configured to be supplied to.

The fail-safe circuit 8 is provided so as to be supplied with power from an external power supply through a power supply terminal VB, and has the following configuration. That is, in the fail-safe circuit 8, the voltage detection circuit 10 includes a voltage dividing resistor 10 between the output terminal of the constant voltage circuit 7 and the ground terminal.
a, 10b are connected in series.
A detection voltage Vd proportional to the output voltage of the constant voltage power supply circuit 7 is generated from the common connection point 10b. Reference voltage generation circuit 1
1 is a voltage dividing resistor 1 between the power supply terminal VB and the ground terminal.
1a and 11b are connected in series.
a, a fixed level reference voltage Vs from the common connection point of 11b
Occurs. The comparator 12 is supplied with power from an external power supply through a power supply terminal VB, compares the levels of the detection voltage Vd and the reference voltage Vs, and finds that Vd> Vs
Is established, the output signal is inverted from low level to high level. The comparator 1
It is preferable to connect a feedback resistor to 2 to have hysteresis.

In the fail-safe circuit 8, an output terminal of the comparator 12 is connected to an NPN through a resistor 13.
The transistor 14 is connected to the base thereof. A bias resistor 15 is connected between the base and the emitter of the transistor 14. In the transistor 14, the collector is connected to the gate of the MOSFET 3 via the resistor 16, and the emitter is connected to the ground terminal. Therefore, when the transistor 14 is turned on, the gate-source voltage of the MOSFET 3 is reduced to a level close to the ground potential level, and the MOSFET 3 is forcibly turned off.

FIG. 2 schematically shows a schematic sectional structure of the drive IC 1. In FIG. 2, the drive IC 1 is a P-type base silicon substrate 17a.
An SOI substrate 17 (corresponding to a semiconductor substrate in the present invention) on which an N-type silicon layer 17c is formed via an insulating separation film 17b is used. In this case, circuit elements (not shown in FIG. 2) such as the MOSFET 3, the charge pump circuit 4, the monitoring logic 6, the constant voltage power supply circuit 7, and the fail-safe circuit 8 are formed on the silicon layer 17c. Are formed in a state where they are electrically insulated from each other by an insulating isolation trench 17e.

According to the above configuration, the relationship between the detection voltage Vd from the voltage detection circuit 10 and the reference voltage Vs from the reference voltage generation circuit 11 is always Vd when the constant voltage power supply circuit 7 is functioning normally. Since the state is <Vs, the comparator 12 in the fail-safe circuit 8 outputs a low-level signal. Therefore, in this state, since the transistor 14 remains off, the MOSFET 3
Charge pump circuit 4 according to a signal from monitoring logic 6
On / off control.

On the other hand, when a failure occurs in the constant voltage power supply circuit 7 and its output voltage rises to the voltage level of the power supply terminal VB, the relationship between the detection voltage Vd and the reference voltage Vs becomes Vd.
> Vs, and the output of the comparator 12 is inverted to a high level signal. Then, since the MOSFET 3 in which the transistor 14 is turned on is forcibly turned off, the load 2 is forcibly turned off unconditionally. When a failure occurs in which the output voltage of the constant voltage power supply circuit 7 goes down,
The output of the ON command from the monitoring logic 6 is stopped and the MO
SFET3 will be turned off. Therefore, a failure occurs in the constant voltage power supply circuit 7 and the monitoring logic 6 and the microcomputer 9
Even if the operation becomes unstable, there is no possibility that the control operation (disconnection operation) of the load 2 becomes impossible.

According to the above-described embodiment, the drive circuit 5 including the MOSFET 3 for controlling the cut-off of the load 2, the monitoring logic 6 for performing the control operation of the drive circuit 5, and the power supply for the whole Since the constant voltage power supply circuit 7 for supply is formed on the same SOI substrate 17 to be integrated into a single chip, the overall size and weight can be reduced.

In this case, when the output voltage of the constant-voltage power supply circuit 7 becomes abnormal, the load 2 is forcibly cut off by the fail-safe circuit 8. Thus, even if the output voltage of the constant voltage power supply circuit 7 becomes abnormal as described above, the forced disconnection operation of the load 2 can be reliably performed. , So that its fail-safe performance can be enhanced.

Further, an SOI substrate 17 is used as a semiconductor substrate for forming an IC,
A plurality of element forming regions 17d are formed on the substrate 17 in a state where they are electrically insulated from each other by the insulating isolation trenches 17e, and circuit elements such as the fail-safe circuit 8 are formed in the element forming regions 17d. The function of the fail-safe circuit 8 can be reliably prevented from being adversely affected by the state of other circuit elements, so that the fail-safe function can be greatly enhanced and the layout of each circuit element can be improved. The above constraint can be reduced.

It should be noted that the present invention is not limited to the above-described embodiment, but can be modified or expanded as follows. The switching element (MOSFET 3) may be connected to the outside. In this case, the charge pump circuit 4 corresponds to the drive circuit according to the present invention.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a schematic sectional view of a semiconductor substrate.

[Explanation of symbols]

1 is a drive IC (semiconductor device), 2 is a load, 3 is M
OSFET (switching element), 4 is a charge pump circuit, 5 is a drive circuit, 6 is a monitoring logic (logic circuit), 7 is a constant voltage power supply circuit, 8 is a fail-safe circuit, 9 is a microcomputer, 10 is a voltage detection circuit, 11 Denotes a reference voltage generating circuit, 12 denotes a comparator, 17 denotes an SOI substrate (semiconductor substrate), 17d denotes an element formation region, and 17e denotes an insulating isolation trench.

Claims (4)

[Claims] 1. A drive circuit for performing a power cutoff control of a load, a logic circuit for performing a control operation including control of the drive circuit, and a constant voltage power supply for supplying power to an internal circuit element including the logic circuit A semiconductor device comprising a circuit and a circuit formed on the same semiconductor substrate, provided so as to be supplied with power from an external power supply, and when the output voltage of the constant voltage power supply circuit becomes abnormal, the load is supplied through the drive circuit. And a fail-safe circuit for forcibly turning off the power. 2. The drive circuit according to claim 1, wherein the drive circuit includes a switching element for turning on and off the load, and the fail-safe circuit performs the switching operation when an output voltage of the constant voltage power supply circuit becomes abnormal. 2. The semiconductor device according to claim 1, wherein the element is forcibly turned off. 3. The semiconductor device according to claim 1, wherein the fail-safe circuit is formed in a predetermined element formation region provided on the semiconductor substrate so as to be insulated from other circuit element formation regions. 3. The semiconductor device according to 2. 4. The semiconductor device according to claim 3, wherein said semiconductor substrate is constituted by an SOI substrate, and an element formation region for said fail-safe circuit is electrically insulated by an isolation trench.