JPH03166816A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To prevent a power output element from breaking owing to the open circuit of a ground line by turning off the power output element forcibly according to the open circuit detection signal of a circuit which detects a current flowing through the ground line. CONSTITUTION:If an electric conductor which connects the ground terminal GND of an integrated circuit IC to an external ground potential point is disconnected or goes to poor connection in contacting or a wire in the integrated circuit, the output signal of a GND open circuit detecting circuit turns on a switch SW2 provided between the gate and source of a power switch MOSFET Q1 and also turns off a switch SW1 which supplies a source voltage to a voltage boosting circuit. While an internal circuit and the external ground point are connected normally, on the other hand, the switch SW1 is turned on to supply an operating voltage VDD to a voltage circuit and the switch SW2 is turned off. Consequently, the output voltage of a gate discharging circuit is boosted corresponding to a signal which is inputted from an input terminal IN and the Q1 turns on to input the output voltage from an output terminal OUT to a load RL.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and is applicable to, for example, a semiconductor integrated circuit device incorporating a power output MOSFET (insulated gate field effect transistor) in the form of a source follower. It is related to effective technology.

[Conventional technology]

As an example of a power switching circuit using a power MOSFET, there is, for example, the magazine R Electronics Technology J, November 1987 issue, pages 22 to 25. This power MOSFET has a source grounded and a drain connected to an inductive load such as a motor.

Further, in order to perform switch control using a pulse width modulation signal, a ramp voltage generation circuit, a pulse width modulation comparator, a launch circuit, and a buffer drive circuit are provided.

[Problem to be solved by the invention]

Power output circuits installed in automobiles, such as electronic fuel injection solenoids, are high-side drive circuits (source follower circuits) in which the Hower output element is connected to the power supply voltage side and the load is placed on the ground potential side of the circuit. It is desirable to do so. This is because if the load is connected to the power supply voltage side and the load is grounded due to a collision or the like, there is a risk that an overcurrent will flow there and cause a fire.

As shown in FIG. 5, when the power switch MOSFET is used as a source follower output circuit, the power supply voltage VD
In order to prevent the output level from decreasing by the threshold voltage of the power switch MOSFET with respect to D, a boosted voltage is required as the operating voltage of the drive circuit. In this case, the inventor's research has revealed that the following problem occurs.

For example, when the grounding line is disconnected, the operating voltage VDD of the booster circuit may be reduced by the diode DI. D2
and level shifted through D3 and power switch M
A relatively low voltage such as VDD-3VF (combined forward voltage of diodes D1 to D3) is constantly supplied to the gate of OSFETQI. For this reason, the power switch M
OSFETQI is not in a completely on state, but is in an on state with a relatively large on-resistance value (small conductance), and keeps current flowing steadily to the load RL. This causes a problem that the power switch MOSFET generates heat or the IC itself is destroyed due to the heat generation.

Furthermore, in the above automobiles, when the engine cannot be started due to discharge of the battery, it often happens that the engine is started by connecting the battery of another automobile. In this case, there is an extremely high risk of accidentally connecting the batteries with reverse polarity using a cable.

When the polarities are reversed in this way, in the semiconductor integrated circuit device to be mounted, the P-type isolation region, which should be the lowest potential point, becomes the highest potential, and the connection between it and the N-type region connected to it becomes the highest potential point. There is a risk that the device will be forward biased and the device will be destroyed.

An object of the present invention is to provide a semiconductor integrated circuit device in which element destruction due to disconnection of a ground line is prevented.

Another object of the present invention is to provide a semiconductor integrated circuit device that prevents element destruction due to reverse connection of power supply polarity.

Still another object of the present invention is to provide a semiconductor integrated circuit device suitable for being mounted on an automobile.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, the power output element is forcibly turned off in accordance with the disconnection detection output signal of the ground line disconnection detection circuit that detects the presence or absence of current flowing through the ground line. Further, a current mirror circuit is used as the ground line disconnection detection circuit, and its collector output is used as the lowest potential point of the circuit.

[For production]

According to the above-mentioned means, when a disconnection or poor contact occurs in the ground line of the IC, the power output element is forcibly turned off, so that heat generation and element destruction due to it can be prevented. Furthermore, since the lowest potential point of the circuit is provided by a current mirror type transistor, it is possible to prevent direct current from flowing through the parasitic diode when the polarity of the power supply voltage is reversely connected.

〔Example〕

FIG. 1 shows a block diagram of a basic embodiment of a power switch circuit to which the present invention is applied. The power switch circuit in the same figure is formed as one integrated circuit IC as shown by the dashed line in the same figure, and although not particularly limited, the power switch MOSFETQ 1 is formed as a substrate as its drain region as described later. is used,
It has a vertical structure in which a drain electrode is provided on the back side of the substrate.

The drain of the power switch MOSFETQI is connected to the power supply voltage VDD, and the source is connected to the output terminal OUT. A load RL is provided between the output terminal OUT and a ground potential point of the external circuit.

That is, the power switch MOSFETQ of this embodiment
1 is operated as a source follower circuit.

A gate discharge circuit whose operating voltage is a boosted voltage formed by a booster circuit BST is provided at the gate of the power switch MOSFETQI. This gate discharge circuit is controlled by an output signal of an inverter circuit N1 that receives an input signal supplied from an input terminal IN, and changes the gate voltage of the power switch MOSFET QI to either a high level such as a boosted voltage or a ground potential inside the IC. It operates as a drive circuit to make the low level as shown in FIG.

Although not particularly limited, the operating voltage of the inverter circuit N1 is a 5V voltage that is relatively lower than the power supply voltage VDD. Accordingly, the control signal supplied to the gate discharge circuit has a high level of 5V.
The low level is set to a relatively low level such as the ground potential of a circuit. Therefore, the drive circuit consisting of the inverter circuit N1 and the gate discharge circuit performs a type of level conversion operation.

In this embodiment, in order to prevent the power switch MOSFETQI from generating heat due to disconnection or poor contact between the ground terminal GND of the integrated circuit IC and the ground wire of the external circuit, and the element being destroyed due to the heat generation, The following circuit is provided.

GND (Grounding wire) The disconnection detection circuit detects when the wiring that connects the ground terminal GND of the integrated circuit IC to the ground potential point of the external circuit is disconnected or has a poor contact, or when a wire inside the integrated circuit is disconnected or comes into contact. This is a circuit that detects when a failure occurs.The specific circuit will be explained in detail later, but it operates to detect whether or not current flows from the internal circuit to the ground wire of the external circuit through the terminal GND. The output signal formed by this GND disconnection detection circuit controls the switch SW2 provided between the gate and source of the power switch MOSFETQI.Furthermore, the power supply voltage VDD is supplied to the booster circuit described in In other words, the above G
When GND disconnection detection is not performed by the ND disconnection detection circuit, in other words, if there is a normal connection between the internal circuit and the external ground potential point, switch SWI
is turned on, and the operating voltage VDD is supplied to the booster circuit. Further, the switch SW2 is turned off. As a result, if the output voltage of the gate discharge circuit is made to be a boosted voltage according to the input signal supplied from the input terminal IN, the power switch MOSFETQI is completely turned on, and its source is coupled to the output terminal OUT.
A high-level output voltage such as the power supply voltage VDD is formed from the power source voltage VDD and supplied to the load RL. Furthermore, if the output voltage of the gate discharge circuit is at a low level such as the ground potential in response to an input signal supplied from the input terminal IN, the power switch MOSFET QI is completely turned off, and no current flows through the load RL.

When GND disconnection is detected by the GNDlfr line detection circuit, in other words, if the internal circuit and the external ground potential point are substantially disconnected as described above, the switch SWI is turned off. The power supply to the booster circuit is cut off. Further, the switch SW2 is turned on. As a result, the power switch MOSFETQ
The gate and source of I are shorted and forced into the off state regardless of the gate voltage. Therefore, no current flows through the power switch MOSFET QI and the load RL, and heat generation and element destruction due to it can be prevented.

FIG. 2 shows a circuit diagram of a specific embodiment of a power switch circuit to which the present invention is applied. In the figure, the MO-SFET is an N-channel MOSFET.

The booster circuit BST includes an inverter circuit N2 that receives a periodic pulse signal such as a clock pulse CLK, and an inverter circuit N3 that receives the output signal and forms an inverted signal.
and the output of the inverter circuit N2 and the inverter circuit N
The bootstrap voltage formed by the capacitor C1 is transmitted to one electrode through the diode D2, and the other electrode is connected to the inverter circuit. It consists of a capacitor C2 coupled to the output terminal of N3 and a diode D3 that outputs the bootstrap voltage formed by the capacitor C2.

The gate discharge circuit is composed of MOSFETQ2. That is, the output signal of the inverter circuit N1 is supplied to the gate of the switch MOSFET Q2. When the output signal of the inverter circuit N1 becomes high level and the switch MOSFET Q2 is turned on in response, the capacitor C2 formed by the booster circuit
The charge is discharged and the power switch MOSF
The gate potential of ETQ1 is set to a low level like ground potential. This allows the power switch MOS FET
Q1 is turned off. On the other hand, the output signal of the inverter circuit N1 becomes low level, and the switch MOS
When FETQ2 is turned off, the boosted voltage formed by the booster circuit is applied to the power switch MOSFE.
Supplied to the gate of TQI. As a result, the power switch MOS FETQ 1 is completely turned on,
Supply voltage VDD from the source to which the output terminal OUT is connected
It sends out an output voltage like .

The GNDlli line detection circuit is configured to
PN} consists of transistors Tl and T2 and a resistor R1 that allows a bias current to flow through the input side transistor T1 which is in the form of a diode. The output signal of the GND disconnection detection circuit is obtained from the collector of the output side transistor T2. Although not particularly limited, the collector of the transistor T2 acts as a switch SW2 provided between the gate and source of the power switch MOSFETQ1.
Connected to the gate of 6SFETQ3. Further, in order to control the operating voltage for the booster circuit BST, the collector of the transistor T2 is connected to the base of a PNP transistor T3, which acts as a switch SWI, via a resistor R2. The PNP transistor T3, which acts as a switch SWI, has its emitter connected to the power supply voltage VDD, and its collector connected to the power supply terminal of the booster circuit BST.

When the ground terminal GND of the integrated circuit IC is normally connected to an external ground potential point, a bias current formed by the resistor R1 flows through the current cooler transistors TI and T2. That is, the transistor T2 is turned on, and its collector potential is set to a low level similar to the ground potential of a low voltage circuit. This allows the switch MOSF
ETQ3 is turned off. Furthermore, the current flowing through the transistor T2 passes through the resistor R2.
3 base current. Therefore, the transistor T3 turns on, supplies the power supply voltage VDD to the boost circuit BST, and performs a boost operation according to the clock pulse CLK.

If there is a substantial disconnection between the internal ground point of the integrated circuit IC and the external ground potential point as described above, no current will flow through the current path formed by the resistor R1 and the transistor T1. As a result, transistor T2 is also turned off. Therefore, the gate potential of the MOSFET Q3 is charged up through the base of the transistor T3 and the resistor R2, and is turned on. This forces the power switch MOSFETQI to be turned off.

This prevents current from flowing through the power switch MOSFETQ1 and the load RL, thereby preventing heat generation and element destruction due to it.

When the charge-up to the gate of the MOSFET Q3 is completed, the base current stops flowing through the transistor T3, and the transistor T3 is substantially turned off. As a result, the power supply to the booster circuit BST is substantially cut off.

As a result, it is possible to prevent current from constantly flowing between the output of the booster circuit, the turned-on MOSFET Q3, the output terminal OUT, and the load RL. That is, in the abnormal state as described above, it is possible to prevent inconveniences caused by a small current constantly flowing through the MOSFET Q3 to the load RL.

FIG. 3 shows a specific circuit diagram of another embodiment of the power switch circuit to which the present invention is applied.

In the integrated circuit IC of this embodiment, the internal ground potential of the integrated circuit is not the same potential as the ground potential GND of the external circuit, and although it is not particularly limited, the potential of the collector of the transistor T2 constituting the GND disconnection detection circuit is In other words, the emitters of the transistors TI and T2 that constitute the GND disconnection detection circuit are connected to the external ground terminal GND.The ground potential in other internal circuits is connected to the external ground terminal GND. T
2 collector potential GND' is used. For example, a MOSFE that constitutes a gate discharge circuit
The source of TQ2 is the collector of the transistor T2 (
GND').

In addition, the ground points of the inverter circuit Nl that controls the switch of the MOSFET Q2 and the inverter circuits N2 and N3 that constitute the booster circuit BST are also connected to the collector (GND'') of the transistor T2, not to the terminal GND.

If only transistor T2 is used, inverter circuit N
If it is not possible to absorb the operating current of MOSFET 1 or N3 or MOSFET Q2, add a transistor whose collector is connected to the collector of transistor T1 and the base and base of transistor T2, respectively, and connect the internal ground potential GN from the collector.
D". This may prevent excess voltage between the isolation P-type region of the integrated circuit IC and the connected N-type region when the power supply is reversely connected as described later. Current can be prevented from flowing.

In this embodiment, the GND disconnection detection circuit can be used not only to detect disconnection but also to prevent damage due to reverse connection of the power supply, so performance can be improved without complicating the circuit.

FIG. 4 shows MOSFETQ of the embodiment circuit of FIG.
1, transistors Tl and T2, and a device structure cross-sectional view of an embodiment of MOSFET Q2.

The power output MOSFET QI has a drain region of N
It is used as a type substrate. Therefore, the drain electrode D is provided on the back side of the substrate. The drain electrode D is the power supply terminal VDD
connected to. A P-type channel region constituting the power MOS FETQ 1 is formed in a ring shape on the surface of the substrate. Similarly, a ring-shaped N-type source region is formed on the surface of this P-type channel region. A gate electrode G is formed on the surface of the channel region sandwiched between the source region and the substrate serving as the drain region, with a gate insulating film interposed therebetween. The source region and the channel region are commonly connected to form a source electrode S.

As a result, the drive current flowing to the load when MOSFET QI is turned on flows in the vertical direction of the substrate.

Such power output MOSFET QI and each of the circuit elements described above are formed on the same substrate. Therefore, a P-type isolation region is formed in the N-type substrate, and each of the circuit elements is formed within this P-type isolation region.

For example, transistors T1 and T2 have N-type collector regions formed within P-type #regions. The NPN type transistors T1 and T2 are constructed by forming a P-type base region in the collector region and an N-type lid region in the base region. Further, the diodes DI to D3 used in the booster circuit BST are the transistors TI. This can be achieved by connecting the base and collector of T2 in common and using the PN junction between the emitter and base. In addition, PNP } transistor T3 is
Although not particularly limited, it can be configured as a lateral transistor, such as by forming a P-type base region in an opposing N-type collector region of the NPNI transistor.

In addition, N-channel MOSFETs such as switch MOSFETs Q2 and Q3 are formed by forming N-type regions as a source S and a drain D on the surface of the P-type isolation region at the same time as the transistors TI, 72, etc., A gate electrode G may be formed on the semiconductor surface sandwiched between the source S and drain D with a thin gate insulating film interposed therebetween.

In this embodiment, the lowest potential GND' of a circuit such as that represented by the P-type isolation region is set to the ground potential GN of an external circuit.
Instead of using transistor TI.D, which constitutes the GND disconnection detection circuit, It is obtained from the collector of T2. That is, the base and collector of the transistor TI are commonly connected. A bias current I is supplied to the bases of the transistors T1 and T2 from a resistor element (not shown). The terminals of the transistors T1 and T2 are connected to a ground potential point GND of an external circuit via an external terminal.

The collector of the transistor T2 is a MOSFET.
It is connected to the source S of Q2 and the P-type isolation region, and supplies a bias voltage thereto. As a result, the P-type isolation region in the integrated circuit IC is biased to the lowest potential of the internal circuit.

In such a semiconductor structure, the isolation region includes:
A ground potential is applied through the bases of the transistors T1 and T2 and the transistor. Therefore, even if the power supply voltage VDD and the circuit ground terminal GND are connected in reverse, in other words,
Even if a ground potential is supplied to the N-type substrate and a voltage such as +12V is applied to the terminal GND, the transistor T1,
A parasitic diode due to the base of T2 and the ξ sota is inserted in a reverse bias state, and no current that would destroy the element flows. Therefore, the semiconductor integrated circuit device of this embodiment is suitable for a power switch circuit mounted on an automobile. This is because, as mentioned above, when it becomes impossible to start the engine due to discharge of the battery in a car, it is often necessary to connect the battery of another car to start the engine. This is because there is a very high possibility that a reverse connection will be made by mistake. In the integrated circuit of this embodiment, even if such a reverse connection is made, the internal elements and element isolation regions will not be damaged in junction.

The effects obtained from the above examples are as follows. That is, (1) a ground wire disconnection detection circuit that detects the presence or absence of current flowing through the ground wire, and a switch element that forcibly turns the power output element into an OFF state in accordance with the disconnection detection output signal of this ground wire disconnection detection circuit. Therefore, when a disconnection or poor contact occurs at the ground terminal of the integrated circuit, it is possible to prevent the power output element from being destroyed due to heat generation.

(2) When the power output element is operated by the boosted voltage generated by the booster circuit, the output of the booster circuit and the power A switch that forcibly turns off the output element MO S F E
This has the effect that inconveniences caused by constant current flowing through the T can be prevented.

《3) Current mirror type NP to which bias current is supplied
By using the collector voltage of the N transistor and the transistor configured in the current mirror configuration as the lowest potential in the semiconductor integrated circuit, when the power supply is reversely connected, a forward current flows through the internal parasitic diode. This has the effect that it can be prevented from being put away.

(4) By using the current mirror circuit in (3) above and the GND disconnection detection circuit as a disconnection detection circuit,
The effect is that performance can be improved without complicating the circuit.

(5) Through (1) to (4) above, it is possible to obtain a semiconductor integrated circuit device suitable for use in automobiles, where there is a high risk of breakage of the grounding wire, poor contact, or reverse connection of the battery due to vibrations, accidents, etc. You can get the effect that you can.

Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to the Examples described above, and it should be noted that various changes can be made without departing from the gist of the invention. Not even. For example, the current mirror circuit that constitutes the GND disconnection detection circuit uses an NPN bipolar transistor, as well as an N-channel MO
An SFET may also be used. Similarly, the current collector that forms the ground potential GND' applied to the internal circuit may also be separated from the N-channel MOSFET. Further, the circuit for forming the bias current to be supplied to the current mirror circuit may be any other circuit other than a resistor. Furthermore, as a switch for cutting off the operating voltage of the booster circuit, in addition to a PNP transistor, a P-channel MOS
An FET may also be used. As for the structure of the booster circuit, inverter circuits N2 and N3 may have a level conversion function when the cross pulse CLK is at a low potential of 5V. The cross pulse CLK may be generated by an internal oscillation circuit or may be supplied from the outside.

A plurality of power MOSFETs may be provided on one semiconductor substrate. In this case, in a power MOSFET whose drain is the substrate, a high-side drive circuit (source follower circuit) with a common drain is required.
It is used as a. The power output element is MO
In addition to SFET, any Swiss element having similar performance may be used.

In addition to a power IC including a power output element, this invention
It can be widely used in various semiconductor integrated circuit devices.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this section is as follows. That is, by forcibly turning off the power output element in accordance with the disconnection detection output signal of the ground line disconnection detection circuit that detects the presence or absence of current flowing through the ground line, heat generation and element destruction due to it can be prevented. In addition, by using a current a circuit as the ground wire disconnection detection circuit and using its collector output as the lowest potential point of the circuit, a simple structure can be used to prevent parasitic diodes when the polarity of the power supply voltage is reversed. It is possible to prevent direct current from flowing through the

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a basic embodiment of a power switch circuit to which the present invention is applied, and Fig. 2 shows a specific embodiment of a power switch circuit to which the invention is applied. The circuit diagram, FIG. 3 is a specific circuit diagram showing another embodiment of the power switch 2,000 circuit to which this invention is applied, and FIG. 4 is a circuit diagram corresponding to the embodiment circuit shown in FIG. 3 above. 5 is a circuit diagram showing an example of a source follower output circuit considered prior to the present invention. IC: Semiconductor integrated circuit, RL: Load, BST: Boost circuit, N1-N3: Inverter circuit, Ql-Q3:
・MOSFETSTl~T3...transistor, R1,
R2...Resistance

Claims (1)

[Claims] 1. A ground wire disconnection detection circuit that detects the presence or absence of current flowing through the ground wire, and a switch element that forcibly turns off the power output element in accordance with a disconnection detection output signal of the ground wire disconnection detection circuit. A semiconductor integrated circuit device comprising: 2. The power output element is provided with a drive circuit whose operating voltage is the boosted voltage generated by the booster circuit, and the operating voltage of the booster circuit is cut off in accordance with the disconnection detection output signal of the ground wire disconnection detection circuit. A semiconductor integrated circuit device according to claim 1, characterized in that: 3. NPN in current mirror form to which bias current is supplied
Alternatively, a semiconductor integrated circuit device characterized in that an N-channel transistor and a voltage at the collector or drain of the transistor in the current mirror configuration are used as the lowest potential in the semiconductor integrated circuit. 4. The above-mentioned current mirror type transistor is used as a ground line disconnection detection circuit, and forcibly turns off the power output element built in the same semiconductor integrated circuit based on the collector or drain output of the output side transistor. 4. The semiconductor integrated circuit device according to claim 3, wherein the semiconductor integrated circuit device is configured to cut off a power supply voltage to a booster circuit that forms an operating voltage of a drive circuit for the power output element.