JP2008109349A - Reverse current prevention circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reverse current prevention circuit for making it unnecessary to provide any diode or transistor for reverse current prevention. <P>SOLUTION: The connection destination of the back gate of an MOS transistor 17 used as a control operation is controlled by a first switch circuit 19 and a second switch circuit 20 to be driven by the output of a first voltage comparator circuit 22 which compares a power supply voltage Vdd with the voltage of an output terminal 11, and when the power supply voltage Vdd is lower than the voltage of the output terminal 11, a parasitic diode 18 owned by the MOS transistor 17 is used as a diode for preventing reverse currents. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor integrated circuit device using a MOS transistor, and more particularly to a backflow current prevention circuit for preventing the occurrence of a backflow current in a MOS transistor.

  In recent years, there has been a strong demand for portable electronic devices to reduce power consumption and extend battery operating time in order to improve performance. Further, downsizing is also demanded from the convenience of carrying around, and there is a strong demand for reduction of board mounting components as means for enabling it.

  In the semiconductor integrated circuit device mounted on such a portable device, for example, the power supply voltage Vdd is applied to the P-type diffusion layer 2 and the back gate as in the control transistor of the series regulator shown in FIG. There is a P-channel MOS transistor 8. As shown in FIG. 3B, the MOS transistor 8 includes P-type diffusion layers 1 and 2, a back gate formed by the N-type diffusion layer 4, and a gate provided on the surface of the N-type well layer 5 via the insulating film 3. The P-type diffusion layer 1, the N-type well layer 5 and the back-gate N-type diffusion layer 4 constitute a PN junction parasitic diode 9. When a reverse bias is applied to the MOS transistor 8, a reverse current flows from the P-type diffusion layer 1 through the parasitic diode 9 to the P-type diffusion layer 2 and the N-type diffusion layer 4 serving as a back gate.

  One conventional technique for preventing such a reverse current is to apply a power supply voltage Vdd to the anode between the P-type diffusion layer 2 of the MOS transistor 8 and the power supply voltage Vdd as shown in FIG. There is a means for providing the reverse current prevention diode 13.

As another conventional technique for preventing a reverse current, there is a means for providing a current interrupt switch for preventing a reverse current described in Patent Document 1 shown in FIG.
JP-A-10-341141

  However, this technique shown in FIG. 3A narrows the operating power supply voltage range of the MOS transistor 8 by the forward voltage drop of the reverse current prevention diode 13. In addition, there is a problem that the manufacturing cost and the mounting area are increased in terms of increasing board mounting components.

  As a method for solving the problem of narrowing the operating power supply voltage range and preventing a reverse current, there is a technique reported in Patent Document 1. There is a circuit in which a current cut-off switch is arranged in series with a MOS transistor, and the current cut-off switch is controlled by a power supply voltage monitoring circuit.

  For example, as shown in FIG. 4, there is a circuit in which a P-channel MOS transistor 14 having a back gate connected to the source, a drain connected to the power supply voltage Vdd, and a gate connected to the power supply voltage monitoring circuit 16 is used as a current cutoff switch. When a reverse bias is applied to this circuit, the power supply voltage monitoring circuit 16 detects it. When the MOS transistor 14 is set to be turned off, the P-type diffusion layer 6 of the MOS transistor 14 and the N-type diffusion layer 7 of the back gate The backflow current can be interrupted by the presence of the configured parasitic diode 15. However, when this technique is used in a circuit that requires a large current control between the output terminal and the power supply voltage Vdd, the MOS transistor 14 having a low on-resistance must be used in order to ensure the operating power supply voltage of the MOS transistor 8. There are limitations.

  The present invention is directed to solving the above-described problems of the prior art, and an object thereof is to provide a backflow current prevention circuit that does not require a backflow current prevention diode or transistor.

  In order to achieve the above object, according to a first aspect of the present invention, there is provided a reverse current prevention circuit for a semiconductor integrated circuit device having a power supply terminal and an output terminal, wherein the source is connected to the power supply terminal and the drain is connected. Connect to the output terminal, connect the back gate to the source through the first switch circuit and compare the voltage at the power supply terminal and the voltage at the output terminal with the MOS transistor connected to the drain through the second switch circuit And a voltage comparison circuit that outputs a control signal for the first switch circuit and the second switch circuit.

  According to a second aspect of the present invention, in the reverse current prevention circuit according to the first aspect, the semiconductor integrated circuit device is a charging device, wherein an external DC power source is connected to the power supply terminal, and a battery is connected to the output terminal. It is characterized by.

  According to the above configuration, the first and second switches are controlled by comparing the voltage levels of the power supply terminal and the output terminal, and the MOS transistor parasitic diode is connected by connecting the back gate and the source or drain of the MOS transistor. By utilizing this, a backflow current can be prevented.

  According to the present invention, by controlling the back gate of the MOS transistor connected between the output terminal and the power supply terminal, it is possible to prevent the reverse current using the parasitic diode, so that the conventionally required reverse current prevention diode And a reverse current cut-off switch are not required, and the manufacturing cost and the board mounting area can be reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a configuration diagram showing a backflow current prevention circuit according to Embodiment 1 of the present invention. As shown in FIG. 1, the MOS transistor 17 has a source connected to the power supply terminal 10 of the power supply voltage Vdd, a drain connected to the output terminal 11, and a back gate connected to the source via the first switch circuit 19. At the same time, it is connected to the drain via the second switch circuit 20.

  In the first voltage comparison circuit 22, the power supply voltage Vdd is applied to the inverting input terminal, and the output terminal 11 is connected to the non-inverting input terminal. The output of the first voltage comparison circuit 22 drives the second switch circuit 20 and drives the first switch circuit 19 via the inverter circuit 21. That is, on / off of the first switch circuit 19 and the second switch circuit 20 is controlled by the level of the voltage of the output terminal 11 and the power supply voltage Vdd.

  The operation of the first embodiment will be described with reference to FIG. 1. When the power supply voltage Vdd is higher than the voltage of the output terminal 11, the output signal of the first voltage comparison circuit 22 turns on the first switch circuit 19 and The two-switch circuit 20 is controlled to be turned off. At this time, the MOS transistor 17 is in a state where the back gate is connected to the source side, and can be controlled as a normal MOS transistor.

  On the other hand, when the power supply voltage Vdd is lower than the voltage at the output terminal 11, the output signal of the first voltage comparison circuit 22 controls the first switch circuit 19 to be turned off and the second switch circuit 20 to be turned on. At this time, the MOS transistor 17 is in a state where the back gate is connected to the drain side. When the MOS transistor 17 is designed to be turned off at this time, the parasitic diode 18 of the MOS transistor 17 is connected to the power supply voltage Vdd from the output terminal 11. This is a reverse current prevention diode.

  FIG. 2 is a block diagram showing a backflow current prevention circuit according to Embodiment 2 of the present invention. The second embodiment differs from the configuration shown in FIG. 1 described in the first embodiment in that the power terminal 10 is replaced with the external adapter terminal 23, the output terminal 11 is replaced with the battery power terminal 26, and the MOS transistor 17 is The MOS transistor 25 for charge control is replaced.

  In the second voltage comparison circuit 30, the voltage of the external DC power source connected to the external adapter terminal 23 is applied to the inverting input terminal, and a battery is connected to the non-inverting input terminal. The output of the second voltage comparison circuit 30 drives the fourth switch circuit 29 and also drives the third switch circuit 28 via the inverter circuit 21.

  The operation of the second embodiment will be described with reference to FIG. 2. When an external DC power supply is attached to the external adapter terminal 23 of the portable device, the third switch circuit 28 is turned on and the fourth switch circuit 29 is turned off. . As a result, the back gate of the charge control MOS transistor 25 is connected to the source, and the normal charge control operation becomes possible.

  When the external DC power supply is disconnected, the third switch circuit 28 is turned off, the fourth switch circuit 29 is turned on, and the back gate of the charge control MOS transistor 25 is connected to the drain. At this time, the MOS transistor When the transistor 25 is designed to be turned off, the parasitic diode 27 of the MOS transistor 25 serves as a reverse current prevention diode from the battery power supply of the battery power supply terminal 26 to the external adapter terminal 23.

  Normally, the portable device is used only with a battery power supply except when charging, so it is necessary to attach a reverse current prevention diode so that no reverse current flows from the battery power source to the external DC power source. According to the second embodiment, a reverse current prevention diode is not required.

  The backflow current prevention circuit according to the present invention controls a back gate of a MOS transistor connected between an output terminal and a power supply terminal, thereby preventing a backflow current using a parasitic diode and generating a backflow current in the MOS transistor. It is useful as a circuit to prevent

The circuit diagram which shows the structure of the backflow current prevention circuit which concerns on Embodiment 1 of this invention. The circuit diagram which shows the structure of the backflow current prevention circuit which concerns on Embodiment 2 of this invention. (A) of a conventional semiconductor integrated circuit device is a circuit diagram of a control transistor of a series regulator, (b) is a sectional view of a control (MOS) transistor, and (c) is a circuit diagram provided with a diode for preventing a reverse current. Circuit diagram showing the configuration of a conventional reverse current prevention circuit

Explanation of symbols

1, 2, 6 P-type diffusion layer 3 Insulating film 4, 7 N-type diffusion layer 5 N-type well layers 8, 14, 17, 25 MOS transistors 9, 15, 18, 27 Parasitic diode 10 Power supply terminal 11 Output terminal 12 Control Circuit 13 Reverse-current prevention diode 16 Power supply voltage monitoring circuit 19 First switch circuit 20 Second switch circuit 21 Inverter circuit 22 First voltage comparison circuit 23 External adapter terminal 24 Charge control circuit 26 Battery power supply terminal 28 Third switch circuit 29 4 switch circuit 30 second voltage comparison circuit

Claims (2)

In a reverse current prevention circuit of a semiconductor integrated circuit device having a power supply terminal and an output terminal,
A MOS transistor having a source connected to the power supply terminal, a drain connected to the output terminal, a back gate connected to the source via the first switch circuit, and a drain connected via the second switch circuit; And a voltage comparison circuit that compares the voltage of the power supply terminal with the voltage of the output terminal and outputs a control signal of the first switch circuit and the second switch circuit. circuit.   2. The reverse current prevention circuit according to claim 1, wherein the semiconductor integrated circuit device is a charging device, and an external DC power supply is connected to the power supply terminal, and a battery is connected to the output terminal.

Images