JP2000277602A - Wafer transfer carrier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To protect wafers against damage caused by contact between their tips by a method wherein a distance between a first intersection and a second intersection of the peripheral edge of the wafer is set equal to the support length of the wafer, and the inner wall of a groove is tilted at a specific angle of inclination with the reference plane of the groove nearly vertical to the base of a carrier. SOLUTION: The wafers 1 are inserted and held in grooves 3, a gap between the tips of wafers 1 opposite to the base of a carrier is represented by G, and a first coefficient determined by the surface tension of the wafers 1 and the rigidity of the wafers 1 is represented by α. Provided that a distance between a first intersection X1 at which the peripheral edge of the wafer 1 intersects the uppermost part of the groove 3 most distant from its base and a second intersection X2 at which the peripheral edge of the wafer 1 intersects the lowermost base of the groove 3 is defined as a wafer support length H1, the inner wall of the groove 3 is tilted at an angle θ of inclination with the reference plane of the groove 3 nearly vertical to the base of a carrier, where θ is represented by a formula, θ=G/(2×H1×α).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer carrier capable of storing 50 wafers.

[0002]

2. Description of the Related Art Heretofore, wafer transport carriers capable of accommodating 25 wafers by supporting each wafer in each groove have been known to have various structures.

However, in recent years, in order to further improve productivity, the overall size of a carrier is substantially the same as a wafer carrier capable of accommodating 25 wafers, and the number of wafers accommodated in the carrier is reduced. There is a desire to store an additional 50 wafers.

[0004]

However, in the above structure, if the width of the groove is simply reduced to increase the number of wafers, there is a possibility that adjacent wafers supported by the groove may come into contact with each other and be damaged. Yes. In particular, after the wafer is stored in a carrier, the carrier is placed horizontally in a batch-type processing tank, and a predetermined process is performed in the processing tank.
In each adjacent wafer, there is a possibility that the tips of the wafers are in contact with each other and are damaged. Therefore, the minimum width dimension of the groove is naturally determined by the thickness of the wafer, and thereafter, by adjusting the inclination angle of the inner wall surface of the groove, it is possible to prevent the tip ends of the wafer from being damaged by contact. It was desired to prevent it.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the above-mentioned problems, and even if a predetermined processing is performed in a processing tank by placing the wafers horizontally in a batch-type processing tank, each adjacent wafer is processed. It is an object of the present invention to provide a wafer transport carrier which is not likely to be damaged by contact between the tips of the wafers.

[0006]

In order to achieve the above object, the present invention is configured as follows.

According to a first aspect of the present invention, there is provided a wafer transporting carrier capable of accommodating 50 wafers by partially inserting each wafer into each groove and supporting the wafer. Let G be the gap dimension at the tip opposite to the carrier bottom of the wafer inserted and supported in it, and let α be a first coefficient determined by at least the surface tension on the surface of the wafer and the rigidity of the wafer itself. A distance between a first intersection where the outer peripheral edge of the wafer intersects the uppermost portion from the groove bottom of the groove and a second intersection where the outer peripheral edge of the wafer intersects the groove bottom of the lowermost groove. Is the wafer support length H ₁ , the inner wall of the above-mentioned groove is θ = G / (2 × H ₁ ×
a) a carrier for transporting a wafer, characterized in that the carrier is inclined at an inclination angle θ determined by α).

According to a second aspect of the present invention, the first coefficient α is the surface roughness of the wafer, the viscosity of the processing solution of the wafer, the surface tension on the surface of the wafer based on these, the wafer itself, The wafer transport carrier according to the first aspect, which is determined by the rigidity of the wafer.

According to a third aspect of the present invention, there is provided the wafer transfer carrier according to the first or second aspect, wherein the gap dimension G is 0.5 mm or more.

According to a fourth aspect of the present invention, the wafer support length H ₁ is determined by the product of the diameter D ₁ of the wafer and a second coefficient C, and the second coefficient C is the diameter of the wafer D
_1. The wafer transport carrier according to any one of the first to third aspects, wherein the carrier is determined in a range of 0.58 to 0.62 by ₁ .

According to the fifth aspect of the present invention, when the rinsing process is performed using pure water as a processing liquid, the first coefficient α is 0.00214 for a 5-inch wafer,
In the case of a 6-inch wafer, the first coefficient α is 0.00
131, and in the case of an 8-inch wafer, the first coefficient α is 0.00081, and the wafer transport carrier according to any one of the first to fourth aspects is provided.

[0012]

Embodiments of the present invention will be described below in detail with reference to the drawings.

The wafer carrier 2 according to the first embodiment of the present invention is made of, for example, a fluororesin which is not eroded by the processing liquid as shown in FIGS. One wafer 1 is supported by 50 grooves 3 and housed at equal intervals. Each groove 3 is shown in FIG.
As shown in FIG. 3, the carrier 2 is provided on both sides except the bottom of the inner surface so as to be divided into left and right sides to form one groove. 1 to 5 illustrate an embodiment assuming a carrier for a 5-inch wafer as an example,
FIG. 6A is an explanatory view showing an arrangement state of a wafer.
FIG. 6B shows only a diagram corresponding to FIG. 1 among the embodiments for an 8-inch wafer carrier different from the above embodiment. The difference between the embodiment of FIG. 6 and the embodiment of FIG. 1 is that the position of the hole 4 and the shape of the leg 6 are different and there is no great difference. Are denoted by the same reference numerals and description thereof is omitted.

At the bottom of the carrier 2, legs 6 thicker than the carrier for 25 sheets are provided at the bottom of the carrier 2 so as to protrude left and right in FIGS. ing. As shown in FIG. 4, each of the two side surfaces of the carrier 2 has two rectangular holes 4 and one large opening 5 extending in the front-rear direction is provided at the bottom to process the carrier 2. When a predetermined processing such as etching or cleaning is performed on the wafer 1 with the processing liquid by disposing the processing liquid in the tank, the processing liquid smoothly contacts each wafer 1 supported by each groove 3 in the carrier 2, It can be quickly discharged from between the wafers 1 in the carrier 2.

As shown in FIG. 5, the inner wall surface forming each groove 3 of the carrier 2 is configured to be inclined at an inclination angle θ with respect to a groove reference plane Y substantially perpendicular to the bottom surface of the carrier. At the most unstable portion at the end of the wafer 1 opposite to the bottom of the carrier, the wafers 1 housed and supported in the grooves 3 are prevented from coming into contact with each other.

Here, the diameter of the wafer 1 is D ₁ (see FIG. 1), and the carrier bottom (lower side in FIG. 5) of the wafer 1 inserted and supported in the groove 3 as shown in FIG. G is the gap size at the opposite end (the upper side in FIG. 5) (see FIG. 5), and the surface roughness of the wafer 1 and the wafer 1
The viscosity of the treatment liquid, the surface tension at the surface of the wafer 1 on the basis of these, the first coefficient determined by the rigidity of the wafer itself and alpha, the diameter D ₁ of the said wafer 1 0.5
Assuming that a second coefficient determined within the range of 8-0.62 is C, the inclination angle θ is θ = G / (2 × [D ₁ × C] ×
α).

The gap size between the front ends of the wafer 1 is represented by G
Is preferably in a range where adjacent wafers 1 do not come into contact with each other in various processes of the wafer 1, specifically, it is preferably 0.5 mm or more.

As described above, the first coefficient α is a coefficient determined by the surface roughness of the wafer 1, the viscosity of the processing solution, the surface tension on the surface of the wafer 1 based on these, the rigidity of the wafer 1 itself, and the like. For example, in the case of a 5-inch wafer, α is 0.00214, in the case of a 6-inch wafer, α is 0.00131, and in the case of an 8-inch wafer, α is 0.00081. It is.

[0019] The second coefficient C is determined by a range of 0.58 to 0.62 by the diameter D ₁ of the said wafer 1, as an example, if five-inch wafer is 0.60,
In the case of a 6-inch wafer, it is 0.60, and in the case of an 8-inch wafer, it is 0.62. The second coefficient C is representative of the supporting length H ₁ of the wafer 1 by the inner wall surface of the groove 3 by the product [D ₁ × (0.58~0.62)] of the wafer diameter D ₁ (FIG. 1). That is, as shown in FIG. 1, the first intersection X ₁ where the outer peripheral edge of the wafer 1 intersects the uppermost portion from the groove bottom of the groove 3 and the outer peripheral edge of the wafer 1 are the lowermost groove 3.
It is indicative of the distance H ₁ between the second intersection X ₂ which intersects the groove bottom surface of the important factors that determine whether the wafer 1 is stably supported by the grooves 3. Therefore, in the above example, the wafer support length H _1, when 5-inch wafers, because 5 inches ≒ 126 mm, 126 mm ×
0.60 = 75.6 mm ≒ 76 mm. In the case of a 6-inch wafer, 6 inches ≒ 150 mm.
m × 0.60 = 90.0 mm. In the case of an 8-inch wafer, since 8 inches ≒ 200 mm, 200 mm ×
0.62 = 124.0 mm.

The wafer support length H ₁ is the first intersection X ₁ where the outer peripheral edge of the wafer 1 intersects the uppermost part from the bottom of the groove 3, that is, the wafer 1 has the groove 3.
The first intersection point X ₁ which is a position that can be supported by the inner wall surface of the wafer 1 and is the highest position when viewed from the bottom surface of the carrier (for example, the surface formed by the bottom surface of the leg 6), and the outer peripheral edge of the wafer 1 is the lowest. between the second intersection X ₂ is the position of the lowermost second intersection X ₂ i.e. the wafer 1 which intersects the groove bottom surface is seen from a to the carrier bottom position that can be supported by the inner wall surface of the groove 3 of the groove 3 The wafer 1 is effectively supported by the inner wall surface of the groove 3 within this range. Therefore, when the wafer support length H ₁ is too short, the support of the wafer 1 becomes unstable, since it becomes a cause adjacent wafer contact each other, the minimum length according to the diameter of the wafer 1 Need to be secured. On the other hand, when the wafer support length H ₁ is too long, the treatment liquid is liable to remain in the carrier is not preferred because the discharge efficiency. Therefore, for the wafer 1 from about 5 inches to about 8 inches, the wafer support length H ₁ is
There needs to be a length obtained by the product of the diameter D ₁ of the said wafer 1 and (0.58 to 0.62). When this wafer support length H ₁ is predetermined, the first opposing grooves 3
Distance W ₂ between intersections X ₁ (see FIG. 1), carrier bottom opening 5
Width W ₃ (see FIG. 1), the first intersection point X ₁ and the distance of H ₂ and the lowest point of the wafer 1 (see FIG. 1), the center-to-center distance between adjacent grooves 3 T
(See FIG. 5) is almost determined. On the other hand, the outer dimensions of the carrier itself, that is, the carrier width W ₀
(See FIGS. 1 and 2), carrier length D ₀ (see FIG. 2), carrier height H ₀ (see FIGS. 1, 3 and 4), and distance W ₁ between the bottom surfaces of the opposed grooves 3 (see FIG. 1). Is substantially determined as the same as the conventional one in relation to the diameter of the carrier.

Therefore, the diameter D ₁ and the second coefficient C of the wafer 1 are selected to calculate the wafer support length H ₁ , while the wafer 1 inserted and supported in the groove 3 is calculated.
, A gap dimension G at the tip opposite to the bottom of the carrier is set, the first coefficient α is selected, and their values are set to θ = G /
By substituting (2 × [D ₁ × C] × α) = G / (2 × H ₁ × α), the inclination angle θ is obtained.

Each groove 3 of the carrier 2 is inclined so as to be symmetrical with respect to the groove reference plane Y, which is substantially perpendicular to the bottom surface of the carrier, at the determined inclination angle θ so as to be symmetrical on the inner wall surface opposed thereto. Is formed, it is possible to prevent the wafers 1 housed and supported in the respective grooves 3 from coming into contact with each other even at the most unstable portion at the end opposite to the carrier bottom of the wafer 1. . Conversely, if the inclination angle is larger than the inclination angle θ, there is a possibility that the wafers 1 stored and supported in the respective grooves 3 may come into contact with each other, and if the inclination angle is smaller than the inclination angle θ, The gap between the inner wall surface of the groove and the surface of the wafer 1 is too small,
And the processing liquid that has entered the gap between the inner wall surface of the groove and the surface of the wafer 1 is difficult to come out.

Here, as an example, a 5-inch wafer 1
Angle θ of the inner wall surface of the groove 3 of the carrier 2 is determined.
Carrier width W₀Is 152 mm, carrier length D₀Is 144
mm, carrier height H₀Is 95.25mm, carrier bottom
Width W of opening 5_ThreeIs 75 mm, the wafer support length H of the groove 3₁
Is 76 mm as described above, and the first intersection X₁And wafer 1
Distance H to lowest point_TwoIs the distance H between_TwoIs 90mm, facing
Distance W between the bottoms of grooves 3 ₁Is 128 mm and the opposite groove 3
First intersection X of₁Distance W between_TwoIs 114 mm, between adjacent grooves 3
The center distance T is 2.4 mm, and the first coefficient α is 0.0021.
Assuming that the gap size G is set to 0.7 mm,
3, the inclination angle θ of the inner wall surface is θ = G / (2 × [D₁×
C] × α) = G / (2 × H)₁× α) = 0.7 / (2 × 7)
6 × 0.00214) = 2 ° 15 ″.
Groove that is substantially perpendicular to the carrier bottom
If the inclination angle θ of the inner wall surface of 3 is 2 ° 15 ″, the gap size
The method G can be 0.7 mm, even if the batch method
It is placed horizontally in the processing tank and performs predetermined processing in the processing tank.
Even if the tips of adjacent wafers contact each other
There is no possibility of injury.

As another example, a 6-inch wafer 1
Angle θ of the inner wall surface of the groove 3 of the carrier 2 is determined.
The carrier width W ₀ is 178 mm and the carrier length D ₀ is 144
mm, the carrier height H ₀ is 115 mm, the width W ₃ of the carrier bottom opening 5 is 89 mm, the wafer supporting length H ₁ of the groove 3 is 90 mm as described above, and the first intersection X ₁ and the lowest point of the wafer 1 the distance of H ₂ between the distance of H ₂ 105 mm, the distance W ₁ between the bottom surface of the opposing grooves 3 153 mm, the distance W ₂ between the first intersection point X ₁ in the opposing grooves 3 137 mm, between adjacent grooves 3 Is 2.4 mm, the first coefficient α is 0.00131.
When the gap dimension G is set to 0.52 mm, the inclination angle θ of the inner wall surface of the groove 3 is θ = G / (2 × [D ₁ × C] ×
α) = G / (2 × H ₁ × α) = 0.52 / (2 × 90 ×
0.00131) = 2 ° 21 ″. Therefore, if the inclination angle θ of the inner wall surface of the groove 3 is set to 2 ° 21 ″ with respect to the groove reference plane Y substantially perpendicular to the bottom surface of the carrier, the gap dimension G
Can be 0.52 mm, and even if the wafer is placed horizontally in a batch type processing tank and the predetermined processing is performed in the processing tank, the tips of adjacent wafers come into contact with each other and are damaged. There is no possibility.

Further, as another example, the inclination angle θ of the inner wall surface of the groove 3 of the carrier 2 for the 8-inch wafer 1 is obtained. The carrier width W ₀ is 233 mm and the carrier length D ₀ is 1.
98 mm, the carrier height H ₀ is 160 mm, the width W ₃ of the carrier bottom opening 5 is 104 mm, the wafer supporting length H ₁ of the groove 3 is 125 mm, and the distance H ₂ between the first intersection X ₁ and the lowest point of the wafer 1 the distance H ₂ is 140 mm, the distance W ₁ between the bottom surface of the opposing grooves 3 203 mm, the distance W ₂ between the first intersection point X ₁ in the opposing grooves 3 between the 183 mm, center distance between adjacent grooves 3 T is 3.175 mm, the first coefficient α is 0.00081
When the gap dimension G is set to 0.5 mm, the inclination angle θ of the inner wall surface of the groove 3 is θ = G / (2 × [D ₁ × C] ×
α) = G / (2 × H ₁ × α) = 0.5 / (2 × 125 ×
0.00081) = 2 ° 50 ″ Therefore, if the inclination angle θ of the inner wall surface of the groove 3 is set to 2 ° 50 ″ with respect to the groove reference plane Y substantially perpendicular to the bottom surface of the carrier, the gap dimension G
Can be 0.5 mm, and even if it is placed horizontally in a batch type processing tank and the predetermined processing is performed in the processing tank, the tips of adjacent wafers come into contact with each other and are damaged. There is no possibility.

According to the above embodiment, the gap G at the tip of the wafer 1 inserted and supported in the groove at the side opposite to the bottom of the carrier is set, and the surface tension on the surface of the wafer and the wafer Considering the rigidity of the wafer itself and the region where the wafer 1 is supported by the inner wall surface of the groove 3, the angle .theta. / (2 × H ₁ × α), and the inner wall of the groove 3 is formed so as to incline at the obtained inclination angle θ. Therefore, even if the predetermined processing is performed by arranging the processing liquid in the processing liquid tank in the vertical state as shown in FIG.
Even if the wafer 1 is placed horizontally in a batch type processing tank and the predetermined processing is performed in the processing tank, the wafer 1 is supported by the inner wall of the groove 3 inclined at the inclination angle θ obtained by the above equation. Therefore, there is no possibility that the tips of the adjacent wafers 1 come into contact with each other and are damaged.

[0027]

According to the first aspect of the present invention, the gap dimension at the tip opposite to the carrier bottom of the wafer inserted and supported in the groove is defined as G, and at least the gap dimension at the surface of the wafer is defined. The first coefficient determined by the surface tension and the rigidity of the wafer itself is α, and the first intersection point where the outer peripheral edge of the wafer intersects the uppermost portion from the bottom of the groove and the outer peripheral edge of the wafer are the most. When the distance between the second intersection point intersects the groove bottom surface of the groove bottom and the wafer supporting length H _1, the inner wall of the groove, relative to the groove reference plane perpendicular generally the carrier bottom, theta = G / (2 × H ₁ × α).
Therefore, even if the predetermined processing is performed in the processing tank by placing the wafer horizontally in the batch-type processing tank, the wafer is supported by the inner wall of the groove inclined at the inclination angle θ. There is no possibility that the tips will be damaged by contact.

According to the second aspect of the present invention, the first aspect
In the embodiment, the first coefficient α is configured to be determined by the surface roughness of the wafer, the viscosity of the processing liquid of the wafer, the surface tension on the surface of the wafer based on these, and the rigidity of the wafer itself. ing. Therefore, the groove inclined at the inclination angle θ determined in consideration of the surface roughness of the wafer, the viscosity of the processing solution of the wafer, the surface tension on the surface of the wafer based on these, and the rigidity of the wafer itself. Since the wafer is supported by the inner wall, it is possible to more reliably eliminate the possibility that the tips of adjacent wafers come into contact with each other and cause damage.

According to a third aspect of the present invention, in the first or second aspect, the wafer is formed by the inner wall of the groove inclined at the inclination angle θ determined by setting the gap dimension G to 0.5 mm or more. Is supported, it is possible to more reliably eliminate the possibility that the tips of adjacent wafers come into contact with each other and cause damage.

According to a fourth aspect of the present invention, in any one of the first to third aspects, the wafer support length H ₁ is obtained by a product of the diameter D ₁ of the wafer and a second coefficient C. 0, the second coefficient C by the diameter D ₁ of the said wafer.
It is determined within the range of 58 to 0.62.
That is, if the wafer support length H ₁ is too short (the diameter D ₁ × 0.58 of the wafer), the support of the wafer becomes unstable, which may cause adjacent wafers to come into contact with each other. I will. On the other hand, if the wafer support length H ₁ is too long (the diameter D _{1 of the} above wafer × 0.62), the processing liquid tends to remain in the carrier, and the discharge efficiency is undesirably reduced. Thus, the wafer 5 inches to about eight inches as the length of the wafer support length H ₁ (diameter D ₁ × from .58 to .62 of the wafer), while eliminating the above problem, each adjacent It is possible to reliably eliminate the possibility that the tips of the wafers are in contact with each other and are damaged.

According to a fifth aspect of the present invention, in any one of the first to fourth aspects, in the case where the washing process is performed using pure water as a processing liquid, the above-described process is performed in the case of a 5-inch wafer. The first coefficient α is 0.00214, in the case of a 6-inch wafer, the first coefficient α is 0.00131, and in the case of an 8-inch wafer, the first coefficient α is 0.00081. Therefore, since the wafer is supported by the inner wall of the groove inclined at the inclination angle θ determined also in consideration of the size of the processing liquid and the wafer, the tips of adjacent wafers may come into contact with each other and be damaged. Sex can be more reliably eliminated.

[Brief description of the drawings]

FIG. 1 is a front view of a wafer transfer carrier according to an embodiment of the present invention, and a left half is a cross-sectional front view.

FIG. 2 is a plan view of the carrier.

FIG. 3 is a rear view of the carrier.

FIG. 4 is a side view of the carrier.

FIG. 5 is an enlarged explanatory view of a groove portion of the carrier.

FIG. 6A is an explanatory view showing an arrangement state of wafers according to the above embodiment, and FIG. 6B is a front view of a wafer transfer carrier according to another embodiment of the present invention which is different from the above embodiment; The left half is a sectional front view.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Wafer, 2 ... Carrier, 3 ... Groove, 4 ... Hole, 5 ... Opening, 6 ... Leg.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Sadao Takemura 6-2 Imakokufu-cho, Yamatokoriyama-shi, Nara Prefecture F-term in Toho Chemical Co., Ltd. 5F031 CA02 DA01 EA06 PA20 PA30

Claims (5)

[Claims] 1. A wafer transfer carrier capable of storing 50 wafers by partially inserting each wafer (1) into each groove (3) and supporting the wafer, wherein the wafer is inserted into the groove. The gap dimension at the tip opposite to the carrier bottom of the inserted and supported wafer is defined as G, and the first coefficient determined by at least the surface tension on the surface of the wafer and the rigidity of the wafer itself is defined as α. A first cross section in which the outer peripheral edge of the wafer intersects the uppermost portion of the groove from the bottom of the groove;
Intersection the outer peripheral edge of the (X ₁₎ and said wafer is a wafer supporting length H ₁ the distance between the lowermost of the second intersection point intersects the groove bottom of the groove (X _2), an inner wall of the groove , Θ = θ
A carrier for transporting wafers, wherein the carrier is inclined at an inclination angle θ obtained by G / (2 × H ₁ × α). 2. The first coefficient α is determined by the surface roughness of the wafer, the viscosity of the processing solution of the wafer, the surface tension on the surface of the wafer based on these, and the rigidity of the wafer itself. The carrier for carrying a wafer according to claim 1. 3. The wafer transfer carrier according to claim 1, wherein the gap dimension G is 0.5 mm or more. Wherein said wafer support length H ₁ has a diameter D ₁ of the said wafer and obtained by the product of the second coefficient C, the second coefficient C by the diameter D ₁ of the said wafer from 0.58 to 0 .
The wafer carrier according to any one of claims 1 to 3, wherein the carrier is determined within the range of 62. 5. In the case of performing a rinsing process using pure water as a processing liquid, the first coefficient α is 0.00214 for a 5-inch wafer, and the above-described first coefficient α is 0.00214 for a 6-inch wafer. The wafer transfer carrier according to any one of claims 1 to 4, wherein the first coefficient α is 0.00131, and in the case of an 8-inch wafer, the first coefficient α is 0.00081.