JP2000243147A - Anisotropic conductive film, semiconductor device using it, and manufacture thereof - Google Patents

Anisotropic conductive film, semiconductor device using it, and manufacture thereof

Info

Publication number
JP2000243147A
JP2000243147A JP11037428A JP3742899A JP2000243147A JP 2000243147 A JP2000243147 A JP 2000243147A JP 11037428 A JP11037428 A JP 11037428A JP 3742899 A JP3742899 A JP 3742899A JP 2000243147 A JP2000243147 A JP 2000243147A
Authority
JP
Japan
Prior art keywords
anisotropic conductive
core layer
conductive film
conductive
adhesive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11037428A
Other languages
Japanese (ja)
Other versions
JP3436170B2 (en
Inventor
Yoshitsugu Funada
佳嗣 船田
Takatoshi Suzuki
崇敏 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP03742899A priority Critical patent/JP3436170B2/en
Publication of JP2000243147A publication Critical patent/JP2000243147A/en
Application granted granted Critical
Publication of JP3436170B2 publication Critical patent/JP3436170B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/811Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector the bump connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/81101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector the bump connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a bump connector, e.g. provided in an insulating plate member
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01033Arsenic [As]
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    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]

Abstract

PROBLEM TO BE SOLVED: To connect together a semiconductor element and a wiring board in a short time by the conductive filament bodies to improve connecting reliability by providing adhesive layers fusing by heat on both faces of an insulating core layer filled with the conductive filament bodies, and revealing electric conductivity by thermocompression bonding only in the thickness direction. SOLUTION: On both faces of a core material 12 having an insulation property and filled with conductive filament bodies 11 having smooth surfaces in the thickness direction of an insulating film 12a, adhesive layers 13 which fuses by heat are provided. The adhesive layer 13 consists of deformable electrical conductive particles uniformly dispersed therein, the conductive filament bodies 11 penetrate the core material 12 in the thickness direction, and project from the surface of the core material 12. The conductive filament body 11 is buried in the adhesive layers 13 provided on both sides of the core material 12, and reveals conductivity only in the thickness direction by thermocompression bonding. Hereby, the metallic projections 18 of the semiconductor connecting terminals 17 of a semiconductor element 15 can be surely and quickly connected to the wiring board connecting terminals 19 of a wiring board 16 through the conductive filament bodies 11 to improve reliability.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、異方性導電フィル
ム、これを用いた半導体装置及びその製造方法に関し、
特に、半導体素子叉はパッケージと基板との電気的接続
及び機械的接合を確実にして信頼性を向上せしめた異方
性導電フィルム、これを用いた半導体装置及びその製造
方法に関する。
The present invention relates to an anisotropic conductive film, a semiconductor device using the same, and a method for manufacturing the same.
In particular, the present invention relates to an anisotropic conductive film having improved reliability by ensuring electrical connection and mechanical bonding between a semiconductor element or a package and a substrate, a semiconductor device using the same, and a method of manufacturing the same.

【0002】[0002]

【従来の技術】近年電子機器の小型化、薄型化に伴い、
半導体チップ等の微小部品と基板等の微細回路を接続す
る必要性が高まっており、その配線ピッチはますます小
さくなってきている。従来これらの接続は、相互の部品
接続端子同士をワイヤボンディングする方法が主流であ
ったが、接続端子同士を対向させ直接接続する方が高速
化、軽薄短小化等により有利であることから、フリップ
チップ接続が盛んに行われている。これらの端子同士の
接続部は、外部環境からの保護と接続信頼性の向上を目
的として安価な樹脂による封止が主としてなされてお
り、対向端子間の電気的接続後隣接端子間の隙間から液
状樹脂を流入する方法がとられていた。接続端子同士の
接続は、例えば、はんだ接続、金−金圧着、導電性ペー
スト接続等によって実施される。
2. Description of the Related Art In recent years, as electronic devices have become smaller and thinner,
The necessity of connecting a micro component such as a semiconductor chip to a micro circuit such as a substrate is increasing, and the wiring pitch is becoming smaller. Conventionally, for these connections, the method of wire-bonding the component connection terminals to each other has been the mainstream. However, it is advantageous to directly connect the connection terminals to each other so as to be faster, lighter and shorter, and so on. Chip connections are being made actively. The connection between these terminals is mainly sealed with an inexpensive resin for the purpose of protection from the external environment and improvement of the connection reliability. A method of flowing resin has been adopted. The connection between the connection terminals is performed by, for example, solder connection, gold-gold compression bonding, conductive paste connection, or the like.

【0003】しかしながら、小型化、薄型化が進行する
につれて、対向部品−回路間隙および隣接端子間隙が小
さくなり、液状樹脂の流入(いわゆるアンダーフィル)
が難しくなってきている。一般的には低粘度のエポキシ
樹脂等の熱硬化性樹脂が使用されている。これに対し
て、半導体チップと基板とを接続する際に、予めチップ
を搭載する基板領域に液状樹脂を塗布したり又はフィル
ム状樹脂を載置しておき、相互の接続端子同士を目合わ
せした後、熱圧着して電気的な接続を行うと共に機械的
接合をする(アンダーフィル不要)方法が提案されてお
り、その1つの方法として異方性導電樹脂による接続が
ある。
However, as miniaturization and thinning progress, the gap between the opposing component and the circuit and the gap between adjacent terminals become smaller, and the inflow of liquid resin (so-called underfill) occurs.
Is getting harder. Generally, a thermosetting resin such as a low-viscosity epoxy resin is used. On the other hand, when connecting the semiconductor chip and the substrate, a liquid resin or a film-like resin was previously applied to the substrate region on which the chip was mounted, and the mutual connection terminals were aligned. Thereafter, a method has been proposed in which electrical connection is performed by thermocompression bonding and mechanical connection is performed (underfill is not required). One of the methods is connection using an anisotropic conductive resin.

【0004】異方性導電樹脂には、大別して2つのタイ
プがある。一つは、図8に示したような導電粒子81を
バインダー樹脂82中に分散させたタイプである。異方
性導電樹脂は、樹脂中に分散されている導電粒子数が導
電性ペースト等に比べて少ないため、そのままでは絶縁
性を示す。少なくとも一方の電極上に金属突起(バン
プ)が形成された2つの電子部品85、86間に異方性
導電樹脂80を介在させ熱圧着することにより、双方の
電極88、89間に導電粒子81が挟み込まれ、この導
電粒子81を介して電気的接続が得られる。同時に、バ
インダー樹脂82により電子部品同士は機械的接合され
る。この時、隣接電極間には圧力が加わらず、導電粒子
数も少ないため隣接電極間の絶縁性が保たれる。樹脂形
態としては液(ペースト)状及びフィルム状のものがあ
り、例えば、特開平5−32799号公報、特開平6−
223633号公報、特開平7−197001号公報等
が挙げられる。
[0004] There are roughly two types of anisotropic conductive resins. One is a type in which conductive particles 81 as shown in FIG. 8 are dispersed in a binder resin 82. The anisotropic conductive resin has insulating properties as it is because the number of conductive particles dispersed in the resin is smaller than that of the conductive paste or the like. An anisotropic conductive resin 80 is interposed between two electronic components 85 and 86 each having a metal protrusion (bump) formed on at least one of the electrodes, and is thermally pressed to form conductive particles 81 between the two electrodes 88 and 89. Are sandwiched, and an electrical connection is obtained via the conductive particles 81. At the same time, the electronic components are mechanically joined to each other by the binder resin 82. At this time, no pressure is applied between the adjacent electrodes and the number of conductive particles is small, so that the insulation between the adjacent electrodes is maintained. As the resin form, there are a liquid (paste) form and a film form. For example, JP-A-5-32799, JP-A-5-32799
223633, JP-A-7-197001, and the like.

【0005】他の方法は、図9に示したように、バイン
ダー樹脂92内に一方向に導電性を有する線条体91を
配向させたタイプのものを用いる方法である。2つの電
子部品間に異方性導電樹脂を介在させ圧着することによ
り、双方の電極間に導電線条体91が挟み込まれること
で、電子部品の電極と導電線条体が直接接触し、電気的
接続が得られる。導電線条体の配向が乱れないように、
このタイプの異方性導電樹脂形態はフィルム状あるいは
ブロック状といった固体であり、例えば、特開平5−3
25669号公報、特開平8−124435号公報等が
挙げられる。
Another method uses a type in which a conductive linear body 91 is oriented in one direction in a binder resin 92 as shown in FIG. Anisotropic conductive resin is interposed between the two electronic components and pressed, whereby the conductive filaments 91 are sandwiched between the two electrodes, so that the electrodes of the electronic components directly contact the conductive filaments, Connection is obtained. In order not to disturb the orientation of the conductive filament,
This type of anisotropic conductive resin is a solid such as a film or a block.
No. 25669, JP-A-8-124435, and the like.

【0006】上述したように、フリップチップ接続用樹
脂として導電粒子をバインダー樹脂中に均一分散させた
場合、微細接続を正確に行うためには、導電粒子の密度
を高くする必要があるが、この場合、対向電極間に挟み
込まれなかった導電粒子が隣接端子間に流れ込み、絶縁
性の確保が難しくなるという欠点がある。また、通常バ
インダー樹脂中には導電粒子のみが配合されているため
熱膨張係数が大きく、このため接続信頼性が低い。これ
を改良するためにアンダーフィル材同様シリカ粒子等を
配合して熱膨張係数を低下させることが考えられるが、
この場合、樹脂が硬くなり、かつ電子部品との界面の密
着性が低下するため、やはり接続信頼性が低下する傾向
がある。
[0006] As described above, when conductive particles are uniformly dispersed in a binder resin as a flip-chip connecting resin, it is necessary to increase the density of the conductive particles in order to accurately perform fine connection. In this case, there is a disadvantage that the conductive particles that are not sandwiched between the opposing electrodes flow between the adjacent terminals, making it difficult to ensure insulation. Further, since only the conductive particles are usually blended in the binder resin, the coefficient of thermal expansion is large, and the connection reliability is low. To improve this, it is conceivable to lower the coefficient of thermal expansion by blending silica particles etc. like the underfill material,
In this case, since the resin becomes hard and the adhesion at the interface with the electronic component is reduced, the connection reliability also tends to be reduced.

【0007】一方、バインダー樹脂の一方向に導電性を
有する線条体を配向させた場合、熱圧着時に線条体の配
向が乱れないようにバインダー樹脂の溶融粘度を高くす
る必要があるが、一般に溶融粘度が高いのは熱可塑性樹
脂であり、熱可塑性樹脂を使用して高い接続信頼性を得
るためには高い溶融温度を有する樹脂を使用する必要が
あるため、当然低温での接続が困難である。また、電子
部品の電極表面と導電線条体との接触により電気的接続
が得られるが、熱可塑性樹脂の場合、熱硬化性樹脂のよ
うな硬化収縮力が作用せず、接続信頼性は概して低い。
このタイプの異方性導電樹脂材料としては、耐熱性の良
好な熱可塑性ポリイミドやポリアミドイミド等を使用し
たものが開発されているが、使用温度が300℃前後と
極めて高く、圧着時間も30秒レベルとやや長い。更
に、図9に示したように電極高さが比較的高い場合、電
子部品の表面に異方性導電フィルムが追随せず、両者の
間に隙間が発生しやすい。実用化されているものの多く
は、シリコーンゴム等のゴム材料を使用したもので、電
子部品と異方性導電フィルムの間には電気的接続部以外
は空隙があり、一般的に電子部品との接着性を有してお
らず、電気的接続を得るために外部から圧力を常時加え
る必要がある。
[0007] On the other hand, when a conductive filament is oriented in one direction of the binder resin, it is necessary to increase the melt viscosity of the binder resin so that the orientation of the filament is not disturbed during thermocompression bonding. In general, thermoplastic resins have high melt viscosity, and in order to obtain high connection reliability using thermoplastic resins, it is necessary to use a resin with a high melting temperature, so it is naturally difficult to connect at low temperatures It is. In addition, electrical connection can be obtained by contact between the electrode surface of the electronic component and the conductive wire, but in the case of a thermoplastic resin, the curing shrinkage force unlike a thermosetting resin does not act, and the connection reliability is generally low. Low.
As this type of anisotropic conductive resin material, a material using thermoplastic polyimide or polyamide imide having good heat resistance has been developed. However, the operating temperature is as high as about 300 ° C., and the pressing time is also 30 seconds. Level and somewhat longer. Further, when the electrode height is relatively high as shown in FIG. 9, the anisotropic conductive film does not follow the surface of the electronic component, and a gap is easily generated between the two. Many of the practical applications use a rubber material such as silicone rubber, and there is a gap between the electronic component and the anisotropic conductive film except for the electrical connection part. It has no adhesiveness and requires constant external pressure to obtain electrical connection.

【0008】[0008]

【発明が解決しようとする課題】本発明の目的は、上記
した従来技術の欠点を改良し、特に、フリップチップ接
続に好適な短時間での接続が可能で、且つ、接続信頼性
を向上せしめた新規な異方性導電フィルム、これを用い
た半導体装置及びその製造方法を提供するものである。
SUMMARY OF THE INVENTION An object of the present invention is to improve the above-mentioned disadvantages of the prior art, and in particular, to achieve a short connection time suitable for flip-chip connection and to improve the connection reliability. And a novel anisotropic conductive film, a semiconductor device using the same, and a method for manufacturing the same.

【0009】[0009]

【課題を解決するための手段】本発明は上記した目的を
達成するため、基本的には、以下に記載されたような技
術構成を採用するものである。即ち、本発明に係わる異
方性導電フィルムの第1態様は、絶縁フィルムの厚み方
向に導電線条体が充填されているコア層と、このコア層
の両面に設けられ、熱により溶融する接着剤層とからな
り、熱圧着により厚み方向にのみ導電性を発現すること
を特徴とするものであり、叉、第2態様は、前記導電線
条体が絶縁フィルムの厚さ方向に貫通しており、その表
面が絶縁フィルム表面より突出し、且つ前記導電線条体
が前記コア層の両面に設けられた接着剤層に埋設されて
いることを特徴とするものであり、叉、第3態様は、前
記熱により溶融する接着剤層中に導電粒子が均一に分散
されていることを特徴とするものであり、叉、第4態様
は、前記導電線条体が絶縁フィルムの厚さ方向に貫通し
ており、且つ前記絶縁フィルムの表面が平滑であること
を特徴とするものであり、叉、第5態様は、前記導電線
条体の径が、前記接着剤層中に均一に分散されている導
電粒子径の3倍以上であることを特徴とするものであ
り、叉、第6態様は、前記導電線条体が、前記接着剤層
中に均一に分散されている導電粒子径の1/3より小さ
いピッチで配列されていることを特徴とするものであ
り、叉、第7態様は、前記コア層が、熱圧着温度で溶融
しないことを特徴とするものであり、叉、第8態様は、
前記接着剤層が、熱硬化性樹脂であることを特徴とする
ものであり、叉、第9態様は、前記接着剤層が、熱可塑
性樹脂であることを特徴とするものであり、叉、第10
態様は、前記コア層の厚みが、その両面に設けられた前
記接着剤層の厚みより大きいことを特徴とするものであ
り、叉、第11態様は、前記接着剤層の厚みが、接着剤
層中に均一に分散されている導電粒子径より大きいこと
を特徴とするものであり、叉、第12態様は、前記コア
層の引張弾性率が、その両側に設けられた前記接着剤層
の引張弾性率より小さいことを特徴とするものである。
SUMMARY OF THE INVENTION The present invention basically employs the following technical configuration to achieve the above object. That is, the first embodiment of the anisotropic conductive film according to the present invention is a method in which a core layer filled with conductive filaments in the thickness direction of an insulating film is provided on both surfaces of the core layer and bonded by heat. And a conductive layer formed in the thickness direction of the insulating film. And wherein the surface thereof protrudes from the surface of the insulating film, and the conductive filaments are embedded in adhesive layers provided on both surfaces of the core layer. The conductive particles are uniformly dispersed in the adhesive layer that is melted by the heat, and the fourth embodiment is characterized in that the conductive filaments penetrate in the thickness direction of the insulating film. And the surface of the insulating film is smooth. In a fifth aspect, the diameter of the conductive filament is at least three times the diameter of the conductive particles uniformly dispersed in the adhesive layer. The sixth aspect is characterized in that the conductive filaments are arranged at a pitch smaller than 1/3 of the diameter of the conductive particles uniformly dispersed in the adhesive layer. The seventh aspect is characterized in that the core layer does not melt at a thermocompression bonding temperature.
The adhesive layer is characterized by being a thermosetting resin, and a ninth aspect is characterized in that the adhesive layer is a thermoplastic resin, Tenth
An aspect is characterized in that the thickness of the core layer is larger than the thickness of the adhesive layer provided on both surfaces thereof, and the eleventh aspect is that the thickness of the adhesive layer is In the twelfth aspect, the tensile elastic modulus of the core layer is preferably smaller than the diameter of the conductive particles uniformly dispersed in the layer. It is characterized by being smaller than the tensile modulus.

【0010】叉、本発明に係わる半導体装置の第1態様
は、2つの電子部品が異方性導電フィルムを介して電気
的に接続された半導体装置であって、前記2つの電子部
品間に、絶縁フィルムの厚み方向に導電線条体が充填さ
れているコア層と、このコア層の両面に設けられ、熱に
より溶融する接着剤層とからなる異方性導電フィルムを
介在せしめ、前記コア層である絶縁フィルムの厚み方向
に充填されている導電線条体の両端が前記2つの電子部
品の夫々の電極に接触し、前記電子部品の表面と異方性
導電フィルムとは、コア層の両面に設けられた接着剤層
で各々固着一体化されることを特徴とするものであり、
叉、第2態様は、前記熱により溶融する接着剤層中に導
電粒子が均一に分散されていることを特徴とするもので
あり、叉、第3態様は、前記2つの電子部品の一方が半
導体素子叉は半導体パッケージであり、他方の電子部品
が配線基板であることを特徴とするものであり、叉、第
4態様は、2つの電子部品の一方が半導体パッケージ、
他方の電子部品が配線基板であり、半導体パッケージと
異方性導電フィルムの電気的接続部以外に隙間があるこ
とを特徴とするものである。
A first aspect of the semiconductor device according to the present invention is a semiconductor device in which two electronic components are electrically connected to each other via an anisotropic conductive film. An anisotropic conductive film consisting of a core layer filled with conductive filaments in the thickness direction of the insulating film and adhesive layers provided on both sides of the core layer and melted by heat is interposed, and the core layer Both ends of the conductive filaments filled in the thickness direction of the insulating film are in contact with the respective electrodes of the two electronic components, and the surface of the electronic component and the anisotropic conductive film are on both sides of the core layer. Characterized in that they are each fixedly integrated with an adhesive layer provided in,
The second aspect is characterized in that conductive particles are uniformly dispersed in the adhesive layer that is melted by the heat, and the third aspect is that one of the two electronic components is A semiconductor element or a semiconductor package, wherein the other electronic component is a wiring board, and a fourth mode is one in which one of the two electronic components is a semiconductor package,
The other electronic component is a wiring substrate, and has a gap other than an electrical connection between the semiconductor package and the anisotropic conductive film.

【0011】叉、本発明に係わる半導体装置の製造方法
の第1態様は、2つの電子部品が異方性導電フィルムを
介して電気的に接続された半導体装置の製造方法であっ
て、前記2つの電子部品間に、絶縁フィルムの厚み方向
に導電線条体が充填されているコア層と、このコア層の
両面に設けられ、熱により溶融する接着剤層とからなる
異方性導電フィルムを介在せしめる工程と、前記異方性
導電フィルムを加熱することで、前記コア層である絶縁
フィルムの厚み方向に充填されている導電線条体の両端
を前記2つの電子部品の夫々の電極に接触せしめると共
に、前記接着剤層を溶融せしめる工程と、前記接着剤層
を固化せしめることで前記2つの電子部品を各々固着一
体化する工程とを含むことを特徴とするものであり、
叉、第2態様は、前記熱により溶融する接着剤層中に均
一に分散された導電粒子を介して、前記コア層である絶
縁フィルムの厚み方向に充填されている導電線条体の両
端を、前記2つの電子部品の夫々の電極に接触せしめる
ことを特徴とするものである。
A first aspect of the method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which two electronic components are electrically connected via an anisotropic conductive film. An anisotropic conductive film consisting of a core layer filled with conductive filaments in the thickness direction of the insulating film between two electronic components, and an adhesive layer provided on both sides of the core layer and melted by heat. By interposing and heating the anisotropic conductive film, both ends of the conductive strip filled in the thickness direction of the insulating film as the core layer are brought into contact with the respective electrodes of the two electronic components. And the step of melting the adhesive layer, and the step of solidifying the adhesive layer to fix and integrate the two electronic components respectively.
In a second aspect, the conductive filaments uniformly filled in the adhesive layer that is melted by the heat are interposed, and the both ends of the conductive filament that is filled in the thickness direction of the insulating film as the core layer. And contacting each electrode of the two electronic components.

【0012】[0012]

【発明の実施の形態】本発明に係わる異方性導電フィル
ムは、絶縁フィルムの厚み方向に導電線条体が充填され
ているコア層と、このコア層の両面に設けられ、熱によ
り溶融する接着剤層とからなり、熱圧着により厚み方向
にのみ導電性を発現することを特徴とするものであり、
叉、前記熱により溶融する接着剤層中に導電粒子が均一
に分散されていることを特徴とするものである。
BEST MODE FOR CARRYING OUT THE INVENTION The anisotropic conductive film according to the present invention is provided on both sides of a core layer filled with conductive filaments in the thickness direction of the insulating film, and is melted by heat. It consists of an adhesive layer and is characterized by expressing conductivity only in the thickness direction by thermocompression bonding,
Further, the conductive particles are uniformly dispersed in the adhesive layer that is melted by the heat.

【0013】叉、本発明に係わる半導体装置は、2つの
電子部品が異方性導電フィルムを介して電気的に接続さ
れた半導体装置であって、前記2つの電子部品間に、絶
縁フィルムの厚み方向に導電線条体が充填されているコ
ア層と、このコア層の両面に設けられ、熱により溶融す
る接着剤層とからなる異方性導電フィルムを介在せし
め、前記コア層である絶縁フィルムの厚み方向に充填さ
れている導電線条体の両端が前記2つの電子部品の夫々
の電極に接触し、前記電子部品の表面と異方性導電フィ
ルムとは、コア層の両面に設けられた接着剤層で各々固
着一体化されたことを特徴とするものである。
Further, a semiconductor device according to the present invention is a semiconductor device in which two electronic components are electrically connected via an anisotropic conductive film, and a thickness of an insulating film is provided between the two electronic components. Anisotropic conductive film consisting of a core layer filled with conductive filaments in the direction and adhesive layers provided on both sides of the core layer and melted by heat is interposed, and the insulating film as the core layer Both ends of the conductive filament filled in the thickness direction contact the respective electrodes of the two electronic components, and the surface of the electronic component and the anisotropic conductive film are provided on both surfaces of the core layer. It is characterized by being integrally fixed by an adhesive layer.

【0014】この発明によれば、コア層に熱圧着温度で
溶融しない樹脂を使用することにより厚み方向に充填さ
れた導電線条体の配向が乱れることがなく、熱圧着する
ことが出来る。従って、電子部品とコア層は良好に接着
し、同時に、電子部品の電極表面とコア層の厚み方向に
充填された導電線条体との接触状態が、強固で且つ確実
に保持され、安定した接続信頼性が得られる。
According to the present invention, by using a resin which does not melt at the thermocompression bonding temperature for the core layer, it is possible to perform thermocompression bonding without disturbing the orientation of the conductive filaments filled in the thickness direction. Therefore, the electronic component and the core layer adhere well, and at the same time, the contact state between the electrode surface of the electronic component and the conductive filament filled in the thickness direction of the core layer is firmly and reliably maintained, and is stable. Connection reliability is obtained.

【0015】また、接着剤層中に加圧により変形可能な
導電粒子を配することで、電子部品の電極表面とコア層
の厚み方向に充填された導電線条体の間に変形された導
電粒子が介在し、厚み方向の温度サイクル特性は益々向
上する。更に、コア層が接着剤層より厚く、かつ低弾性
の樹脂を使用することにより、接続部近傍に発生する内
部応力を低減することができ、一層良好な接続信頼性が
得られるものである。
By disposing conductive particles deformable by pressure in the adhesive layer, the conductive particles deformed between the electrode surface of the electronic component and the conductive filament filled in the thickness direction of the core layer. The particles are interposed, and the temperature cycle characteristics in the thickness direction are further improved. Furthermore, by using a resin whose core layer is thicker than the adhesive layer and has low elasticity, the internal stress generated in the vicinity of the connection portion can be reduced, and better connection reliability can be obtained.

【0016】[0016]

【実施例】以下に、本発明に係わる異方性導電フィル
ム、これを用いた半導体装置及びその製造方法の具体例
を図面を参照しながら詳細に説明する。図1乃至図7
は、本発明に係わる異方性導電フィルム、これを用いた
半導体装置及びその製造方法の具体例の構造を示す図で
あって、これらの図には、絶縁フィルム12aの厚み方
向に導電線条体11が充填されているコア層12と、こ
のコア層12の両面に設けた熱により溶融する接着剤層
13とからなり、熱圧着により厚み方向にのみ導電性を
発現することを特徴とする異方性導電フィルム10が示
され、叉、前記導電線条体11が絶縁フィルム12aの
厚さ方向に貫通しており、その表面が絶縁フィルム12
a表面より突出し、且つ前記導電線条体11が前記コア
層12の両面に設けられた接着剤層13に埋設されてい
ることを特徴とする異方性導電フィルムが示され、叉、
前記熱により溶融する接着剤層13中に導電粒子44が
均一に分散されていることを特徴とする異方性導電フィ
ルム40が示されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific examples of an anisotropic conductive film according to the present invention, a semiconductor device using the same, and a method of manufacturing the same will be described in detail with reference to the drawings. 1 to 7
FIGS. 3A and 3B are diagrams showing the structure of a specific example of an anisotropic conductive film according to the present invention, a semiconductor device using the same, and a method of manufacturing the same. FIGS. It comprises a core layer 12 filled with the body 11 and an adhesive layer 13 provided on both sides of the core layer 12 and melted by heat, and exhibits conductivity only in the thickness direction by thermocompression bonding. An anisotropic conductive film 10 is shown, and the conductive filament 11 penetrates in the thickness direction of the insulating film 12a, and the surface thereof is
a anisotropic conductive film, which protrudes from the surface and is embedded in the adhesive layer 13 provided on both surfaces of the core layer 12, and
An anisotropic conductive film 40 is shown in which conductive particles 44 are uniformly dispersed in the adhesive layer 13 which is melted by the heat.

【0017】更に、2つの電子部品15、16が異方性
導電フィルム10を介して電気的に接続された半導体装
置であって、前記2つの電子部品間15、16に、絶縁
フィルム12aの厚み方向に導電線条体11が充填され
ているコア層12と、このコア層12の両面に設けら
れ、熱により溶融する接着剤層13とからなる異方性導
電フィルム10を介在せしめ、前記コア層12である絶
縁フィルム12aの厚み方向に充填されている導電線条
体11の両端が前記2つの電子部品15、16の夫々の
電極18、19に接触し、前記電子部品15、16の表
面と異方性導電フィルム10とは、コア層12の両面に
設けられた接着剤層13で各々固着一体化されたことを
特徴とする半導体装置が示されている。
Furthermore, a semiconductor device in which two electronic components 15 and 16 are electrically connected via an anisotropic conductive film 10, wherein a thickness of an insulating film 12 a is provided between the two electronic components 15 and 16. The anisotropic conductive film 10 consisting of a core layer 12 filled with conductive strips 11 in the direction and adhesive layers 13 provided on both sides of the core layer 12 and melted by heat is interposed, and Both ends of the conductive linear body 11 filled in the thickness direction of the insulating film 12a as the layer 12 are in contact with the respective electrodes 18 and 19 of the two electronic components 15 and 16, and the surfaces of the electronic components 15 and 16 are formed. The semiconductor device is characterized in that the anisotropic conductive film 10 and the anisotropic conductive film 10 are respectively fixed and integrated by adhesive layers 13 provided on both surfaces of the core layer 12.

【0018】以下に、本発明を更に詳細に説明する。は
じめに本発明の異方性導電フィルムについて説明する。
図1に本発明の異方性導電フィルム10の断面図及びこ
れを用いた半導体チップ15と配線基板16との接続断
面図の一例を示す。本発明の異方性導電フィルム10
は、絶縁フィルム12aに導電線条体11が厚さ方向に
充填されたコア層12の両面に接着剤層13が設けられ
た3層構成である。
Hereinafter, the present invention will be described in more detail. First, the anisotropic conductive film of the present invention will be described.
FIG. 1 shows an example of a cross-sectional view of an anisotropic conductive film 10 of the present invention and a cross-sectional view of a connection between a semiconductor chip 15 and a wiring board 16 using the same. Anisotropic conductive film 10 of the present invention
Has a three-layer structure in which an adhesive layer 13 is provided on both surfaces of a core layer 12 in which a conductive linear body 11 is filled in an insulating film 12a in a thickness direction.

【0019】コア層12の絶縁フィルム12aとして使
用できる樹脂は、熱圧着時に厚み方向に充填された導電
線条体11の配向が保持される樹脂であればよい。その
ためには、熱圧着温度での溶融粘度が高いことが好まし
く、溶融しないことが最も好ましい。即ち、熱圧着温度
で殆ど、あるいは全く流動しない樹脂が好ましく、具体
的には、硬化済みのエポキシ樹脂、フェノール樹脂、シ
リコーン樹脂等の熱または光硬化性樹脂、ポリイミド、
ポリアミドイミド、アラミド樹脂等、或いはポリスルホ
ン、ポリエーテルイミド、芳香族ポリエステル、フッ素
樹脂等の高融点の結晶性または高ガラス転移点を有する
非晶性の熱可塑性樹脂が挙げられる。特に、低弾性率で
あるシリコーン樹脂、シリコーン変性エポキシ樹脂、フ
ッ素樹脂等を使用すると応力緩和の点で有利であり、後
述の接着剤層の弾性率と同等以下であることが好まし
い。
The resin that can be used as the insulating film 12a of the core layer 12 may be any resin that can maintain the orientation of the conductive strip 11 filled in the thickness direction during thermocompression bonding. For that purpose, it is preferable that the melt viscosity at the thermocompression bonding temperature is high, and it is most preferable not to melt. That is, a resin that hardly flows at all at the thermocompression bonding temperature, or a resin that does not flow at all is preferable. Specifically, a cured epoxy resin, a phenol resin, a heat or light curable resin such as a silicone resin, a polyimide,
Polyamide imide, aramid resin and the like, or amorphous thermoplastic resin having a high melting point crystalline or high glass transition point such as polysulfone, polyether imide, aromatic polyester, fluorine resin and the like can be mentioned. In particular, use of a silicone resin, a silicone-modified epoxy resin, a fluororesin, or the like having a low elastic modulus is advantageous in terms of stress relaxation, and is preferably equal to or less than the elastic modulus of an adhesive layer described later.

【0020】前記コア層12を形成する絶縁フィルム1
2aの厚さ方向に充填される導電線条体11は特に限定
されない。例えば、銅、ニッケル、金、はんだ等の金
属、銀、銅、パラジウム等の金属粉をエポキシ樹脂等の
バインダー樹脂に配合した導電性ペースト、或いはポリ
チオフェン、ポリピロール、ポリアニリン等の導電性樹
脂が使用できるが、抵抗値が小さい金属が最も好まし
い。これらの導電材が絶縁フィルムの厚さ方向に充填さ
れた材料の製造方法は特に制限されない。予め開口され
た孔内にめっき、印刷等により導電材料を充填すること
もできるし、予め金属ワイヤを所定の間隔で並行配置し
た状態で樹脂を流し込み成形後、ワイヤの配向方向と垂
直な面で切断することによっても製造できる。
The insulating film 1 for forming the core layer 12
The conductive filament 11 filled in the thickness direction of 2a is not particularly limited. For example, a conductive paste in which a metal powder such as copper, nickel, gold, and solder, a metal powder such as silver, copper, and palladium is mixed with a binder resin such as an epoxy resin, or a conductive resin such as polythiophene, polypyrrole, and polyaniline can be used. However, a metal having a small resistance value is most preferable. The method for producing a material in which these conductive materials are filled in the thickness direction of the insulating film is not particularly limited. A conductive material can be filled in the holes opened in advance by plating, printing, or the like, or a resin is poured in a state where metal wires are arranged in parallel at predetermined intervals in advance, and then formed in a plane perpendicular to the orientation direction of the wires. It can also be manufactured by cutting.

【0021】前記導電線条体11が厚み方向に充填され
たコア層12の両面には、接着剤層13が設けられる。
熱圧着時にこの接着剤層13が溶融し、電子部品15、
16と一体化される。接着剤13としては、接続信頼性
が良好な熱硬化性樹脂を使用することが好ましい。具体
的には、エポキシ樹脂、シリコーン変性エポキシ樹脂、
シリコーン樹脂等が好ましい。これらの接着剤層には必
要に応じてシリカ粒子等のフィラーを配合することがで
きる。この場合、樹脂の弾性率が高くなり、応力緩和の
点で不利となるが、上述のコア層12を接着剤層13の
弾性率に比べて小さく、かつ厚くすることで、接続信頼
性の低下を抑制することができる。ここで、接着剤層1
3は電子部品表面を被覆する範囲でなるべく薄くするこ
とが好ましい。即ち、電子部品の電極高さを基板の反り
やバンプの高さのバラツキを考慮したなるべく低い高さ
とすることで、接着剤層13の厚み方向への温度サイク
ル処理に伴う変位を小さくすることができる。基板の材
質や半導体素子の大きさによりその最小高さは異なる。
なお、半導体パッケージを配線基板に実装する場合は封
止の必要はないため、接続部の補強機能があればよく、
半導体パッケージと配線基板との間には隙間があっても
使用可能である。
An adhesive layer 13 is provided on both sides of the core layer 12 in which the conductive wire 11 is filled in the thickness direction.
This adhesive layer 13 is melted at the time of thermocompression bonding, and the electronic components 15,
16 and integrated. As the adhesive 13, it is preferable to use a thermosetting resin having good connection reliability. Specifically, epoxy resin, silicone-modified epoxy resin,
Silicone resin and the like are preferred. Fillers such as silica particles can be added to these adhesive layers as needed. In this case, the elastic modulus of the resin increases, which is disadvantageous in terms of stress relaxation. However, by making the core layer 12 smaller and thicker than the elastic modulus of the adhesive layer 13, the connection reliability is reduced. Can be suppressed. Here, the adhesive layer 1
3 is preferably as thin as possible within a range that covers the electronic component surface. That is, by setting the electrode height of the electronic component to be as low as possible in consideration of the warpage of the substrate and the variation in the height of the bump, it is possible to reduce the displacement caused by the temperature cycling process in the thickness direction of the adhesive layer 13. it can. The minimum height varies depending on the material of the substrate and the size of the semiconductor element.
In addition, when mounting the semiconductor package on the wiring board, there is no need for sealing, so it is only necessary to have a reinforcing function of the connection portion,
It can be used even if there is a gap between the semiconductor package and the wiring board.

【0022】導電線条体11は、コア層12の厚み方向
に充填されるが、コア層12の表面より突出させる必要
がある。熱圧着時にコア層12の両面に形成されている
接着剤層13が溶融して、導電線条体11表面と電子部
品のバンプ18とが接触するが、コア層12の表面と面
一あるいはより窪んでいると十分な接触が得られず安定
した接続が取れない。ここで、導電線条体11のコア層
12表面からの突出高さは、両面に形成した接着剤層1
3の厚みと同等以下、即ち導電線条体11の先端が接着
剤層13に埋設されていることが好ましい。導電線条体
11の先端の突出する高さより接着剤層13の厚みが薄
いと、電子部品との間に空隙が生じ接合不十分となる。
The conductive filaments 11 are filled in the thickness direction of the core layer 12, but need to protrude from the surface of the core layer 12. At the time of thermocompression bonding, the adhesive layers 13 formed on both surfaces of the core layer 12 are melted, and the surface of the conductive filament 11 comes into contact with the bumps 18 of the electronic component. If it is concave, sufficient contact cannot be obtained and stable connection cannot be obtained. Here, the protruding height of the conductive wire 11 from the surface of the core layer 12 is determined by the adhesive layer 1 formed on both surfaces.
It is preferable that the thickness of the conductive wire 11 is equal to or less than the thickness of the adhesive layer 3, that is, the tip of the conductive wire 11 is embedded in the adhesive layer 13. If the thickness of the adhesive layer 13 is smaller than the protruding height of the tip of the conductive strip 11, a gap is formed between the adhesive and the electronic component, resulting in insufficient bonding.

【0023】導電線条体の直径は、接続する電子部品の
電極の形状に応じて任意に設定できる。図2に示したよ
うに、電極内に導電線条体が多数接触するように、微細
な径の導電線条体22を微細ピッチで配設してもよい
し、図3に示したように、半導体素子35のバンプ38
と導電線条体31と配線基板36の配線基板接続端子3
9とを1対1に対応させるように、電極と等ピッチで配
列させてもよい。後者の場合、接触面積はなるべく大き
くするため、導電線条体22の径を大きくかつ表面を平
滑にすることが好ましい。なお、導電線条体の断面は必
ずしも円型とする必要はなく、楕円型、多角形型でもよ
い。
The diameter of the conductive wire can be set arbitrarily according to the shape of the electrode of the electronic component to be connected. As shown in FIG. 2, conductive filaments 22 having a fine diameter may be arranged at a fine pitch so that a large number of conductive filaments come into contact with the electrode, or as shown in FIG. 3. The bump 38 of the semiconductor element 35
, Conductive wire 31 and wiring board connection terminal 3 of wiring board 36
9 may be arranged at an equal pitch with the electrodes so as to correspond one-to-one. In the latter case, in order to increase the contact area as much as possible, it is preferable to increase the diameter of the conductive filament 22 and smoothen the surface. In addition, the cross section of the conductive wire does not necessarily have to be circular, but may be elliptical or polygonal.

【0024】図1に示したように、異方性導電フィルム
10を用いた熱圧着により、導電線条体11と半導体チ
ップ15のアルミパッド17上に設けられたバンプ18
と配線基板16のパッド19とは直接接触し、その接触
を周りの接着剤13が硬化収縮することにより保持して
いる。この場合、温度サイクル処理により接着剤13が
劣化するにつれて保持力が低下しやすく、接続信頼性が
必ずしも十分でない。
As shown in FIG. 1, the conductive wire 11 and the bumps 18 provided on the aluminum pads 17 of the semiconductor chip 15 are formed by thermocompression bonding using the anisotropic conductive film 10.
And the pad 19 of the wiring board 16 are in direct contact with each other, and the contact is maintained by the surrounding adhesive 13 being cured and contracted. In this case, as the adhesive 13 deteriorates due to the temperature cycling process, the holding force tends to decrease, and the connection reliability is not always sufficient.

【0025】接着剤層中に導電粒子を配合させることに
より接続信頼性を更に向上させることができる。図4に
その場合の異方性導電フィルム40の断面図およびこれ
を用いた半導体チップ45と配線基板46との接続断面
図の一例を示す。接着剤層43に変形可能な導電粒子4
4を配合した場合、導電線条体41と半導体チップ45
のアルミパッド47上に設けられたバンプ48および配
線基板46のパッド49の間に導電粒子44が変形した
状態で介在し、接着剤層43の保持力が緩和されても導
電粒子44の変形が復元することで、導電線条体41と
前記電子部品45、46との電気的接続が保持される。
導電粒子44としては、変形可能で熱圧着後も復元する
ものであれば特に制限されない。具体的には、ポリスチ
レン、アクリル樹脂等の周囲に金めっき処理された粒子
や、銀銅合金等の柔軟な金属粒子が挙げられる。導電粒
子径は電子部品のパッド形状に応じて任意に設定できる
が、通常3〜20μm程度であることが好ましく、より
好ましくは5〜10μmである。
By incorporating conductive particles in the adhesive layer, connection reliability can be further improved. FIG. 4 shows an example of a cross-sectional view of the anisotropic conductive film 40 in this case and a connection cross-sectional view of a semiconductor chip 45 and a wiring board 46 using the same. Deformable conductive particles 4 on adhesive layer 43
4, the conductive wire 41 and the semiconductor chip 45
The conductive particles 44 are interposed between the bumps 48 provided on the aluminum pads 47 and the pads 49 of the wiring board 46 in a state where the conductive particles 44 are deformed, and the deformation of the conductive particles 44 is suppressed even if the holding force of the adhesive layer 43 is reduced. By restoring, the electrical connection between the conductive filament 41 and the electronic components 45 and 46 is maintained.
The conductive particles 44 are not particularly limited as long as they are deformable and can be restored after thermocompression bonding. Specifically, there may be mentioned, for example, particles of gold plated around polystyrene or acrylic resin, or soft metal particles such as silver-copper alloy. The diameter of the conductive particles can be arbitrarily set according to the pad shape of the electronic component, but is usually preferably about 3 to 20 μm, more preferably 5 to 10 μm.

【0026】導電線条体41の径は、接続する電子部品
の電極の形状に応じて任意に設定できる。図5に示した
ように、電極面積当たりに導電線条体を多数対応させる
ように微細な径の導電線条体51を微細ピッチで配設し
てもよいし、図6に示したように、電極と導電線条体6
1とを1対1に対応させるように電極と等ピッチで配列
させてもよい。前者の場合、導電線条体51の直径は導
電粒子54の直径の1/3以下にすることが好ましい。
これ以上であると、導電粒子54が熱圧着により扁平に
なっても導電粒子と接触する導電線条体先端数が安定し
た接続が得られるとされる5個以上にすることが困難で
ある。後者の場合、接触面積はなるべく大きくするた
め、導電線条体61の直径を大きくかつその表面を平滑
にすることが好ましい。ここで、導電線条体61の直径
は導電粒子64の直径の3倍以上とすることが好まし
い。導電線条体61の直径が導電粒子64の直径の3倍
未満であると5個以上載せることは甚だ困難である。な
お、導電線条体表面51、61はコア層52、62より
突出している必然性はない。コア層と面一あるいは導電
粒子径に比べて小さい範囲でコア層表面より窪んでいて
もよい。なお、導電線条体の断面は必ずしも円型とする
必要はなく、楕円型、多角形型でもよい。
The diameter of the conductive wire 41 can be arbitrarily set according to the shape of the electrode of the electronic component to be connected. As shown in FIG. 5, conductive filaments 51 having a fine diameter may be arranged at a fine pitch so as to correspond to a large number of conductive filaments per electrode area, or as shown in FIG. , Electrodes and conductive filaments 6
The electrodes may be arranged at equal pitches with the electrodes so that the electrodes 1 and 1 correspond to each other. In the former case, it is preferable that the diameter of the conductive filaments 51 be 1/3 or less of the diameter of the conductive particles 54.
If it is more than this, even if the conductive particles 54 are flattened by thermocompression bonding, it is difficult to make the number of conductive wire tips in contact with the conductive particles 5 or more, which is considered to provide a stable connection. In the latter case, in order to increase the contact area as much as possible, it is preferable to increase the diameter of the conductive wire 61 and to smooth its surface. Here, it is preferable that the diameter of the conductive wire 61 be three times or more the diameter of the conductive particles 64. If the diameter of the conductive filaments 61 is less than three times the diameter of the conductive particles 64, it is extremely difficult to mount five or more. Note that the conductive wire surfaces 51 and 61 do not need to protrude from the core layers 52 and 62. It may be recessed from the surface of the core layer in a range flush with the core layer or in a range smaller than the diameter of the conductive particles. In addition, the cross section of the conductive wire does not necessarily have to be circular, but may be elliptical or polygonal.

【0027】次に、本発明の実施例を図面を用いて説明
する。なお、本発明は以下の実施例に示した内容に限定
されるものではない。 (実施例1)異方性導電フィルムのコア層は、シリコー
ン変性エポキシ樹脂硬化済みシート150μm厚で、こ
れに8μm径の金がコア層表裏より各々4μm突出した
金線条体が概ね15μmピッチで充填されている。そし
て、この異方性導電フィルムは、コア層両面に厚み15
μmのナフタレン骨格を有するBステージ状のエポキシ
樹脂接着剤層を配した3層構成となっており、コア層の
方が接着剤より低弾性率となっている。半導体素子は1
0mm角で75μm角のアルミパッド上に金めっきバン
プが形成された120μmピッチペリフェラル仕様とな
っている。ここで、金めっきバンプの形状は、表面積が
70μm角、めっき厚みが10μmである。一方、配線
基板は、セミアディティブ法で形成されたFR4をコア
材とするビルドアップ基板であり、その表層の接続端子
は、厚み18μmの感光性めっきレジスト層に、露光に
より設けた開口部に電解銅めっきを10μm、続いて該
銅めっき表面に電解ニッケル、金めっき処理を施すこと
により、最終的に15μm厚、75μm角の凸状部を有
するものである。前記異方性導電フィルムを配線基板上
に仮圧着し、半導体素子と配線基板を目合わせ後、20
0℃で10秒間熱圧着し、半導体素子と配線基板を隙間
無く一体化させた。
Next, an embodiment of the present invention will be described with reference to the drawings. The present invention is not limited to the contents shown in the following embodiments. (Example 1) The core layer of the anisotropic conductive film was a silicone-modified epoxy resin-cured sheet 150 μm thick, and gold wires having a diameter of 8 μm projecting 4 μm from the front and back of the core layer at a pitch of approximately 15 μm. Is filled. The anisotropic conductive film has a thickness of 15 on both sides of the core layer.
It has a three-layer structure in which a B-stage epoxy resin adhesive layer having a naphthalene skeleton of μm is arranged, and the core layer has a lower elastic modulus than the adhesive. The semiconductor element is 1
It is a 120 μm pitch peripheral specification in which gold-plated bumps are formed on a 75 mm square aluminum pad of 0 mm square. Here, the shape of the gold plated bump has a surface area of 70 μm square and a plating thickness of 10 μm. On the other hand, the wiring substrate is a build-up substrate using FR4 formed by a semi-additive method as a core material, and the connection terminals on the surface layer are formed on a photosensitive plating resist layer having a thickness of 18 μm by electrolysis at openings formed by exposure. By subjecting the copper plating to 10 μm, and then to the surface of the copper plating with electrolytic nickel and gold plating, a projection having a thickness of 15 μm and a square of 75 μm is finally obtained. The above-mentioned anisotropic conductive film is temporarily pressure-bonded on a wiring board, and after aligning the semiconductor element and the wiring board, 20
The semiconductor element and the wiring board were integrated without gaps by thermocompression bonding at 0 ° C. for 10 seconds.

【0028】得られた半導体装置20個を温度サイクル
処理(−40℃/125℃,各30分間)600サイク
ル実施したが、不良は発生しなかった。 (実施例2)半導体素子および配線基板は実施例1と同
様である。異方性導電フィルムのコア層はポリイミドフ
ィルム100μm厚で、これに設けられた40μm径の
孔内に銅が電解めっきにより充填され、その両端部はニ
ッケル/金処理されている。この導電線条体は120μ
mピッチで配列されている。そして、この実施例の異方
性導電フィルムは、コア層両面に平均粒径0.2μmの
シリカ粒子と表面にニッケル/金メッキ処理された平均
粒径5μmのプラスチック粒子を均一分散させた厚み1
5μmのジシクロペンタジエン変性フェノールノボラッ
ク骨格を有するBステージ状のエポキシ樹脂接着剤層を
配した3層構成となっており、コア層の方が接着剤より
低弾性率となっている。導体表面はコア層表面と概ね面
一で平滑である。半導体素子および配線基板は実施例1
と同様のものを使用した。前記異方性導電フィルムを配
線基板上に仮圧着し、半導体素子と配線基板を目合わせ
後210℃で10秒間熱圧着し、半導体素子と配線基板
を隙間無く一体化させた。
The obtained 20 semiconductor devices were subjected to a temperature cycle treatment (−40 ° C./125° C., 30 minutes each) for 600 cycles, but no failure occurred. (Embodiment 2) The semiconductor element and the wiring board are the same as in Embodiment 1. The core layer of the anisotropic conductive film is a polyimide film having a thickness of 100 μm, and a hole having a diameter of 40 μm provided therein is filled with copper by electrolytic plating, and both ends thereof are treated with nickel / gold. This conductive filament is 120μ
They are arranged at m pitches. The anisotropic conductive film of this example has a thickness of 1 in which silica particles having an average particle size of 0.2 μm on both surfaces of the core layer and plastic particles having an average particle size of 5 μm plated with nickel / gold on the surface are uniformly dispersed.
It has a three-layer structure in which a B-stage epoxy resin adhesive layer having a 5 μm dicyclopentadiene-modified phenol novolak skeleton is arranged, and the core layer has a lower elastic modulus than the adhesive. The conductor surface is substantially flush with the surface of the core layer and is smooth. Semiconductor device and wiring board are Example 1
The same as above was used. The anisotropic conductive film was preliminarily pressure-bonded on a wiring board, and the semiconductor element and the wiring board were aligned and then thermocompression-bonded at 210 ° C. for 10 seconds to integrate the semiconductor element and the wiring board without gaps.

【0029】得られた半導体装置20個を温度サイクル
処理(−40℃/125℃,各30分間)600サイク
ル実施したが、不良は発生しなかった。 (実施例3)実施例1と同様に、異方性導電フィルムの
コア層はシリコーン変性エポキシ樹脂硬化済みシート1
50μm厚で、これに1μm径の金がコア層表裏より各
々1μm突出した金線条体が概ね3μmピッチで充填さ
れている。そしてこの異方性導電フィルムのコア層両面
に平均粒径0.2μmのシリカ粒子と表面にニッケル/
金メッキ処理された平均粒径10μmのプラスチック粒
子を均一分散させた厚み15μmのナフタレン骨格を有
するBステージ状のエポキシ樹脂接着剤層を配した3層
構成となっており、コア層の方が接着剤より低弾性率と
なっている。半導体素子は10mm角で90μm角のア
ルミパッド上に金めっきバンプが形成された120μm
ピッチペリフェラル仕様となっている。ここで、金めっ
きバンプの形状は、表面積が80μm角、めっき厚みが
10μmである。一方、配線基板は、セミアディティブ
法で形成されたFR4をコア材とするビルドアップ基板
であり、その表層の接続端子は、厚み20μmの感光性
めっきレジスト層に露光により設けた開口部に、電解銅
めっきを10μm、続いて該銅めっき表面に電解ニッケ
ル、金めっき処理を施すことにより、最終的に15μm
厚、75μm角の凸状部を有する。前記異方性導電フィ
ルムを配線基板上に仮圧着し、半導体素子と配線基板を
目合わせ後200℃で10秒間熱圧着し、半導体素子と
配線基板を隙間無く一体化させた。
The 20 semiconductor devices obtained were subjected to a temperature cycle treatment (−40 ° C./125° C., 30 minutes each) for 600 cycles, but no failure occurred. (Example 3) As in Example 1, the core layer of the anisotropic conductive film was a sheet 1 cured with silicone-modified epoxy resin.
A gold wire having a thickness of 50 μm and a diameter of 1 μm projecting from the front and back of the core layer by 1 μm each is filled at a pitch of approximately 3 μm. Then, silica particles having an average particle size of 0.2 μm and nickel /
It has a three-layer structure in which a B-staged epoxy resin adhesive layer having a 15-μm-thick naphthalene skeleton in which gold-plated plastic particles having an average particle diameter of 10 μm are uniformly dispersed is provided, and the core layer has an adhesive. It has a lower elastic modulus. The semiconductor element is 120 μm in which a gold-plated bump is formed on a 90 mm square aluminum pad of 10 mm square.
It is pitch peripheral specification. Here, the shape of the gold plated bump has a surface area of 80 μm square and a plating thickness of 10 μm. On the other hand, the wiring substrate is a build-up substrate using FR4 formed by a semi-additive method as a core material, and the connection terminals on the surface layer are formed in a 20 μm-thick photosensitive plating resist layer through an opening formed by exposure to light. Copper plating is 10 μm, followed by electrolytic nickel and gold plating on the surface of the copper plating, so that the final plating is 15 μm.
It has a thick, 75 μm square convex part. The anisotropic conductive film was preliminarily pressure-bonded on a wiring board, and the semiconductor element and the wiring board were aligned and thermocompression-bonded at 200 ° C. for 10 seconds to integrate the semiconductor element and the wiring board without gaps.

【0030】得られた半導体装置20個を温度サイクル
処理(−40℃/125℃,各30分間)600サイク
ル実施したが、不良は発生しなかった。 (比較例1)実施例1で使用した異方性導電フィルムの
コア層の厚みを50μmに変更した以外は全く同一で半
導体素子と配線基板を隙間無く一体化させた。
The 20 semiconductor devices obtained were subjected to a temperature cycle treatment (−40 ° C./125° C., 30 minutes each) for 600 cycles, but no failure occurred. (Comparative Example 1) A semiconductor element and a wiring board were integrated without any gap except that the thickness of the core layer of the anisotropic conductive film used in Example 1 was changed to 50 µm.

【0031】得られた半導体装置20個を温度サイクル
処理(−40℃/125℃,各30分間)したところ、
200サイクルより不良が発生し600サイクルで全て
不良となった。 (比較例2)実施例1で使用した異方性導電フィルムの
コア層に充填された金線条体をコア層と概ね面一に変更
した以外は全く同一で半導体素子と配線基板を隙間無く
一体化させた。
When the obtained 20 semiconductor devices were subjected to a temperature cycle treatment (-40 ° C./125° C., 30 minutes each),
The failure occurred from 200 cycles, and all failures occurred in 600 cycles. (Comparative Example 2) The semiconductor element and the wiring board were completely identical except that the gold filaments filled in the core layer of the anisotropic conductive film used in Example 1 were almost flush with the core layer. Integrated.

【0032】得られた半導体装置は初期接続で不良が発
生した。 (比較例3)実施例1で使用した異方性導電フィルムの
コア層を硬化済み接着剤層(ナフタレン骨格を有するC
ステージ状のエポキシ樹脂)に変更した以外は全く同一
で半導体素子と配線基板を隙間無く一体化させた。
In the obtained semiconductor device, a defect occurred in the initial connection. (Comparative Example 3) The core layer of the anisotropic conductive film used in Example 1 was replaced with a cured adhesive layer (C having a naphthalene skeleton).
The semiconductor device and the wiring board were integrated without any gap except for changing to a stage-shaped epoxy resin).

【0033】得られた半導体装置20個を温度サイクル
処理(−40℃/125℃,各30分間)したところ、
300サイクルより不良が発生し600サイクルで15
個不良となった。 (比較例4)実施例2で使用した異方性導電フィルムの
コア層に充填された導電線条体の径を12μmに変更し
た以外は全く同一で半導体素子と配線基板を隙間無く一
体化させた。
When the obtained 20 semiconductor devices were subjected to a temperature cycle treatment (-40 ° C./125° C., 30 minutes each),
Failure occurred in 300 cycles and 15 in 600 cycles
Individual defective. (Comparative Example 4) A semiconductor element and a wiring substrate were integrated without any gap except that the diameter of the conductive filament filled in the core layer of the anisotropic conductive film used in Example 2 was changed to 12 µm. Was.

【0034】得られた半導体装置20個を温度サイクル
処理(−40℃/125℃,各30分間)したところ、
200サイクルより不良が発生し600サイクルで18
個不良となった。 (比較例5)実施例3で使用した異方性導電フィルムの
コア層に充填された導電線条体の径を3μm、5μmピ
ッチに変更した以外は全く同一で半導体素子と配線基板
を隙間無く一体化させた。
When the obtained 20 semiconductor devices were subjected to a temperature cycle treatment (-40 ° C./125° C., 30 minutes each),
Failure occurred in 200 cycles and 18 in 600 cycles
Individual defective. (Comparative Example 5) Except that the diameter of the conductive filament filled in the core layer of the anisotropic conductive film used in Example 3 was changed to 3 μm and 5 μm pitch, the semiconductor element and the wiring substrate were completely closed. Integrated.

【0035】得られた半導体装置20個を温度サイクル
処理(−40℃/125℃,各30分間)したところ、
200サイクルより不良が発生し600サイクルで全て
不良となった。 (発明の他の実施例)上述したように半導体素子を配線
基板に接続する場合は、半導体素子と配線基板の間は隙
間無く樹脂が充填されていることが使用環境からの保護
の点で好ましいが、チップサイズパッケージのような半
導体素子面が既に封止されているパッケージを配線基板
に実装する場合は、半導体パッケージと配線基板の間に
空隙があってもよい。図7に示したように、チップサイ
ズパッケージ74のはんだバンプ78が、異方性導電フ
ィルム70の導電線条体71と接触し、接着剤73がは
んだバンプ78の先端周辺部のみに被覆され補強されて
いてもよい。また、異方性導電フィルム70の半導体パ
ッケージ74側の接着剤層として熱可塑性樹脂を使用す
ると、ハンダバンプ78と接着剤層43がともに溶融す
るためリペアが可能である。この場合、はんだの融点よ
り熱可塑性樹脂の溶融温度が高いことが好ましい。はん
だバンプ78の融点以上、熱可塑性樹脂の溶融温度以下
でリフローすることにより、はんだバンプと導電線条体
は金属結合し、更に高い接続信頼性が得られる。なお、
接着剤層に導電粒子を配合することもできることは言う
までもない。
When the obtained 20 semiconductor devices were subjected to a temperature cycle treatment (−40 ° C./125° C., 30 minutes each),
The failure occurred from 200 cycles, and all failures occurred in 600 cycles. (Other Embodiments of the Invention) When a semiconductor element is connected to a wiring board as described above, it is preferable that the resin is filled without a gap between the semiconductor element and the wiring board from the viewpoint of protection from a use environment. However, when a package, such as a chip size package, in which a semiconductor element surface is already sealed is mounted on a wiring board, there may be a gap between the semiconductor package and the wiring board. As shown in FIG. 7, the solder bumps 78 of the chip size package 74 come into contact with the conductive strips 71 of the anisotropic conductive film 70, and the adhesive 73 is applied only to the periphery of the tip of the solder bumps 78 and reinforced. It may be. When a thermoplastic resin is used as the adhesive layer on the semiconductor package 74 side of the anisotropic conductive film 70, the solder bump 78 and the adhesive layer 43 are both melted, so that repair is possible. In this case, the melting temperature of the thermoplastic resin is preferably higher than the melting point of the solder. By reflowing at a temperature equal to or higher than the melting point of the solder bump 78 and equal to or lower than the melting temperature of the thermoplastic resin, the solder bump and the conductive wire are metal-bonded, and higher connection reliability can be obtained. In addition,
It goes without saying that conductive particles can be blended in the adhesive layer.

【0036】このように、本発明に係わる異方性導電フ
ィルムは、絶縁フィルムの厚み方向に導電線条体が充填
されているコア層と、このコア層の両面に設けられ、熱
により溶融する接着剤層とからなり、熱圧着により厚み
方向にのみ導電性を発現することを特徴とするものであ
り、叉、前記導電線条体が絶縁フィルムの厚さ方向に貫
通しており、その表面が絶縁フィルム表面より突出し、
且つ前記導電線条体が前記コア層の両面に設けられた接
着剤層に埋設されていることを特徴とするものであり、
叉、前記熱により溶融する接着剤層中に導電粒子が均一
に分散されていることを特徴とするものであり、叉、前
記導電線条体が絶縁フィルムの厚さ方向に貫通してお
り、且つ前記絶縁フィルムの表面が平滑であることを特
徴とするものであり、叉、前記導電線条体の径が、前記
接着剤層中に均一に分散されている導電粒子径の3倍以
上であることを特徴とするものであり、叉、前記導電線
条体が、前記接着剤層中に均一に分散されている導電粒
子径の1/3より小さいピッチで配列されていることを
特徴とするものであり、叉、前記コア層が、熱圧着温度
で溶融しないことを特徴とするものであり、叉、前記接
着剤層が、熱硬化性樹脂であることを特徴とするもので
あり、叉、前記接着剤層が、熱可塑性樹脂であることを
特徴とするものであり、叉、前記コア層の厚みが、その
両面に設けられた前記接着剤層の厚みより大きいことを
特徴とするものであり、叉、前記接着剤層の厚みが、接
着剤層中に均一に分散されている導電粒子径より大きい
ことを特徴とするものであり、叉、前記コア層の引張弾
性率が、その両側に設けられた前記接着剤層の引張弾性
率より小さいことを特徴とするものである。
As described above, the anisotropic conductive film according to the present invention is provided on both sides of the core layer in which the conductive filaments are filled in the thickness direction of the insulating film, and is melted by heat. It consists of an adhesive layer and is characterized by exhibiting conductivity only in the thickness direction by thermocompression bonding, and the conductive filaments penetrate in the thickness direction of the insulating film, and the surface thereof Protrudes from the insulating film surface,
And the conductive wire is embedded in an adhesive layer provided on both surfaces of the core layer,
Further, the conductive particles are characterized by being uniformly dispersed in the adhesive layer that is melted by the heat, and the conductive filaments penetrate in the thickness direction of the insulating film, The surface of the insulating film is smooth, and the diameter of the conductive filament is at least three times the diameter of the conductive particles uniformly dispersed in the adhesive layer. Wherein the conductive filaments are arranged at a pitch smaller than 1/3 of the diameter of the conductive particles uniformly dispersed in the adhesive layer. And the core layer is characterized in that it does not melt at the thermocompression bonding temperature, and the adhesive layer is characterized by being a thermosetting resin, Further, the adhesive layer is made of a thermoplastic resin. The thickness of the core layer is larger than the thickness of the adhesive layer provided on both sides thereof, and the thickness of the adhesive layer is evenly distributed in the adhesive layer. It is characterized by being larger than the dispersed conductive particle diameter, and the tensile elastic modulus of the core layer is smaller than the tensile elastic modulus of the adhesive layer provided on both sides thereof. Things.

【0037】叉、本発明に係わる半導体装置は、2つの
電子部品が異方性導電フィルムを介して電気的に接続さ
れた半導体装置であって、前記2つの電子部品間に、絶
縁フィルムの厚み方向に導電線条体が充填されているコ
ア層と、このコア層の両面に設けられ、熱により溶融す
る接着剤層とからなる異方性導電フィルムを介在せし
め、前記コア層である絶縁フィルムの厚み方向に充填さ
れている導電線条体の両端が前記2つの電子部品の夫々
の電極に接触し、前記電子部品の表面と異方性導電フィ
ルムとは、コア層の両面に設けられた接着剤層で各々固
着一体化されることを特徴とするものであり、叉、前記
熱により溶融する接着剤層中に導電粒子が均一に分散さ
れていることを特徴とするものであり、叉、前記2つの
電子部品の一方が半導体素子叉は半導体パッケージであ
り、他方の電子部品が配線基板であることを特徴とする
ものであり、叉、2つの電子部品の一方が半導体パッケ
ージ、他方の電子部品が配線基板であり、半導体パッケ
ージと異方性導電フィルムの電気的接続部以外に隙間が
あることを特徴とするものである。叉、本発明に係わる
半導体装置の製造方法は、2つの電子部品が異方性導電
フィルムを介して電気的に接続された半導体装置の製造
方法であって、前記2つの電子部品間に、絶縁フィルム
の厚み方向に導電線条体が充填されているコア層と、こ
のコア層の両面に設けられ、熱により溶融する接着剤層
とからなる異方性導電フィルムを介在せしめる工程と、
前記異方性導電フィルムを加熱することで、前記コア層
である絶縁フィルムの厚み方向に充填されている導電線
条体の両端を前記2つの電子部品の夫々の電極に接触せ
しめると共に、前記接着剤層を溶融せしめる工程と、前
記接着剤層を固化せしめることで前記2つの電子部品を
各々固着一体化する工程とを含むことを特徴とするもの
であり、叉、前記熱により溶融する接着剤層中に均一に
分散された導電粒子を介して、前記コア層である絶縁フ
ィルムの厚み方向に充填されている導電線条体の両端
を、前記2つの電子部品の夫々の電極に接触せしめるこ
とを特徴とするものである。
A semiconductor device according to the present invention is a semiconductor device in which two electronic components are electrically connected via an anisotropic conductive film, and a thickness of an insulating film is provided between the two electronic components. Anisotropic conductive film consisting of a core layer filled with conductive filaments in the direction and adhesive layers provided on both sides of the core layer and melted by heat is interposed, and the insulating film as the core layer Both ends of the conductive filament filled in the thickness direction contact the respective electrodes of the two electronic components, and the surface of the electronic component and the anisotropic conductive film are provided on both surfaces of the core layer. The adhesive layer is fixed and integrated with each other, and the conductive particles are uniformly dispersed in the adhesive layer that is melted by the heat. , One of the two electronic components is half A body element or a semiconductor package, wherein the other electronic component is a wiring board, and one of the two electronic components is a semiconductor package and the other electronic component is a wiring board; There is a gap other than the electrical connection between the package and the anisotropic conductive film. Also, a method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which two electronic components are electrically connected via an anisotropic conductive film, wherein an insulating material is provided between the two electronic components. A step of interposing an anisotropic conductive film comprising a core layer filled with conductive filaments in the thickness direction of the film and an adhesive layer provided on both surfaces of the core layer and melted by heat,
By heating the anisotropic conductive film, both ends of the conductive filament filled in the thickness direction of the insulating film as the core layer are brought into contact with respective electrodes of the two electronic components, and the bonding is performed. A step of melting the agent layer; and a step of fixing and integrating the two electronic components by solidifying the adhesive layer. Contacting both ends of a conductive filament filled in a thickness direction of the insulating film as the core layer with conductive particles uniformly dispersed in the layer, to contact respective electrodes of the two electronic components. It is characterized by the following.

【0038】[0038]

【発明の効果】本発明の異方性導電フィルムを使用する
ことで良好な接続信頼性を有する半導体装置が提供でき
る。その理由は異方性導電フィルムを3層構成としてい
ることによる。即ち、絶縁フィルムコア層として熱圧着
温度で溶融しない樹脂を使用することにより、厚み方向
に充填された導電線条体の配向が乱れることがなく、
叉、絶縁フィルムコア層の両側に熱圧着温度で溶融する
接着剤を配することにより、熱圧着により電子部品とコ
ア層は良好に接着し、これにより、電子部品の電極表面
とコア層の厚み方向に充填された導電線条体の接触状態
が保持される。
By using the anisotropic conductive film of the present invention, a semiconductor device having good connection reliability can be provided. The reason is that the anisotropic conductive film has a three-layer structure. That is, by using a resin that does not melt at the thermocompression bonding temperature as the insulating film core layer, the orientation of the conductive strip filled in the thickness direction is not disturbed,
In addition, by disposing an adhesive that melts at the thermocompression bonding temperature on both sides of the insulating film core layer, the electronic component and the core layer are well bonded by thermocompression bonding. The contact state of the conductive strip filled in the direction is maintained.

【0039】また、接着剤層中に加圧により変形可能な
導電粒子を配することで、電子部品の電極表面とコア層
の厚み方向に充填された導電線条体の間に変形された導
電粒子が介在され、温度サイクル処理に応じて導電粒子
が変形追随する。ここで、コア層として接着剤層より厚
く、かつ低弾性の樹脂を使用することにより、接続部近
傍に発生する内部応力を低減することができる。
Further, by disposing conductive particles that can be deformed by pressure in the adhesive layer, the conductive particles deformed between the electrode surface of the electronic component and the conductive filaments filled in the thickness direction of the core layer. Particles are interposed, and the conductive particles deform and follow the temperature cycle processing. Here, by using a resin that is thicker and lower in elasticity than the adhesive layer as the core layer, internal stress generated near the connection portion can be reduced.

【0040】また、接着剤として、熱可塑性樹脂を使用
すれば、半導体パッケージの配線基板への接続信頼性が
向上し、かつリペア可能になる。
When a thermoplastic resin is used as the adhesive, the reliability of connection of the semiconductor package to the wiring board is improved, and the semiconductor package can be repaired.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の具体例を示す異方性導電フィルムおよ
びこれを用いた半導体装置の断面図である。
FIG. 1 is a cross-sectional view of an anisotropic conductive film showing a specific example of the present invention and a semiconductor device using the same.

【図2】半導体装置の電極と異方性導電フィルムのコア
層に充填された導電線条体との対応状態を説明する図で
ある。
FIG. 2 is a diagram illustrating a corresponding state of an electrode of a semiconductor device and a conductive filament filled in a core layer of an anisotropic conductive film.

【図3】半導体装置の電極と異方性導電フィルムのコア
層に充填された導電線条体との他の対応状態を説明する
図である。
FIG. 3 is a diagram illustrating another correspondence state between the electrodes of the semiconductor device and the conductive filaments filled in the core layer of the anisotropic conductive film.

【図4】本発明の他の具体例を示す異方性導電フィルム
およびこれを用いた半導体装置の断面図である。
FIG. 4 is a cross-sectional view of an anisotropic conductive film showing another specific example of the present invention and a semiconductor device using the same.

【図5】半導体装置の電極と異方性導電フィルムのコア
層に充填された導電線条体との対応状態を説明する図で
ある。
FIG. 5 is a diagram illustrating a corresponding state of an electrode of a semiconductor device and a conductive filament filled in a core layer of an anisotropic conductive film.

【図6】半導体装置の電極と異方性導電フィルムのコア
層に充填された導電線条体との他の対応状態を説明する
図である。
FIG. 6 is a diagram illustrating another corresponding state of the electrodes of the semiconductor device and the conductive filaments filled in the core layer of the anisotropic conductive film.

【図7】本発明の別の具体例を示す図である。FIG. 7 is a diagram showing another specific example of the present invention.

【図8】従来例を説明する図である。FIG. 8 is a diagram illustrating a conventional example.

【図9】従来例を説明する図である。FIG. 9 is a diagram illustrating a conventional example.

【符号の説明】[Explanation of symbols]

異方性導電フィルム:10、20、30、40、50、
60、70、80、90 導電線条体:11、21、31、41、51、61、7
1、91 コア材:12、22、32、42、52、62、72 接着剤層:13、23、33、43、53、63、73 導電粒子:44、54、64、81 半導体素子:15、25、35、45、55、65、7
5、85、95 配線基板:16、26、36、46、56、66、7
6、86、96 半導体素子接続端子(アルミニウムパッド):17、2
7、37、47、57、67、87、97 金属突起(バンプ):18、28、38、48、58、
68、88、98 配線基板接続端子:19、29、39、49、59、6
9、79、89、99 半導体パッケージ:74 はんだバンプ:78 バインダー樹脂:82、92 絶縁フィルム:12a
Anisotropic conductive film: 10, 20, 30, 40, 50,
60, 70, 80, 90 conductive filaments: 11, 21, 31, 41, 51, 61, 7
1, 91 Core material: 12, 22, 32, 42, 52, 62, 72 Adhesive layer: 13, 23, 33, 43, 53, 63, 73 Conductive particles: 44, 54, 64, 81 Semiconductor element: 15 , 25, 35, 45, 55, 65, 7
5, 85, 95 Wiring board: 16, 26, 36, 46, 56, 66, 7
6, 86, 96 Semiconductor element connection terminals (aluminum pads): 17, 2
7, 37, 47, 57, 67, 87, 97 Metal projections (bumps): 18, 28, 38, 48, 58,
68, 88, 98 Wiring board connection terminals: 19, 29, 39, 49, 59, 6
9, 79, 89, 99 Semiconductor package: 74 Solder bump: 78 Binder resin: 82, 92 Insulating film: 12a

─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成12年6月12日(2000.6.1
2)
[Submission date] June 12, 2000 (2006.1.
2)

【手続補正1】[Procedure amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】特許請求の範囲[Correction target item name] Claims

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【特許請求の範囲】[Claims]

【手続補正2】[Procedure amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0009[Correction target item name] 0009

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0009】[0009]

【課題を解決するための手段】本発明は上記した目的を
達成するため、基本的には、以下に記載されたような技
術構成を採用するものである。即ち、本発明に係わる異
方性導電フィルムの第1態様は、絶縁フィルムの厚み方
向に、その表面を平滑にした導電線条体を充填せしめた
絶縁性を有するコア層と、このコア層の両面に設けら
れ、熱により溶融する接着剤層と、前記接着剤層内に均
一に分散せしめた変形可能な導電粒子とからなり、前記
導電線条体が前記コア層の厚さ方向に貫通しており、そ
の表面がコア層表面より突出しており、且つ前記導電線
条体が前記コア層の両面に設けられた接着剤層に埋設さ
れ、熱圧着により厚み方向にのみ導電性を発現すること
を特徴とするものであり、叉、第態様は、前記導電線
条体の径が、前記導電粒子径の3倍以上であることを特
徴とするものであり、叉、第態様は、前記導電線条体
が、前記導電粒子径の1/3より小さいピッチで配列さ
れていることを特徴とするものであり、叉、第態様
は、前記コア層が、熱圧着する時の温度で溶融しないこ
とを特徴とするものであり、叉、第態様は、前記接着
剤層が、熱硬化性樹脂であることを特徴とするものであ
り、叉、第態様は、前記接着剤層が、熱可塑性樹脂で
あることを特徴とするものであり、叉、第態様は、前
記コア層の厚みが、その両面に設けられた前記接着剤層
の厚みより大きいことを特徴とするものであり、叉、第
態様は、前記接着剤層の厚みが、前記導電粒子径より
大きいことを特徴とするものであり、叉、第態様は、
前記コア層の引張弾性率が、その両側に設けられた前記
接着剤層の引張弾性率より小さいことを特徴とするもの
である。
SUMMARY OF THE INVENTION The present invention basically employs the following technical configuration to achieve the above object. That is, in the first embodiment of the anisotropic conductive film according to the present invention, in the thickness direction of the insulating film, a conductive filament having a smooth surface is filled.
An insulating core layer, and a core layer provided on both sides of the core layer.
And an adhesive layer that is melted by heat and is uniformly distributed in the adhesive layer.
Consisting of deformable conductive particles dispersed in one,
A conductive filament penetrates in the thickness direction of the core layer, and
Has a surface protruding from the surface of the core layer, and the conductive wire
Strips are embedded in the adhesive layers provided on both sides of the core layer.
It is state, and are not characterized by expression conductivity only in its thickness direction by thermocompression bonding, or the second aspect, the diameter of the conductive striatum, 3 times or more before Kishirube electrostatic particle size and characterized in that it is, or, third aspects, in which the conductive striatum, characterized in that it is arranged in one-third less than the pitch of the front Kishirube electrostatic particle size The fourth mode is characterized in that the core layer does not melt at the temperature at the time of thermocompression bonding, and the fifth mode is that the adhesive layer is formed of a thermosetting resin. The sixth aspect is characterized in that the adhesive layer is a thermoplastic resin, and the seventh aspect is that the thickness of the core layer is Wherein the thickness is larger than the thickness of the adhesive layer provided on both surfaces thereof.
8 embodiment, the thickness of the adhesive layer, which being greater than the conductive particle size, or, ninth aspect,
It is characterized in that the tensile elastic modulus of the core layer is smaller than the tensile elastic moduli of the adhesive layers provided on both sides thereof.

【手続補正3】[Procedure amendment 3]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0010[Correction target item name] 0010

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0010】叉、本発明に係わる半導体装置の第1態様
は、2つの電子部品が異方性導電フィルムを介して電気
的に接続された半導体装置であって、前記2つの電子部
品間に、絶縁フィルムの厚み方向に、その表面を平滑に
した導電線条体を充填せしめた絶縁性を有するコア層
と、このコア層の両面に設けられ、熱により溶融する接
着剤層と、前記接着剤層内に均一に分散せしめた変形可
能な導電粒子とからなり、前記導電線条体が前記コア層
の厚さ方向に貫通しており、その表面がコア層表面より
突出しており、且つ前記導電線条体が前記コア層の両面
に設けられた接着剤層に埋設されている異方性導電フィ
ルムを介在せしめ、前記コア層である絶縁フィルムの厚
み方向に充填されている導電線条体の両端が、前記導電
粒子を介して、前記2つの電子部品の夫々の電極に接触
し、前記電子部品の表面と異方性導電フィルムとは、コ
ア層の両面に設けられた接着剤層で各々固着一体化され
ることを特徴とするものであり、叉、第態様は前記2
つの電子部品の一方が半導体素子叉は半導体パッケージ
であり、他方の電子部品が配線基板であることを特徴と
するものであり、叉、第態様は、2つの電子部品の一
方が半導体パッケージ、他方の電子部品が配線基板であ
り、半導体パッケージと異方性導電フィルムの電気的接
続部以外に隙間があることを特徴とするものである。
A first aspect of the semiconductor device according to the present invention is a semiconductor device in which two electronic components are electrically connected to each other via an anisotropic conductive film. Smooth the surface in the thickness direction of the insulation film
Core layer filled with conductive strips
Are provided on both sides of the core layer and are melted by heat.
Adhesive layer, deformable evenly dispersed in the adhesive layer
Conductive filaments, wherein the conductive filaments are
Through the core layer surface
Projecting, and the conductive filaments are on both sides of the core layer.
Allowed interposed anisotropic conductive film is embedded in the adhesive layer provided on both ends of the conductive striatum, which is filled in the thickness direction of the insulating film which is the core layer, the conductive
The particles are in contact with the respective electrodes of the two electronic components via the particles, and the surface of the electronic component and the anisotropic conductive film are respectively fixed and integrated by the adhesive layers provided on both surfaces of the core layer. it all SANYO characterized by, or second aspect the 2
One of the two electronic components is a semiconductor element or a semiconductor package, and the other electronic component is a wiring board. In a third mode, one of the two electronic components is a semiconductor package, The other electronic component is a wiring substrate, and has a gap other than an electrical connection between the semiconductor package and the anisotropic conductive film.

【手続補正4】[Procedure amendment 4]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0011[Correction target item name] 0011

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0011】叉、本発明に係わる半導体装置の製造方法
の態様は、2つの電子部品が異方性導電フィルムを介し
て電気的に接続された半導体装置の製造方法であって、
前記2つの電子部品間に、絶縁フィルムの厚み方向に
その表面を平滑にした導電線条体を充填せしめた絶縁性
を有するコア層と、このコア層の両面に設けられ、熱に
より溶融する接着剤層と、前記接着剤層内に均一に分散
せしめた変形可能な導電粒子とからなり、前記導電線条
体が前記コア層の厚さ方向に貫通しており、その表面が
コア層表面より突出しており、且つ前記導電線条体が前
記コア層の両面に設けられた接着剤層に埋設されている
異方性導電フィルムを介在せしめる工程と、前記異方性
導電フィルムを加熱することで、前記接着剤層を溶融せ
しめると共に、前記コア層である絶縁フィルムの厚み方
向に充填されている導電線条体の両端を、前記導電粒子
を介して、前記2つの電子部品の夫々の電極に接触せし
る工程と、前記接着剤層を固化せしめることで前記2
つの電子部品を各々固着一体化せしめる工程とを含むこ
とを特徴とするものである。
Further, a method of manufacturing a semiconductor device according to the present invention.
State like is an electrically connected manufacturing method of the semiconductor device via the two electronic components is an anisotropic conductive film,
Between the two electronic components, in the thickness direction of the insulating film ,
Insulating properties filled with conductive filaments with smooth surfaces
And a core layer provided on both sides of the core layer,
An adhesive layer that melts more and is uniformly dispersed in the adhesive layer.
Said conductive filaments made of deformable conductive particles.
The body penetrates in the thickness direction of the core layer, and the surface thereof
Projecting from the surface of the core layer, and the conductive filaments
Melting the adhesive layer by interposing an anisotropic conductive film embedded in an adhesive layer provided on both sides of the core layer and heating the anisotropic conductive film; Let
Together with both ends of the conductive filament filled in the thickness direction of the insulating film as the core layer with the conductive particles.
Through, said the higher two husband Ru <br/> Me Shi not contact the people electrode Engineering of the electronic component, wherein by allowed to solidify said adhesive layer 2
Ru der which is characterized in that it comprises the steps of: allowed to each fixed integrally One of the electronic components.

【手続補正5】[Procedure amendment 5]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0035[Correction target item name] 0035

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0035】得られた半導体装置20個を温度サイクル
処理(−40℃/125℃,各30分間)したところ、
200サイクルより不良が発生し600サイクルで全て
不良となった。 (発明の他の実施例)上述したように半導体素子を配線
基板に接続する場合は、半導体素子と配線基板の間は隙
間無く樹脂が充填されていることが使用環境からの保護
の点で好ましいが、チップサイズパッケージのような半
導体素子面が既に封止されているパッケージを配線基板
に実装する場合は、半導体パッケージと配線基板の間に
空隙があってもよい。図7に示したように、チップサイ
ズパッケージ74のはんだバンプ78が、異方性導電フ
ィルム70の導電線条体71と接触し、接着剤73がは
んだバンプ78の先端周辺部のみに被覆され補強されて
いてもよい。また、異方性導電フィルム70の半導体パ
ッケージ74側の接着剤層として熱可塑性樹脂を使用す
ると、ハンダバンプ78と接着剤層73がともに溶融す
るためリペアが可能である。この場合、はんだの融点よ
り熱可塑性樹脂の溶融温度が高いことが好ましい。はん
だバンプ78の融点以上、熱可塑性樹脂の溶融温度以下
でリフローすることにより、はんだバンプと導電線条体
は金属結合し、更に高い接続信頼性が得られる。なお、
接着剤層に導電粒子を配合することもできることは言う
までもない。
When the obtained 20 semiconductor devices were subjected to a temperature cycle treatment (−40 ° C./125° C., 30 minutes each),
The failure occurred from 200 cycles, and all failures occurred in 600 cycles. (Other Embodiments of the Invention) When a semiconductor element is connected to a wiring board as described above, it is preferable that the resin is filled without a gap between the semiconductor element and the wiring board from the viewpoint of protection from a use environment. However, when a package, such as a chip size package, in which a semiconductor element surface is already sealed is mounted on a wiring board, there may be a gap between the semiconductor package and the wiring board. As shown in FIG. 7, the solder bumps 78 of the chip size package 74 come into contact with the conductive strips 71 of the anisotropic conductive film 70, and the adhesive 73 is applied only to the periphery of the tip of the solder bumps 78 and reinforced. It may be. When a thermoplastic resin is used as the adhesive layer on the semiconductor package 74 side of the anisotropic conductive film 70, the solder bumps 78 and the adhesive layer 73 are both melted, so that repair is possible. In this case, the melting temperature of the thermoplastic resin is preferably higher than the melting point of the solder. By reflowing at a temperature equal to or higher than the melting point of the solder bump 78 and equal to or lower than the melting temperature of the thermoplastic resin, the solder bump and the conductive wire are metal-bonded, and higher connection reliability can be obtained. In addition,
It goes without saying that conductive particles can be blended in the adhesive layer.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01B 1/20 H01B 1/20 D H01L 21/60 311 H01L 21/60 311S 23/32 23/32 D H01R 11/01 H01R 11/01 A H05K 3/32 H05K 3/32 B Fターム(参考) 4F100 AB01A AB25 AB25H AK01A AK53 AK53G AR00A AR00B AR00C AT00D AT00E BA03 BA05 BA06 BA07 BA10B BA10C BA10D BA10E CA21A CA21B CA21C DD01 DD09 DE01B DE01C GB41 JB13B JB13C JB16B JB16C JG01B JG01C JG04A JK07A JL12B JL12C 5E319 AA03 AB05 BB16 CC61 CD31 5F044 KK01 LL09 QQ01 5G301 DA05 DA10 DA29 DA51 DA57 DD03 5G307 HA02 HB03 HC01 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification code FI Theme coat ゛ (Reference) H01B 1/20 H01B 1/20 D H01L 21/60 311 H01L 21/60 311S 23/32 23/32 D H01R 11/01 H01R 11/01 A H05K 3/32 H05K 3/32 B F term (reference) 4F100 AB01A AB25 AB25H AK01A AK53 AK53G AR00A AR00B AR00C AT00D AT00E BA03 BA05 BA06 BA07 BA10B BA10C BA10D BA10E CA21A CA21B DE01C JB13B JB13C JB16B JB16C JG01B JG01C JG04A JK07A JL12B JL12C 5E319 AA03 AB05 BB16 CC61 CD31 5F044 KK01 LL09 QQ01 5G301 DA05 DA10 DA29 DA51 DA57 DD03 5G307 HA02 HB03 HC01

Claims (18)

【特許請求の範囲】[Claims] 【請求項1】 絶縁フィルムの厚み方向に導電線条体が
充填されているコア層と、このコア層の両面に設けら
れ、熱により溶融する接着剤層とからなり、熱圧着によ
り厚み方向にのみ導電性を発現することを特徴とする異
方性導電フィルム。
1. An insulating film comprising: a core layer filled with conductive filaments in a thickness direction of an insulating film; and adhesive layers provided on both sides of the core layer and melted by heat. An anisotropic conductive film characterized by exhibiting conductivity only.
【請求項2】 前記導電線条体が絶縁フィルムの厚さ方
向に貫通しており、その表面が絶縁フィルム表面より突
出し、且つ前記導電線条体が前記コア層の両面に設けら
れた接着剤層に埋設されていることを特徴とする請求項
1記載の異方性導電フィルム。
2. An adhesive in which the conductive wire penetrates in the thickness direction of the insulating film, a surface of which protrudes from the surface of the insulating film, and wherein the conductive wire is provided on both surfaces of the core layer. 2. The anisotropic conductive film according to claim 1, wherein the anisotropic conductive film is embedded in the layer.
【請求項3】 前記熱により溶融する接着剤層中に導電
粒子が均一に分散されていることを特徴とする請求項1
又は2記載の異方性導電フィルム。
3. The conductive particles are uniformly dispersed in the adhesive layer which is melted by the heat.
Or the anisotropic conductive film according to 2.
【請求項4】 前記導電線条体が絶縁フィルムの厚さ方
向に貫通しており、且つ前記絶縁フィルムの表面が平滑
であることを特徴とする請求項3記載の異方性導電フィ
ルム。
4. The anisotropic conductive film according to claim 3, wherein said conductive strip penetrates in a thickness direction of the insulating film, and a surface of said insulating film is smooth.
【請求項5】 前記導電線条体の径が、前記接着剤層中
に均一に分散されている導電粒子径の3倍以上であるこ
とを特徴とする請求項3記載の異方性導電フィルム。
5. The anisotropic conductive film according to claim 3, wherein the diameter of the conductive filament is at least three times the diameter of the conductive particles uniformly dispersed in the adhesive layer. .
【請求項6】 前記導電線条体が、前記接着剤層中に均
一に分散されている導電粒子径の1/3より小さいピッ
チで配列されていることを特徴とする請求項1乃至5の
何れかに記載の異方性導電フィルム。
6. The method according to claim 1, wherein the conductive filaments are arranged at a pitch smaller than one third of a diameter of the conductive particles uniformly dispersed in the adhesive layer. The anisotropic conductive film according to any one of the above.
【請求項7】 前記コア層が、熱圧着温度で溶融しない
ことを特徴とする請求項1乃至6の何れかに記載の異方
性導電フィルム。
7. The anisotropic conductive film according to claim 1, wherein the core layer does not melt at a thermocompression bonding temperature.
【請求項8】 前記接着剤層が、熱硬化性樹脂であるこ
とを特徴とする請求項1乃至7の何れかに記載の異方性
導電フィルム。
8. The anisotropic conductive film according to claim 1, wherein the adhesive layer is a thermosetting resin.
【請求項9】 前記接着剤層が、熱可塑性樹脂であるこ
とを特徴とする請求項1乃至7の何れかに記載の異方性
導電フィルム。
9. The anisotropic conductive film according to claim 1, wherein the adhesive layer is a thermoplastic resin.
【請求項10】 前記コア層の厚みが、その両面に設け
られた前記接着剤層の厚みより大きいことを特徴とする
請求項1乃至9の何れかに記載の異方性導電フィルム。
10. The anisotropic conductive film according to claim 1, wherein the thickness of the core layer is larger than the thickness of the adhesive layers provided on both surfaces thereof.
【請求項11】 前記接着剤層の厚みが、接着剤層中に
均一に分散されている導電粒子径より大きいことを特徴
とする請求項3乃至10の何れかに記載の異方性導電フ
ィルム。
11. The anisotropic conductive film according to claim 3, wherein the thickness of the adhesive layer is larger than the diameter of the conductive particles uniformly dispersed in the adhesive layer. .
【請求項12】 前記コア層の引張弾性率が、その両側
に設けられた前記接着剤層の引張弾性率より小さいこと
を特徴とする請求項1乃至11の何れかに記載の異方性
導電フィルム。
12. The anisotropic conductive material according to claim 1, wherein a tensile modulus of the core layer is smaller than a tensile modulus of the adhesive layer provided on both sides of the core layer. the film.
【請求項13】 2つの電子部品が異方性導電フィルム
を介して電気的に接続された半導体装置であって、 前記2つの電子部品間に、絶縁フィルムの厚み方向に導
電線条体が充填されているコア層と、このコア層の両面
に設けられ、熱により溶融する接着剤層とからなる異方
性導電フィルムを介在せしめ、前記コア層である絶縁フ
ィルムの厚み方向に充填されている導電線条体の両端が
前記2つの電子部品の夫々の電極に接触し、前記電子部
品の表面と異方性導電フィルムとは、コア層の両面に設
けられた接着剤層で各々固着一体化されることを特徴と
する半導体装置。
13. A semiconductor device in which two electronic components are electrically connected via an anisotropic conductive film, wherein a conductive linear body is filled between the two electronic components in a thickness direction of the insulating film. Anisotropic conductive film composed of a core layer and an adhesive layer provided on both sides of the core layer and melted by heat is interposed therebetween, and is filled in a thickness direction of the insulating film as the core layer. Both ends of the conductive filament come into contact with the respective electrodes of the two electronic components, and the surface of the electronic component and the anisotropic conductive film are respectively fixed and integrated by adhesive layers provided on both surfaces of the core layer. A semiconductor device characterized by being performed.
【請求項14】 前記熱により溶融する接着剤層中に導
電粒子が均一に分散されていることを特徴とする請求項
13記載の半導体装置。
14. The semiconductor device according to claim 13, wherein conductive particles are uniformly dispersed in the adhesive layer melted by the heat.
【請求項15】 前記2つの電子部品の一方が半導体素
子叉は半導体パッケージであり、他方の電子部品が配線
基板であることを特徴とする請求項13又は14記載の
半導体装置。
15. The semiconductor device according to claim 13, wherein one of the two electronic components is a semiconductor element or a semiconductor package, and the other electronic component is a wiring board.
【請求項16】 2つの電子部品の一方が半導体パッケ
ージ、他方の電子部品が配線基板であり、半導体パッケ
ージと異方性導電フィルムの電気的接続部以外に隙間が
あることを特徴とする請求項13又は14記載の半導体
装置。
16. The semiconductor device according to claim 16, wherein one of the two electronic components is a semiconductor package and the other electronic component is a wiring board, and there is a gap other than an electrical connection between the semiconductor package and the anisotropic conductive film. 15. The semiconductor device according to 13 or 14.
【請求項17】 2つの電子部品が異方性導電フィルム
を介して電気的に接続された半導体装置の製造方法であ
って、 前記2つの電子部品間に、絶縁フィルムの厚み方向に導
電線条体が充填されているコア層と、このコア層の両面
に設けられ、熱により溶融する接着剤層とからなる異方
性導電フィルムを介在せしめる工程と、 前記異方性導電フィルムを加熱することで、前記コア層
である絶縁フィルムの厚み方向に充填されている導電線
条体の両端を前記2つの電子部品の夫々の電極に接触せ
しめると共に、前記接着剤層を溶融せしめる工程と、 前記接着剤層を固化せしめることで前記2つの電子部品
を各々固着一体化する工程と、 を含むことを特徴とする半導体装置の製造方法。
17. A method for manufacturing a semiconductor device in which two electronic components are electrically connected via an anisotropic conductive film, wherein a conductive wire is provided between the two electronic components in a thickness direction of an insulating film. Interposing an anisotropic conductive film composed of a core layer filled with a body and an adhesive layer provided on both sides of the core layer and melted by heat; and heating the anisotropic conductive film. Contacting both ends of the conductive filaments, which are filled in the thickness direction of the insulating film as the core layer, with the respective electrodes of the two electronic components, and melting the adhesive layer; A step of solidifying the agent layer to fix and integrate the two electronic components, respectively.
【請求項18】 前記熱により溶融する接着剤層中に均
一に分散された導電粒子を介して、前記コア層である絶
縁フィルムの厚み方向に充填されている導電線条体の両
端を、前記2つの電子部品の夫々の電極に接触せしめる
ことを特徴とする請求項17記載の半導体装置の製造方
法。
18. Both ends of a conductive filament filled in the thickness direction of the insulating film as the core layer, with conductive particles uniformly dispersed in the adhesive layer melted by the heat, 18. The method for manufacturing a semiconductor device according to claim 17, wherein the respective electrodes of the two electronic components are brought into contact with each other.
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