JP4617978B2 - Wiring board manufacturing method - Google Patents

Wiring board manufacturing method Download PDF

Info

Publication number
JP4617978B2
JP4617978B2 JP2005117892A JP2005117892A JP4617978B2 JP 4617978 B2 JP4617978 B2 JP 4617978B2 JP 2005117892 A JP2005117892 A JP 2005117892A JP 2005117892 A JP2005117892 A JP 2005117892A JP 4617978 B2 JP4617978 B2 JP 4617978B2
Authority
JP
Japan
Prior art keywords
wiring pattern
conductor
substrate
resin
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005117892A
Other languages
Japanese (ja)
Other versions
JP2006302930A (en
Inventor
邦男 日比野
善広 戸村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2005117892A priority Critical patent/JP4617978B2/en
Priority to US11/883,801 priority patent/US8033016B2/en
Priority to CN2006800117409A priority patent/CN101156238B/en
Priority to PCT/JP2006/307916 priority patent/WO2006112384A1/en
Publication of JP2006302930A publication Critical patent/JP2006302930A/en
Application granted granted Critical
Publication of JP4617978B2 publication Critical patent/JP4617978B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1275Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by other printing techniques, e.g. letterpress printing, intaglio printing, lithographic printing, offset printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/11001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11334Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

本発明は、積層構造を有する配線パターンを備えた配線基板製造方法に関する。
The present invention relates to a method for manufacturing a wiring board having a wiring pattern having a layered structure.

近年、携帯電話などの電子機器の小型化が急速に進んでおり、それにともなって、電子機器内で使用される、例えばICやLSIなどの半導体素子やその他の電子部品などの小型化も進んでいる。そのため、電子部品が搭載される配線基板の配線パターンに対しても、配線パターンの微細化や低抵抗化、さらに高密度実装による小型化のための積層化が要求されている。   In recent years, electronic devices such as mobile phones have been rapidly miniaturized, and along with that, semiconductor devices such as ICs and LSIs and other electronic components used in electronic devices have also been miniaturized. Yes. For this reason, wiring patterns on wiring boards on which electronic components are mounted are also required to be miniaturized and reduced in resistance, and stacked for miniaturization by high-density mounting.

従来の配線基板などの配線パターンは、スクリーン印刷や凹版印刷などの印刷法で銀ペーストや銅ペーストなどからなるパターンを基板上に印刷し、印刷された配線パターンを焼成して形成されていた。具体的には、シリコンウエハなどの配線パターンに対応させて形成した凹版内に導電性ペースト(有機金属ペースト)を充填し、その導電性ペーストを乾燥・硬化させてから、例えばガラス基板上に硬化性樹脂を介してその配線パターンを転写し、空気中500℃で焼成することによって、所望の配線パターンを形成することが開示されている(例えば、特許文献1参照)。   A conventional wiring pattern such as a wiring board is formed by printing a pattern made of silver paste or copper paste on a substrate by a printing method such as screen printing or intaglio printing, and firing the printed wiring pattern. Specifically, a conductive paste (organometallic paste) is filled in an intaglio formed corresponding to a wiring pattern such as a silicon wafer, and the conductive paste is dried and cured, and then cured on a glass substrate, for example. It is disclosed that a desired wiring pattern is formed by transferring the wiring pattern through a conductive resin and baking it in air at 500 ° C. (see, for example, Patent Document 1).

しかし、上記凹版印刷では、例えば50μm幅、100μmピッチの微細な配線パターンを形成することは可能であるが、5μm以上の厚みの配線パターンを形成することが困難で、抵抗の低減には限界がある。さらに、配線パターンが500℃程度の高温で焼成して形成されるため、可撓性を有する樹脂基板を配線パターンが形成される基板として用いることができない。   However, in the intaglio printing, it is possible to form a fine wiring pattern with a width of 50 μm and a pitch of 100 μm, for example, but it is difficult to form a wiring pattern with a thickness of 5 μm or more, and there is a limit to the reduction of resistance. is there. Furthermore, since the wiring pattern is formed by baking at a high temperature of about 500 ° C., a flexible resin substrate cannot be used as a substrate on which the wiring pattern is formed.

そこで、厚みの厚い導体パターンを形成する方法として、ポリイミド樹脂基板にエキシマレーザーで深さ60μmの溝を形成し凹版として用いて、基板に配線パターンを形成する方法が開示されている(例えば、特許文献2参照)。   Therefore, as a method of forming a thick conductor pattern, a method of forming a wiring pattern on a substrate by forming a groove having a depth of 60 μm with an excimer laser on a polyimide resin substrate and using it as an intaglio (for example, patents) is disclosed. Reference 2).

しかし、上記いずれの方法によっても、配線パターンが500℃以上の高温で焼成して形成されるため、可撓性を有する樹脂基板を配線パターンが形成される基板として用いることができない。   However, in any of the above methods, since the wiring pattern is formed by baking at a high temperature of 500 ° C. or higher, a flexible resin substrate cannot be used as a substrate on which the wiring pattern is formed.

そこで、耐熱性の低い電子部品の接続や耐熱性の低いフレキシブル基板の配線パターンが、金属粉末(導電フィラー)を溶融せず、そのままバインダーに結着させて導電性ペーストを用いて、例えばスクリーン印刷により形成された配線基板がある。   Therefore, the connection of electronic components with low heat resistance and the wiring pattern of flexible substrates with low heat resistance do not melt the metal powder (conductive filler), but are directly bonded to a binder and used as a conductive paste, for example, screen printing There is a wiring board formed by.

ところが、上記導電性ペーストを用いた配線パターンでは、導電フィラー間にバインダーなどの樹脂成分が介在するため、従来のはんだや銀ペーストの焼成による配線パターンに比べて導電性が低く、配線パターンの低抵抗化が困難であった。それは、はんだが金属結合による導電性であるのに対して、導電性ペーストは導電フィラー間のバインダーのトンネル効果や絶縁破壊または導電フィラー間の接触により導電性が決定されることに起因するものである。そこで、導電性を向上させるために、導電フィラーの含有量を高くし、導電性を向上させた導電性ペーストが開示されている(例えば、特許文献3参照)。   However, in the wiring pattern using the conductive paste, since a resin component such as a binder is interposed between the conductive fillers, the conductive pattern is low and the wiring pattern is low compared to the wiring pattern obtained by baking the conventional solder or silver paste. Resistance was difficult. This is because the solder is conductive due to metal bonding, whereas the conductive paste is determined by the tunneling effect of the binder between the conductive fillers, dielectric breakdown, or contact between the conductive fillers. is there. Therefore, in order to improve the conductivity, a conductive paste in which the content of the conductive filler is increased and the conductivity is improved is disclosed (for example, see Patent Document 3).

しかし、一般に、絶縁性の基板上にバインダーと導電フィラーからなる導電性ペーストで配線パターンを形成する場合、導電性ペーストの印刷性を向上させるために、バインダーと導電フィラーの混合比率を最適化して流動性を確保する必要がある。そのため、逆に、印刷後の配線パターンの形状を保つことが困難となっている。特に、配線パターンの端面において、だれが発生していた。さらに、配線パターンを形成後、例えば150℃程度で硬化処理する場合に、だれがさらに拡大するため、微細な配線パターンを形成することができないという課題がある。   However, in general, when forming a wiring pattern with a conductive paste composed of a binder and a conductive filler on an insulating substrate, the mixing ratio of the binder and the conductive filler is optimized in order to improve the printability of the conductive paste. It is necessary to ensure liquidity. Therefore, conversely, it is difficult to maintain the shape of the printed wiring pattern. In particular, there was a break in the end face of the wiring pattern. In addition, after the wiring pattern is formed, when a curing process is performed at about 150 ° C., for example, who further expands, there is a problem that a fine wiring pattern cannot be formed.

そこで、上記課題を解決するために、一般に配線パターンの形状を塗布時においても安定に維持できるように、高いチクソトロピー(揺変)性の作用を発揮する無機フィラーを導電性ペーストに混合させたものが知られている。
特開平4−240792号公報 特開平7−169635号公報 特開昭63−107188号公報
Therefore, in order to solve the above-mentioned problems, generally, a conductive paste is mixed with an inorganic filler that exhibits a high thixotropic action so that the shape of the wiring pattern can be stably maintained even during coating. It has been known.
JP-A-4-240792 JP 7-169635 A JP-A 63-107188

しかし、特許文献1に示されている配線パターンを有する配線基板においては、有機金属インクを焼成により形成するため、厚みの厚い配線パターンを形成できないという課題があった。さらに、高温での焼成を必要とするため樹脂製の基板に配線パターンを形成できないという課題もある。   However, the wiring substrate having the wiring pattern disclosed in Patent Document 1 has a problem that a thick wiring pattern cannot be formed because the organic metal ink is formed by baking. Furthermore, since baking at a high temperature is required, there is a problem that a wiring pattern cannot be formed on a resin substrate.

また、特許文献2に示されている配線パターンを有する配線基板においては、厚みの厚い配線パターンを形成することはできるが、上記と同様に樹脂製の基板に配線パターンを形成できないという課題もある。さらに、樹脂基板に溝を形成するためにエキシマレーザーなどの高価な装置を必要とするため、コスト高となる。   Moreover, in the wiring board having the wiring pattern disclosed in Patent Document 2, a thick wiring pattern can be formed, but there is a problem that the wiring pattern cannot be formed on the resin substrate as described above. . Further, since an expensive apparatus such as an excimer laser is required to form the groove in the resin substrate, the cost is increased.

さらに、特許文献3に示されている配線パターンを有する配線基板においては、導電フィラーの増加は、配線パターンの低抵抗化に対して効果を有するが、バインダーの相対量を減少させるため、配線パターンを形成する基板との付着力が低下するという課題がある。   Furthermore, in the wiring board having the wiring pattern disclosed in Patent Document 3, an increase in the conductive filler has an effect on the reduction of the resistance of the wiring pattern, but the wiring pattern is reduced in order to reduce the relative amount of the binder. There is a problem that the adhesive force with the substrate on which the film is formed is reduced.

本発明は、上記従来の課題を解決するためになされたもので、基板との付着強度を向上させるとともに、微細化が容易で抵抗の低い配線パターンを有する配線基板とそれを用いた電子部品実装体およびそれらの製造方法を提供することを目的とする。   The present invention has been made in order to solve the above-described conventional problems, and improves the adhesion strength with the substrate, and has a wiring pattern having a wiring pattern that is easily miniaturized and has a low resistance, and an electronic component mounting using the wiring substrate. The object is to provide bodies and methods for their production.

上述したような課題を解決するために、本発明の配線基板は、基板と、基板の上に形成される配線パターンを有し、配線パターンが、基板側に形成される絶縁性樹脂と、絶縁性樹脂に積層して形成される導電体からなる構成を有する。   In order to solve the above-described problems, a wiring board of the present invention includes a substrate and a wiring pattern formed on the substrate, and the wiring pattern is insulated from an insulating resin formed on the substrate side. Having a structure made of a conductor formed by being laminated on a conductive resin.

発明の配線基板の製造方法は、第1凹部と前記第1凹部の底部に第2凹部を備える転写型の高さを超えないように前記第1凹部および前記第2凹部に導電体を充填する工程と、
絶縁性樹脂を前記第1凹部の高さまで前記導電体上に充填する工程と、前記転写型の絶縁性樹脂側を基板上に載置し、加熱する工程と、前記転写型を前記基板から剥離し前記第1凹部に対応する導電性パターンを前記絶縁性樹脂を介して前記基板上に形成する工程とを具備する。
In the method for manufacturing a wiring board according to the present invention, the first recess and the second recess are filled with a conductor so as not to exceed the height of the first recess and the transfer mold having the second recess at the bottom of the first recess. And a process of
Filling the conductor with insulating resin up to the height of the first recess, placing the insulating resin side of the transfer mold on the substrate and heating, and peeling the transfer mold from the substrate And forming a conductive pattern corresponding to the first recess on the substrate via the insulating resin .

この方法により、基板と導電体との付着力を絶縁性樹脂で確保するとともに、導電体で配線パターンを形成した配線基板を実現できる。そのため、導電体材料を基板材料に依存せずに任意に選択できる配線基板を作製することができる。また、第1凹部に充填された配線パターンの状態で配線パターンを基板に形成できるため、狭ピッチ化が可能であるとともに、第1凹部の形状により厚みを調整することで任意の抵抗を有する配線パターンが形成された配線基板を作製することができる。
By this method, it is possible to realize a wiring substrate in which the adhesion between the substrate and the conductor is ensured with an insulating resin and the wiring pattern is formed with the conductor. Therefore, it is possible to manufacture a wiring board in which the conductor material can be arbitrarily selected without depending on the substrate material. In addition, since the wiring pattern can be formed on the substrate in the state of the wiring pattern filled in the first recess, the pitch can be reduced and the wiring having an arbitrary resistance by adjusting the thickness according to the shape of the first recess. Ru can be produced a wiring board on which a pattern is formed.

本発明による配線基板は、配線パターンを絶縁性樹脂と導電体との積層構造とすることにより、絶縁性樹脂により基板との付着力を高めるとともに、導電体により高い導電性を有する微細な配線パターンを形成することができるという大きな効果を奏する。   The wiring board according to the present invention has a wiring structure having a laminated structure of an insulating resin and a conductor, thereby increasing the adhesion to the board with the insulating resin and also having a fine wiring pattern having higher conductivity with the conductor. There is a great effect that can be formed.

以下、本発明の実施の形態について、図面を参照しながら詳細に説明する。なお、同じ構成要素については同じ符号を用い説明を省略する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the same code | symbol is used about the same component and description is abbreviate | omitted.

(実施の形態1)
図1(a)は、本発明の実施の形態1に係る配線基板の平面図であり、図1(b)は、図1(a)のA−A線断面図である。
(Embodiment 1)
FIG. 1A is a plan view of a wiring board according to Embodiment 1 of the present invention, and FIG. 1B is a cross-sectional view taken along line AA in FIG.

図1(a)において、例えば樹脂基板などの基板100の上に配線パターン120が形成されている。また、配線パターン120は、図1(b)に示すように、基板100側に絶縁性樹脂130とその上に積層された導電体140とで構成されている。そして、配線パターン120は、以下の製造方法で示すように、凹部を有する転写型で形成されるため、微細なピッチで形成できるとともに、高いアスペクト比や均一な高さを有する配線パターンを形成することができる。   In FIG. 1A, a wiring pattern 120 is formed on a substrate 100 such as a resin substrate. Further, as shown in FIG. 1B, the wiring pattern 120 includes an insulating resin 130 on the substrate 100 side and a conductor 140 laminated thereon. Since the wiring pattern 120 is formed by a transfer mold having a recess as shown in the following manufacturing method, it can be formed with a fine pitch, and a wiring pattern having a high aspect ratio and a uniform height is formed. be able to.

ここで、基板100としては、ガラスクロスにエポキシ樹脂を含浸させたガラスエポキシ基板、PET(ポリエチレンテレフタレート)樹脂やポリイミド樹脂などのフレキシブル基板やセラミックなどの無機基板を用いることができる。   Here, as the substrate 100, a glass epoxy substrate in which a glass cloth is impregnated with an epoxy resin, a flexible substrate such as a PET (polyethylene terephthalate) resin or a polyimide resin, or an inorganic substrate such as a ceramic can be used.

また、絶縁性樹脂130は、例えば熱硬化性樹脂を含む接着剤が用いられる。なお、熱硬化性樹脂としては、例えばエポキシ樹脂、フェノール樹脂、ポリイミド樹脂、ポリウレタン樹脂、メラミン樹脂や尿素樹脂などの内の1種もしくは2種以上の混合系が用いられる。特に、エポキシ樹脂は、絶縁性樹脂の粘度、硬化反応性や基板100との付着強度を向上させる点から好ましいものである。   For the insulating resin 130, for example, an adhesive containing a thermosetting resin is used. In addition, as a thermosetting resin, 1 type, or 2 or more types of mixed systems in epoxy resin, a phenol resin, a polyimide resin, a polyurethane resin, a melamine resin, a urea resin etc. are used, for example. In particular, the epoxy resin is preferable from the viewpoint of improving the viscosity of the insulating resin, the curing reactivity, and the adhesion strength with the substrate 100.

また、導電体140は、例えば75重量部〜95重量部の導電フィラーと5重量部〜25重量部の熱硬化性樹脂などからなる導電性樹脂またははんだからなる。導電性樹脂の導電フィラーとしては、例えば銀、銅、金、ニッケル、パラジウム、錫などの金属粒子やこれらの合金粒子などが用いられる。さらに、熱硬化性樹脂としては、例えばエポキシ樹脂、フェノール樹脂、ポリイミド樹脂、ポリウレタン樹脂、メラミン樹脂や尿素樹脂などの内の1種もしくは2種以上の混合系が用いられる。特に、絶縁性樹脂130と同じ系の熱硬化性樹脂は、導電体140との付着強度を向上させる点から好ましいものである。   The conductor 140 is made of, for example, a conductive resin or solder made of 75 to 95 parts by weight of a conductive filler and 5 to 25 parts by weight of a thermosetting resin. As the conductive filler of the conductive resin, for example, metal particles such as silver, copper, gold, nickel, palladium, tin, and alloy particles thereof are used. Further, as the thermosetting resin, for example, one or a mixture of two or more of epoxy resin, phenol resin, polyimide resin, polyurethane resin, melamine resin, urea resin and the like is used. In particular, a thermosetting resin of the same system as the insulating resin 130 is preferable in terms of improving the adhesion strength with the conductor 140.

また、はんだは、一般的なはんだを用いることができるが、特に、基板100として、PET(ポリエチレンテレフタレート)などの樹脂基板を用いる場合には、例えば融点が150℃以下のIn−Sn、Bi−Snなどの鉛フリーはんだなどの低融点はんだを用いることが好ましい。   As the solder, a general solder can be used. In particular, when a resin substrate such as PET (polyethylene terephthalate) is used as the substrate 100, for example, In—Sn, Bi— with a melting point of 150 ° C. or less. It is preferable to use a low melting point solder such as lead-free solder such as Sn.

これにより、絶縁性樹脂130の接着力により基板100および導電体140との付着力を大幅に向上できる。そのため、基板100に熱応力や外部からの衝撃や反りなどの変形が加わっても配線パターン120が基板100から剥離することがないので可撓性に優れ、信頼性の高い配線基板を実現できる。また、導電体140を導電性樹脂で形成する場合においても、絶縁性樹脂130との付着力の強い材料を選択することにより、導電フィラーの含有量を増やすことが可能となるため、配線パターン120の導電率を向上させることができるので、配線抵抗の低い配線パターン120を有する配線基板を実現できる。   Thereby, the adhesive force between the substrate 100 and the conductor 140 can be greatly improved by the adhesive force of the insulating resin 130. Therefore, the wiring pattern 120 does not peel from the substrate 100 even when the substrate 100 is subjected to deformation such as thermal stress, external impact or warpage, so that a highly flexible and highly reliable wiring substrate can be realized. Further, even when the conductor 140 is formed of a conductive resin, it is possible to increase the content of the conductive filler by selecting a material having a strong adhesion to the insulating resin 130, and thus the wiring pattern 120. Therefore, the wiring board having the wiring pattern 120 with low wiring resistance can be realized.

以下に、図2を用いて、本発明の実施の形態1に係る配線基板の製造方法について説明する。   Below, the manufacturing method of the wiring board which concerns on Embodiment 1 of this invention is demonstrated using FIG.

図2は、本発明の実施の形態1に係る配線基板の製造方法を説明する工程断面図である。   FIG. 2 is a process cross-sectional view illustrating the method for manufacturing the wiring board according to the first embodiment of the present invention.

まず、図2(a)に示すように、配線パターンを形成する位置に対応した凹部160が形成された転写型150を用意する。ここで、転写型150は、例えば熱硬化性シリコーン樹脂などからなる、低弾性率で高い離型性を有する転写型樹脂が用いられる。この理由は、第1に、シリコーン樹脂であるために、導電性樹脂やはんだに対する離型性に優れている。第2に、低弾性であるために、複雑な形状の凹部でも転写される突起電極に変形などのダメージを与えることなく剥離することができる。さらに、反りのある基板に対しても、容易に反りに応じて変形し突起電極の転写が可能であるなどの利点を有することによるものである。   First, as shown in FIG. 2A, a transfer mold 150 having a recess 160 corresponding to a position where a wiring pattern is formed is prepared. Here, as the transfer mold 150, for example, a transfer resin having a low elastic modulus and a high releasability, which is made of a thermosetting silicone resin or the like, is used. The reason for this is that, since it is a silicone resin, it is excellent in releasability from conductive resin and solder. Second, because of its low elasticity, even a concave portion having a complicated shape can be peeled off without causing damage such as deformation to the projected electrode to be transferred. Further, this is because even a warped substrate can be easily deformed in accordance with the warp so that the protruding electrode can be transferred.

そして、転写型150に形成される配線パターンに対応する凹部160は、例えば幅5μm〜300μmで厚み5μm〜300μm、アスペクト比0.2〜2.0程度の配線パターンの形状に形成された金型を転写型樹脂にインプリント法や注型法により形成できる。例えば、金型に熱硬化性シリコーン樹脂などの転写型樹脂を流し込み、温度150℃、0.5時間の条件で硬化することにより形成することができる。なお、転写型150の少なくとも凹部160に、さらに離型性を高めるために、例えばシリコーン系離型剤、フッ素系離型剤などを塗布してもよい。   The recess 160 corresponding to the wiring pattern formed on the transfer mold 150 is, for example, a mold formed in the shape of a wiring pattern having a width of 5 μm to 300 μm, a thickness of 5 μm to 300 μm, and an aspect ratio of about 0.2 to 2.0. Can be formed on a transfer resin by imprinting or casting. For example, it can be formed by pouring a transfer type resin such as a thermosetting silicone resin into a mold and curing it at a temperature of 150 ° C. for 0.5 hours. In order to further improve the releasability, at least the recess 160 of the transfer mold 150 may be coated with, for example, a silicone-based release agent or a fluorine-based release agent.

つぎに、図2(b)に示すように、転写型150の凹部160内で、少なくとも凹部表面180までは到達せずに空間190が形成される程度に、ペースト状の、例えば銀を主体とした導電性樹脂やはんだなどからなる導電体140が充填される。この場合、凹部160内に充填される導電体140の量は、例えばスクリーン印刷のマスクのメッシュ径などを調整することにより行うことができる。また、凹部160の凹部表面180まで充填した後、導電体140を自然乾燥または硬化温度以下や融点以下の温度で乾燥させることにより空間190を形成することもできる。さらに、導電体140との付着力の小さい材料(例えば、フッ素樹脂など)からなるローラーを用いて、導電体140を凹部160に押し込んで空間190を形成してもよい。   Next, as shown in FIG. 2B, paste-like, for example, silver is mainly used so that a space 190 is formed in the recess 160 of the transfer mold 150 without reaching at least the recess surface 180. The conductor 140 made of the conductive resin or solder is filled. In this case, the amount of the conductor 140 filled in the recess 160 can be determined by adjusting the mesh diameter of a screen printing mask, for example. Alternatively, the space 190 can be formed by filling the conductor surface 140 of the concave portion 160 and then drying the conductor 140 at a temperature not higher than the natural drying or curing temperature or lower than the melting point. Further, the space 190 may be formed by pressing the conductor 140 into the concave portion 160 using a roller made of a material having a low adhesion to the conductor 140 (for example, a fluororesin).

つぎに、図2(c)に示すように、凹部160に形成された空間190に、導電体140と同様な方法を用いて、例えば、エポキシ樹脂などからなる絶縁性樹脂130を充填する。   Next, as shown in FIG. 2C, a space 190 formed in the recess 160 is filled with an insulating resin 130 made of, for example, an epoxy resin using the same method as the conductor 140.

つぎに、図2(d)に示すように、絶縁性樹脂130と導電体140で充填された転写型150の凹部160と基板100とを位置合わせする。   Next, as shown in FIG. 2D, the concave portion 160 of the transfer mold 150 filled with the insulating resin 130 and the conductor 140 and the substrate 100 are aligned.

つぎに、図2(e)に示すように、基板100と転写型150の凹部160とを位置合わせし密着させた状態で、絶縁性樹脂130および導電体140の硬化温度以上の温度で加熱することにより、配線パターン120を硬化させる。例えば、絶縁性樹脂130および導電体140がエポキシ樹脂を含む場合には、硬化温度150℃、硬化時間60分程度である。この場合、絶縁性樹脂130の硬化温度は、導電体140の硬化温度または融点より低い材料を組み合わせる必要がある。しかし、絶縁性樹脂130と導電体140とが互いに混合あるいは溶融しない場合には、絶縁性樹脂130の硬化温度が導電体140の硬化温度よりも高くてもよい。また、絶縁性樹脂130と導電体140とが、互いの硬化温度条件により、その界面近傍でのみ溶融あるいは拡散する程度での材料を選択して組み合わせれば、付着力をさらに高めることができ好ましいものである。   Next, as shown in FIG. 2 (e), the substrate 100 and the recess 160 of the transfer mold 150 are aligned and brought into close contact with each other and heated at a temperature equal to or higher than the curing temperature of the insulating resin 130 and the conductor 140. As a result, the wiring pattern 120 is cured. For example, when the insulating resin 130 and the conductor 140 include an epoxy resin, the curing temperature is 150 ° C. and the curing time is about 60 minutes. In this case, the insulating resin 130 needs to be cured at a temperature lower than the curing temperature or melting point of the conductor 140. However, when the insulating resin 130 and the conductor 140 are not mixed or melted with each other, the curing temperature of the insulating resin 130 may be higher than the curing temperature of the conductor 140. In addition, it is preferable that the insulating resin 130 and the conductor 140 can be further combined with each other by selecting and combining materials in such a degree that the insulating resin 130 and the conductor 140 are melted or diffused only in the vicinity of the interface. Is.

この工程により、配線パターン120は基板100の上に凹部160の形状と同じ形状で硬化する。   By this step, the wiring pattern 120 is cured on the substrate 100 in the same shape as the shape of the recess 160.

そして、図2(f)に示すように、転写型を剥離することにより基板100の上に凹部とほぼ同じ形状で、均一な高さを有する配線パターン120が転写されるものである。   Then, as shown in FIG. 2 (f), the wiring pattern 120 having a uniform height is transferred onto the substrate 100 by peeling off the transfer mold.

(実施の形態2)
図3(a)は、本発明の実施の形態2に係る配線基板の平面図であり、図3(b)は、図3(a)のA−A線断面図である。
(Embodiment 2)
FIG. 3A is a plan view of a wiring board according to Embodiment 2 of the present invention, and FIG. 3B is a cross-sectional view taken along line AA in FIG.

本発明の実施の形態2の配線基板と実施の形態1の配線基板とは、導電体の所定の位置に突起電極を設けた点で異なるものである。   The wiring board according to the second embodiment of the present invention is different from the wiring board according to the first embodiment in that a protruding electrode is provided at a predetermined position of the conductor.

つまり、図3(a)において、配線基板は、例えば樹脂基板などの基板100の上に配線パターン220が形成され、配線パターン220の所定の位置に突起電極210を有している。また、配線パターン220は、図3(b)に示すように、基板100側に絶縁性樹脂230とその上に積層された導電体240とで構成されるとともに、導電体240の上に突起電極210が形成されているものである。そして、突起電極210は導電体240と同じ材料で作製されている。ここで、突起電極210を設ける所定の位置とは、例えば、半導体チップなどの電子部品の端子電極と接続する位置やチップ部品などが実装される電極の位置を意味している。   That is, in FIG. 3A, the wiring substrate has a wiring pattern 220 formed on a substrate 100 such as a resin substrate, and has a protruding electrode 210 at a predetermined position of the wiring pattern 220. Further, as shown in FIG. 3B, the wiring pattern 220 includes an insulating resin 230 on the substrate 100 side and a conductor 240 laminated thereon, and a protruding electrode on the conductor 240. 210 is formed. The protruding electrode 210 is made of the same material as the conductor 240. Here, the predetermined position where the protruding electrode 210 is provided means, for example, a position where the bump electrode 210 is connected to a terminal electrode of an electronic component such as a semiconductor chip, or a position where the chip component is mounted.

この構成により、配線パターン220と一体に突起電極210が形成できるため、生産性に優れた配線基板を実現できる。   With this configuration, since the protruding electrode 210 can be formed integrally with the wiring pattern 220, a wiring board with excellent productivity can be realized.

また、以下の製造方法で示すように、突起電極210を有する配線パターン220が、凹部160を有する転写型150により微細なピッチで形成できる。さらに、高いアスペクト比での形成が容易で、均一な高さで形成することもできる。   Further, as shown in the following manufacturing method, the wiring pattern 220 having the protruding electrodes 210 can be formed with a fine pitch by the transfer mold 150 having the concave portions 160. Further, it can be easily formed with a high aspect ratio and can be formed with a uniform height.

なお、基板100、絶縁性樹脂230や導電体240は、実施の形態1で記載したものを同様に用いることができる。   Note that as the substrate 100, the insulating resin 230, and the conductor 240, those described in Embodiment Mode 1 can be similarly used.

ここで、例えば電子部品の端子電極と突起電極210を溶融させて接続する場合には、導電樹脂からなる導電体240の硬化温度が、絶縁性樹脂230の硬化温度より高いことが好ましい。なぜなら、導電体240の硬化温度より絶縁性樹脂230の硬化温度が高い場合、配線パターン220を基板100に転写する際に既に導電体240が硬化してしまうためである。また、転写する際の硬化温度を導電体240の硬化温度以下で行う場合、突起電極210を介して電子部品の端子電極と接続するときに突起電極210下の絶縁性樹脂230が変形し、隣接する突起電極210間で短絡する可能性があるためである。   Here, for example, when the terminal electrode of the electronic component and the protruding electrode 210 are melted and connected, the curing temperature of the conductor 240 made of a conductive resin is preferably higher than the curing temperature of the insulating resin 230. This is because, when the curing temperature of the insulating resin 230 is higher than the curing temperature of the conductor 240, the conductor 240 is already cured when the wiring pattern 220 is transferred to the substrate 100. In addition, when the curing temperature at the time of transfer is lower than the curing temperature of the conductor 240, the insulating resin 230 under the bump electrode 210 is deformed when connected to the terminal electrode of the electronic component via the bump electrode 210, and adjacent to it. This is because there is a possibility of short-circuiting between the protruding electrodes 210 to be performed.

また、導電体240をはんだで形成する場合、導電体240であるはんだの融点が、絶縁性樹脂230の硬化温度より高いことが好ましい。なぜなら、基板100に転写する際に、導電体240の融点が絶縁性樹脂230の硬化温度より低いと、絶縁性樹脂230が硬化するときに導電体240は既に溶融しているため、絶縁性樹脂230と導電体240が混合してしまうので、所望の抵抗を有する配線パターン220を形成できないからである。しかし、混合しない場合にはこの限りではない。   When the conductor 240 is formed of solder, it is preferable that the melting point of the solder that is the conductor 240 is higher than the curing temperature of the insulating resin 230. This is because if the melting point of the conductor 240 is lower than the curing temperature of the insulating resin 230 when transferring to the substrate 100, the conductor 240 is already melted when the insulating resin 230 is cured. This is because the wiring pattern 220 having a desired resistance cannot be formed because 230 and the conductor 240 are mixed. However, this does not apply when not mixed.

上記で説明したように、絶縁性樹脂230の接着力により基板100および導電体240との付着力を大幅に向上した配線パターン220を形成できる。そのため、基板100に熱応力や外部からの衝撃や反りなどの変形が加わっても配線パターン220が基板100から剥離することがないので可撓性に優れ、信頼性の高い配線基板を実現できる。また、導電体240の所定の位置に突起電極210を一括して形成することにより、他の電子部品などとの接続が容易にできるとともに生産性に優れた配線基板を実現できる。   As described above, the wiring pattern 220 can be formed in which the adhesion between the substrate 100 and the conductor 240 is greatly improved by the adhesive strength of the insulating resin 230. Therefore, the wiring pattern 220 does not peel from the substrate 100 even when deformation such as thermal stress, external impact, or warp is applied to the substrate 100, so that a highly flexible and highly reliable wiring substrate can be realized. Further, by forming the bump electrodes 210 at a predetermined position of the conductor 240, it is possible to easily connect to other electronic components and realize a wiring board with excellent productivity.

以下に、図4を用いて、本発明の実施の形態2に係る配線基板の製造方法について説明する。   Below, the manufacturing method of the wiring board which concerns on Embodiment 2 of this invention is demonstrated using FIG.

図4は、本発明の実施の形態2に係る配線基板の製造方法を説明する工程断面図である。   FIG. 4 is a process cross-sectional view illustrating a method for manufacturing a wiring board according to Embodiment 2 of the present invention.

まず、図4(a)に示すように、配線パターンを形成する位置に対応した凹部250と凹部250の少なくとも内底面の所定の位置に突起電極に対応した有底孔260が形成された転写型150を用意する。そして、転写型150は、例えば熱硬化性シリコーン樹脂などからなる、低弾性率で高い離型性を有する転写型樹脂が用いられる。ここで、転写型150に形成される配線パターンに対応する凹部250は、例えば幅30μm〜300μmで厚み20μm〜300μm程度であり、突起電極に対応する有底孔260は、例えば、直径30μm〜300μmで高さ40μm〜300μm程度である。   First, as shown in FIG. 4A, a transfer mold having a recess 250 corresponding to a position where a wiring pattern is formed and a bottomed hole 260 corresponding to a protruding electrode at a predetermined position on at least the inner bottom surface of the recess 250. 150 is prepared. The transfer mold 150 is made of, for example, a transfer mold resin made of a thermosetting silicone resin or the like and having a low elastic modulus and high releasability. Here, the recess 250 corresponding to the wiring pattern formed in the transfer mold 150 has a width of 30 μm to 300 μm and a thickness of about 20 μm to 300 μm, for example, and the bottomed hole 260 corresponding to the protruding electrode has a diameter of 30 μm to 300 μm, for example. The height is about 40 μm to 300 μm.

そして、上記形状の配線パターンと突起電極が凸形状に形成された金型を転写型樹脂にインプリント法や凹版印刷することにより、凹部250と有底孔260が形成される。例えば、金型に熱硬化性シリコーン樹脂などの転写型樹脂を流し込み、温度150℃、0.5時間の条件で硬化することにより形成することができる。なお、転写型150の少なくとも凹部250および有底孔260に、さらに離型性を高めるために、例えばフッ素系離型剤などを塗布してもよい。   Then, a recess 250 and a bottomed hole 260 are formed by imprinting or intaglio printing a transfer mold resin with a mold having the above-described wiring pattern and protruding electrodes formed in a convex shape. For example, it can be formed by pouring a transfer type resin such as a thermosetting silicone resin into a mold and curing it at a temperature of 150 ° C. for 0.5 hours. In order to further improve the releasability, at least the recess 250 and the bottomed hole 260 of the transfer mold 150 may be coated with, for example, a fluorine-based mold release agent.

つぎに、図4(b)に示すように、転写型150の凹部250内において、有底孔260は完全に充填するとともに、少なくとも凹部表面180までは到達せずに空間190が形成される程度に、ペースト状の、例えば銀を主体とした導電性樹脂やはんだなどからなる導電体240を充填する。この場合、凹部250内に充填される導電体240の量は、例えばスクリーン印刷のマスクのメッシュ径やスキージ170の速度などにより調整することができる。また、転写型150の凹部表面180まで充填した後、自然乾燥または硬化温度以下の温度で乾燥させることにより導電体240を収縮させて空間190を形成してもよい。さらに、導電体240との付着力の小さい材料(例えば、フッ素樹脂など)からなるローラーなどを用いて、導電体240を凹部250に押し込んで空間190を形成してもよい。   Next, as shown in FIG. 4B, the bottomed hole 260 is completely filled in the recess 250 of the transfer mold 150 and at least the space 190 is formed without reaching the recess surface 180. In addition, a conductive material 240 made of, for example, a conductive resin mainly composed of silver or solder is filled. In this case, the amount of the conductor 240 filled in the recess 250 can be adjusted by, for example, the mesh diameter of the screen printing mask or the speed of the squeegee 170. Alternatively, the space 190 may be formed by filling the concave surface 180 of the transfer mold 150 and then shrinking the conductor 240 by drying at a temperature not higher than the natural drying or curing temperature. Further, the space 190 may be formed by pressing the conductor 240 into the recess 250 using a roller made of a material having a low adhesive force to the conductor 240 (for example, a fluororesin).

つぎに、図4(c)に示すように、凹部250に形成された空間に、導電体240と同様な方法を用いて、例えばエポキシ樹脂などからなる絶縁性樹脂230を充填する。   Next, as shown in FIG. 4C, the insulating resin 230 made of, for example, an epoxy resin is filled into the space formed in the recess 250 using the same method as that for the conductor 240.

つぎに、図4(d)に示すように、絶縁性樹脂230と導電体240で充填された転写型150の凹部と基板100とを位置合わせする。   Next, as shown in FIG. 4D, the concave portion of the transfer mold 150 filled with the insulating resin 230 and the conductor 240 and the substrate 100 are aligned.

つぎに、図4(e)に示すように、基板100と転写型150の凹部とを位置合わせし密着させた状態で、絶縁性樹脂230の硬化温度および導電体240の硬化温度または融点以上の温度で加熱することにより、配線パターン220を硬化させる。例えば、エポキシ樹脂を含む硬化温度130℃の絶縁性樹脂230と硬化温度140℃の導電体240の場合には、硬化温度150℃、硬化時間60分程度である。また、例えば、硬化温度150℃のエポキシ樹脂を含む絶縁性樹脂230と融点220℃のはんだからなる導電体240場合には、硬化温度230℃、硬化時間10分程度である。   Next, as shown in FIG. 4E, in a state where the substrate 100 and the concave portion of the transfer mold 150 are aligned and in close contact with each other, the curing temperature of the insulating resin 230 and the curing temperature or melting point of the conductor 240 are equal to or higher. The wiring pattern 220 is cured by heating at a temperature. For example, in the case of an insulating resin 230 containing an epoxy resin having a curing temperature of 130 ° C. and a conductor 240 having a curing temperature of 140 ° C., the curing temperature is 150 ° C. and the curing time is about 60 minutes. Further, for example, in the case of the conductor 240 made of the insulating resin 230 containing an epoxy resin having a curing temperature of 150 ° C. and solder having a melting point of 220 ° C., the curing temperature is 230 ° C. and the curing time is about 10 minutes.

なお、上記硬化条件は、配線パターン220の導電体240の上に形成された突起電極210と電子部品の端子電極とを、例えば超音波接合、圧接、圧着や接着などで接続する場合を想定したものである。   In addition, the said hardening conditions assumed the case where the projection electrode 210 formed on the conductor 240 of the wiring pattern 220 and the terminal electrode of an electronic component are connected by, for example, ultrasonic bonding, pressure welding, pressure bonding or adhesion. Is.

一方、電子部品の端子電極と突起電極210との接続を突起電極210との融着により行う場合において、絶縁性樹脂230と導電体240が熱硬化性樹脂を主体とする材料から構成されているときには、絶縁性樹脂230の硬化温度以上で、かつ導電体240を構成する熱硬化性樹脂の硬化温度以下で硬化させておく必要がある。そして、電子部品の端子電極と突起電極210を接続する際に、導電体240を構成する熱硬化性樹脂の硬化温度以上とすることにより、一旦導電体240を軟化させることにより電子部品の端子電極と接続できる。この場合、絶縁性樹脂230の硬化温度は、導電体240の硬化温度より低いので、絶縁性樹脂230は既に硬化しており軟化しないため配線パターン220の形状が変形することはない。   On the other hand, when the terminal electrode of the electronic component and the protruding electrode 210 are connected by fusion bonding with the protruding electrode 210, the insulating resin 230 and the conductor 240 are made of a material mainly composed of a thermosetting resin. In some cases, it is necessary to cure at a temperature equal to or higher than the curing temperature of the insulating resin 230 and equal to or lower than the curing temperature of the thermosetting resin constituting the conductor 240. Then, when the terminal electrode of the electronic component and the protruding electrode 210 are connected, the terminal electrode of the electronic component is temporarily softened by setting the temperature to be equal to or higher than the curing temperature of the thermosetting resin constituting the conductor 240. Can be connected. In this case, since the curing temperature of the insulating resin 230 is lower than the curing temperature of the conductor 240, the shape of the wiring pattern 220 is not deformed because the insulating resin 230 is already cured and does not soften.

また、絶縁性樹脂230が熱硬化性樹脂を主体とする材料からなり、導電体240が絶縁性樹脂230の硬化温度より高い融点を有するはんだで構成されているときには、一旦導電体240の融点以上の温度で導電体240を溶融した後、冷やして硬化させればよい。そして、電子部品の端子電極と突起電極210を接続する際に、導電体240の融点以上とすることにより、一旦導電体240が溶融し電子部品の端子電極と接続できるものである。つまり、絶縁性樹脂230の硬化温度は、導電体240であるはんだの融点より低いので、絶縁性樹脂230が軟化しない。そのため、配線パターン220の形状が変形することはない。ここで、導電体240の突起電極210の電子部品の端子電極と対向する表面近傍を融点以上にすることが好ましい。   In addition, when the insulating resin 230 is made of a material mainly composed of a thermosetting resin and the conductor 240 is composed of solder having a melting point higher than the curing temperature of the insulating resin 230, the melting point of the conductor 240 is temporarily exceeded. After the conductor 240 is melted at the temperature, it may be cooled and cured. Then, when the terminal electrode of the electronic component and the protruding electrode 210 are connected, by setting the melting point of the conductor 240 or higher, the conductor 240 is once melted and can be connected to the terminal electrode of the electronic component. That is, since the curing temperature of the insulating resin 230 is lower than the melting point of the solder which is the conductor 240, the insulating resin 230 does not soften. Therefore, the shape of the wiring pattern 220 is not deformed. Here, it is preferable that the vicinity of the surface of the protruding electrode 210 of the conductor 240 facing the terminal electrode of the electronic component is equal to or higher than the melting point.

この工程により、突起電極210を有する配線パターン220が、基板100の上に有底孔260を備えた凹部250の形状と同じ形状で硬化する。   By this step, the wiring pattern 220 having the protruding electrode 210 is cured in the same shape as the shape of the recess 250 provided with the bottomed hole 260 on the substrate 100.

そして、図4(f)に示すように、転写型を剥離することにより基板100の上に転写型とほぼ同じ形状で均一な高さの突起電極210を有する配線パターン220が転写されるものである。   Then, as shown in FIG. 4F, a wiring pattern 220 having protruding electrodes 210 having a uniform height and substantially the same shape as the transfer mold is transferred onto the substrate 100 by peeling the transfer mold. is there.

(実施の形態3)
図5(a)は、本発明の実施の形態3に係る電子部品実装体の平面図であり、図5(b)は、図5(a)のA−A線断面図、図5(c)は、図5(a)のB−B線断面図である。
(Embodiment 3)
FIG. 5A is a plan view of the electronic component mounting body according to Embodiment 3 of the present invention, and FIG. 5B is a cross-sectional view taken along the line AA in FIG. ) Is a cross-sectional view taken along the line BB in FIG.

図5において、実施の形態2の基板100の配線パターン220の上に形成された突起電極210と半導体チップなどの電子部品300の端子電極310とを接続して電子部品実装体を構成したものである。   In FIG. 5, an electronic component mounting body is configured by connecting the protruding electrodes 210 formed on the wiring pattern 220 of the substrate 100 of the second embodiment and the terminal electrodes 310 of an electronic component 300 such as a semiconductor chip. is there.

この構成により、電子部品300の端子電極310と接続する際に、端子電極310に突起電極を形成する必要がなくなるとともに、配線パターン220と突起電極210が転写型により一括で作製されるので、生産性よく電子部品実装体を作製できる。   With this configuration, when connecting to the terminal electrode 310 of the electronic component 300, it is not necessary to form a protruding electrode on the terminal electrode 310, and the wiring pattern 220 and the protruding electrode 210 are collectively produced by the transfer mold, so that production is possible. An electronic component mounting body can be manufactured with good performance.

また、実施の形態2でも説明したように、電子部品300の端子電極310に突起電極210が融着した状態でも接続できるため、確実な接続ができるものである。さらに、突起電極210が、例えばはんだの場合、はんだが再熔融したときに電子部品300の端子電極310との高いぬれ性により、接続距離を一定に保てば、図5(b)または図5(c)に示すように、突起電極210の中央部が小さくなった、いわゆる鼓形状の突起電極210で接続することが可能となる。その結果、太鼓形状になりやすい従来のはんだバンプに比べて、端子電極310と突起電極210との界面での応力集中がなくなるため、電極などの剥離を生じにくい信頼性の高い接続を実現できる。この場合、突起電極210の端子電極310との接続面の面積を端子電極310の面積より小さくすれば、さらに効果的である。   Further, as described in the second embodiment, since the connection can be made even when the protruding electrode 210 is fused to the terminal electrode 310 of the electronic component 300, a reliable connection can be achieved. Further, in the case where the protruding electrode 210 is, for example, solder, when the connection distance is kept constant due to high wettability with the terminal electrode 310 of the electronic component 300 when the solder is re-melted, FIG. As shown in (c), it is possible to connect with a so-called drum-shaped protruding electrode 210 in which the central portion of the protruding electrode 210 is reduced. As a result, stress concentration at the interface between the terminal electrode 310 and the protruding electrode 210 is eliminated as compared with a conventional solder bump that tends to have a drum shape, and a highly reliable connection that hardly causes peeling of the electrode or the like can be realized. In this case, it is more effective if the area of the connection surface between the protruding electrode 210 and the terminal electrode 310 is smaller than the area of the terminal electrode 310.

(実施の形態4)
図6(a)は、本発明の実施の形態4に係る配線基板の平面図であり、図6(b)は、図6(a)のA−A線断面図、図6(c)は、図6(a)のB−B線断面図である。
(Embodiment 4)
6A is a plan view of a wiring board according to Embodiment 4 of the present invention, FIG. 6B is a cross-sectional view taken along the line AA in FIG. 6A, and FIG. FIG. 7 is a cross-sectional view taken along line BB in FIG.

実施の形態4の配線基板と実施の形態1の配線基板とは、配線パターンを立体的に積層して形成されている点で異なるものである。   The wiring board of the fourth embodiment is different from the wiring board of the first embodiment in that wiring patterns are three-dimensionally stacked.

図6(a)に示すように、配線基板は、基板100の上に第1の配線パターン420と、第1の配線パターン420と図6(b)に示すように立体的に交差する第2の配線パターン520を有する。そして、第1の配線パターン420は、第1の絶縁性樹脂430と第1の導電体440との積層構造で形成されている。同様に、第2の配線パターン520は、第2の絶縁性樹脂530と第2の導電体540との積層構造で形成されている。   As shown in FIG. 6A, the wiring board includes a first wiring pattern 420 on the substrate 100, and a second wiring that intersects the first wiring pattern 420 three-dimensionally as shown in FIG. 6B. The wiring pattern 520 is provided. The first wiring pattern 420 is formed by a laminated structure of the first insulating resin 430 and the first conductor 440. Similarly, the second wiring pattern 520 is formed by a laminated structure of the second insulating resin 530 and the second conductor 540.

この構成により、従来の多層配線基板のように、ビアホールなどを介して立体配線する必要がなく、配線パターンの交差部以外は、同一面に配線することができる。そして、立体的な配線パターンで接続する必要のある電子部品などを平面的に実装することができる。   With this configuration, there is no need for three-dimensional wiring via via holes or the like as in a conventional multilayer wiring board, and wiring can be performed on the same surface except for the intersection of wiring patterns. Then, electronic components that need to be connected with a three-dimensional wiring pattern can be mounted in a planar manner.

また、第2の配線パターン520の第2の絶縁性樹脂530を第1の配線パターン420の第1の導電体440との層間絶縁層として用いることができるため、付着力の強い立体配線を実現できる。その結果、可撓性を有する基板においても、各配線パターンの基板100からの剥離や断線などが生じにくい信頼性に優れた配線基板を実現できる。   In addition, since the second insulating resin 530 of the second wiring pattern 520 can be used as an interlayer insulating layer with the first conductor 440 of the first wiring pattern 420, a three-dimensional wiring with strong adhesion is realized. it can. As a result, even with a flexible substrate, it is possible to realize a highly reliable wiring substrate in which each wiring pattern is hardly peeled off from the substrate 100 or disconnected.

以下に、図7を用いて、本発明の実施の形態4に係る配線基板の製造方法について説明する。   Below, the manufacturing method of the wiring board based on Embodiment 4 of this invention is demonstrated using FIG.

図7は、本発明の実施の形態4に係る配線基板の製造方法を説明する工程断面図である。   FIG. 7 is a process cross-sectional view illustrating a method for manufacturing a wiring board according to Embodiment 4 of the present invention.

まず、図7(a)に示すように、実施の形態1と同様の製造方法で作製された基板100上に第1の配線パターン420を有する配線基板を用意する。   First, as shown in FIG. 7A, a wiring board having a first wiring pattern 420 is prepared on a substrate 100 manufactured by the same manufacturing method as in the first embodiment.

つぎに、図7(b)に示すように、第2の配線パターンに対応する位置に凹部160が形成された転写型150の凹部160内で、少なくとも凹部表面180までは到達せずに空間190が形成される程度に、ペースト状の、例えば銀を主体とした導電性樹脂やはんだなどからなる第2の導電体540を、例えばスクリーン印刷などのスキージ170を用いて充填する。ここで、転写型150は、例えば、熱硬化性シリコーン樹脂などからなる低弾性率で高い離型性を有する転写型樹脂が用いられる。なお、凹部160の空間190は、実施の形態1と同様の方法で形成される。   Next, as shown in FIG. 7B, in the recess 160 of the transfer mold 150 in which the recess 160 is formed at a position corresponding to the second wiring pattern, at least the recess surface 180 is not reached and the space 190 is reached. Is filled with a paste-like second conductor 540 made of, for example, a conductive resin mainly composed of silver or solder using a squeegee 170 such as screen printing. Here, as the transfer mold 150, for example, a transfer resin having a low elastic modulus and high releasability made of a thermosetting silicone resin or the like is used. The space 190 of the recess 160 is formed by the same method as in the first embodiment.

つぎに、図7(c)に示すように、凹部160に形成された空間190に、第2の導電体540と同様な方法を用いて、例えば、エポキシ樹脂などからなる第2の絶縁性樹脂530を充填する。   Next, as shown in FIG. 7C, a second insulating resin made of, for example, an epoxy resin is used in the space 190 formed in the concave portion 160 by using a method similar to that of the second conductor 540. Fill 530.

つぎに、図7(d)に示すように、第2の絶縁性樹脂530と第2の導電体540で充填された転写型150の凹部160と第1の配線パターン420が形成された配線基板とを位置合わせする。なお、同図に示す転写型150の方向は、第1の配線パターン420との関係を明確にするために、図7(c)に示す凹部160の長手方向における断面で示している。   Next, as shown in FIG. 7D, the wiring board on which the recess 160 of the transfer mold 150 and the first wiring pattern 420 filled with the second insulating resin 530 and the second conductor 540 are formed. And align. Note that the direction of the transfer mold 150 shown in the figure is shown by a cross section in the longitudinal direction of the recess 160 shown in FIG. 7C in order to clarify the relationship with the first wiring pattern 420.

つぎに、図7(e)に示すように、転写型150を第1の配線パターン420の形状に沿って変形させる。その状態で、第2の絶縁性樹脂530および第2の導電体540の硬化温度以上の温度で加熱することにより、第2の配線パターン520を硬化させる。例えば、第2の絶縁性樹脂530および第2の導電体540がエポキシ樹脂を主体とした熱硬化性樹脂含む場合には、硬化温度150℃、硬化時間60分程度である。   Next, as shown in FIG. 7E, the transfer mold 150 is deformed along the shape of the first wiring pattern 420. In this state, the second wiring pattern 520 is cured by heating at a temperature equal to or higher than the curing temperature of the second insulating resin 530 and the second conductor 540. For example, when the second insulating resin 530 and the second conductor 540 include a thermosetting resin mainly composed of an epoxy resin, the curing temperature is 150 ° C. and the curing time is about 60 minutes.

この工程により、第2の配線パターン520は、第1の配線パターン420の上では立体的に配線された状態で基板100の上に凹部160の形状と同じ形状で硬化する。   By this step, the second wiring pattern 520 is cured on the substrate 100 in the same shape as the concave portion 160 while being three-dimensionally wired on the first wiring pattern 420.

そして、図7(f)に示すように、転写型を剥離することにより基板100の上に第1の配線パターン420の一部では立体的に配線された第2の配線パターン520が転写されるものである。   Then, as shown in FIG. 7F, the second wiring pattern 520 that is three-dimensionally wired in a part of the first wiring pattern 420 is transferred onto the substrate 100 by peeling the transfer mold. Is.

なお、本発明の実施の形態4の配線基板では、第1の配線パターン420の間隔を、第2の配線パターン520を形成する転写型150が充分に第1の配線パターン420の断面に沿って変形できる程度とする必要がある。この場合でも、第2の配線パターン520は、転写可能な範囲で微細なピッチを形成することができることはいうまでもない。   In the wiring board according to the fourth embodiment of the present invention, the distance between the first wiring patterns 420 is set so that the transfer mold 150 for forming the second wiring pattern 520 is sufficiently along the cross section of the first wiring pattern 420. It must be able to be deformed. Even in this case, needless to say, the second wiring pattern 520 can form a fine pitch within a transferable range.

また、本発明の実施の形態4の配線基板の変形例として、実施の形態2で述べたのと同様に第1の配線パターンの第1の導電体または第2の配線パターンの第2の導電体に突起電極を形成することもできる。   Further, as a modification of the wiring board according to the fourth embodiment of the present invention, as described in the second embodiment, the first conductor of the first wiring pattern or the second conductor of the second wiring pattern is used. A protruding electrode can also be formed on the body.

これにより、立体配線を有する配線基板の突起電極を介して半導体チップなどの電子部品を容易に実装することができる配線基板が実現される。さらに、この配線基板を用いて、実施の形態3と同様に、電子部品を実装した電子部品実装体も実現できる。   As a result, a wiring board on which electronic components such as a semiconductor chip can be easily mounted via the protruding electrodes of the wiring board having a three-dimensional wiring is realized. Furthermore, an electronic component mounting body on which electronic components are mounted can be realized using this wiring board, as in the third embodiment.

なお、本発明の各実施の形態では、突起電極の断面形状が台形で円錐形状を例に説明したが、これに限られない。例えば、図8(a)に示すように断面形状が長方形でも、図8(b)に示すように断面形状が三角形でもよく、転写型の凹部から剥離できる形状であれば特に限定されず、同様の効果を有するものである。さらに、平面形状においても同様に、特に円形である必要はなく、転写型の凹部から剥離できる形状であれば特に限定されない。   In each embodiment of the present invention, the protruding electrode has a trapezoidal cross-sectional shape and a conical shape has been described as an example. However, the present invention is not limited to this. For example, the cross-sectional shape may be rectangular as shown in FIG. 8 (a), or the cross-sectional shape may be triangular as shown in FIG. 8 (b). It has the effect of. Further, similarly, the planar shape does not need to be particularly circular, and is not particularly limited as long as it is a shape that can be peeled from the concave portion of the transfer mold.

本発明の配線基板は、可撓性を有する基板上に付着力に優れ、微細な配線パターンを形成できるため、高密度で微細なピッチを有する大規模集積化回路や撮像素子などの実装される電子機器分野において有用である。   Since the wiring board of the present invention has excellent adhesion and can form a fine wiring pattern on a flexible substrate, it is mounted on a large-scale integrated circuit or an imaging device having a high density and a fine pitch. Useful in the field of electronic equipment.

(a)本発明の実施の形態1に係る配線基板の平面図(b)図1(a)のA−A線断面図(A) Plan view of the wiring board according to the first embodiment of the present invention (b) AA line sectional view of FIG. 本発明の実施の形態1に係る配線基板の製造方法を説明する工程断面図Process sectional drawing explaining the manufacturing method of the wiring board which concerns on Embodiment 1 of this invention (a)本発明の実施の形態2に係る配線基板の平面図(b)図3(a)のA−A線断面図(A) Plan view of a wiring board according to the second embodiment of the present invention (b) AA line sectional view of FIG. 3 (a) 本発明の実施の形態2に係る配線基板の製造方法を説明する工程断面図Process sectional drawing explaining the manufacturing method of the wiring board which concerns on Embodiment 2 of this invention (a)本発明の実施の形態3に係る電子部品実装体の平面図(b)図5(a)のA−A線断面図(c)図5(a)のB−B線断面図(A) Plan view of electronic component mounting body according to Embodiment 3 of the present invention (b) AA line sectional view of FIG. 5 (a) (c) BB line sectional view of FIG. 5 (a) (a)本発明の実施の形態4に係る配線基板の平面図(b)図6(a)のA−A線断面図(c)図6(a)のB−B線断面図(A) Plan view of a wiring board according to Embodiment 4 of the present invention (b) AA line sectional view of FIG. 6 (a) (c) BB line sectional view of FIG. 6 (a) 本発明の実施の形態4に係る配線基板の製造方法を説明する工程断面図Process sectional drawing explaining the manufacturing method of the wiring board which concerns on Embodiment 4 of this invention 本発明の実施の形態における突起電極の変形例を示す断面図Sectional drawing which shows the modification of the protruding electrode in embodiment of this invention

符号の説明Explanation of symbols

100 基板
120,220 配線パターン
130,230 絶縁性樹脂
140,240 導電体
150 転写型
160,250 凹部
170 スキージ
180 凹部表面
190 空間
210 突起電極
260 有底孔
300 電子部品
310 端子電極
420 第1の配線パターン
430 第1の絶縁性樹脂
440 第1の導電体
520 第2の配線パターン
530 第2の絶縁性樹脂
540 第2の導電体
DESCRIPTION OF SYMBOLS 100 Substrate 120,220 Wiring pattern 130,230 Insulating resin 140,240 Conductor 150 Transfer mold 160,250 Concave 170 Squeegee 180 Concave surface 190 Space 210 Protruding electrode 260 Bottomed hole 300 Electronic component 310 Terminal electrode 420 First wiring Pattern 430 First insulating resin 440 First conductor 520 Second wiring pattern 530 Second insulating resin 540 Second conductor

Claims (1)

第1凹部と前記第1凹部の底部に第2凹部を備える熱硬化性シリコン転写型の高さを超えないように前記第1凹部および前記第2凹部に導電体ペーストを充填する工程と、
前記導電体ペーストの硬化温度または融点よりも低い硬化温度を有する絶縁性樹脂を前記第1凹部の高さまで前記導電体上に充填する工程と、
前記転写型の絶縁性樹脂側を基板上に載置し加熱し前記導電体ペーストと前記絶縁性樹脂とを混合または溶融する工程と、
前記転写型を前記基板から剥離し前記第1凹部に対応する導電性パターンを前記絶縁性樹脂を介して前記フレキシブル基板上に形成する工程とを含むことを特徴とする配線基板の製造方法。
Filling the first recess and the second recess with a conductive paste so as not to exceed the height of the first recess and the thermosetting silicon transfer mold provided with the second recess at the bottom of the first recess;
Filling the conductor with an insulating resin having a curing temperature lower than the curing temperature or melting point of the conductor paste to the height of the first recess;
Placing the insulating resin side of the transfer mold on a substrate and heating to mix or melt the conductor paste and the insulating resin ;
And a step of peeling the transfer mold from the substrate and forming a conductive pattern corresponding to the first recess on the flexible substrate through the insulating resin.
JP2005117892A 2005-04-15 2005-04-15 Wiring board manufacturing method Expired - Fee Related JP4617978B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2005117892A JP4617978B2 (en) 2005-04-15 2005-04-15 Wiring board manufacturing method
US11/883,801 US8033016B2 (en) 2005-04-15 2006-04-14 Method for manufacturing an electrode and electrode component mounted body
CN2006800117409A CN101156238B (en) 2005-04-15 2006-04-14 Methods for manufacturing protruding electrode for connecting electronic component and electronic component mounted body
PCT/JP2006/307916 WO2006112384A1 (en) 2005-04-15 2006-04-14 Protruding electrode for connecting electronic component, electronic component mounted body using such electrode and methods for manufacturing such electrode and electronic component mounted body

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005117892A JP4617978B2 (en) 2005-04-15 2005-04-15 Wiring board manufacturing method

Publications (2)

Publication Number Publication Date
JP2006302930A JP2006302930A (en) 2006-11-02
JP4617978B2 true JP4617978B2 (en) 2011-01-26

Family

ID=37470925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005117892A Expired - Fee Related JP4617978B2 (en) 2005-04-15 2005-04-15 Wiring board manufacturing method

Country Status (1)

Country Link
JP (1) JP4617978B2 (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5076520B2 (en) * 2007-01-31 2012-11-21 ブラザー工業株式会社 Wiring connection method for recording apparatus
JP2010010461A (en) * 2008-06-27 2010-01-14 Dainippon Printing Co Ltd Composite filter for display device
KR101388972B1 (en) * 2009-03-31 2014-04-25 주식회사 잉크테크 process for preparation of laminated metal film
JP2014106974A (en) * 2012-11-22 2014-06-09 Lg Innotek Co Ltd Touch window
JP2015153921A (en) * 2014-02-17 2015-08-24 三菱瓦斯化学株式会社 Wiring circuit board and method for manufacturing the same
JP6533382B2 (en) * 2014-11-13 2019-06-19 株式会社フジクラ Wiring board and method of manufacturing the same
JP6509529B2 (en) * 2014-11-13 2019-05-08 株式会社フジクラ Wiring board and method of manufacturing the same
WO2016104723A1 (en) * 2014-12-26 2016-06-30 株式会社フジクラ Wiring body, wiring board, touch sensor and method for producing wiring body
EP3264234A4 (en) * 2015-02-27 2018-08-08 Fujikura Ltd. Wiring body, wiring substrate, and touch sensor
EP3264235A4 (en) * 2015-02-27 2018-11-07 Fujikura Ltd. Wiring body, wiring substrate, touch sensor, and method for producing wiring body
JP6435406B2 (en) * 2015-05-20 2018-12-05 株式会社フジクラ Structure with conductor layer and touch panel
CN107533404A (en) * 2015-06-22 2018-01-02 株式会社藤仓 Wiring body, circuit board and touch sensor
JP6317038B2 (en) * 2015-06-22 2018-04-25 株式会社フジクラ Wiring body, wiring board, and touch sensor
JP6549964B2 (en) * 2015-10-16 2019-07-24 株式会社フジクラ Wiring body, wiring substrate, touch sensor, and method of manufacturing wiring body
TWI666659B (en) * 2015-10-19 2019-07-21 日商藤倉股份有限公司 Wiring body, wiring board, contact sensor, and manufacturing method of wiring body
TWI652698B (en) * 2016-03-08 2019-03-01 日商藤倉股份有限公司 Lead body, lead substrate and touch sensor
JP2022067371A (en) * 2020-10-20 2022-05-06 コネクテックジャパン株式会社 Transfer mold and wiring formation method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10291293A (en) * 1997-02-21 1998-11-04 Ricoh Micro Electron Kk Method and apparatus for printing by intaglio, method and apparatus for forming bump or wiring pattern, bump electrode, printed circuit board, method for forming bump, and molding transferring method
JPH11121645A (en) * 1997-10-14 1999-04-30 Matsushita Electric Ind Co Ltd Ceramic multi-layer substrate and method for manufacturing it
JP2003258409A (en) * 2002-02-27 2003-09-12 Koa Corp Pattern forming object and pattern forming method
JP2004345134A (en) * 2003-05-20 2004-12-09 Sumitomo Rubber Ind Ltd Method for intaglio offset printing

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10291293A (en) * 1997-02-21 1998-11-04 Ricoh Micro Electron Kk Method and apparatus for printing by intaglio, method and apparatus for forming bump or wiring pattern, bump electrode, printed circuit board, method for forming bump, and molding transferring method
JPH11121645A (en) * 1997-10-14 1999-04-30 Matsushita Electric Ind Co Ltd Ceramic multi-layer substrate and method for manufacturing it
JP2003258409A (en) * 2002-02-27 2003-09-12 Koa Corp Pattern forming object and pattern forming method
JP2004345134A (en) * 2003-05-20 2004-12-09 Sumitomo Rubber Ind Ltd Method for intaglio offset printing

Also Published As

Publication number Publication date
JP2006302930A (en) 2006-11-02

Similar Documents

Publication Publication Date Title
JP4617978B2 (en) Wiring board manufacturing method
US8033016B2 (en) Method for manufacturing an electrode and electrode component mounted body
JP5138277B2 (en) Wiring board and manufacturing method thereof
JP4729963B2 (en) PROJECT ELECTRODE FOR CONNECTING ELECTRONIC COMPONENT, ELECTRONIC COMPONENT MOUNTING BODY USING SAME, AND METHOD FOR PRODUCING THEM
KR100377088B1 (en) Module with built-in circuit parts and manufacturing method thereof
US6132543A (en) Method of manufacturing a packaging substrate
US8120166B2 (en) Semiconductor package and method of manufacturing the same, and semiconductor device and method of manufacturing the same
US20080121416A1 (en) Multilayer Printed Wiring Board And Manufacturing Method For Same
WO2013027718A1 (en) Component-mounting printed circuit board and manufacturing method for same
WO2009104506A1 (en) Printed wiring board, electronic device and method for manufacturing electronic device
JPWO2008047918A1 (en) Electronic device package structure and package manufacturing method
JP2008112995A (en) Circuit board, and manufacturing method thereof
US20140290059A1 (en) Anisotropic conductive film and method of making conductive connection
US20120111616A1 (en) Electronic-component-mounted wiring substrate and method of manufacturing the same
JP2012164965A (en) Wiring board and manufacturing method of the same
JP4227482B2 (en) Manufacturing method of module with built-in components
JP4051570B2 (en) Manufacturing method of semiconductor device
JP2007059588A (en) Method of manufacturing wiring board, and wiring board
JP2004363566A (en) Electronic-component mounting body and method of manufacturing the same
JP2004071946A (en) Wiring substrate, substrate for semiconductor package, semiconductor package, and their manufacturing method
JP5587804B2 (en) Manufacturing method of wiring board for mounting electronic component, wiring board for mounting electronic component, and manufacturing method of wiring board with electronic component
JP2012169486A (en) Base material, wiring board, production method of base material and production method of wiring board
WO2021117898A1 (en) Method for manufacturing electronic component
JP2006319255A (en) Process for manufacturing multilayer wiring board
JP2006319254A (en) Process for manufacturing multilayer wiring board

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070417

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20070514

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20091126

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100216

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100419

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100615

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100806

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100928

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20101011

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131105

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131105

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees