JP2000232179A - Substrate for pga electronic component, its manufacture and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for a PGA type electronic component capable of contributing to an improvement in adhesive strength of a pad with a resin of its lower layer and hence connecting reliability, by enhancing a mounting strength of a pin at the pad, a method for manufacturing it and a semiconductor device. SOLUTION: In the substrate for a PGA electronic component comprising a plurality of pads 30a formed on an insulating film of a plastic board, and a plurality of pins 33 of a nail head type head fixed to the respective pads through a solder 32, a surface of an insulating layer 28 of a region for forming at least the pads is formed to be a protrusion and recess pattern, an opening diameter of the recess is formed in an inverted tapered shape enlarging toward an inside of the insulating film, and the pads 30a and the solder 32 are hardly peeled off from the recess.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to PGA (Pin)
More particularly, the present invention relates to a PGA type wiring board in which a large number of pins serving as external connection terminals of a plastic substrate such as a build-up substrate are erected on a surface of the substrate. The present invention relates to a technique for increasing the mounting strength of a pin.

[0002]

2. Description of the Related Art PGA-type electronic component substrates are widely used because the spacing between input / output terminals of a semiconductor chip, in which the spacing between adjacent input / output terminals is extremely small, can be widened and taken out. This substrate is roughly classified into a ceramic type substrate made of a ceramic such as alumina and a plastic type substrate obtained by laminating a glass-epoxy resin composite plate or the like.

[0003] Among these, a plastic type PGA type electronic component substrate is formed by forming an insulating layer or wiring on a core substrate such as a glass-epoxy substrate, using a resin such as an epoxy resin, copper plating, or copper foil. There is a build-up multilayer substrate having a multilayer wiring structure. By the way, since the plastic type has low heat resistance of the substrate, it is difficult to perform brazing at a high temperature like the ceramic type.
A relatively low melting point solder joint is used.

That is, the conventional plastic type PG
In the case of the A-type electronic component substrate, the pins are mounted by soldering with the head of the nail head standing on the pad of the substrate. FIG. 13 shows a conventional plastic type P
It is a figure explaining the case where a pin is attached to a pad of a build-up multilayer board which is a board for GA type electronic parts.

[0005] For convenience of explanation, FIG. 13 shows only the vicinity of the pads of the build-up multilayer substrate. FIG.
2A, reference numeral 2 denotes a lower wiring formed between the insulating layer 1 and the insulating layer 3, and reference numeral 4 denotes an uppermost wiring connected to the lower wiring 2 via a via hole 5 formed in the insulating layer 3. It is. The wiring 4 forms a pad 4 a at the opening 7 of the solder resist film 6.

Reference numeral 8 denotes a low melting point solder, which is supplied to the pad wiring 4 through the opening 7. 9 is a pin having a nail head type head. FIG. 13 (b)
As shown in the figure, after the head of the pin 9 is erected and temporarily fixed,
By performing the heat treatment, the solder 8 is reflowed to fix the pins 9 to the pads.

[0007]

However, in the conventional plastic type PGA type electronic component substrate, pins are erected on the pads of the substrate by soldering, but the pads 4a (usually a copper foil) are not provided. Since the pad 4a and the resin are weakly adhered to each other because of being formed thinly on the resin of the lower layer, if a certain force is applied to the pin in the horizontal direction, for example, the pad remains attached to the pad 4a. There is a problem that can be taken.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has been made to improve the strength of attaching a pin to a pad, improve the adhesive strength between a pad and a resin under the pad, and thereby improve connection reliability. It is an object of the present invention to provide a method of manufacturing a PGA type electronic component substrate and a semiconductor device which can contribute.

[0009]

A PGA according to claim 1
As shown in FIG. 4, the invention of the electronic component substrate includes a plurality of conductive pads formed on an insulating layer of a plastic substrate, and a nail head type fixed to each of the pads via solder. In the PGA-type electronic component substrate having a plurality of pins on the head, at least the surface of the insulating layer 28 in the region where the pad is formed is formed with irregularities, so that irregularities are formed on the surface of the pad. The opening diameter of the concave portion is characterized in that it is formed in a reverse tapered shape that expands toward the inside of the insulating layer.

The shape and size of the irregularities can be changed as appropriate, and may be performed by roughening the surface of the insulating layer. According to the invention of the substrate for a PGA-type electronic component according to the second aspect, as shown in FIG. 9D, a plurality of conductive pads formed on an insulating layer of a plastic substrate, In a PGA type electronic component substrate having a plurality of pins of a nail head type head fixed via solder, at least a surface of the insulating layer in a region where the pad is formed is formed with irregularities, so that a surface of the pad is formed. And a protrusion protruding from the wall surface of the recess toward the inside of the recess is formed in the middle of the recess of the recess.

Incidentally, the form and size of the irregularities can be changed as appropriate, and may be carried out by roughening the surface. The invention of the PGA type electronic component substrate according to the third aspect is shown in FIG.
As shown in (c), the pad has a plurality of conductive pads formed on an insulating layer of a plastic substrate, and a plurality of pins of a nail head type head fixed to each of the pads via solder. In the PGA type electronic component substrate, at least the surface of the insulating layer in the region where the pad is formed is formed so as to have irregularities, whereby irregularities are formed on the surface of the pad. A conductive land wider than the opening area of the concave portion is formed so as to be connected to the pad, and the land is separated from each other.

According to a fourth aspect of the present invention, there is provided a substrate for a PGA-type electronic component.
In the plastic substrate of the A-type electronic component substrate, the pins are characterized in that irregularities are formed on an end face of a nail head type head thereof. P according to claim 5
In the invention of a substrate for a GA-type electronic component, in the plastic substrate of the substrate for a PGA-type electronic component according to any one of claims 1 to 4, a concave and convex portion formed on the surface of the pad is formed. The position is characterized in that it corresponds to a position where a convex portion of the unevenness formed on the end face of the pin is formed.

According to a sixth aspect of the present invention, there is provided a PGA type electronic component substrate according to any one of the first to fifth aspects, wherein the PGA type electronic component substrate is a plastic substrate. The concave portion of the concavo-convex formed on the insulating layer is formed to penetrate the insulating layer, and the conductive pad formed in the concave portion electrically connects the pad and the wiring below the insulating layer. It is characterized by being connected to.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a substrate for a PGA type electronic component, wherein an opening diameter is increased toward the inside of the insulating layer on the surface of the insulating layer in a pad forming region of the plastic substrate. Forming a concave and a convex portion, forming a conductive film for forming a pad on the insulating layer on which the concave and convex portions are formed, and forming a concave and convex portion on the surface of the conductive pad; Supplying solder on the formed conductive pad, placing a nail head of a pin on the solder, and fixing the pin to the pad via the solder. It is characterized by having.

According to the invention of a method for manufacturing a PGA type electronic component substrate according to claim 8, the insulating layer according to claim 7 is characterized in that:
It is characterized by being formed using a positive photosensitive material. The method of manufacturing a PGA-type electronic component substrate according to claim 9, further comprising the steps of: forming a first insulating layer on a plastic substrate; and forming the first insulating layer on the first insulating layer. Forming a second insulating layer having a low etching rate, and etching the first insulating layer and the second insulating layer in the pad formation region through the same pattern mask, and forming a plurality of The first opening is formed, and an opening larger than the first opening is formed in the second insulating layer below the first opening due to a difference between the etching rates of the first and second insulating layers. Forming a second opening having a diameter; forming a conductive film for forming a pad on the insulating layer in a pad forming region including the first and second openings to form a conductive pad; Supplying solder on the pad; A step of placing the nail head-head portion, is characterized by a step of securing said pin to said pad through said solder.

According to a tenth aspect of the present invention, there is provided a method of manufacturing a PGA type electronic component substrate, wherein a plurality of conductive lands separated from each other are formed in at least a pad formation region on a plastic substrate, and the lands are covered. A step of forming an insulating layer; a step of forming an opening in the insulating layer at a position corresponding to each of the lands, the opening being narrower than the land area; and forming a pad on the insulating layer in the pad forming area. Forming a conductive pad by forming a conductive film, connecting the pad to the corresponding land via the opening, supplying solder on the pad, and forming a pin on the solder. The method includes a step of mounting a nail head, and a step of fixing the pin to the pad via the solder.

A semiconductor device according to an eleventh aspect is characterized in that a semiconductor chip is mounted on the PGA-type electronic component substrate according to any one of the first to sixth aspects.

[0018]

According to the first and seventh aspects of the present invention, the surface of the insulating layer in the region where the pad is to be formed is formed so as to have unevenness, whereby the unevenness is formed on the surface of the pad. The opening diameter of the concave portion is formed in a reverse tapered shape that expands toward the lower side.

As a result, the pad-forming conductive film and the solder thereover engage in the opening formed in the inversely tapered shape while being caught by the eaves of the opening. The adhesion between the conductive film for use and the solder thereon and the insulating layer is improved. Therefore, the connection strength of the pin formed on the pad via the solder to the pad is also improved.

According to the second and ninth aspects of the present invention, the surface of the insulating layer in the region where the pad is to be formed is formed so as to have irregularities, and is formed in the middle of the concave portion inside the concave portion. Since the protruding portion of the insulating layer protruding is formed, the connection strength of the pin is further improved. According to the PGA-type electronic component substrate according to the third and tenth aspects, a conductive land in a region wider than an opening region of the concave portion is connected to the pad under each concave portion. As a result, the end of the conductive land is pressed from above by the insulating layer. For this reason,
Pads connected to the conductive lands are also less likely to be separated from the insulating layer.

According to the fourth aspect of the present invention, since the unevenness is also formed on the end face of the nail head of the pin, the contact area with the solder increases. For this reason, the connection strength of the pin to the pad is further increased. According to the invention as set forth in claim 5, the position where the concave and convex concave portions formed on the surface of the pad is formed with the convex and concave convex portions formed on the end face of the nail head type head of the pin. Corresponding to the positions of the projections and the recesses.
For this reason, the connection strength of the pin to the pad is also increased.

According to the invention of the substrate for a PGA type electronic component according to claim 6, the connection strength of the pin is improved and
Since a part of the concave portion formed in the pad formation region also serves as a via hole, a special region for forming a via hole is not required. For this reason, the degree of freedom in selecting the formation positions of via holes and pads is increased, and the degree of integration of pins can be improved.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a PGA according to an embodiment of the present invention will be described.
The electronic component substrate and a method for manufacturing the same will be described.
FIG. 1 is a cross-sectional view showing an overall configuration of a PGA-type electronic component substrate according to an embodiment of the present invention. In the figure, 10 is a core substrate at the center of the PGA type electronic component substrate, 11,
Reference numerals 12, 13, and 14 denote build-up insulating layers laminated on both sides of the core substrate 10, 15, 16, 17,
Reference numerals 18 and 19 are wirings laminated between the insulating layers 10 to 13, respectively.

Reference numerals 20 and 21 denote solder resist films formed on the outermost surface of the PGA type electronic component substrate, respectively. The bumps for connecting the input / output terminals of the semiconductor chip 22 are connected to the wiring 15 through the opening of the solder resist film 20. Reference numeral 25 denotes an underfill material for sealing the bump portion. Further, the pin 24 is connected to the wiring 19 via the opening of the solder resist film 21.

That is, each input / output terminal of the semiconductor chip 22 is connected to the bump 23, the wiring 15, 16, 17, 18, 19.
Through the pin 24. As described above, the PG between the input / output terminals of the semiconductor chip 22 which is extremely narrow is
It can be expanded to the interval between the pins 24 of the A-type electronic component substrate, and can easily be connected to other electronic components by the pins 24 that are erected.

The drawings are for explaining the overall structure, and the thickness of each layer and the dimensions of the opening of the insulating layer are different from the actual dimensions. For example, the thickness of the insulating layer is about 50 μm, the diameter of the via hole is about 70 μm, and the opening diameter of the pad is about 100 μm. For convenience of explanation, in the following description, steps directly related to the pin mounting method according to the embodiment of the present invention will be described, and steps not directly related will be omitted.

(First Embodiment) First, as shown in FIG. 2A, a copper film is formed on an insulating layer 26 made of an insulating resin by copper plating or by applying a copper foil and thermocompression bonding. Form. After that, the wiring 27 is formed by patterning.
Here, the insulating layer 26 corresponds to the insulating layer 12 in FIG. 1, and the wiring 27 corresponds to the wiring 18 in FIG.

Next, as shown in FIG.
An insulating layer 28 made of a negative photosensitive insulating resin is formed on 6. Here, the insulating layer 28 corresponds to the insulating layer 11 in FIG. Next, as shown in FIG.
After the formation of the resist film 29 in FIG. 8, openings 29a are formed in the via formation region and a large number of openings 29b are formed in the pad formation region by patterning the resist film. Thereafter, exposure is performed.

At this time, the light passes through the openings 29a and 29b.
Is input to the insulating layer 28 through the optical path, but spreads to the lateral side as the light proceeds toward the inside due to diffraction of light (broken line portion). Next, as shown in FIG. 2D, via holes 28a are formed in the insulating layer 28 by development, and a large number of concave portions 28b are simultaneously formed in the insulating layer 28 in the pad formation region.
In addition, as the concave portion forming pattern, for example, FIG.
The pattern shown in FIG. 12A, FIG. 12B or FIG. 12C is used.

As a result, the cross section of the via hole 28a and the concave portion 28b has an inverted tapered shape in which the opening diameter increases toward the lower side. Further, as the opening pattern, by making the opening diameter for forming the concave portion smaller than the opening diameter of the via hole 28a, a concave portion having an appropriate depth can be formed without penetrating the insulating layer 28. Of course, the diameter of the opening in the pad formation region may be the same as the diameter of the via hole. In this case, the depth is almost the same as that of the via hole, but there is no particular problem unless wiring is provided on the insulating layer 26 below the pad formation region.

When the oblique angle of the reverse taper of the opening is small, the substrate or the light source is rotated at a predetermined angle during the exposure so that the incident direction of the exposure light is oblique, and The range may extend to below the opening. Next, as shown in FIG. 3A, after forming a copper film by plating or the like, the wiring 30 is formed as a conductive film for pad formation by patterning. Thus, the wiring 27 and the wiring 30 are electrically connected via the via hole 28a, and the pad 30a having a concave portion on the surface is formed.

Next, as shown in FIG. 3B, after a solder resist film 31 is formed, an opening 31a is formed by patterning. Next, as shown in FIG. 3 (c), after the solder 32 is supplied to the opening 31a, the pin 33 of the nail head type head is pressed down with the solder 32
Place on top. Next, as shown in FIG.
A heat treatment at a temperature higher than the temperature at which the solder is melted is performed to reflow the solder 32 and fix the pin 33.

According to the embodiment of the present invention, the wiring 30
Is also in close contact with the lower insulating layer 28 via a number of recesses 28b, so that the contact area between the wiring 30 and the insulating layer 28 increases, thereby increasing the connection strength of the pin 33 to the pad 30a. Furthermore, since the cross section of each concave portion 28b has an inverse tapered shape in which the opening diameter increases toward the lower side, the pad 30a and the solder 32 are in a state of being cut into the inside of the concave portion. Therefore, the inconvenience that the pad 30a and the solder 32 are peeled off from the insulating layer 28 when some force is applied to the pin 33 can be largely solved.

(Second Embodiment) FIG. 5 shows a second embodiment of the present invention.
It is sectional drawing which shows the structure of the board | substrate for PGA type electronic components which concerns on embodiment. The same points as those in the method for manufacturing the PGA-type electronic component substrate according to the first embodiment will be described for convenience of description.
Omitted. In the second embodiment, as shown in FIG. 5A, a protrusion 34a is formed on the head of the pin 34. The formation position of the convex portion 34a corresponds to the position of each concave portion 28b formed in the insulating layer 28. Thus, when the pins 34 are placed on the solders 32 and the pins 32 are pressed and subjected to a heat treatment at a temperature higher than the temperature at which the solders 32 melt, and the solders 32 are reflowed, as shown in FIG. Then, the protrusion 34a of the pin 34 enters the recess 28b formed in the insulating layer 28, and the pin 34 is fixed.

According to the second embodiment of the present invention, in addition to the solder 32, the protrusions 34a of the pins 34 themselves are also formed on the insulating layer 28.
In this case, in addition to the effect of the first embodiment, the inconvenience that the pin 34 is hard to come off from the concave portion 28b and the pad 30a is peeled off from the insulating layer 28 can be further improved. . In addition, the shape of the convex portion may be appropriately narrowed so that the convex portion 34a easily enters the concave portion 28b.

(Third Embodiment) FIG. 6 shows a third embodiment of the present invention.
It is sectional drawing which shows the structure of the board | substrate for PGA type electronic components which concerns on embodiment. P according to the second embodiment shown in FIG.
The same parts as those of the method for manufacturing the GA type electronic component substrate are omitted for convenience of description. In the third embodiment, as shown in FIG. 6, the lands of the lower wiring 35 are provided below the insulating layer 28 in the pad formation region. Thereby, the via hole 3
6 can be formed in the pad formation region. Therefore, there is no need to provide a separate via hole formation region, so that the margin of the via hole and pad formation positions is increased, and the integration of the number of pins can be improved.

(Fourth Embodiment) FIG. 7 shows a fourth embodiment of the present invention.
It is sectional drawing which shows the structure of the board | substrate for PGA type electronic components which concerns on embodiment. P according to the third embodiment shown in FIG.
The same parts as those of the method for manufacturing the GA type electronic component substrate are omitted for convenience of description. In the fourth embodiment, as shown in FIG. 7, the surface of the head of the pin 34 is a rough surface 34b. For example, if the surface is roughened on a mold at the time of pin formation, this is transferred and the surface can be roughened.

As a result, the connection between the pin 34, the solder 32 and the pad 30a becomes stronger. (Fifth Embodiment) FIGS. 8 and 9 are sectional views showing a method of manufacturing a PGA type electronic component substrate according to a fifth embodiment of the present invention.

First, as shown in FIG. 8A, a copper film is formed on an insulating layer 38 made of an insulating resin by copper plating or by applying a copper foil and thermocompression bonding. After that, the wiring 39 is formed by patterning. Here, the insulating layer 38
Corresponds to the insulating layer 12 in FIG. 1, and the wiring 39 corresponds to the wiring 18 in FIG. Next, as shown in FIG. 8B, an insulating layer 40 having a first etching rate characteristic is formed on the insulating layer 38, and an insulating layer 41 having a second etching rate characteristic is formed thereon. . Here, the second etching rate is lower than the first etching rate.

Next, as shown in FIG. 8C, after a resist film 42 is formed on the insulating layer 41, an opening 42a is formed in the via formation region by patterning the resist film, and the pad formation region is formed. After forming a large number of openings 42b, exposure is performed. Next, the exposed region is isotropically etched with an etchant, a via hole 44 is formed in the via hole formation region, and a plurality of concave portions 45 are formed in the pad formation region.

At this time, the etching rate of the lower insulating layer 40 is higher than that of the upper insulating layer 41.
As shown in (d), the cross-sectional shape of the recess 45 is such that the eaves 45a are formed in the middle. Next, FIG.
As shown in FIG. 7, after a copper film is formed on the insulating layer including the concave portion 45 by plating or the like, a wiring 46 is formed as a conductive film for pad formation by patterning. As a result, the wiring 39 and the wiring 46 are electrically connected via the via hole 44, and a pad 46a having a concave portion on the surface is formed.

Next, as shown in FIG. 9B, after a solder resist film 47 is formed, the solder resist film 47 is patterned to form an opening 47a. Next, as shown in FIG. 9C, after the solder 48 is supplied to the opening 47a, the pin 49 of a nail head type head is mounted on the solder 48 with the head down. Next, as shown in FIG. 9D, heat treatment is performed at a temperature higher than the temperature at which the solder 48 melts, and the solder 48 is reflowed.
Is fixed.

According to the embodiment of the present invention, the pad 4
6a is also formed in close contact with the lower insulating layer 28 via a number of recesses 45, so that the contact area between the pad 46a and the insulating layer 28 is increased.
The connection strength with respect to a also increases. Further, since the cross-sectional shape of each recess 45 is provided with an eave 45a at the middle level, the solder 4
8 and the pad 46a are in a state of being cut under the eaves 45a. Therefore, some force is applied to the pin 49,
The disadvantage that the pad 46a and the solder 48 are separated from the insulating layer 28 can be largely eliminated.

(Sixth Embodiment) FIGS. 10 and 11
FIG. 14 is a cross-sectional view illustrating a method for manufacturing a PGA-type electronic component substrate according to a sixth embodiment of the present invention. First, FIG.
As shown in FIG. 3A, a copper film is formed on an insulating layer 50 made of an insulating resin by copper plating or a copper foil is applied and thermocompression-bonded to form a copper film. The reinforcing land 51b is formed.
Each of the reinforcing lands 51b has a floating island pattern, and is used for producing a pad anchor effect as described later.

Next, as shown in FIG. 10B, an insulating layer 52 is formed on the lower wiring 51a, the reinforcing land 51b, and the insulating layer 50. Next, as shown in FIG. 10C, after a resist film 53 is formed on the insulating layer 52, an opening 53a is formed in the pad formation region by patterning the resist film, and then exposure is performed. The openings 53a are formed on the reinforcing lands 51b in association with each other.

Thereafter, as shown in FIG. 10D, the openings 52a and 52b are formed by etching. Next, as shown in FIG. 11A, after a copper film is formed on the insulating layer 52 by plating or the like, the pad 5
4 is formed. As a result, the pad 54 has the opening 52a.
Is electrically connected to the wiring 51a through the opening 52b, and is connected to the reinforcing land 51b through the opening 52b.

Next, as shown in FIG. 11B, after a solder resist film 55 is formed, the solder resist film 55 is formed.
Is patterned to form an opening 55a. Then
As shown in FIG. 11C, the solder 56 is connected to the opening 55a.
After that, the pin 57 of the nail head type head is placed on the solder 56 with the head down. Thereafter, heat treatment is performed at a temperature higher than the temperature at which the solder 56 melts, and reflow is performed to fix the pins 57.

According to the embodiment of the present invention, the pad 5
4 is also formed in close contact with the side of the lower insulating layer 52 through the opening 52a and a number of openings 52b, so that the contact area between the pad 54 and the insulating layer 52 is increased. The connection strength to the pad 54 also increases. Further, since the pad 54 is connected to the reinforcing land 51b, an anchor effect for the insulating layer 52 can be obtained, so that the pad 54 is hardly peeled off. Therefore, the inconvenience that the pad 54 and the solder 56 are peeled off from the insulating layer 52 when some force is applied to the pin 57 can be largely solved.

(Other Embodiments) FIG. 12 is a top view exemplifying a pattern shape of a large number of concave portions formed in an insulating layer in a pad formation region according to each embodiment of the present invention described above. In FIG. 12 (a), a large number of circular patterns are arranged on the whole, in FIG. 12 (b), rectangular patterns are arranged so as not to face the same direction, and in FIG. 12 (c), And a large number of cross-shaped patterns.

By forming a large number of recesses in the pad formation region and by devising the shape of the pattern, the connection strength of the pins can be increased. Of course, such a pattern is an example, and the present invention is not limited to these.

[0051]

According to the present invention, irregularities are formed on the surface of the insulating layer in the region where the pad is to be formed, and the cross-sectional shape of the concave portion is an inverted tapered shape in which the opening diameter increases toward the lower side, or To have an eave in the middle of the recess,
Alternatively, since the anchor effect is generated by forming the reinforcing land, the solder and the pad are hardly peeled off from the insulating layer. For this reason, the mounting strength of the pins is increased, so that the reliability of the PGA type electronic component substrate can be improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing an overall configuration of a PGA-type electronic component substrate according to an embodiment of the present invention.

FIG. 2 is an explanatory view of a method for manufacturing a PGA-type electronic component substrate according to the first embodiment of the present invention (part 1).

FIG. 3 is an explanatory view of the method for manufacturing a PGA-type electronic component substrate according to the first embodiment of the present invention (part 2).

FIG. 4 is an explanatory view of the method for manufacturing a PGA-type electronic component substrate according to the first embodiment of the present invention (part 3).

FIG. 5 is an explanatory diagram of a configuration of a PGA-type electronic component substrate according to a second embodiment of the present invention.

FIG. 6 is an explanatory diagram of a configuration of a PGA-type electronic component substrate according to a third embodiment of the present invention.

FIG. 7 is an explanatory diagram of a configuration of a PGA-type electronic component substrate according to a fourth embodiment of the present invention.

FIG. 8 is an explanatory view of a method for manufacturing a PGA type electronic component substrate according to a fifth embodiment of the present invention (part 1).

FIG. 9 is an explanatory view of a method for manufacturing a PGA-type electronic component substrate according to a fifth embodiment of the present invention (part 2).

FIG. 10 is an explanatory diagram of the method for manufacturing the PGA-type electronic component substrate according to the sixth embodiment of the present invention (part 1).

FIG. 11 is an explanatory view of the method for manufacturing the PGA-type electronic component substrate according to the sixth embodiment of the present invention (part 2).

FIG. 12 is an explanatory diagram of an opening pattern formed on a pad of the PGA-type electronic component substrate according to the embodiment of the present invention.

FIG. 13 is an explanatory view of a step of forming a PGA type electronic component substrate according to a conventional example.

[Explanation of symbols]

26, 28, 38, 40, 41, 50, 52 Insulating layer, 27, 30, 35, 39, 46, 51a Wiring, 28a, 36, 44 Via hole, 28b, 45 recess, 29, 53 Resist film, 30a, 46a , 54 pads, 31, 47, 55 solder resist film, 29a, 29b, 31a, 42a, 42b, 47a, 5
2a, 52b, 53a, 55a Opening, 32, 48, 56 Solder, 33, 34, 49, 57 pin, 34a Convex, 34b Rough surface, 45a Eave, 51b Reinforcing land.

Claims (11)

[Claims] 1. A PGA type electronic component having a plurality of conductive pads formed on an insulating layer of a plastic substrate, and a plurality of pins of a nail head type head fixed to each of the pads via solder. In the substrate for use, at least the surface of the insulating layer in the region where the pad is formed is formed with irregularities, whereby irregularities are formed on the surface of the pad, and the opening diameter of the concave portion of the irregularities increases toward the inside of the insulating layer. A PGA-type electronic component substrate characterized by being formed in an expanding inversely tapered shape. 2. A PGA type electronic component having a plurality of conductive pads formed on an insulating layer of a plastic substrate and a plurality of pins of a nail head type head fixed to each of the pads via solder. In the substrate for use, at least a surface of the insulating layer in a region where the pad is formed is formed with irregularities, so that irregularities are formed on the surface of the pad, and a concave portion is formed from a wall surface of the concave portion in the middle of the concave portion of the irregularity. A PGA-type electronic component substrate, wherein a protruding portion protruding inward is formed. 3. A PGA type electronic component having a plurality of conductive pads formed on an insulating layer of a plastic substrate and a plurality of pins of a nail head type head fixed to each pad via solder. In the substrate for use, at least a surface of the insulating layer in a region where the pad is formed is formed to have irregularities, whereby irregularities are formed on the surface of the pad, and an opening region of the concave is formed below the concave of the irregularities. A substrate for a PGA-type electronic component, wherein a wider conductive land is formed to be connected to the pad, and the land is separated from each other. 4. The pin according to claim 1, wherein the pin has an uneven surface on an end face of the nail head.
A substrate for a PGA-type electronic component according to claim 1. 5. The position at which the concave and convex concave portions formed on the surface of the pad correspond to the positions where the concave and convex convex portions formed on the end face of the nail head type head of the pin are formed. The substrate for a PGA-type electronic component according to claim 4, wherein: 6. The concave / convex concave portion formed on the insulating layer is formed so as to penetrate the insulating layer, and the pad is electrically connected to a wiring below the insulating layer. The PGA-type electronic component substrate according to any one of claims 1 to 5, characterized in that: 7. A step of forming an insulating layer on a plastic substrate, and forming a reverse-tapered recess having an opening diameter increasing toward the inside of the insulating layer on a surface of the insulating layer in a pad forming region. A step of forming irregularities; a step of forming a pad-forming conductive film on the insulating layer on which the irregularities are formed, and forming irregularities on the surface of the conductive pad; Supplying a solder on the pad; placing a nail head of a pin on the solder; and fixing the pin to the pad via the solder. A method for manufacturing a PGA type electronic component substrate. 8. The PGA according to claim 7, wherein the insulating layer is formed using a positive photosensitive material.
Method for manufacturing a substrate for electronic components. 9. A step of forming a first insulating layer on a plastic substrate and a step of forming a second insulating layer having a lower etching rate than the first insulating layer on the first insulating layer. Etching the first insulating layer and the second insulating layer in the pad formation region through the same pattern mask,
A plurality of first openings are formed in the first insulating layer, and the first opening is formed by a difference in etching rate between the first and second insulating layers.
Forming a second opening having an opening diameter larger than the first opening in the second insulating layer below the opening, and insulating a pad formation region including the first and second openings. Forming a conductive pad by forming a conductive film for forming a pad on the layer; supplying solder on the pad; placing a nail head of a pin on the solder; Fixing the pin to the pad via the solder. 10. A step of forming a plurality of conductive lands separated from each other on at least a pad formation region on a plastic substrate, a step of forming an insulating layer covering the lands, and a position corresponding to each of the lands. Forming an opening of an opening narrower than the land area in the insulating layer; forming a pad forming conductive film on the insulating layer in the pad forming area to form a conductive pad; Connecting the pin to the corresponding land via the opening; supplying solder on the pad; placing a nail head type head of a pin on the solder; And fixing the pad to the pad via solder. 11. A semiconductor device having a semiconductor chip mounted on the PGA-type electronic component substrate according to claim 1.