JP2000224837A - Gate driving circuit and control method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a gate driving circuit which restrains oscillation without decreasing gain and can protect an overcurrent, and a control method of the gate driving circuit. SOLUTION: An element current detecting output is branched from a main current of a switching element 10. A constant current is subtracted from the current detecting output by a current source 16, and a difference current is led out. The current is limited by diodes 17, 18 in order to inhibit negative current flow. The limited difference current is integrated by a capacitor 19. A field effect transistor 20 is installed which controls a voltage of a gate terminal 10G of the switching element 10, on the basis of the voltage of the capacitor 19.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate drive circuit using a power switching element such as a MOS gate type and a method for controlling the gate drive circuit.

[0002]

2. Description of the Related Art Recently, high voltage and large current MOS (Met)
Al Oxide Semiconductor) gate type power switching elements have been put to practical use.
MOS gate type switching elements are faster in switching speed, have a wider safe operation range, are voltage-driven devices, and have better controllability than conventional thyristor-based switching elements such as GTO. There are many benefits such as being expensive.

[0003] Utilizing high controllability, which is one of the above features, it is possible to protect elements from overcurrent due to a DC short circuit or the like by control from a gate drive circuit.

FIG. 7 shows a gate drive circuit 7 having an overcurrent protection function conventionally used. In FIG.
The power switching element 10 is a main circuit element to be protected. The element 10 has a sense terminal 10S in addition to the collector 10C, the emitter 10E, and the gate 10G. A part of the emitter current flows out to the sense terminal 10S as the sense terminal current. The ratio between the sense terminal current and the emitter current has a substantially constant value determined by the element. A base 9B of the current limiting transistor 9 and a detection resistor 8 connected between the base 9B and the emitter 9E of the current limiting transistor 9 are connected in parallel to the sense terminal 10S. The collector terminal 9C of the current limiting transistor 9 is connected to the gate of the switching element 10 via the diode 14, and the switching element 1
The gate of “0” is connected to the higher-level drive circuit 36 via the gate resistor 15.

Hereinafter, the operation of the gate drive circuit 7 will be described with reference to an example in which an overcurrent flows in the main circuit due to a dv / dt effect at the time of switching.

As described above, the sense terminal current has a substantially constant ratio to the emitter current. Therefore, as the emitter current of the switching element 10 increases due to the overcurrent, the sense terminal current also increases. When the sense terminal current exceeds a certain value determined by the static characteristics of the detection resistor 8 and the current limiting transistor 9, the current limiting transistor 9 starts conducting, and the collector current of the current limiting transistor 9 passes through the diode 14. Start flowing. Since the voltage between the gate terminal 10G and the emitter terminal 10E of the switching element 10 is obtained by subtracting the voltage drop due to the gate resistor 15 from the output voltage of the gate drive circuit 7, the more the collector current of the current limiting transistor 9 flows, the more the switching element 10 The voltage VGE between the gate terminal 10G and the emitter terminal 10E decreases. When the gate-emitter voltage VGE of the switching element 10 falls below the threshold between the active state and the saturation state, the switching element 10
Is shifted from the saturated state to the active state, the collector current IC is controlled by the voltage VGE, and the level of the overcurrent is suppressed. At this time, the collector current of the current limiting transistor 9 is settled to a constant value determined by the static resistance of the detection resistor 8 and the current limiting transistor 9. This is the overcurrent limiting state.

Although not shown in FIG. 7, the fact that the overcurrent limit state has been entered is notified to a control unit of a higher-level device provided outside. In the overcurrent limiting state, a voltage equal to the power supply voltage is applied to the switching element 10 and a large current flows, so that the loss of the switching element 10 is very large. The time that can withstand the overcurrent limit state is only several tens of μs at most. For this reason, the control unit of the host device makes necessary preparations as soon as it detects that the switching element has entered the overcurrent limiting state, and sends an off signal to the gate drive circuit 7,
By safely turning off the switching element 10, the switching element 10 is protected.

[0008]

However, the conventional method described above has a problem that current oscillates during an overcurrent limiting operation. This is for the following reason.

In the conventional overcurrent limiting operation, the switching element 10 is placed in the active area instead of the switching area, and the switching element 10, the current limiting transistor 9,
This is achieved by configuring a control system that controls the collector current of the switching element 10 to a certain value by a negative feedback circuit including a gate resistor 15. This control system has one pole composed of the gate resistance 15 and the equivalent input capacitance of the switching element 10 as a main pole, and has one or more poles formed by the transfer characteristics of the switching element 10 in a high frequency range. Therefore, if the gain of the loop transmission characteristic of the control system is too large, the system oscillates in a high frequency region having two or more poles. One measure to suppress oscillation is to lower the gain. For example, the amplification degree of the current limiting transistor 9 is reduced. However, although the stability of the system is increased by lowering the gain, the error of the current of the switching element 10 in the overcurrent control state with respect to the set value increases, or the transition time until the transition to the overcurrent limit occurs. The adverse effects, such as a longer length, also occur.

[0010]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a gate drive circuit capable of suppressing oscillation without lowering the gain and protecting an overcurrent, and a method of controlling the gate drive circuit. (1) shown below,
It has the feature of (2). (1) The present invention provides a power switching element having a current detection terminal for shunting an element current detection output from a main current and a control input terminal, and drawing a constant current from the current detection output shunted by the current detection terminal. Calculating means for subtracting, a integrating means for integrating the current when the current value of the current detection output from which a constant current is subtracted by the calculating means is positive, and a control input terminal voltage of the switching element based on an output of the integrating means. And a control means for controlling the gate drive circuit.

According to such a configuration, after the element current detection output is extracted from the power switching element to be protected by the current detection terminal, a constant current is subtracted from the current detection output by the arithmetic means. The current value of the current detection output from which the constant current has been subtracted is limited by the limiting means so as not to be negative, the current detection output is integrated by the integrating means, and the control means is controlled based on the output of the integrating means by the integration. A gate drive circuit that is driven to control the voltage of the power switching element.

Therefore, unlike the conventional gate drive circuit based on feedback control, the power switching element is controlled based on the output of the integrating means. As a result, there is no transmission due to feedback control,
A stable gate drive circuit can be realized.

Preferably, the gate drive circuit includes a capacitor as the integrating means, and uses a voltage of the capacitor as an output value of the integrating means.

According to such a configuration, since the voltage of the power switching element is controlled by the voltage of the capacitor, transmission due to feedback control does not occur.
A stable gate drive circuit can be realized.

It is preferable that the gate drive circuit includes a field effect type active element as the control means.

According to such a configuration, the field effect type active element is driven by the voltage of the integrating means to control the voltage of the power switching element, so that the transmission due to the feedback control does not occur and the field effect type active element is stable. A gate drive circuit can be realized.

The gate drive circuit includes a current control type active element provided in parallel with a control input terminal of the power switching element, and controls a control current for controlling the current control type active element by an output value of the integrating means. Preferably, it is characterized in that it is determined.

According to such a configuration, the signal is amplified by the current control type active element. As a result, a stable gate drive circuit can be realized even when the amplification degree of the control means is insufficient.

It is preferable that the gate drive circuit further includes current value setting means for setting a current value to be subtracted from the current detection output by the arithmetic means.

According to such a configuration, the value of the overcurrent flowing through the power switching element can be changed by setting the constant current value to be subtracted from the current detection output. Accordingly, the voltage of the power switching element can be controlled according to the value of the overcurrent, and a stable gate drive circuit can be realized.

Preferably, the gate drive circuit further comprises a detecting means for detecting the start of driving of the control means, and a notifying means for notifying that the output value of the integrating means has exceeded a threshold value. Preferably, it is provided.

According to such a configuration, when the power switching element is in an overcurrent state, early detection and notification can be performed.

It is preferable that the gate drive circuit further includes reset means for resetting an output value of the integrating means to zero.

According to such a configuration, if the output value of the integrating means is reset to 0 by the reset means after the overcurrent of the gate drive circuit is further cut off by the host controller, the normal operation is performed again. be able to. (2) The present invention is a control method of a gate drive circuit, wherein a main current flowing through a power switching element having a control input terminal is divided into an element current detection output, and a constant current is subtracted from the element current detection output. I left and took out the difference current,
The difference current is integrated by the integrating means, and the control input terminal voltage is controlled by controlling the control means provided in parallel with the control input terminal of the power switching element based on the integrated output of the integrating means. It is a control method of a gate drive circuit characterized by controlling.

According to such a configuration, after the element current detection output is extracted from the power switching element to be protected by the current detection terminal, a constant current is subtracted from the current detection output. The current of the current detection output from which the constant current has been subtracted is integrated by the integrating means, and the gate driving circuit controls the voltage of the power switching element by driving the control means based on the output of the integrating means by the integration. .

Therefore, unlike the conventional gate drive circuit by feedback control, the power switching element is controlled based on the output of the integrating means. As a result, there is no transmission due to feedback control,
Stable control of the gate drive circuit can be realized.

In the method for controlling the gate drive circuit,
A method of controlling a gate drive circuit, characterized in that the integrating means is a capacitor, and a voltage of the capacitor is used as an output value of the integrating means to control a control input terminal voltage of a power switching element.

According to such a configuration, since the voltage of the power switching element is controlled by the voltage of the capacitor, transmission due to feedback control does not occur.
Stable control of the gate drive circuit can be realized.

In the method of controlling the gate drive circuit,
A gate drive circuit control method in which an overcurrent flowing in the power switching element can be set by setting a constant current value to be subtracted from the element current detection output.

According to such a configuration, the value of the overcurrent flowing through the power switching element can be changed by setting a constant current value to be subtracted from the current detection output. Accordingly, the voltage of the power switching element can be controlled according to the value of the overcurrent, and a stable gate drive circuit can be realized.

In the control method of the gate drive circuit,
A method of controlling a gate drive circuit, wherein the control means controls the control input terminal voltage as a field effect type active element.

According to such a configuration, the field effect type active element is driven by the voltage of the integrating means to control the voltage of the power switching element. Therefore, the transmission due to the feedback control does not occur and the field effect type active element is stable. A gate drive circuit can be realized.

In the method for controlling the gate drive circuit,
A current control type active element is provided in series with the field effect type active element, and the current control type active element compensates for the lack of amplification of the field effect type active element and reduces the control input terminal voltage of the power switching element. It is a control method of a gate drive circuit characterized by controlling.

According to such a configuration, the signal is amplified by the current control type active element. As a result, a stable gate drive circuit can be realized even when the amplification degree of the control means is insufficient.

In the control method of the gate drive circuit,
When the control means controls the control input terminal voltage, the control means notifies the start of the control by a notifying means using current conduction of the control means.

According to such a configuration, early detection and notification can be performed when the power switching element is in an overcurrent state.

In the control method of the gate drive circuit,
A method of controlling a gate drive circuit in which the control means controls the control input terminal voltage and then resets the output value of the integrating means to 0 by a reset means and repeats the same operation.

According to such a configuration, after the overcurrent of the gate drive circuit is cut off by the b-level controller,
If the output value of the integrating means is reset to 0 by the reset means, normal operation can be performed again.

[0039]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, first to sixth embodiments of the present invention will be described with reference to the drawings. (First Embodiment) FIG. 1 shows a schematic configuration of a gate drive circuit 1 according to a first embodiment.

In FIG. 1, a switching element 10 to be protected has a sense terminal 10S in addition to a collector 10C, an emitter 10E, and a gate 10G. A part of the emitter current Ie is diverted as a sense terminal current to the sense terminal 1S as an overcurrent detection output.

The ratio between the sense terminal current Is and the emitter current Ie is determined to a constant value by the characteristics of the switching element.

The current source 16 is a limiting means for subtracting a constant current Iref from the sense terminal current Is. A difference current Id = Is-Ire is supplied to a capacitor 19 as an integrating means.
Only the current f flows through the diode 18. Therefore, the voltage applied to both ends of the capacitor 19 is proportional to the time integral of the difference current Id with the reciprocal of the capacitance of the capacitor 19 as a proportional constant.

The magnitude of the constant current Iref is determined according to the magnitude of the overcurrent.

The diode 18 performs a rectifying function, and uses the difference current Id as a reference current for the capacitor 19.
It is for flowing into the.

The capacitor 19 is connected between the gate and source terminals of the field effect transistor 20. Also,
The drain terminal 20D of the field-effect transistor 20 is connected to the gate terminal 10G of the switching element 10 via the diode 14.

The gate terminal 10G has a gate resistance of 1
5 is connected to a higher-level drive circuit 35.

Next, the operation of the gate drive circuit 1 having the above configuration will be described.

For example, when the gate drive circuit 1 enters an overcurrent state due to a switching surge voltage or the like, the emitter current Ie sharply increases. As described above, since the ratio between the emitter current Ie and the sense terminal current Is shunted from the emitter current Ie is constant, the sense current Is sharply increases with an increase in the emitter current Ie.

A value Is-Iref obtained by subtracting the constant current Iref from the sense terminal current Is by the current source 16 is defined as a difference current Id. When the difference current Id is positive, the difference current Id is passed through the diode 18. It flows into the capacitor 19. Then, the potential difference between both ends of the capacitor 19 increases in proportion to the time.

Since the capacitor 19 is connected to the gate terminal 20G and the source terminal 20S of the field effect transistor 20, the voltage applied to the capacitor 19 becomes the gate voltage. The field effect transistor 20 includes the capacitor 1
When the voltage of the capacitor 19 exceeds the threshold value, the current flows between the drain 20D and the source 20S.

That is, the emitter current I
When e rapidly increases, the sense terminal current Is and the difference current Id also rapidly increase, and both ends of the capacitor 19 have a steep potential difference such that the field effect transistor 20 starts conducting. As a result, the gate voltage of the switching element 10 is reduced by flowing the drain current _ID of the field effect transistor 20 through the diode 14, thereby suppressing overcurrent.

On the other hand, if the difference current Id is not positive, the difference current Id does not flow through the diode 18 and no gate voltage is applied to the gate terminal 20G. Capacitor 1
This is because the difference current Id does not flow into No. 9 and no potential difference occurs. Therefore, the overcurrent protection circuit does not operate, and a good operation of the main circuit is maintained.

According to such a configuration, the gate voltage of the switching element 10 is not controlled by the feedback control system, unlike the prior art. This is because when the value of the detected current becomes smaller than the current value determined by the current source 16, the voltage of the capacitor 19 is kept constant, whereby the gate voltage of the switching element 10 also has a constant value. Since the feedback control is not performed as described above, it is possible to realize a gate drive circuit that does not cause an unstable phenomenon such as oscillation which is a problem in the related art.

(Second Embodiment) FIG. 2 shows a gate drive circuit according to a second embodiment. In FIG. 2, an integrator including an operational amplifier 21 and a capacitor 19 is used as an integrating means. As the operational amplifier 21, a MOS input type or J-FET input type operational amplifier having a small input bias current is used.

In FIG. 2, when the gate drive circuit 2 enters an overcurrent state, the difference current Id flows into the capacitor 19 via the diode 18. This allows the capacitor 1
9, a potential difference occurs, and when this potential difference exceeds a certain threshold,
The potential difference between the negative-phase input terminal and the positive-phase input terminal of the operational amplifier 21 increases, and the operational amplifier 21 produces a negative output. As a result, the gate voltage of the switching element 10 is reduced by flowing the drain current _ID of the field-effect transistor 20 through the diode 14,
Overcurrent will be suppressed.

On the other hand, when the gate drive circuit 2 is in the normal state, that is, when no overcurrent flows, the difference current Id is negative, so that the difference current Id does not flow through the diode 18 and the positive-phase input terminal of the operational amplifier 21 In contrast, the potential difference at the opposite-phase input terminal is low, and the operational amplifier 21 produces a positive output. Therefore, the drain current _ID of the field-effect transistor 20 does not flow through the diode 14, and a favorable operation of the main circuit is maintained.

According to such a configuration, since the gate voltage of the switching element 10 is not controlled by the feedback control system, it is possible to realize a gate drive circuit which does not cause unstable phenomenon such as oscillation which is a problem in the prior art.

(Third Embodiment) In the first embodiment of the present invention, a capacitor is used as the integration means, and the output of the capacitor turns on the field effect transistor 20 to control the gate voltage of the switching element 1. However, when the gate resistance 15 has a small value, the amplification degree of the field effect transistor 20 may be insufficient, and the switching element may not be protected from overcurrent. The gate drive circuit 3 shown in FIG. 3 responds to such a case.

The gate drive circuit 3 is different from the gate drive circuit 1 of the first embodiment shown in FIG. 1 in that a current control transistor 22 is connected in series between the diode 14 and the field effect transistor 20. It is. The current control type transistor 12 further amplifies the output of the field effect transistor 20 to compensate for the lack of amplification of the field effect transistor 20.

That is, when the gate drive circuit 3 enters an overcurrent state, the difference current Id flows into the capacitor 19. Thus, when the voltage of the capacitor 19 exceeds the threshold value, the current flows between the drain 20D and the source 20S. The drain current _ID is the current control type transistor 2
2, the amplification of the field effect transistor 20 can be compensated for.

(Fourth Embodiment) In the first to third embodiments, the value of the overcurrent has been regarded as a constant value. But,
Depending on the device, there is a case where it is desired to change the overcurrent set value.
The gate drive circuit 4 shown in FIG. 4 corresponds to such a case.

The gate drive circuit 4 is different from the gate drive circuit 2 shown in FIG. 2 in that a junction field effect transistor 23 is provided in place of the current source 16 and its drain terminal 2
3D is connected to a bias power supply 24, and its gate terminal 2
3G, the current setting terminal 26 has a resistor 25 and a gate 23G.
A resistor 25 is connected between the drains 23D.

In the operation of the gate drive circuit 4 having the above configuration, the current value of the current detection output drawn from the sense terminal 10 S of the switching element 10 is the drain current of the junction field effect transistor 23. The drain current of the junction field effect transistor 23 is determined by the gate-source voltage given from the current setting terminal 26. Therefore, a higher-level control device (not shown) is provided outside the gate drive circuit 4, and the current setting terminal 26
The drain current of the junction field effect transistor 23 can be adjusted by applying an appropriate voltage to the junction field effect transistor 23. The drain current, that is, the sense terminal current I
Since the ratio between s and the emitter current Ie is determined to be a constant value, the overcurrent set value can be changed, and control for overcurrent protection suitable for the device can be performed.

(Fifth Embodiment) In many power converters, it is generally important to early detect and grasp that the device has entered an abnormal state such as an overcurrent state.

The gate drive circuit 5 shown in FIG. 5 responds to such a demand. FIG.
In the gate drive circuit 3 shown in (1), an overcurrent notification control device 34 is connected to the current control transistor 22.

The overcurrent notification control device 34 includes a circuit in which a bipolar transistor 27, a light emitting diode 28, and a resistor 29 are connected in series, and an optical fiber 30.

During the operation of the gate drive circuit 5, the switching element 10 enters an overcurrent state, and the field effect transistor 20 operates as in the gate drive circuit 3 of the third embodiment. Then, at the same time, the current control transistor 22 starts conducting, and the bipolar transistor 27 operates accordingly. The light-emitting diode 28 emits light due to the collector current of the bipolar transistor 27, and the occurrence of overcurrent is transmitted by an optical fiber 30 to an upper-level control device (not shown) in the form of an optical signal.

According to such a configuration, an overcurrent state of the switching element 10 can be detected and notified at an early stage by a host control device.

(Sixth Embodiment) In the present invention, when a capacitor 19 is used as an integrating means, the output value of the capacitor 19 increases until the main current of the switching element 10 reaches a certain value. Is a constant value. After the overcurrent is interrupted by an instruction from a higher-level control device (not shown), in order to return to a normal operation state again,
It is necessary to reset the output value of the integrating means.

The gate drive circuit 6 shown in FIG. 6 corresponds to this. The gate drive circuit 6 is the same as the gate drive circuit 1 shown in FIG. 1 except that a reset means including a field effect transistor 31 and a resistor 32 and resetting the capacitor 19 is connected in parallel with the capacitor 19.

When the switching element 10 enters an overcurrent state, the gate drive circuit 1 of the first embodiment
Similarly, when the potential difference between both ends of the capacitor 19 exceeds the threshold value, the field-effect transistor 20 operates, and thereafter, the overcurrent is cut off by the host controller.

Thereafter, when returning to the normal operation state again,
The field effect transistor 31 is turned on by applying a voltage to the reset input terminal 33. Then, the field effect transistor 31 consumes the electric charge stored in the capacitor 19, whereby the output value of the capacitor 19 as the integrating means is reset to zero.

According to such a configuration, even when the gate drive circuit falls into an overcurrent state, it is possible to quickly return to a normal operation state, thereby improving workability.

[0074]

According to the present invention, when a current flowing through a switching element falls into an overcurrent state, a current of a certain value is subtracted from a current flowing from a current detection output terminal provided in the switching element. By limiting the current value so that the current value does not become negative, integrating the current, and controlling the gate voltage with the integrated output, the main current flowing to the element can be limited without using feedback control. Thus, it is possible to provide a gate drive circuit having stable overcurrent limiting means that does not cause unstable phenomenon such as oscillation.

[Brief description of the drawings]

FIG. 1 is a diagram showing a gate drive circuit according to a first embodiment.

FIG. 2 is a diagram showing a gate drive circuit according to a second embodiment.

FIG. 3 is a diagram showing a gate drive circuit according to a third embodiment.

FIG. 4 is a diagram showing a gate drive circuit according to a fourth embodiment.

FIG. 5 is a diagram showing a gate drive circuit according to a fifth embodiment.

FIG. 6 is a diagram showing a gate drive circuit according to a sixth embodiment.

FIG. 7 is a diagram showing a conventional gate drive circuit.

[Explanation of symbols]

1, 2, 3, 4, 5, 6,... The gate drive circuit according to the present invention. DESCRIPTION OF SYMBOLS 10 ... Switching element 16 ... Current source 19 ... Capacitor 20 ... Field effect transistor 21 ... Operational amplifier 22 ... Current control type transistor 23 ... Junction type field effect transistor 24 ... Bias power supply 25 ... Resistance 26 ... Current setting terminal 27 ... Bipolar transistor 28 ... Diode 29 ... Resistance 30 ... Optical fiber 31 ... Field effect transistor 32 ... Resistance 33 ... Reset input terminal 34 ... Overcurrent notification control device

Claims (15)

[Claims] 1. A power switching element having a current detection terminal for shunting an element current detection output from a main current and a control input terminal, and an operation for subtracting a constant current from the current detection output shunted by the current detection terminal Means, an integration means for integrating the current when the current value of the current detection output from which a constant current is subtracted by the arithmetic means is positive, and controlling a control input terminal voltage of the switching element based on an output of the integration means. A gate driving circuit comprising: 2. The gate drive circuit according to claim 1, further comprising a capacitor as said integrating means, wherein a voltage of said capacitor is used as an output value of said integrating means. 3. The gate drive circuit according to claim 1, further comprising a field effect type active element as said control means. 4. The gate drive circuit according to claim 1, wherein a current control type active element is provided in parallel with a control input terminal of the power switching element, and the control current for controlling the current control type active element is integrated by the integrating means. A gate drive circuit characterized in that the gate drive circuit is determined by an output value of the gate drive circuit. 5. The gate drive circuit according to claim 1, further comprising current value setting means for setting a current value to be subtracted from a current detection output by said calculation means. 6. The gate drive circuit according to claim 1, further comprising a detection unit that detects a start of driving of the control unit. 7. The gate drive circuit according to claim 1, further comprising: a notification unit that notifies that an output value of the integration unit has exceeded a threshold value. 8. The gate drive circuit according to claim 1, further comprising reset means for resetting an output value of said integration means to zero. 9. A method for controlling a gate drive circuit, comprising: shunting an element current detection output from a main current flowing through a power switching element having a control input terminal; and subtracting a constant current from the element current detection output. The differential current is taken out, the differential current is integrated by the integrating means, and the control means provided in parallel with the control input terminal of the power switching element is controlled based on the integrated output of the integrating means, thereby A method for controlling a gate drive circuit, comprising controlling a control input terminal voltage. 10. The method of controlling a gate drive circuit according to claim 9, wherein the integrating means is a capacitor, and a voltage of the capacitor is used as an output value of the integrating means to control a control input terminal voltage of the power switching element. A method for controlling a gate drive circuit, comprising: 11. The control method for a gate drive circuit according to claim 9, wherein a current value of a constant current subtracted from said element current detection output can be set, thereby setting an overcurrent flowing through said power switching element. A method of controlling a gate drive circuit that has been made possible. 12. The method of controlling a gate drive circuit according to claim 9, wherein the control means controls the control input terminal voltage as a field effect type active element. 13. The method of controlling a gate drive circuit according to claim 12, wherein a current control type active element is provided in series with the field effect type active element, and the current control type active element is used to control the field effect type active element. And controlling the control input terminal voltage of the power switching element by compensating for the lack of the amplification degree. 14. The control method for a gate drive circuit according to claim 9, wherein when the control means controls the control input terminal voltage, the control means notifies the start of the control by using the current conduction of the control means. Control method of gate drive circuit. 15. The method of controlling a gate drive circuit according to claim 9, wherein the control means controls the control input terminal voltage, and then resets the output value of the integrating means to 0 by reset means to perform the same operation. The control method of the gate drive circuit which repeats.