JP2000164712A - Manufacture of electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of an electronic device, which can achieve low-resistance and highly reliable interlayer connection through a microscopic and high aspect ratio connection hole. SOLUTION: When a natural oxide film 5 and the like, which are undesirably formed on the surface of a lower conductive layer 4 exposed through the bottom of a connection hole 7, are cleaned by a discharge plasma treatment using inert gas, the temperature of a substrate stage is controlled to a temperature of 100 deg.C or higher. After the film 5 and the like are applied, a heat treatment at a temperature of 100 deg.C or higher in a reduced atmosphere is, applied discharge plasma treatment using the inert gas may be applied to the film 5 and the like.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an electronic device, and more particularly, to a method of manufacturing an electronic device such as a highly integrated semiconductor device.
nection), formation of upper conductive layer (Metalization)
The present invention relates to a method for manufacturing an electronic device having a feature in a pre-processing step before entering the step.

[0002]

2. Description of the Related Art ULSI (Ultra Large Scale Integrate)
d Circuits) and the like, the integration of semiconductor devices has been advanced, the design rules thereof have been miniaturized, and the multilayer wiring structure has been frequently used. In a multilayer wiring structure, a lower conductive layer and an upper conductive layer are electrically connected to each other through a contact hole (hereinafter, abbreviated as a via hole) formed in an interlayer insulating film. This via hole is also in the direction of miniaturization, for example, the minimum design rule is 0.18 μm
In the semiconductor device described above, the opening diameter of the via hole is 0.2
It is about 4 μm. Since the thickness of the interlayer insulating film itself is about 0.5 μm in view of the capacitance between wirings and the withstand voltage, the aspect ratio of the connection hole is about 2.

In order to realize a multi-layer wiring structure with low resistance and high reliability by using a via hole having such a fine opening diameter, a natural conductive layer formed inevitably on the surface of a lower conductive layer exposed at the bottom of the via hole is required. A pretreatment step for removing an oxide film and contaminants (hereinafter abbreviated as a natural oxide film or the like), that is, a cleaning step is indispensable.

A natural oxide film or the like on the surface of the lower conductive layer exposed at the bottom of the via hole mainly contains an oxide of the material of the lower conductive layer, and also contains etching residues, resist residues, adsorbed moisture and the like. To remove the natural oxide film and the like, A
Dry cleaning using reverse sputtering by r ⁺ ions has been proposed, and has been put to practical use for pretreatment of via holes using an Al-based metal or the like as a lower conductive layer. Since the directionality of Ar ⁺ ions can be controlled by an electric field or the like, it is easy to remove a natural oxide film or the like at the bottom of a fine via hole. However, in removing a native oxide film or the like on the surface of the lower conductive layer extending from the gate electrode, it has been pointed out that there is a fear that a gate insulating film is destroyed due to accumulation of charges due to incident Ar ⁺ ions.

Accordingly, the present inventor has disclosed a soft etching method using a low-substrate bias and high-density plasma processing apparatus as a pre-processing method for forming an upper conductive layer via a via hole, as disclosed in Japanese Patent Application Laid-Open No. 7-094473. Disclosed. According to this method, low-damage cleaning using low-energy Ar ⁺ ions is possible. In addition, the decrease in the etching rate that is concerned about can be compensated for by improving the plasma density.

[0006]

The adoption of a pre-treatment method by soft etching using such a low-substrate bias and high-density plasma processing apparatus has made a great progress in cleaning a naturally oxidized film at the bottom of a via hole, which has been further miniaturized. It was observed. However, it has not been possible to completely remove moisture firmly adsorbed on the surface of the substrate to be processed, which may cause outgassing during the formation of the upper conductive layer, and may make electrical characteristics at the contact interface unstable in the long term. There was a risk of becoming a factor.

In the current situation where the degree of integration of semiconductor devices is further increased, for example, the thickness of a gate insulating film is reduced to 10 nm or less, and the depth of an impurity diffusion layer is also becoming thinner, furthermore, low damage and stable cleaning are achieved. A method of conversion is desired. In addition to sputtering of an Al-based metal as the upper conductive layer, when a metal such as a high melting point metal such as tungsten or a metal such as copper having a low resistance is formed by a CVD method or an electrolytic plating method, a stricter degree of cleanliness is required. Is done.

An object of the present invention is to solve the above-mentioned problems of the background art. That is, the present invention can remove and clean a trace amount of adsorbed water as well as a natural oxide film on a substrate to be processed, even in a semiconductor device or the like to which a sub-quarter micron design rule is applied. It is an object of the present invention to provide a method of manufacturing an electronic device which can be performed without damaging elements such as MOS transistors formed on a substrate to be processed.

[0009]

SUMMARY OF THE INVENTION A method of manufacturing an electronic device according to the present invention is proposed to achieve the above object. That is, in the method for manufacturing an electronic device of the present invention, a step of opening a connection hole facing the lower conductive layer in an interlayer insulating film formed on the lower conductive layer on the substrate to be processed, A method of manufacturing an electronic device comprising a step of cleaning the surface of a lower conductive layer, and a step of continuously forming an upper conductive layer in at least the connection hole. And performing a discharge plasma treatment of a non-oxidizing gas while controlling the temperature to at least 100 ° C. or higher.

In another method of manufacturing a semiconductor device according to the present invention, a step of opening a connection hole facing the lower conductive layer in an interlayer insulating film formed on the lower conductive layer on the substrate to be processed; A method of manufacturing an electronic device, comprising: a step of cleaning a surface of a lower conductive layer exposed at a bottom portion; and a step of continuously forming an upper conductive layer at least in the connection hole.
The cleaning step includes a step of subjecting the substrate to be treated to a heat treatment of at least 100 ° C. or more in a reduced pressure atmosphere, and a step of subjecting the substrate to be treated to discharge plasma treatment of a non-oxidizing gas. I do.

According to still another method of manufacturing a semiconductor device of the present invention, a step of opening a connection hole facing the lower conductive layer in an interlayer insulating film formed on the lower conductive layer on the substrate to be processed, A method of manufacturing an electronic device, comprising: a step of cleaning a surface of a lower conductive layer exposed at a bottom portion; and a step of continuously forming an upper conductive layer at least in the connection hole.
This cleaning step includes a step of subjecting the substrate to be treated to a heat treatment of at least 100 ° C. in a reduced pressure atmosphere, and a discharge plasma treatment of a non-oxidizing gas while controlling the temperature of the substrate to be treated to at least 100 ° C. And a step of performing

In any of the inventions, the cleaning step is performed by a plasma processing apparatus having a substrate heating means, and the upper conductive layer forming step is connected to the plasma processing apparatus via a gate valve. It is desirable to apply it by a film forming apparatus.

"Continuously" means that the substrate to be processed is conveyed to a film forming apparatus by a vacuum gate valve or the like without exposing the substrate to a contaminated atmosphere such as the atmosphere, and the next step of forming an upper conductive layer is performed. . By such a continuous process, the upper conductive layer can be formed while avoiding reoxidation of the cleaned substrate and re-adsorption of moisture and the like. The non-oxidizing gas is
It is a rare gas such as He, Ar, Xe, Kr or Rn, or a mixed gas of these rare gases and a reducing gas such as H ₂ , HCl or HF.

In any of the inventions, this cleaning step is desirably performed by a plasma processing apparatus having an electrostatic chuck for the substrate to be processed.

An electronic device to which the present invention is directed includes a memory,
Logic, CCD (Charge Coupled Device), TFT (T
hin Film Transistor), microelectronics that use multilayer wiring or electrode formation through connection holes, such as thin-film magnetic head devices, thin-film inductor devices, thin-film coil devices, or micro-machine devices, etc. An apparatus is illustrated.

[Operation] By subjecting the substrate to be treated to discharge plasma treatment with a non-oxidizing gas while controlling the temperature to 100 ° C. or higher, moisture adsorbed on the surface of the substrate to be treated is rapidly desorbed and removed. And natural oxide films are sputtered out more effectively.

After the substrate to be treated is controlled to 100 ° C. or higher in a reduced-pressure atmosphere to desorb and remove a part or all of the adsorbed water, a discharge plasma treatment of a non-oxidizing gas is carried out. It is even more effectively removed.

Therefore, the surface of the substrate to be processed after the cleaning step can be obtained without any adsorbed moisture and natural oxide film. If the upper conductive layer is continuously formed, no outgassing is generated. The buried shape is improved, and the contact resistance at the contact interface is reduced.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a configuration example of a plasma processing apparatus used in a method of manufacturing an electronic device according to the present invention will be described with reference to FIGS.
This will be described with reference to FIG.

FIG. 2 is a schematic sectional view of a triode parallel plate type plasma processing apparatus. That is, in the plasma processing chamber 16, the substrate 10 to be processed is placed, and the substrate electrode 11 serving as one of the electrodes, the counter electrode 13, and the grid electrode 15 are provided at an intermediate position between these capacitance electrodes arranged in parallel. Is arranged. A substrate bias power supply 12 for applying a substrate bias potential is connected to the substrate stage 11, and a plasma generation power supply 14 is connected to the counter electrode 13, while the grid electrode 15 is set to the ground potential. Details of the temperature control means and the like of the substrate stage 11 will be described later. In FIG. 2, details of the apparatus such as a gas introducing unit, a gas exhausting unit, and a loading / unloading unit of the substrate to be processed 10 are omitted. In addition, a film forming apparatus such as a sputtering apparatus that vacuum-transports the substrate to be processed 10 in a subsequent process and continuously forms an upper conductive layer is not illustrated. The film formation method is E in addition to the DC sputtering method.
CR sputtering method, evaporation method, CVD (Chemical Vapor
Any method may be used as long as it is a film formation method suitable for the material of the upper conductive layer, such as a por deposition method.

According to the plasma processing apparatus of FIG. 2, the ^-3 10 ⁹ cm between opposing electrode 13 and the grid electrode 15 Plasma 1
7 is generated, and the incident energy of ions to the substrate 10 can be controlled independently of the input level of the plasma generation power supply 14. In other words, cations such as Ar ⁺ in the plasma 17 pass through the grid electrode 15 and enter the substrate 10 to be processed by the weak substrate bias potential formed by the substrate bias power supply 12 to clean the surface thereof. . Most of the generated gaseous reaction products are exhausted by the gas exhaust means. If a magnet is arranged on the back side of the counter electrode 13 or around the plasma processing chamber 16 to constitute a magnetron parallel plate type plasma processing apparatus using the magnetron motion of electrons in the plasma 17,
Plasma densities on the order of 10 ¹⁰ cm ^-3 can be obtained.

FIG. 3 shows an inductively coupled plasma (ICP: Indu
It is a schematic sectional drawing of a ctively Coupled Plasma) processing apparatus. That is, the substrate stage 11 on which the substrate to be processed 10 is mounted is disposed in the plasma processing chamber 16. The substrate stage 11 is connected to a substrate bias power supply 12 for applying a substrate bias potential. Substrate stage 1
Details of the temperature control means 1 will be described later. An inductive coupling coil 18 is wound around the plasma processing chamber 16 made of a dielectric material such as quartz or alumina in multiple layers, and an ICP power supply 19 is connected here. In FIG. 3, details of the apparatus such as a gas introducing unit, a gas exhausting unit, and a loading / unloading unit of the substrate to be processed 10 are not shown. In addition, a film forming apparatus such as a sputtering apparatus that vacuum-transports the substrate to be processed 10 in a subsequent process and continuously forms an upper conductive layer is not illustrated.

According to the plasma processing apparatus shown in FIG. 3, due to the alternating electric field generated by the inductive coupling coil 18, it is 10 ¹¹ cm ^-3.
The high-density plasma 17 or more can be generated. A large amount of cations such as Ar ⁺ in the plasma 17 enter the substrate 10 to be processed by a weak substrate bias potential generated by the substrate bias power supply 12.

FIG. 4 is a schematic sectional view of the substrate stage 11 of the plasma processing apparatus shown in FIGS. Substrate 1 to be processed
A heater 21 and a refrigerant pipe 22 for circulating a refrigerant such as ethanol or Fluorinert (trade name) are disposed in the substrate stage 11 on which the substrate 0 is mounted. The temperature of the target substrate 10 can be controlled to a desired temperature. Substrate 1 to be processed
The surface of the substrate stage 11 immediately below 0 is made of ceramics such as quartz in which fine grooves such as radial shapes are formed,
An electrostatic attraction electrode 20 is buried in the lower part. A heat conduction medium introduction hole 23 for penetrating a heat conduction gas such as He gas is formed through the center of the substrate stage 11.

With the configuration of the substrate stage 11 shown in FIG. 4, the substrate 10 to be processed is brought into close contact with the surface of the substrate stage 11, and the substrate 10 to be processed 10
Can be controlled with high precision.

According to the plasma processing apparatus illustrated in FIGS. 2 and 3, the temperature of the substrate to be processed is, for example, 100.degree.
Irradiating the substrate to be treated with rare gas ions and hydrogen active species while controlling the temperature to a desired temperature within the range of 0 ° C. and maintaining the substrate bias potential at a relatively low potential within the range of several tens to several hundreds of volts be able to. Therefore, not only the natural oxide film is removed under the low damage condition, but also the adsorbed water is sufficiently removed, and there is no risk of re-contamination or re-oxidation. Can be formed.

Next, a method of manufacturing a highly integrated semiconductor device will be described as an example of an electronic device with reference to FIG.

FIG. 1 is a schematic sectional view showing the steps of the main part of the method for manufacturing a semiconductor device. FIG. 1A shows a substrate to be processed before a cleaning step is performed. A lower interlayer insulating film 2 is formed on a semiconductor substrate 1, and a contact hole 3 is opened facing an impurity diffusion layer (not shown) formed in the semiconductor substrate 1. Lower conductive layer 4 is formed in contact hole 3 and on lower interlayer insulating film 2. The lower conductive layer 4 includes a barrier layer and a wiring layer from below. The lower barrier layer is made of Ti, TiN, Ti or T
It consists of a single layer or a laminate of a high melting point metal such as iSi ₂ or a compound thereof. The wiring layer is made of Al-based metal, high-melting-point metal such as W or Mo, high-melting-point metal polycide, polycrystalline silicon, Cu, or the like.

On the lower conductive layer 4, an upper interlayer insulating film 6
Are formed, and a connection hole (via hole) 7 is opened here. On the surface of the lower conductive layer 4 exposed at the bottom of the (via hole) 7, a natural oxide film 5 or the like is formed.
This natural oxide film or the like 5 is formed of an original natural oxide film, an etching residue or a resist residue in the step of forming the connection hole 7,
Alternatively, it contains an organic substance such as a reaction product. Further, a moisture adsorption layer (not shown) is formed on the surface of the substrate to be processed. Although the thickness of the adsorption layer is extremely thin and not shown, it is firmly attached to the surface of the substrate to be processed.

If the upper conductive layer forming step is performed in a later step while the natural oxide film 5 or the like 5 is present, adverse effects such as deterioration of the buried shape and an increase in contact resistance are caused. Therefore, an object of the present invention is to remove the natural oxide film 5 completely without damaging elements such as MOS transistors formed on a semiconductor substrate.

FIG. 1B shows a cleaning step of removing the natural oxide film 5 and the like. That is, a state in which the natural oxide film 5 or the like 5 is sputtered out by discharge plasma treatment of a non-oxidizing gas, here, irradiation treatment of Ar ⁺ ions, is schematically shown. At this time, the temperature of the substrate to be processed is 100
It is controlled above ℃. Alternatively, the substrate to be processed has already been heat-treated in a reduced pressure atmosphere. In this state, the adsorbed water is also removed at the same time. If the substrate to be processed is preheated, most of the adsorbed moisture has already been removed, but by this discharge plasma treatment, it is almost completely removed. As the rare gas, Xe, Kr, He, Rn, or the like can be used in addition to general Ar. Further, a reducing gas such as H ₂ , HCl or HF may be added together with the rare gas.

FIG. 1C shows a state in which an upper conductive layer 8 that contacts the cleaned connection hole 7 is formed. The upper conductive layer 8 is formed by continuously forming the cleaned substrate to be processed without exposing it to the atmosphere and patterning the same. The upper conductive layer 8 also includes a barrier layer and a wiring layer from below. The lower barrier layer is a single layer or a laminate of a high melting point metal such as Ti, TiN, Ti or TiSi ₂ or a compound thereof. The upper wiring layer is made of Al-based metal, W
High melting point metal such as Mo and Mo, polycrystalline silicon, or Cu
Etc. FIG. 1C shows a structure in which a contact plug filling the connection hole 7 and an upper wiring extending over the upper interlayer insulating film 6 are integrated, but these may be formed separately from different materials. Good.

FIG. 1 shows, as an example, the step of cleaning the native oxide film 5 and the like on the surface of the lower conductive layer 4 exposed at the bottom of the connection hole 7, and further performs the cleaning step on the connection hole facing the upper conductive layer 8. May be applied. Further, the pad electrode exposed from the opening of the final passivation film may be used as a lower conductive layer, and the pad electrode may be cleaned.

As a plasma generation method preferably adopted in the present invention, in addition to the ICP method, a TCP (Transformer
Coupled Plasma) method, Helicon wave plasma method, MC
An R (Magneticaly Cnfined Reactor) plasma system or an ECR (Electron Cyclotron Resonance) plasma system is exemplified. These devices are 1 × 10 ¹¹ cm ^-3
This is the high-density plasma generation source described above. Although a higher plasma density is desirable, a plasma density of 1 × 10 ¹⁴ cm ⁻³ is almost a limit value in the current high vacuum plasma processing apparatus.

[0035]

The present invention will be described in more detail with reference to the following examples. However, these examples are merely examples, and the present invention is not limited to the following examples.

[Embodiment 1] In this embodiment, a triode parallel plate type plasma processing apparatus shown in FIG. 2 is used to remove a natural oxide film and the like adsorbed moisture on the surface of a lower conductive layer exposed at the bottom of a connection hole and remove a rare gas. This is an example of cleaning by sputter etching. This step will be described again with reference to FIG.

The substrate to be processed before the cleaning treatment shown in FIG. 1A has the above-described structure, of which the semiconductor substrate 1 is a single crystal silicon, the lower interlayer insulating film 2 is SiO ₂ , and the lower conductive layer 4 is It has a laminated structure of a barrier layer made of TiN / Ti = 70/30 nm and a wiring layer made of Al-0.5% Cu and having a thickness of 0.5 μm. On the lower conductive layer 4, S
An upper interlayer insulating film 6 made of iO ₂ is formed, and a connection hole 7 facing this lower conductive layer 4 is formed. The opening diameter of the connection hole 7 is about 0.24 μm, the thickness of the upper interlayer insulating film 6 is about 0.5 μm, and the aspect ratio of the connection hole 7 is about 2.

On the surface of the lower conductive layer 4 exposed at the bottom of the connection hole 7, a natural oxide film or the like 5 is formed undesirably, and an adsorbed moisture layer (not shown) is firmly adhered. FIG.
In (a), the natural oxide film 5 is shown thicker than it actually is for explanation.

The substrate to be processed shown in FIG. 1A was carried on the substrate stage 11 of the plasma processing apparatus shown in FIG. 2, and was subjected to discharge plasma processing of a rare gas which is a non-oxidizing gas under the following conditions. . Ar 25 sccm pressure 0.7 Pa plasma generation power 600 W (2 MHz) Substrate bias voltage 400 V (13.56 MHz) Substrate stage temperature 100 ° C. Time 60 sec

In this discharge plasma processing step, FIG.
As shown in (b), by irradiating Ar ⁺ ions shown by solid arrows, the native oxide film 5 at the bottom of the connection hole 7 is sputtered out and removed as gaseous reaction products shown by broken arrows. At the same time, the adsorbed water is also removed. Ar in the present embodiment
The irradiation energy of the ⁺ ions is relatively low, and the possibility of damaging the substrate 10 to be processed is small. The lowering of the etching rate due to the lower irradiation energy is compensated for by the higher irradiation density. The substrate to be processed 10
Since the surface of the substrate 10 to be processed 10 is uniformly adhered to the surface of the substrate 10 to be processed by being brought into close contact with the surface of the substrate stage 11 controlled at 0 ° C. by the electrostatic chuck, and the heat conductive gas being introduced to the back of the substrate 10 to be processed. Even with the substrate 10 having a large diameter, a uniform cleaning treatment can be performed.

The cleaned substrate 10 is vacuum-transported via a gate valve onto a stage of a sputtering apparatus, which is an example of a film forming apparatus (not shown), and immediately forms an upper conductive layer 8. In this embodiment, as the upper conductive layer 8, T
a barrier layer composed of iN / Ti = 60/30 nm;
A wiring layer having a thickness of 0.6 μm and made of −0.5% Cu is continuously formed by sputtering. FIG. 1C shows a state in which the upper conductive layer 8 is formed.
In the sputtering step of the upper conductive layer 8,
Since a small amount of gas is released from 0 and the surface of the lower conductive layer 4 exposed from the connection hole 7 is cleaned, a low-resistance via contact with a good buried shape can be formed. After that, the upper conductive layer 8 is etched into a desired wiring pattern or a CMP (Chemical Mechanical Policy).
(shinging) to be embedded in the connection hole 7 to form a via contact plug.

The per sample 100 batch continuous process according to this example, the resistance of the test circuit formed of 10 ⁴ vias chain, the yield rate of those within a predetermined value was 100%. On the other hand, the non-defective rate of the same test circuit of a sample processed continuously for 100 batches under the same conditions except that the temperature of the substrate to be processed was not controlled was only 30%.

[Embodiment 2] In this embodiment, the I shown in FIG.
First, heat treatment is performed in a reduced-pressure atmosphere on a natural oxide film or the like and the adsorbed moisture on the conductive layer surface exposed at the bottom of the connection hole by a CP type plasma processing apparatus, and then discharge plasma processing is performed using a mixed gas of a rare gas and a reducing gas. This is an example of cleaning. This step will be described again with reference to FIG.

The substrate to be processed shown in FIG. 1A before the cleaning treatment is the same as that in the first embodiment, and the duplicate description will be omitted. The substrate to be processed is loaded on the substrate stage 11 of the plasma processing apparatus shown in FIG.
A heat treatment of at least 00 ° C. is performed. (Heat treatment conditions in reduced pressure atmosphere) Ar 100 sccm Pressure 3 Pa Substrate stage temperature 100 ° C. Time 120 sec

The heat treatment is performed under the condition that Ar is allowed to flow, but 10 ^-6 Pa without any gas flow.
The heat treatment may be performed under a high vacuum. The upper limit of the heat treatment temperature varies depending on the configuration of the substrate to be processed. For example, about 700 ° C. to prevent the profile of the impurity diffusion layer of the semiconductor substrate, about 500 ° C. if an Al-based metal layer wiring is formed, and an organic polymer based low dielectric constant interlayer insulating film may be formed. For example, the upper limit is about 200 to 350 ° C.
The upper limit of the temperature of the substrate to be processed is the same as the control temperature of the substrate to be processed during the discharge plasma processing in the first embodiment.

Next, a discharge plasma treatment using an Ar / HCl mixed gas is performed. (Discharge plasma processing conditions) Ar 25 sccm HCl 5 sccm Pressure 0.4 Pa ICP power 1 kW (450 kHz) Substrate bias voltage 350 V Substrate stage temperature 100 ° C. Time 60 sec

In this discharge plasma processing step, the first embodiment
Since the sputtering is performed in a high-vacuum atmosphere as compared with the method described above, high-density ion species enter the substrate to be processed without scattering. This incident energy is relatively low energy, and FIG.
As shown in (b), by irradiating Ar ⁺ ions indicated by solid arrows, a natural oxide film 5 formed undesirably on the surface of the lower conductive layer 4 exposed at the bottom of the connection hole 7 is sputtered out.
It is removed as a gaseous reaction product indicated by a dashed arrow.
At the same time, a reduction reaction by the added HCl is added,
The natural oxide film 5 and the like 5 are more effectively removed, and a clean conductive layer surface is exposed. In this step, the discharge plasma treatment may be performed without heating the substrate to be processed. This is because most of the adsorbed moisture has already been removed at the stage of starting the discharge plasma treatment.

The cleaned substrate 10 is vacuum-transported through a gate valve onto a stage of a sputtering apparatus, which is an example of a film forming apparatus (not shown), and immediately forms an upper conductive layer 8. Also in this embodiment, as the upper conductive layer 8,
A barrier layer composed of TiN / Ti = 60/30 nm;
A wiring layer having a thickness of 0.6 μm made of 1-0.5% Cu and a laminated structure formed by sputtering continuously. FIG. 1C shows a state in which the upper conductive layer 8 is formed.
The upper conductive layer 8 is thereafter etched into a desired wiring pattern or buried in the connection hole 7 by CMP to form a via contact plug. The upper conductive layer 8 may be formed by a vacuum evaporation method or a CVD method.

[0049] per this example samples 100 batch continuous process, the 10 resistance at the ^four test circuit to form a via chain, the yield rate of those within a predetermined value was also 100%. On the other hand, the non-defective rate of the same test circuit of the sample continuously processed 100 batches under the same conditions except that the heat treatment in the reduced pressure atmosphere is not performed in advance and the substrate to be processed is not heated in the discharge plasma processing is performed. 40
% Stayed.

Although the present invention has been described in detail with reference to two examples, the present invention is not limited to these examples.

For example, as the plasma processing apparatus, an ECR plasma processing apparatus, a helicon wave plasma processing apparatus, or the like can be employed in addition to a triode parallel plate type plasma processing apparatus and an ICP apparatus. From the viewpoint that cleaning with low ion energy is possible, the ion density is 1 × 10
A high-density plasma processing apparatus of ¹¹ cm ^-3 or more is preferably used.

The step of heating the substrate to be processed in a reduced pressure atmosphere can be performed in a vacuum load lock chamber or the like connected to the plasma processing apparatus. Substrate temperature to be processed is 100 ° C
However, this is the lower limit temperature at which the effect of removing adsorbed moisture is remarkably exhibited, and a higher temperature may be selected according to the configuration of the substrate to be treated.

Although Ar was used as the non-oxidizing gas,
e, Xe, may be used Kr or Rn like other noble gases, also may be used by adding of H ₂ and the like in addition to the HCl as the reducing gas.

The lower conductive layer on the substrate to be processed may be an impurity diffusion layer, a semiconductor film of a thin film transistor, or the like, in addition to the gate electrode and wiring formed on the silicon substrate. As a semiconductor substrate, in addition to silicon, SiGe
Or a compound semiconductor such as Ge or GaAs. In addition, it goes without saying that the configuration of the substrate to be processed can be appropriately changed. The present invention provides a thin-film magnetic head device, a thin-film inductor device, a thin-film coil device, or a micro-machine device of a multilayer coil type in addition to a semiconductor device.
The target is a microelectronic device that employs multilayer wiring or electrode formation using connection holes.

[0055]

As is apparent from the above description, according to the method of manufacturing an electronic device of the present invention, even a fine electronic device such as a highly integrated semiconductor device to which a sub-quarter micron design rule is applied can be used. The processing substrate can be subjected to low-damage and uniform cleaning treatment.

Therefore, in an electronic device such as a highly integrated semiconductor device, an interlayer connection structure using a connection hole having a fine opening diameter and a high aspect ratio can have low resistance and high reliability.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view illustrating a step of a method for manufacturing a semiconductor device as an example of an electronic device of the present invention.

FIG. 2 is a schematic sectional view of a plasma processing apparatus applied to the method of manufacturing an electronic device according to the present invention.

FIG. 3 is a schematic sectional view of another plasma processing apparatus applied to the method of manufacturing an electronic device according to the present invention.

FIG. 4 is a schematic sectional view of a substrate stage of the plasma processing apparatus of FIGS. 2 and 3;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor base, 2 ... Lower interlayer insulating film, 3 ... Contact hole, 4 ... Lower conductive layer, 5 ... Natural oxide film, etc. 6 ... Upper interlayer insulating film, 7 ... Connection hole (via hole), 8 ... Upper conductive layer DESCRIPTION OF SYMBOLS 10 ... Substrate to be processed, 11 ... Substrate stage, 12 ... Substrate bias power supply, 13 ... Counter electrode, 14 ... Plasma generation power supply, 15 ... Lattice electrode, 16 ... Plasma processing chamber, 17 ... Plasma, 18 ... Inductive coupling coil, 19 ... ICP power supply, 2
0: Electrostatic adsorption electrode, 21: Heater, 22: Refrigerant pipe, 2
3 ... Heat conduction medium introduction hole

 ──────────────────────────────────────────────────続 き Continued on front page F-term (reference) JJ20 JJ26 JJ33 KK01 KK04 KK08 KK09 KK11 KK18 KK19 KK20 KK26 KK27 KK33 MM07 MM08 QQ14 QQ37 QQ92 QQ93 QQ94 QQ98 XX09

Claims (5)

[Claims] A step of opening a connection hole facing the lower conductive layer in an interlayer insulating film formed on the lower conductive layer on the substrate to be processed; and cleaning the surface of the lower conductive layer exposed at the bottom of the connection hole. A method of manufacturing an electronic device, comprising: a step of continuously forming an upper conductive layer at least in the connection hole, wherein the cleaning step comprises: setting the temperature of the substrate to be processed to at least 100 ° C. or higher. Performing a discharge plasma treatment of a non-oxidizing gas while controlling the temperature of the electronic device. 2. A step of opening a connection hole facing the lower conductive layer in an interlayer insulating film formed on the lower conductive layer on the substrate to be processed, cleaning the surface of the lower conductive layer exposed at the bottom of the connection hole. A method of manufacturing an electronic device, comprising: a step of continuously forming at least an upper conductive layer in the connection hole, wherein the cleaning step comprises: 100 ℃
A method of manufacturing an electronic device, comprising: a step of performing the heat treatment described above; and a step of performing a discharge plasma treatment of a non-oxidizing gas on the substrate to be processed. 3. A step of opening a connection hole facing the lower conductive layer in an interlayer insulating film formed on the lower conductive layer on the substrate to be processed, cleaning the surface of the lower conductive layer exposed at the bottom of the connection hole. A method of manufacturing an electronic device, comprising: a step of continuously forming at least an upper conductive layer in the connection hole, wherein the cleaning step comprises: 100 ℃
A method for manufacturing an electronic device, comprising: a step of performing the above heat treatment; and a step of performing a discharge plasma treatment of a non-oxidizing gas while controlling the temperature of the substrate to be processed to at least 100 ° C. or higher. 4. The cleaning step is performed by a plasma processing apparatus having a substrate heating means to be processed, and the upper conductive layer forming step is performed by a film forming apparatus connected to the plasma processing apparatus via a gate valve. The method for manufacturing an electronic device according to claim 1, wherein the method is applied. 5. The electronic device according to claim 1, wherein the cleaning step is performed by a plasma processing apparatus having an electrostatic chuck for the substrate to be processed. Method.