JPH10209155A - Method for forming wiring of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for forming a Cu-contg. Al alloy wiring, etc., which suppresses the Cu residue, without needing new facilities and without adding complicated steps. SOLUTION: On the entire surface of an insulation film 1 a Ti type barrier film 3 having a barrier and adhesion properties, Al film 5 and Ti type antireflective film 7 are formed so as to form the Al film sandwiched between the Ti type films. A resist is applied and a wiring pattern is transfer thereto by the photolithography. Using the resist as a mask, the wiring films 3, 5, 7 are processed to form conductive wires 11. After peeling off the resist, the entire substrate surface is implanted with Cu ions 13 to introduce Cu in the conductive wires. The substrate is heat treated to thermally diffuse Cu in the conductive wires to form a Cu-contg.-Al wiring 21.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a wiring of a semiconductor device, and more particularly to an aluminum containing copper (Cu) in order to improve the resistance to electro-migration (hereinafter referred to as EM). The present invention relates to a method for forming a wiring of a semiconductor device in which a wiring of (Al) is formed while suppressing a Cu residue.

[0002]

2. Description of the Related Art At present, A is used as a wiring material for a semiconductor device.
1-based alloys are widely used. However, in a wiring formed of such an Al-based alloy, the current density flowing in the wiring increases as the miniaturization of the semiconductor device progresses, and the EM phenomenon becomes a problem. For this reason, materials are being studied for the purpose of improving EM resistance. Among them, recently, Cu-containing Al-based alloys (hereinafter, referred to as Al-Cu-based alloys) are often used.

[0003] On the other hand, when processing an Al-Cu alloy using lithography, etching, or the like, there is a problem of a Cu residue generated at the time of etching. This problem will be described with reference to FIG. FIG. 5 shows a semiconductor substrate 50.
FIG. 3 is a schematic diagram showing a case where an Al-Cu-based alloy wiring is formed on an insulating film 51 formed thereon. Barrier film 5
3. An Al—Cu alloy film 55 and an antireflection film 57 are formed on the insulating film 51 in this order (FIG. 5A). Then
The wiring pattern is transferred to a resist by photolithography and etched to form the wiring 59 (FIG. 5).
(B)). However, in the case of the Al-based film, Cu residue 61 is generated on the insulating film 51 because chlorine (Cl ₂ ) is used as a main etching gas during etching. This is because CuCl ₂ having a low vapor pressure is generated as a reaction product of Cl ₂ and Cu of the etching gas, and this is generated as a residue on the insulating film. This residue is the wiring R,
When the wirings are formed between the wirings L and these wirings are electrically short-circuited, the yield of semiconductor chips is reduced.

In order to avoid such a problem, Japanese Patent Application Laid-Open No. 4-356923 proposes a method of removing a Cu residue by changing it to copper sulfate. in this way,
First, the substrate is placed in an ammonium hydrogen sulfide (NH ₄ SH) atmosphere under reduced pressure at a substrate temperature of 200 ° C.
The Cu residue is changed to copper sulfate (CuS), and then boiled (80 ° C.) using ammonia peroxide (NH ₄ OH / H ₂ O ₂ ) to remove copper sulfate (hereinafter referred to as conventional). Technology 1).

[0005] In the Japanese Patent 4-359427 discloses, after etching the Al-Cu-based alloy by a chlorine-based gas, having higher vapor pressure of Cu residue by NO _x containing gas while heating the substrate to 250 ° C. Cu (NO ₃ ) ₂ has been proposed for removal (hereinafter referred to as prior art 2).
).

Further, Japanese Patent Application Laid-Open No. 7-221079 discloses that an etching reaction product CuCl _x is produced by utilizing high-density plasma such as helicon wave plasma or inductively coupled plasma and using an etching gas such as BCl ₃ / Cl _2. AlCl _x
A device and a method for removing Cu residues by reacting with chloroaluminum copper having a high vapor pressure have been proposed (hereinafter referred to as prior art 3).

[0007]

However, in the prior art 1, after the resist is removed by ashing,
The substrate temperature was set to 200 ° C., the substrate was placed in an ammonium hydrogen sulfide (NH ₄ SH) atmosphere under reduced pressure, and boiled with ammonia peroxide (NH ₄ OH / H ₂ O ₂ ).
In order to remove the u residue, a complicated process requiring temperature control or the like was required.

[0008] In the prior art 2, after etching the Al-Cu-based alloy of Al-based etching gas, further to remove the Cu residue by NO _x based gas to the substrate to 250 ° C., it has required complicated process.

In addition, these prior art 1 and prior art 2
Is a method of removing the generated Cu residue thereafter, and it is difficult to completely remove the residue.

In the prior art 3, in order to generate high-density plasma such as helicon wave plasma or inductively coupled plasma, the conventional etching apparatus must be improved or a new etching apparatus must be introduced.

Accordingly, an object of the present invention is to provide a wiring for a semiconductor device which forms an Al wiring containing Cu while suppressing Cu residues without requiring new equipment and without adding a complicated process. It is to provide a forming method.

[0012]

Therefore, the present invention has the following configuration.

In the method of forming a wiring of a semiconductor device according to the present invention, the method of forming a wiring of a semiconductor device in which an aluminum wiring containing at least copper is formed on an insulating film formed on a semiconductor substrate is preferably an aluminum or aluminum alloy. A conductive film made of any one of the above, on the insulating film, a processing step of processing the conductive film to form a wiring shape, and after the processing step, ion implantation of copper on the semiconductor substrate. And a heating step of forming a wiring by performing a heat treatment after the ion implantation step.

As described above, an Al alloy containing no Al or copper (Cu) (referred to as an Al alloy or the like) is formed and processed to form a wiring shape on this film. No need to etch. For this reason, generation of Cu residue can be suppressed. In addition, Cu is introduced by ion implantation after the shape of the wiring is formed, and then Cu is diffused in the processed film when heat treatment is performed, so that a wiring made of an Al alloy or the like containing at least Cu can be formed.

In the method for forming a wiring of a semiconductor device according to the present invention, in the ion implantation step, ions may be implanted into the entire surface of the semiconductor substrate.

As described above, if ion implantation is performed on the entire surface of the substrate, a photolithography step necessary for performing ion implantation only on a specific region or the like can be omitted.

In the method for forming a wiring of a semiconductor device according to the present invention, in the ion implantation step, the ion implantation may be performed at an angle to the surface of the semiconductor substrate.

As described above, if the ion implantation is performed at an angle with respect to the substrate surface, Cu is introduced not only from the upper surface but also from the side surfaces of the processed film.

In the method for forming a wiring of a semiconductor device according to the present invention, the film formed in the film forming step may be made of aluminum or an aluminum alloy containing silicon.

As described above, if an Al alloy containing aluminum and Si is formed into a film, fine processing can be performed on the film using a material and an etching condition which have been used in the past.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the accompanying drawings. In addition, the same portions are denoted by the same reference numerals, and overlapping description will be omitted. Hereinafter, the term “Al alloy” refers to an alloy containing Al as a main component and not containing Cu.

(First Embodiment) FIG. 1 and FIG.
FIG. 4 is a process cross-sectional view of one embodiment of a method for forming a wiring of a semiconductor device according to the present invention. Hereinafter, a case where the semiconductor substrate 100 is used as an example of a semiconductor substrate will be described with reference to these drawings. In addition, a semiconductor substrate in which a semiconductor layer is formed over an insulating substrate or the like may be used.

Although not shown in the drawings, a MIS-forming semiconductor integrated circuit is formed on a semiconductor substrate 100.
A semiconductor element such as an FET (insulated gate field effect transistor) is formed, and an insulating film 1 is formed to cover the element.

The material of the underlying insulating layer 1 is SiO ₂
A system, a SiN system, a SiON system, or a material containing these and other elements (elements to be added to a semiconductor as impurities) is preferable because film formation is easy. Further, the insulating film 1 may be formed by stacking these materials.

The insulating film 1 is formed by CVD (Chemic).
It is preferable to use an al vapor deposition (chemical vapor deposition) method. After forming a film by this method, heat treatment and CMP (Chemical
Mechanical Polishing (chemical mechanical polishing) method, SOG (Spin On Glass)
Alternatively, planarization by an etch-back method or the like using a resist is preferable for miniaturization of the upper wiring. In addition, PVD (Physical Vapor)
The film may be formed by a Deposition method. An example of a method for forming the insulating film 1 is BPSG.
(Boron-phosphorus-doped silicate glass) film CVD
There is a method in which a film is formed by a method and then flattened by reflow by heat treatment.

[Step 1-1] First, a conductive barrier film 3 is formed on the entire surface of the insulating film 1. As the barrier film 3, for example, titanium nitride (TiN) for securing a barrier property
A structure in which a film or the like is sandwiched by a titanium (Ti) film or the like or laminated with a Ti film or the like to secure adhesion is preferable. Then
A conductive film 5 of Al or an Al alloy (hereinafter, referred to as an Al alloy or the like) is formed on the barrier film 3 (film forming step). continue,
An antireflection film 7 is formed on the film 5. As the antireflection film 7, for example, it is preferable to use TiN or the like. These barrier film 3, film 5 of Al alloy or the like and antireflection film 7
It is preferable to form by a sputtering method with good step coverage. This allows T
A film of an Al alloy or the like sandwiched between the i-based films is formed (FIG. 1A). An example of film forming conditions of each film is as follows: Film forming conditions of Ti layer: Process gas: Ar = 29 [sccm] Pressure: 2 [mTorr] DC power: 3 [kW] Film forming temperature: 200 [° C.] Film Thickness: barrier film 20 [nm] TiN layer film forming condition: process gas: Ar / N ₂ = 28/56 [sccm] pressure: 2 [mTorr] DC power: 8 [kW] film forming temperature: 200 [° C.] Film thickness: barrier film 20 [nm] on Ti film Film thickness: anti-reflection film 100 [nm] Al layer film formation conditions: target: Al containing 1% Si Process gas: Ar = 70 [sccm] Pressure: 1.7 [mTorr] DC power: 13 [kW] Film forming temperature: 300 [° C] Film thickness: 500 [nm] Note that an Al alloy or the like can be formed at a high temperature.

As the Al alloy, pure aluminum (A
1), various alloys containing Al as a main component, such as Al-Si and Al-Ge, and conductive materials are preferable because they are easily processed. Alternatively, a material formed by stacking a plurality of these materials may be used. Further, in addition to the Ti and TiN films, a refractory metal or a compound having conductivity, for example, T
iON: H, tungsten (W), or the like may be appropriately formed and used.

The formation of the Al alloy or the like and the Ti-based film is performed by PV
It is preferable to form the film by the method D. As the PVD method, there is a vacuum evaporation method and the like in addition to the sputtering method.
Further, a film may be formed by a CVD method.

[Step 1-2] Next, a resist is applied, and a resist 9 in which the planar shape of the wiring is transferred by photolithography is formed (FIG. 1B).

[Step 1-3] Subsequently, the conductive line 11 is formed (processing step) (FIG. 1C). The conductive wire is a conductor having the same planar shape as a wiring formed by processing a film made of an Al alloy or the like formed on the insulating film 1 and has not yet introduced Cu.

The processing of the conductive wire 11 is preferably performed by etching the wiring thin films 3, 5, and 7 using the resist 9 as a mask. In particular, when a fine conductive line is formed, a dry etching method is used, and RIE (Reactive Ion Etchi) having anisotropy in an etching direction is used.
ng: reactive ion etching) method. It is preferable to use a gas containing chlorine (Cl ₂ ) as a main component as an etching gas. More specifically, it is preferable to use a gas containing Cl ₂ as a main component and containing at least BCl ₃ , or a gas containing at least Cl ₂ , BCl ₃ and Ar, for etching an Al alloy or the like. An example of the etching conditions is shown below. The etching is performed in two steps. First step: Gas used: BCl ₃ / Cl ₂ / Ar = 20/120/60 [sccm] Pressure: 667 [mPa] Microwave current: 200 [mA] RF power: 110 [W] Second step: Gas used: BCl ₃ / Cl ₂ / Ar = 20/80/100 [sccm] Pressure: 667 [mPa] Microwave current: 200 [mA] RF power: 110 [W] .

[Step 1-4] After the conductive wires 11 are formed, the resist is plasma-ashed, wet-cleaned, and peeled off, and then ion implantation is performed on the entire surface of the substrate to introduce Cu into the conductive wires. (Ion implantation step) (FIG. 2). In the present embodiment, the ion implantation has been described as an example in which the ion implantation is performed at an angle of 0 degree with respect to the normal direction of the substrate surface, that is, in the direction perpendicular to the substrate surface. If the entire surface is implanted, the number of photolithography steps can be reduced as compared with the case where ion implantation is performed only in a specific region. An example of ion implantation conditions is as follows: acceleration energy: 200 [kev] dose: 5 × 10 ⁺¹⁶ [cm ⁻² ].

The ion implantation is preferably performed from a direction inclined at a predetermined angle with respect to the normal direction of the substrate as shown in FIG. With this configuration, Cu can be introduced into the conductive line from the side surface of the wiring. As the inclination angle, A
The angle is preferably 5 to 10 degrees so as to be injected also into the side wall.

[Step 1-5] (not shown) After the ion implantation, the substrate is subjected to a heat treatment (heating step). In the heating step, the substrate is placed in a heat treatment furnace, and Cu is thermally diffused into the conductive wires 11 to form the wiring 21. By doing so, the wiring 21 made of an Al alloy or the like containing Cu can be formed. As an example of the heat treatment conditions, there is a method in which the temperature of the furnace is set to about 400 ° C. and the heat treatment is performed for about 60 minutes. The heat treatment may be a sinter or an anneal. In particular, this heat treatment is preferably performed in a hydrogen atmosphere. This is because it can also serve as a heat treatment in a hydrogen atmosphere performed near the final step of the semiconductor device.

The case where a single-layer wiring is formed has been described above. However, the wiring 21 is formed by the W film embedded in the connection hole formed in the insulating film 1 by the CVD method, thereby forming the underlying semiconductor element and the upper layer. Is connected to at least one of the wiring layers. Further, when the present invention is applied to a multi-layer wiring, the [Step 1-1] to [Step 1] of the method for forming a wiring of a semiconductor device according to the present invention are preferably sandwiched by a flattened insulating film.
4] may be repeatedly applied to each wiring layer. Then, after forming a multilayer wiring of a predetermined layer, [Step 1-
5] may be performed.

(Second Embodiment) FIG. 4 is a process sectional view showing one embodiment of a method for forming a wiring of a semiconductor device according to the present invention. In this embodiment mode, a case will be described in which ion implantation is performed only on the conductive line or mainly in the vicinity of the conductive line. The film 5 for forming the wiring is processed and the conductive line 11 is formed.
Are formed in the same manner as [Step 1-1] to [Step 1-3] shown in the first embodiment, and a description thereof will be omitted.

FIG. 4 shows [Step 2-4] corresponding to [Step 1-4] in FIG. 2. After exposing the applied resist to open the upper surface of the conductive wire, the resist 17 is used as a mask material. Shows a step of performing ion implantation. When the ion implantation 19 is performed by opening only the region where the conductive line 11 exists, Cu is ion-implanted only into the conductive line 11.

The ion implantation 19 may be performed after opening the resist on the conductive line 11 and the vicinity thereof. By doing so, ion implantation is performed only on conductive line 11 and its vicinity.

If Cu is introduced only into a specific region as described above, Cu is ion-implanted into a region other than the vicinity of the conductive wire, so that there is no concern about a characteristic defect that may be caused by Cu.

After performing the ion implantation, [Step 1-5]
When heat treatment is performed under the same conditions as above, the Al wiring 21 containing Cu can be formed.

The same conditions as in the first embodiment can be applied to the conditions such as the ion implantation energy and dose.

As described above in detail in the first embodiment and the second embodiment, according to the method for forming a wiring of a semiconductor device according to the present invention, A
Since a film of an alloy or the like is formed and processed to form a conductive wire, no Cu residue is generated when processing a film of an Al alloy or the like. Further, after the conductive wire is formed, Cu is introduced into the conductive wire by performing ion implantation and heat treatment is performed. Since Cu diffuses into the conductive wire such as an Al alloy, a wiring made of an Al alloy or the like containing Cu is formed. it can. Therefore, an Al wiring having EM resistance can be formed without generating a Cu residue. Further, since the wiring is processed before introducing Cu, regardless of the composition of Cu contained in the wiring, Cu
The generation of residues can be suppressed. Furthermore, even if the amount of Cu introduced is changed in accordance with the EM resistance required for the wiring, A
It is not necessary to change the etching conditions and the like for the 1 alloy.

In addition, the film formed for forming the wiring includes C
Since u is not contained, there is no need to worry about Cu deposition during film formation, for example, segregation. For this reason,
It becomes easy to apply a high-temperature film forming process of an Al alloy or the like. In other words, when applying a high-temperature film forming process for Al alloy or the like,
When the method for forming a wiring of a semiconductor device according to the present invention is also applied, the filling characteristics of contact holes, via holes, through holes, and the like are improved.

[0044]

As described above in detail, according to the present invention, generation of Cu residue can be suppressed without performing complicated steps and without changing the etching apparatus. That is, since the shape of the wiring is processed before introducing Cu, the etching does not include Cu. Therefore, no Cu residue is generated by the etching. In addition, since Cu ions are implanted after the wiring shape is formed and heat treatment is performed, an Al wiring containing Cu can be formed.
Therefore, a wiring having excellent EM resistance can be formed.

Further, since a short circuit between wirings due to Cu residue is suppressed, a decrease in the yield of semiconductor chips can be improved.

[Brief description of the drawings]

FIGS. 1A to 1C are process sectional views showing one embodiment of a method for forming a wiring of a semiconductor device according to the present invention.

FIG. 2 is a process sectional view showing one embodiment of a method for forming a wiring of a semiconductor device according to the present invention.

FIG. 3 is a process sectional view showing one embodiment of a method for forming a wiring of a semiconductor device according to the present invention.

FIG. 4 is a process sectional view showing one embodiment of a method for forming a wiring of a semiconductor device according to the present invention.

FIGS. 5A and 5B are process cross-sectional views showing a wiring structure according to a conventional technique.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Insulating film, 3 ... Barrier film, 5 ... Al alloy, etc. 7 ... Antireflection film, 9 and 17 ... Resist, 11 ... Wiring, 13 and 19
... Cu ions implanted into the substrate in a vertical direction, 15 ... Cu ions implanted in an oblique direction to the substrate, 100
... Semiconductor substrate

Claims (4)

[Claims] 1. An insulating film formed on a semiconductor substrate,
In a method of forming a wiring of a semiconductor device, wherein a wiring of aluminum containing at least copper is formed, a film forming step of forming a conductive film made of either aluminum or an aluminum alloy on the insulating film; A forming step of forming the shape of the wiring; an ion implanting step of performing copper ion implantation on the semiconductor substrate after the processing step; and performing a heat treatment after the ion implanting step to form the wiring. And a heating step. 2. The method according to claim 1, wherein in the ion implantation step, ion implantation is performed on an entire surface of the semiconductor substrate. 3. The method according to claim 1, wherein in the ion implantation step, the ion implantation is performed at an angle to a surface of the semiconductor substrate. 4. The method according to claim 1, wherein the film formed in the film forming step is aluminum or an aluminum alloy containing silicon.