JP2000151100A - Manufacture of printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the conductor land width and to improve workability for making the density high, by roughening the surface of an epoxy resin insulation layer with a plating catalyst which does not contain a glass cloth, applying adhesive, laminating a photosensitive dry film and making a hole and exposure- developing negative pattern where a plating resist layer is formed. SOLUTION: A glass epoxy copper-clad stack board with a plating catalyst is used for the inner layer base material of a multilayer wiring board. An inner layer circuit conductor 2 is etched and formed, is black-processed and a primer layer is formed on the inner layer circuit conductor 2. The insulation resin layer 3 of epoxy resin with plating catalyst, which do not contain a glass cloth, are formed on both faces. The whole area of the surface of the insulation resin layer 3 is roughened with potassium permanganate, adhesive with plating catalyst which improves the adhesion of plating copper is applied, and the adhesive layer 4 is formed. The photosensitive dry film 5 is laminated on the layer, non-through holes 7 are made and the film is exposed/developed and a resist layer 8 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a printed wiring board.

[0002]

2. Description of the Related Art In a conventional method for manufacturing a printed wiring board, for example, when a build-up multilayer board is manufactured by an additive method, after a predetermined inner layer circuit conductor is formed, an insulating resin containing no glass cloth is formed on the inner layer circuit conductor. Is formed by a screen printing method or a roll coater method to form an insulating resin layer. Next, after forming the insulating resin layer, the entire surface of the insulating resin layer is roughened with a potassium permanganate solution or the like.
Alternatively, an adhesive is applied on the insulating resin layer using a curtain coater. Next, a non-through hole that reaches the inner layer circuit conductor with a laser and a through hole with a drill are made, then a photosensitive dry film is laminated, a desired negative film is set on this photosensitive dry film, and exposure and development are performed. Then, a plating resist layer is formed. Then, electroless plating is applied to the through holes and the non-through connection holes (IV
H), a multilayer printed wiring board is manufactured by forming an outer layer circuit conductor.

[0003]

In the conventional additive printed wiring board, a photosensitive dry film is laminated after forming a non-through hole or a through hole, and then a negative pattern serving as a source of an outer layer circuit conductor is exposed and developed. The substrate shrinks, elongates, warps, twists, and shrinks between the drilling step and the step of exposing and developing the pattern negative that forms the plating resist layer.
Due to compression, aging, etc., the position of the exposure negative of the plating resist did not match the position of the hole, and the outer layer circuit conductor and the through-hole, non-through connection hole (hereinafter referred to as IVH), etc. after electroless plating. Hole position shift was likely to occur. As electronic devices have become lighter, thinner and smaller, the density of printed wiring boards has increased, and conductor lands around through-holes and IVH holes have often been reduced. There is a growing demand for landless connections to the inner layer circuit conductors, but misalignment of the holes causes frequent conduction failures and poor connection reliability, so printed wiring boards without conductor lands cannot be efficiently manufactured with high quality. There is. In other words, when the position of the pattern negative and the hole for forming the plating resist is shifted and the transmission part of the pattern negative comes on the hole, the photosensitive dry film on the hole is exposed and the remaining film becomes the film residue and adheres to the hole wall surface. In the subsequent plating step, the plating in this portion does not precipitate, resulting in poor conduction and poor plating in the hole, leading to a decrease in connection reliability and quality.

[0004]

In order to solve the above-mentioned problems, the present invention provides a step of forming an inner layer circuit conductor, a step of forming an insulating resin layer, a roughening treatment or an adhesive application step, and a drilling step. In a method for manufacturing a printed wiring board having a lamination process of a photosensitive dry film, an exposure and development process for forming a plating resist layer, and a plating process for forming a circuit conductor, etc., a plating catalyst containing no glass cloth is included. An insulating resin layer made of epoxy resin is formed, and the surface of the insulating resin layer is subjected to a roughening treatment or an adhesive application,
After laminating a photosensitive dry film on this, a non-through hole or a through hole is drilled, and then a method of manufacturing a printed wiring board by an additive method of performing exposure and development of a pattern negative for forming a plating resist layer. Things.

A feature of the present invention is that a punching step is performed after a photosensitive dry film laminating step, and a glass epoxy resin-containing copper clad laminate containing a catalyst and an epoxy resin containing a plating catalyst containing no glass cloth as a main component. The purpose of the present invention is to eliminate the usual sensitizer treatment step (catalyst adhesion treatment step) before the electroless plating step by using the insulating resin described above and an adhesive containing a plating catalyst. Therefore,
At the time of exposure and development to form a plating resist layer, even if the position of the pattern negative and the hole are misaligned, the photosensitive dry film does not exist at the hole position because the hole is made after the lamination process of the photosensitive dry film. Non-precipitation of plating on the hole wall surface due to the residual dry film does not occur.

[0006]

FIG. 1 shows an embodiment of the present invention.
It will be described based on. FIGS. 7A to 7D are cross-sectional views illustrating a process for manufacturing a printed wiring board according to the present invention. As shown in FIG. 1 (a), a glass epoxy copper clad laminate 1 containing a plating catalyst (trade name: MCL-E-168 of Hitachi Chemical Co., Ltd.) was used as an inner layer base material of a multilayer wiring board. ) Using inner layer circuit conductor 2
Is formed by etching, as shown in FIG. 1 (b), a blackening treatment is performed to form a primer layer (trade name: HNP-1 of Hitachi Chemical Co., Ltd.) on the inner layer circuit conductor 2, and a glass cloth Is formed on both surfaces of an insulating resin layer 3 (trade name: HR-3 of Hitachi Chemical Co., Ltd.) mainly containing an epoxy resin containing a plating catalyst containing no. After forming the insulating resin layer 3, the entire surface of the insulating resin layer 3 is roughened with a potassium permanganate solution or the like. An adhesive containing a plating catalyst (trade name: HA-22 of Hitachi Chemical Co., Ltd.) is applied on the insulating resin layer 3 with a curtain coater to improve the adhesion strength of the plated copper. 4 is formed. The entire surface of the insulating resin layers 3 and 3 is subjected to a roughening treatment, and photosensitive dry films 5 and 5 (trade name: Hitachi Chemical Co., Ltd .: SR-3000) are provided on the upper portions where the adhesive layers 4 and 4 are formed. Laminated and formed.

Next, as shown in FIG. 1C, a non-through hole 7 penetrating through the photosensitive dry film 5, the adhesive layer 4, and the insulating resin layer 3 and reaching the inner layer circuit conductor 2 has a frequency of 10 ⁴ -10.
Drill holes by irradiating a short pulse carbon dioxide gas laser beam of ⁸ Hz. Further, a through hole 6 penetrating the multilayer wiring board is formed by drilling.

Next, a desmear treatment (chromic anhydride 9
(50 g / l, 38 ° C., 18 minutes) to clean the inner surfaces of the through holes 6 and the non-through holes 7. Thereafter, as shown in FIG. 1D, a predetermined pattern negative film is set on the laminated photosensitive dry film, exposed by an exposure machine, and then developed to form a plating resist layer 8. Next, the surface of the adhesive layers 4 and 4 is roughened with a mixed solution of chromium and sulfuric acid (sodium fluoride 10 g / l, chromic anhydride 15 g / l, sulfuric acid 400 ml / l, 36 ° C. for 5 minutes) to form fine irregularities. After that, the through holes 6A, IVH7A, the outer layer circuit conductor 9 and the conductor around the hole which is a part of the outer layer circuit conductor 9 are formed by electroless copper plating (trade name of CC-41 of Hitachi IC Co., Ltd.). The land 10 is also formed at the same time. Through the above steps, a printed wiring board of the additive method is manufactured.

In the manufacturing process of the printed wiring board, if the designated positions of the exposure negative of the plating resist and the through holes 6 and the non-through holes 7 do not match, the outer layer circuit conductor 9 after the electroless plating is performed.
And through holes 6A and IVH 7A. As shown in FIG. 2 (a), when a printed wiring board is manufactured in a conventional manufacturing process, even if the outer layer circuit conductor 9 and the through-holes 6A and IVH 7A are misaligned, plating non-precipitation defects in the holes will not occur. The design specification of the diameter of the conductor land 10 is set so that the remaining width of the completed conductor land 10 is about 0.08 mm or more so as not to cause the occurrence. As shown in FIG. 2B, when a printed wiring board of a landless specification is manufactured in the manufacturing process according to the present invention, the hole position shift between the outer layer circuit conductor 9 and the through holes 6A and IVH7A occurs, and the remaining width of the conductor land. Is about 0 to -0.10 mm, since the photosensitive dry film does not exist on the hole, no plating non-precipitation failure occurs in the hole. FIG.
As shown in (c), in the manufacturing process according to the present invention, an outer layer circuit conductor 9 having a width of 0.20 mm, which is connected to the printed wiring board of the landless specification only in one direction from the hole, has a hole diameter = φ0.3.
It is shown as connected to the center line of mm. In this example, the contact length of the outer layer circuit conductor 9 and the holes 6A, 7A / the hole 6
The connection ratio with the peripheral lengths of A and 7A is 23.2%.
Therefore, from the evaluation results in Table 2 of the embodiment, the outer layer circuit conductor 9
The connection ratio between the holes 6A and 7A is from about 23% or more to 100%.
%, Even if the landless state is less than 10%, no plating non-precipitation failure occurs in the hole, and the connection reliability can be guaranteed.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A landless, 0.05 mm, 0.07 mm conductor land 10 having a remaining width of 0.0 mm around the through holes 6A, IVH7A described in the above embodiment of the present invention.
Table 1 shows the evaluation results of the evaluation printed wiring boards of 5 mm and 0.10 mm produced by the conventional process and the process of the present invention, and the number of plating non-precipitation defects in the holes was evaluated. (1) Conditions of printed wiring board for evaluation in Table 1 Number of samples n = 100 holes, hole diameter = φ0.3 mm, conductor land diameter = φ0.5 mm FIG. 1 (a) shows holes 6A, 7A and conductor land 10 The case where the remaining width is 0.05 mm is displayed due to the positional relationship. (2) Printed wiring board for evaluation and evaluation method in Table 2 Hole diameter = 0.3 mm, circuit conductor width = 0.10, 0.12,
0.20, 0.30 mm, land left at one end of hole =
Landless condition of 0.0mm. Evaluation method is JIS-501
In the hot oil thermal shock test using 260 ° C., 5 seconds / cold water 5 seconds as one cycle according to the thermal shock test of 2, the standard was judged to have passed 30 cycles or more. FIG. 2 (b), FIG. 2 (c)
5 shows the positional relationship between the holes 6A and 7A and the outer layer circuit conductor 9 in a case where the hole diameter is φ0.3 mm and the circuit conductor width is 0.20 mm as an example.

[0011]

[Table 1] Relationship between conductor land width around hole and number of plating non-deposition defects

[0012]

[Table 2] Relationship between conductor land width around hole and connection reliability

[0013]

As shown in Tables 1 and 2, the effect of the present invention is that the width of the conductor land 10 around the non-through conductive hole IVH7A and the through conductive hole 6A is reduced. Also, for example, even in the landless state, the photosensitive hardened film residue or the unstable film residue on the hole of the photosensitive dry film adheres to the hole wall surface, resulting in poor plating non-precipitation and the formation of the through holes 6A and IVH7A. An object of the present invention is to provide a method for manufacturing a printed wiring board which does not cause deterioration in connection reliability and plating quality. Therefore, the present invention is a method for manufacturing a printed wiring board in which the width of a conductor land around a hole can be reduced, the density of the printed wiring board can be increased with high working efficiency, high quality, high connection reliability, and low cost.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a process for manufacturing a printed wiring board according to the present invention.

FIG. 2 is a plan view for explaining an embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Glass epoxy copper clad laminate 2 ... Inner circuit conductor 3
... insulating resin layer 4 ... adhesive layer 5 ... photosensitive dry film 6 ... through-hole
6A: Through hole 7: Non-through hole 7A: IVH (non-through connection hole) 8: Plating resist layer 9: Outer layer circuit conductor 10: Conductor land.

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[Procedure amendment]

[Submission date] November 19, 1998 (1998.11.
19)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction contents]

[0010]

FIG. 2 described in the above embodiment of the present invention.
In (a), a landless, 0.05 mm, 0.075 mm, and 0.10 mm evaluation printed wiring board in which the remaining width of the conductor land 10 around the through-holes 6A and IVH7A is 0.0 mm is the same as that of the conventional construction. Table 1 shows the results of the evaluation of the number of plating non-precipitation defects in the holes, which were produced through the steps of the present invention. (1) Conditions of Printed Wiring Board for Evaluation in Table 1 FIG. 2A shows the case where the number of samples n = 100 holes, the hole diameter = 0.3 mm, and the conductor land diameter = 0.5 mm. (2) Printed wiring board for evaluation in Table 2 and evaluation method Circuit conductor width of outer circuit conductor 9 shown in FIG.
Evaluation of the landless state of 0, 0.12, 0.20, 0.30 mm and the land remaining at one hole end = 0.0 mm, and the state where the remaining width of the other conductor land on the opposite side is (-). Table 2 shows the results of the evaluation using the printed wiring board. The evaluation method was based on the thermal shock test of JIS-5012.
In a hot oil thermal shock test using 5 seconds of cold water as one cycle, the standard was judged to pass 30 cycles or more. FIG.
2 (b) and FIG. 2 (c) show the positional relationship between the holes 6A, 7A and the outer layer circuit conductor 9 with a diameter = φ0.3 mm and a circuit conductor width = 0.2.
The case of 0 mm is shown as an example.

[Procedure amendment 2]

[Document name to be amended] Drawing

[Correction target item name] All figures

[Correction method] Change

[Correction contents]

FIG.

FIG. 2

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E346 AA42 AA43 CC04 CC08 CC09 CC32 CC41 CC54 DD23 DD44 EE19 FF07 FF13 GG15 GG17 GG18 GG27 HH31

Claims (1)

[Claims] 1. A step of forming an inner circuit conductor, a step of forming an insulating resin layer, a step of roughening or applying an adhesive, a step of drilling, a step of laminating a photosensitive dry film, and forming a plating resist layer. In a method of manufacturing a printed wiring board having an exposure and development step and a plating step of forming a circuit conductor, etc., a photosensitive dry film is formed by forming an epoxy insulating resin layer containing a plating catalyst, performing a roughening treatment and applying an adhesive. A method for producing a printed wiring board, comprising: laminating a substrate, forming a hole, and then performing exposure and development for forming a plating resist layer.